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1da177e4 LT |
1 | /* |
2 | * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 | |
3 | * | |
4 | * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> | |
5 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | |
6 | * | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/module.h> |
10 | #include <linux/types.h> | |
11 | #include <linux/string.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/timer.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/major.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/genhd.h> | |
19 | #include <linux/blkpg.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/hdreg.h> | |
24 | #include <linux/ide.h> | |
25 | #include <linux/bitops.h> | |
1e86240f | 26 | #include <linux/nmi.h> |
1da177e4 LT |
27 | |
28 | #include <asm/byteorder.h> | |
29 | #include <asm/irq.h> | |
30 | #include <asm/uaccess.h> | |
31 | #include <asm/io.h> | |
32 | ||
33 | /* | |
34 | * Conventional PIO operations for ATA devices | |
35 | */ | |
36 | ||
37 | static u8 ide_inb (unsigned long port) | |
38 | { | |
39 | return (u8) inb(port); | |
40 | } | |
41 | ||
42 | static u16 ide_inw (unsigned long port) | |
43 | { | |
44 | return (u16) inw(port); | |
45 | } | |
46 | ||
47 | static void ide_insw (unsigned long port, void *addr, u32 count) | |
48 | { | |
49 | insw(port, addr, count); | |
50 | } | |
51 | ||
1da177e4 LT |
52 | static void ide_insl (unsigned long port, void *addr, u32 count) |
53 | { | |
54 | insl(port, addr, count); | |
55 | } | |
56 | ||
57 | static void ide_outb (u8 val, unsigned long port) | |
58 | { | |
59 | outb(val, port); | |
60 | } | |
61 | ||
62 | static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) | |
63 | { | |
64 | outb(addr, port); | |
65 | } | |
66 | ||
67 | static void ide_outw (u16 val, unsigned long port) | |
68 | { | |
69 | outw(val, port); | |
70 | } | |
71 | ||
72 | static void ide_outsw (unsigned long port, void *addr, u32 count) | |
73 | { | |
74 | outsw(port, addr, count); | |
75 | } | |
76 | ||
1da177e4 LT |
77 | static void ide_outsl (unsigned long port, void *addr, u32 count) |
78 | { | |
79 | outsl(port, addr, count); | |
80 | } | |
81 | ||
82 | void default_hwif_iops (ide_hwif_t *hwif) | |
83 | { | |
84 | hwif->OUTB = ide_outb; | |
85 | hwif->OUTBSYNC = ide_outbsync; | |
86 | hwif->OUTW = ide_outw; | |
1da177e4 LT |
87 | hwif->OUTSW = ide_outsw; |
88 | hwif->OUTSL = ide_outsl; | |
89 | hwif->INB = ide_inb; | |
90 | hwif->INW = ide_inw; | |
1da177e4 LT |
91 | hwif->INSW = ide_insw; |
92 | hwif->INSL = ide_insl; | |
93 | } | |
94 | ||
1da177e4 LT |
95 | /* |
96 | * MMIO operations, typically used for SATA controllers | |
97 | */ | |
98 | ||
99 | static u8 ide_mm_inb (unsigned long port) | |
100 | { | |
101 | return (u8) readb((void __iomem *) port); | |
102 | } | |
103 | ||
104 | static u16 ide_mm_inw (unsigned long port) | |
105 | { | |
106 | return (u16) readw((void __iomem *) port); | |
107 | } | |
108 | ||
109 | static void ide_mm_insw (unsigned long port, void *addr, u32 count) | |
110 | { | |
111 | __ide_mm_insw((void __iomem *) port, addr, count); | |
112 | } | |
113 | ||
1da177e4 LT |
114 | static void ide_mm_insl (unsigned long port, void *addr, u32 count) |
115 | { | |
116 | __ide_mm_insl((void __iomem *) port, addr, count); | |
117 | } | |
118 | ||
119 | static void ide_mm_outb (u8 value, unsigned long port) | |
120 | { | |
121 | writeb(value, (void __iomem *) port); | |
122 | } | |
123 | ||
124 | static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) | |
125 | { | |
126 | writeb(value, (void __iomem *) port); | |
127 | } | |
128 | ||
129 | static void ide_mm_outw (u16 value, unsigned long port) | |
130 | { | |
131 | writew(value, (void __iomem *) port); | |
132 | } | |
133 | ||
134 | static void ide_mm_outsw (unsigned long port, void *addr, u32 count) | |
135 | { | |
136 | __ide_mm_outsw((void __iomem *) port, addr, count); | |
137 | } | |
138 | ||
1da177e4 LT |
139 | static void ide_mm_outsl (unsigned long port, void *addr, u32 count) |
140 | { | |
141 | __ide_mm_outsl((void __iomem *) port, addr, count); | |
142 | } | |
143 | ||
144 | void default_hwif_mmiops (ide_hwif_t *hwif) | |
145 | { | |
146 | hwif->OUTB = ide_mm_outb; | |
147 | /* Most systems will need to override OUTBSYNC, alas however | |
148 | this one is controller specific! */ | |
149 | hwif->OUTBSYNC = ide_mm_outbsync; | |
150 | hwif->OUTW = ide_mm_outw; | |
1da177e4 LT |
151 | hwif->OUTSW = ide_mm_outsw; |
152 | hwif->OUTSL = ide_mm_outsl; | |
153 | hwif->INB = ide_mm_inb; | |
154 | hwif->INW = ide_mm_inw; | |
1da177e4 LT |
155 | hwif->INSW = ide_mm_insw; |
156 | hwif->INSL = ide_mm_insl; | |
157 | } | |
158 | ||
159 | EXPORT_SYMBOL(default_hwif_mmiops); | |
160 | ||
1da177e4 LT |
161 | void SELECT_DRIVE (ide_drive_t *drive) |
162 | { | |
163 | if (HWIF(drive)->selectproc) | |
164 | HWIF(drive)->selectproc(drive); | |
165 | HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); | |
166 | } | |
167 | ||
168 | EXPORT_SYMBOL(SELECT_DRIVE); | |
169 | ||
1da177e4 LT |
170 | void SELECT_MASK (ide_drive_t *drive, int mask) |
171 | { | |
172 | if (HWIF(drive)->maskproc) | |
173 | HWIF(drive)->maskproc(drive, mask); | |
174 | } | |
175 | ||
1da177e4 LT |
176 | /* |
177 | * Some localbus EIDE interfaces require a special access sequence | |
178 | * when using 32-bit I/O instructions to transfer data. We call this | |
179 | * the "vlb_sync" sequence, which consists of three successive reads | |
180 | * of the sector count register location, with interrupts disabled | |
181 | * to ensure that the reads all happen together. | |
182 | */ | |
183 | static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) | |
184 | { | |
185 | (void) HWIF(drive)->INB(port); | |
186 | (void) HWIF(drive)->INB(port); | |
187 | (void) HWIF(drive)->INB(port); | |
188 | } | |
189 | ||
190 | /* | |
191 | * This is used for most PIO data transfers *from* the IDE interface | |
192 | */ | |
193 | static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) | |
194 | { | |
195 | ide_hwif_t *hwif = HWIF(drive); | |
196 | u8 io_32bit = drive->io_32bit; | |
197 | ||
198 | if (io_32bit) { | |
199 | if (io_32bit & 2) { | |
200 | unsigned long flags; | |
201 | local_irq_save(flags); | |
202 | ata_vlb_sync(drive, IDE_NSECTOR_REG); | |
203 | hwif->INSL(IDE_DATA_REG, buffer, wcount); | |
204 | local_irq_restore(flags); | |
205 | } else | |
206 | hwif->INSL(IDE_DATA_REG, buffer, wcount); | |
207 | } else { | |
208 | hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); | |
209 | } | |
210 | } | |
211 | ||
212 | /* | |
213 | * This is used for most PIO data transfers *to* the IDE interface | |
214 | */ | |
215 | static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) | |
216 | { | |
217 | ide_hwif_t *hwif = HWIF(drive); | |
218 | u8 io_32bit = drive->io_32bit; | |
219 | ||
220 | if (io_32bit) { | |
221 | if (io_32bit & 2) { | |
222 | unsigned long flags; | |
223 | local_irq_save(flags); | |
224 | ata_vlb_sync(drive, IDE_NSECTOR_REG); | |
225 | hwif->OUTSL(IDE_DATA_REG, buffer, wcount); | |
226 | local_irq_restore(flags); | |
227 | } else | |
228 | hwif->OUTSL(IDE_DATA_REG, buffer, wcount); | |
229 | } else { | |
230 | hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); | |
231 | } | |
232 | } | |
233 | ||
234 | /* | |
235 | * The following routines are mainly used by the ATAPI drivers. | |
236 | * | |
237 | * These routines will round up any request for an odd number of bytes, | |
238 | * so if an odd bytecount is specified, be sure that there's at least one | |
239 | * extra byte allocated for the buffer. | |
240 | */ | |
241 | ||
242 | static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) | |
243 | { | |
244 | ide_hwif_t *hwif = HWIF(drive); | |
245 | ||
246 | ++bytecount; | |
247 | #if defined(CONFIG_ATARI) || defined(CONFIG_Q40) | |
248 | if (MACH_IS_ATARI || MACH_IS_Q40) { | |
249 | /* Atari has a byte-swapped IDE interface */ | |
250 | insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); | |
251 | return; | |
252 | } | |
253 | #endif /* CONFIG_ATARI || CONFIG_Q40 */ | |
254 | hwif->ata_input_data(drive, buffer, bytecount / 4); | |
255 | if ((bytecount & 0x03) >= 2) | |
256 | hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); | |
257 | } | |
258 | ||
259 | static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) | |
260 | { | |
261 | ide_hwif_t *hwif = HWIF(drive); | |
262 | ||
263 | ++bytecount; | |
264 | #if defined(CONFIG_ATARI) || defined(CONFIG_Q40) | |
265 | if (MACH_IS_ATARI || MACH_IS_Q40) { | |
266 | /* Atari has a byte-swapped IDE interface */ | |
267 | outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); | |
268 | return; | |
269 | } | |
270 | #endif /* CONFIG_ATARI || CONFIG_Q40 */ | |
271 | hwif->ata_output_data(drive, buffer, bytecount / 4); | |
272 | if ((bytecount & 0x03) >= 2) | |
273 | hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); | |
274 | } | |
275 | ||
276 | void default_hwif_transport(ide_hwif_t *hwif) | |
277 | { | |
278 | hwif->ata_input_data = ata_input_data; | |
279 | hwif->ata_output_data = ata_output_data; | |
280 | hwif->atapi_input_bytes = atapi_input_bytes; | |
281 | hwif->atapi_output_bytes = atapi_output_bytes; | |
282 | } | |
283 | ||
1da177e4 LT |
284 | void ide_fix_driveid (struct hd_driveid *id) |
285 | { | |
286 | #ifndef __LITTLE_ENDIAN | |
287 | # ifdef __BIG_ENDIAN | |
288 | int i; | |
289 | u16 *stringcast; | |
290 | ||
291 | id->config = __le16_to_cpu(id->config); | |
292 | id->cyls = __le16_to_cpu(id->cyls); | |
293 | id->reserved2 = __le16_to_cpu(id->reserved2); | |
294 | id->heads = __le16_to_cpu(id->heads); | |
295 | id->track_bytes = __le16_to_cpu(id->track_bytes); | |
296 | id->sector_bytes = __le16_to_cpu(id->sector_bytes); | |
297 | id->sectors = __le16_to_cpu(id->sectors); | |
298 | id->vendor0 = __le16_to_cpu(id->vendor0); | |
299 | id->vendor1 = __le16_to_cpu(id->vendor1); | |
300 | id->vendor2 = __le16_to_cpu(id->vendor2); | |
301 | stringcast = (u16 *)&id->serial_no[0]; | |
302 | for (i = 0; i < (20/2); i++) | |
303 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
304 | id->buf_type = __le16_to_cpu(id->buf_type); | |
305 | id->buf_size = __le16_to_cpu(id->buf_size); | |
306 | id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); | |
307 | stringcast = (u16 *)&id->fw_rev[0]; | |
308 | for (i = 0; i < (8/2); i++) | |
309 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
310 | stringcast = (u16 *)&id->model[0]; | |
311 | for (i = 0; i < (40/2); i++) | |
312 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
313 | id->dword_io = __le16_to_cpu(id->dword_io); | |
314 | id->reserved50 = __le16_to_cpu(id->reserved50); | |
315 | id->field_valid = __le16_to_cpu(id->field_valid); | |
316 | id->cur_cyls = __le16_to_cpu(id->cur_cyls); | |
317 | id->cur_heads = __le16_to_cpu(id->cur_heads); | |
318 | id->cur_sectors = __le16_to_cpu(id->cur_sectors); | |
319 | id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); | |
320 | id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); | |
321 | id->lba_capacity = __le32_to_cpu(id->lba_capacity); | |
322 | id->dma_1word = __le16_to_cpu(id->dma_1word); | |
323 | id->dma_mword = __le16_to_cpu(id->dma_mword); | |
324 | id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); | |
325 | id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); | |
326 | id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); | |
327 | id->eide_pio = __le16_to_cpu(id->eide_pio); | |
328 | id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); | |
329 | for (i = 0; i < 2; ++i) | |
330 | id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); | |
331 | for (i = 0; i < 4; ++i) | |
332 | id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); | |
333 | id->queue_depth = __le16_to_cpu(id->queue_depth); | |
334 | for (i = 0; i < 4; ++i) | |
335 | id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); | |
336 | id->major_rev_num = __le16_to_cpu(id->major_rev_num); | |
337 | id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); | |
338 | id->command_set_1 = __le16_to_cpu(id->command_set_1); | |
339 | id->command_set_2 = __le16_to_cpu(id->command_set_2); | |
340 | id->cfsse = __le16_to_cpu(id->cfsse); | |
341 | id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); | |
342 | id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); | |
343 | id->csf_default = __le16_to_cpu(id->csf_default); | |
344 | id->dma_ultra = __le16_to_cpu(id->dma_ultra); | |
345 | id->trseuc = __le16_to_cpu(id->trseuc); | |
346 | id->trsEuc = __le16_to_cpu(id->trsEuc); | |
347 | id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); | |
348 | id->mprc = __le16_to_cpu(id->mprc); | |
349 | id->hw_config = __le16_to_cpu(id->hw_config); | |
350 | id->acoustic = __le16_to_cpu(id->acoustic); | |
351 | id->msrqs = __le16_to_cpu(id->msrqs); | |
352 | id->sxfert = __le16_to_cpu(id->sxfert); | |
353 | id->sal = __le16_to_cpu(id->sal); | |
354 | id->spg = __le32_to_cpu(id->spg); | |
355 | id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); | |
356 | for (i = 0; i < 22; i++) | |
357 | id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); | |
358 | id->last_lun = __le16_to_cpu(id->last_lun); | |
359 | id->word127 = __le16_to_cpu(id->word127); | |
360 | id->dlf = __le16_to_cpu(id->dlf); | |
361 | id->csfo = __le16_to_cpu(id->csfo); | |
362 | for (i = 0; i < 26; i++) | |
363 | id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); | |
364 | id->word156 = __le16_to_cpu(id->word156); | |
365 | for (i = 0; i < 3; i++) | |
366 | id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); | |
367 | id->cfa_power = __le16_to_cpu(id->cfa_power); | |
368 | for (i = 0; i < 14; i++) | |
369 | id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); | |
370 | for (i = 0; i < 31; i++) | |
371 | id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); | |
372 | for (i = 0; i < 48; i++) | |
373 | id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); | |
374 | id->integrity_word = __le16_to_cpu(id->integrity_word); | |
375 | # else | |
376 | # error "Please fix <asm/byteorder.h>" | |
377 | # endif | |
378 | #endif | |
379 | } | |
380 | ||
01745112 BZ |
381 | /* |
382 | * ide_fixstring() cleans up and (optionally) byte-swaps a text string, | |
383 | * removing leading/trailing blanks and compressing internal blanks. | |
384 | * It is primarily used to tidy up the model name/number fields as | |
385 | * returned by the WIN_[P]IDENTIFY commands. | |
386 | */ | |
387 | ||
1da177e4 LT |
388 | void ide_fixstring (u8 *s, const int bytecount, const int byteswap) |
389 | { | |
390 | u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ | |
391 | ||
392 | if (byteswap) { | |
393 | /* convert from big-endian to host byte order */ | |
394 | for (p = end ; p != s;) { | |
395 | unsigned short *pp = (unsigned short *) (p -= 2); | |
396 | *pp = ntohs(*pp); | |
397 | } | |
398 | } | |
399 | /* strip leading blanks */ | |
400 | while (s != end && *s == ' ') | |
401 | ++s; | |
402 | /* compress internal blanks and strip trailing blanks */ | |
403 | while (s != end && *s) { | |
404 | if (*s++ != ' ' || (s != end && *s && *s != ' ')) | |
405 | *p++ = *(s-1); | |
406 | } | |
407 | /* wipe out trailing garbage */ | |
408 | while (p != end) | |
409 | *p++ = '\0'; | |
410 | } | |
411 | ||
412 | EXPORT_SYMBOL(ide_fixstring); | |
413 | ||
414 | /* | |
415 | * Needed for PCI irq sharing | |
416 | */ | |
417 | int drive_is_ready (ide_drive_t *drive) | |
418 | { | |
419 | ide_hwif_t *hwif = HWIF(drive); | |
420 | u8 stat = 0; | |
421 | ||
422 | if (drive->waiting_for_dma) | |
423 | return hwif->ide_dma_test_irq(drive); | |
424 | ||
425 | #if 0 | |
426 | /* need to guarantee 400ns since last command was issued */ | |
427 | udelay(1); | |
428 | #endif | |
429 | ||
1da177e4 LT |
430 | /* |
431 | * We do a passive status test under shared PCI interrupts on | |
432 | * cards that truly share the ATA side interrupt, but may also share | |
433 | * an interrupt with another pci card/device. We make no assumptions | |
434 | * about possible isa-pnp and pci-pnp issues yet. | |
435 | */ | |
436 | if (IDE_CONTROL_REG) | |
437 | stat = hwif->INB(IDE_ALTSTATUS_REG); | |
438 | else | |
1da177e4 LT |
439 | /* Note: this may clear a pending IRQ!! */ |
440 | stat = hwif->INB(IDE_STATUS_REG); | |
441 | ||
442 | if (stat & BUSY_STAT) | |
443 | /* drive busy: definitely not interrupting */ | |
444 | return 0; | |
445 | ||
446 | /* drive ready: *might* be interrupting */ | |
447 | return 1; | |
448 | } | |
449 | ||
450 | EXPORT_SYMBOL(drive_is_ready); | |
451 | ||
1da177e4 LT |
452 | /* |
453 | * This routine busy-waits for the drive status to be not "busy". | |
454 | * It then checks the status for all of the "good" bits and none | |
455 | * of the "bad" bits, and if all is okay it returns 0. All other | |
74af21cf | 456 | * cases return error -- caller may then invoke ide_error(). |
1da177e4 LT |
457 | * |
458 | * This routine should get fixed to not hog the cpu during extra long waits.. | |
459 | * That could be done by busy-waiting for the first jiffy or two, and then | |
460 | * setting a timer to wake up at half second intervals thereafter, | |
461 | * until timeout is achieved, before timing out. | |
462 | */ | |
aedea591 | 463 | static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) |
1da177e4 | 464 | { |
74af21cf | 465 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 466 | unsigned long flags; |
74af21cf BZ |
467 | int i; |
468 | u8 stat; | |
1da177e4 LT |
469 | |
470 | udelay(1); /* spec allows drive 400ns to assert "BUSY" */ | |
471 | if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { | |
472 | local_irq_set(flags); | |
473 | timeout += jiffies; | |
474 | while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { | |
475 | if (time_after(jiffies, timeout)) { | |
476 | /* | |
477 | * One last read after the timeout in case | |
478 | * heavy interrupt load made us not make any | |
479 | * progress during the timeout.. | |
480 | */ | |
481 | stat = hwif->INB(IDE_STATUS_REG); | |
482 | if (!(stat & BUSY_STAT)) | |
483 | break; | |
484 | ||
485 | local_irq_restore(flags); | |
74af21cf BZ |
486 | *rstat = stat; |
487 | return -EBUSY; | |
1da177e4 LT |
488 | } |
489 | } | |
490 | local_irq_restore(flags); | |
491 | } | |
492 | /* | |
493 | * Allow status to settle, then read it again. | |
494 | * A few rare drives vastly violate the 400ns spec here, | |
495 | * so we'll wait up to 10usec for a "good" status | |
496 | * rather than expensively fail things immediately. | |
497 | * This fix courtesy of Matthew Faupel & Niccolo Rigacci. | |
498 | */ | |
499 | for (i = 0; i < 10; i++) { | |
500 | udelay(1); | |
74af21cf BZ |
501 | if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) { |
502 | *rstat = stat; | |
1da177e4 | 503 | return 0; |
74af21cf | 504 | } |
1da177e4 | 505 | } |
74af21cf BZ |
506 | *rstat = stat; |
507 | return -EFAULT; | |
508 | } | |
509 | ||
510 | /* | |
511 | * In case of error returns error value after doing "*startstop = ide_error()". | |
512 | * The caller should return the updated value of "startstop" in this case, | |
513 | * "startstop" is unchanged when the function returns 0. | |
514 | */ | |
515 | int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) | |
516 | { | |
517 | int err; | |
518 | u8 stat; | |
519 | ||
520 | /* bail early if we've exceeded max_failures */ | |
521 | if (drive->max_failures && (drive->failures > drive->max_failures)) { | |
522 | *startstop = ide_stopped; | |
523 | return 1; | |
524 | } | |
525 | ||
526 | err = __ide_wait_stat(drive, good, bad, timeout, &stat); | |
527 | ||
528 | if (err) { | |
529 | char *s = (err == -EBUSY) ? "status timeout" : "status error"; | |
530 | *startstop = ide_error(drive, s, stat); | |
531 | } | |
532 | ||
533 | return err; | |
1da177e4 LT |
534 | } |
535 | ||
536 | EXPORT_SYMBOL(ide_wait_stat); | |
537 | ||
a5b7e70d BZ |
538 | /** |
539 | * ide_in_drive_list - look for drive in black/white list | |
540 | * @id: drive identifier | |
541 | * @drive_table: list to inspect | |
542 | * | |
543 | * Look for a drive in the blacklist and the whitelist tables | |
544 | * Returns 1 if the drive is found in the table. | |
545 | */ | |
546 | ||
547 | int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) | |
548 | { | |
549 | for ( ; drive_table->id_model; drive_table++) | |
550 | if ((!strcmp(drive_table->id_model, id->model)) && | |
551 | (!drive_table->id_firmware || | |
552 | strstr(id->fw_rev, drive_table->id_firmware))) | |
553 | return 1; | |
554 | return 0; | |
555 | } | |
556 | ||
b0244a00 BZ |
557 | EXPORT_SYMBOL_GPL(ide_in_drive_list); |
558 | ||
a5b7e70d BZ |
559 | /* |
560 | * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. | |
561 | * We list them here and depend on the device side cable detection for them. | |
8588a2b7 BZ |
562 | * |
563 | * Some optical devices with the buggy firmwares have the same problem. | |
a5b7e70d BZ |
564 | */ |
565 | static const struct drive_list_entry ivb_list[] = { | |
566 | { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, | |
8588a2b7 | 567 | { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, |
e97564f3 PM |
568 | { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, |
569 | { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, | |
570 | { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, | |
a5b7e70d BZ |
571 | { NULL , NULL } |
572 | }; | |
573 | ||
1da177e4 LT |
574 | /* |
575 | * All hosts that use the 80c ribbon must use! | |
576 | * The name is derived from upper byte of word 93 and the 80c ribbon. | |
577 | */ | |
578 | u8 eighty_ninty_three (ide_drive_t *drive) | |
579 | { | |
7f8f48af BZ |
580 | ide_hwif_t *hwif = drive->hwif; |
581 | struct hd_driveid *id = drive->id; | |
a5b7e70d | 582 | int ivb = ide_in_drive_list(id, ivb_list); |
7f8f48af | 583 | |
49521f97 BZ |
584 | if (hwif->cbl == ATA_CBL_PATA40_SHORT) |
585 | return 1; | |
586 | ||
a5b7e70d BZ |
587 | if (ivb) |
588 | printk(KERN_DEBUG "%s: skipping word 93 validity check\n", | |
589 | drive->name); | |
590 | ||
b98f8803 GK |
591 | if (ide_dev_is_sata(id) && !ivb) |
592 | return 1; | |
593 | ||
a5b7e70d | 594 | if (hwif->cbl != ATA_CBL_PATA80 && !ivb) |
7f8f48af | 595 | goto no_80w; |
1a1276e7 | 596 | |
f68d9320 BZ |
597 | /* |
598 | * FIXME: | |
a5b7e70d | 599 | * - force bit13 (80c cable present) check also for !ivb devices |
f68d9320 BZ |
600 | * (unless the slave device is pre-ATA3) |
601 | */ | |
a5b7e70d | 602 | if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) |
7f8f48af BZ |
603 | return 1; |
604 | ||
605 | no_80w: | |
606 | if (drive->udma33_warned == 1) | |
607 | return 0; | |
608 | ||
609 | printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " | |
610 | "limiting max speed to UDMA33\n", | |
49521f97 BZ |
611 | drive->name, |
612 | hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); | |
7f8f48af BZ |
613 | |
614 | drive->udma33_warned = 1; | |
615 | ||
616 | return 0; | |
1da177e4 LT |
617 | } |
618 | ||
1da177e4 LT |
619 | int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) |
620 | { | |
650d841d BZ |
621 | if (args->tf.command == WIN_SETFEATURES && |
622 | args->tf.lbal > XFER_UDMA_2 && | |
623 | args->tf.feature == SETFEATURES_XFER) { | |
7f8f48af BZ |
624 | if (eighty_ninty_three(drive) == 0) { |
625 | printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " | |
626 | "be set\n", drive->name); | |
1da177e4 LT |
627 | return 1; |
628 | } | |
629 | } | |
7f8f48af | 630 | |
1da177e4 LT |
631 | return 0; |
632 | } | |
633 | ||
634 | /* | |
635 | * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. | |
636 | * 1 : Safe to update drive->id DMA registers. | |
637 | * 0 : OOPs not allowed. | |
638 | */ | |
639 | int set_transfer (ide_drive_t *drive, ide_task_t *args) | |
640 | { | |
650d841d BZ |
641 | if (args->tf.command == WIN_SETFEATURES && |
642 | args->tf.lbal >= XFER_SW_DMA_0 && | |
643 | args->tf.feature == SETFEATURES_XFER && | |
1da177e4 LT |
644 | (drive->id->dma_ultra || |
645 | drive->id->dma_mword || | |
646 | drive->id->dma_1word)) | |
647 | return 1; | |
648 | ||
649 | return 0; | |
650 | } | |
651 | ||
652 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
653 | static u8 ide_auto_reduce_xfer (ide_drive_t *drive) | |
654 | { | |
655 | if (!drive->crc_count) | |
656 | return drive->current_speed; | |
657 | drive->crc_count = 0; | |
658 | ||
659 | switch(drive->current_speed) { | |
660 | case XFER_UDMA_7: return XFER_UDMA_6; | |
661 | case XFER_UDMA_6: return XFER_UDMA_5; | |
662 | case XFER_UDMA_5: return XFER_UDMA_4; | |
663 | case XFER_UDMA_4: return XFER_UDMA_3; | |
664 | case XFER_UDMA_3: return XFER_UDMA_2; | |
665 | case XFER_UDMA_2: return XFER_UDMA_1; | |
666 | case XFER_UDMA_1: return XFER_UDMA_0; | |
667 | /* | |
668 | * OOPS we do not goto non Ultra DMA modes | |
669 | * without iCRC's available we force | |
670 | * the system to PIO and make the user | |
671 | * invoke the ATA-1 ATA-2 DMA modes. | |
672 | */ | |
673 | case XFER_UDMA_0: | |
674 | default: return XFER_PIO_4; | |
675 | } | |
676 | } | |
677 | #endif /* CONFIG_BLK_DEV_IDEDMA */ | |
678 | ||
8a455134 | 679 | int ide_driveid_update(ide_drive_t *drive) |
1da177e4 | 680 | { |
8a455134 | 681 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 682 | struct hd_driveid *id; |
8a455134 | 683 | unsigned long timeout, flags; |
1da177e4 | 684 | |
1da177e4 LT |
685 | /* |
686 | * Re-read drive->id for possible DMA mode | |
687 | * change (copied from ide-probe.c) | |
688 | */ | |
1da177e4 LT |
689 | |
690 | SELECT_MASK(drive, 1); | |
691 | if (IDE_CONTROL_REG) | |
692 | hwif->OUTB(drive->ctl,IDE_CONTROL_REG); | |
693 | msleep(50); | |
694 | hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); | |
695 | timeout = jiffies + WAIT_WORSTCASE; | |
696 | do { | |
697 | if (time_after(jiffies, timeout)) { | |
698 | SELECT_MASK(drive, 0); | |
699 | return 0; /* drive timed-out */ | |
700 | } | |
701 | msleep(50); /* give drive a breather */ | |
702 | } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); | |
703 | msleep(50); /* wait for IRQ and DRQ_STAT */ | |
704 | if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { | |
705 | SELECT_MASK(drive, 0); | |
706 | printk("%s: CHECK for good STATUS\n", drive->name); | |
707 | return 0; | |
708 | } | |
709 | local_irq_save(flags); | |
710 | SELECT_MASK(drive, 0); | |
711 | id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); | |
712 | if (!id) { | |
713 | local_irq_restore(flags); | |
714 | return 0; | |
715 | } | |
716 | ata_input_data(drive, id, SECTOR_WORDS); | |
717 | (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ | |
718 | local_irq_enable(); | |
719 | local_irq_restore(flags); | |
720 | ide_fix_driveid(id); | |
721 | if (id) { | |
722 | drive->id->dma_ultra = id->dma_ultra; | |
723 | drive->id->dma_mword = id->dma_mword; | |
724 | drive->id->dma_1word = id->dma_1word; | |
725 | /* anything more ? */ | |
726 | kfree(id); | |
3ab7efe8 BZ |
727 | |
728 | if (drive->using_dma && ide_id_dma_bug(drive)) | |
729 | ide_dma_off(drive); | |
1da177e4 LT |
730 | } |
731 | ||
732 | return 1; | |
1da177e4 LT |
733 | } |
734 | ||
74af21cf | 735 | int ide_config_drive_speed(ide_drive_t *drive, u8 speed) |
1da177e4 | 736 | { |
74af21cf | 737 | ide_hwif_t *hwif = drive->hwif; |
89613e66 | 738 | int error = 0; |
1da177e4 LT |
739 | u8 stat; |
740 | ||
741 | // while (HWGROUP(drive)->busy) | |
742 | // msleep(50); | |
743 | ||
744 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
0ae2e178 | 745 | if (hwif->ide_dma_on) /* check if host supports DMA */ |
7469aaf6 | 746 | hwif->dma_host_off(drive); |
1da177e4 LT |
747 | #endif |
748 | ||
89613e66 SS |
749 | /* Skip setting PIO flow-control modes on pre-EIDE drives */ |
750 | if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) | |
751 | goto skip; | |
752 | ||
1da177e4 LT |
753 | /* |
754 | * Don't use ide_wait_cmd here - it will | |
755 | * attempt to set_geometry and recalibrate, | |
756 | * but for some reason these don't work at | |
757 | * this point (lost interrupt). | |
758 | */ | |
759 | /* | |
760 | * Select the drive, and issue the SETFEATURES command | |
761 | */ | |
762 | disable_irq_nosync(hwif->irq); | |
763 | ||
764 | /* | |
765 | * FIXME: we race against the running IRQ here if | |
766 | * this is called from non IRQ context. If we use | |
767 | * disable_irq() we hang on the error path. Work | |
768 | * is needed. | |
769 | */ | |
770 | ||
771 | udelay(1); | |
772 | SELECT_DRIVE(drive); | |
773 | SELECT_MASK(drive, 0); | |
774 | udelay(1); | |
775 | if (IDE_CONTROL_REG) | |
776 | hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); | |
777 | hwif->OUTB(speed, IDE_NSECTOR_REG); | |
778 | hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); | |
adcd33d4 | 779 | hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); |
1da177e4 LT |
780 | if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) |
781 | hwif->OUTB(drive->ctl, IDE_CONTROL_REG); | |
1da177e4 | 782 | |
74af21cf BZ |
783 | error = __ide_wait_stat(drive, drive->ready_stat, |
784 | BUSY_STAT|DRQ_STAT|ERR_STAT, | |
785 | WAIT_CMD, &stat); | |
1da177e4 LT |
786 | |
787 | SELECT_MASK(drive, 0); | |
788 | ||
789 | enable_irq(hwif->irq); | |
790 | ||
791 | if (error) { | |
792 | (void) ide_dump_status(drive, "set_drive_speed_status", stat); | |
793 | return error; | |
794 | } | |
795 | ||
796 | drive->id->dma_ultra &= ~0xFF00; | |
797 | drive->id->dma_mword &= ~0x0F00; | |
798 | drive->id->dma_1word &= ~0x0F00; | |
799 | ||
89613e66 | 800 | skip: |
1da177e4 | 801 | #ifdef CONFIG_BLK_DEV_IDEDMA |
aea5d375 | 802 | if (speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) |
ccf35289 | 803 | hwif->dma_host_on(drive); |
0ae2e178 | 804 | else if (hwif->ide_dma_on) /* check if host supports DMA */ |
7469aaf6 | 805 | hwif->dma_off_quietly(drive); |
1da177e4 LT |
806 | #endif |
807 | ||
808 | switch(speed) { | |
809 | case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; | |
810 | case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; | |
811 | case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; | |
812 | case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; | |
813 | case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; | |
814 | case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; | |
815 | case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; | |
816 | case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; | |
817 | case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; | |
818 | case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; | |
819 | case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; | |
820 | case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; | |
821 | case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; | |
822 | case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; | |
823 | default: break; | |
824 | } | |
825 | if (!drive->init_speed) | |
826 | drive->init_speed = speed; | |
827 | drive->current_speed = speed; | |
828 | return error; | |
829 | } | |
830 | ||
1da177e4 LT |
831 | /* |
832 | * This should get invoked any time we exit the driver to | |
833 | * wait for an interrupt response from a drive. handler() points | |
834 | * at the appropriate code to handle the next interrupt, and a | |
835 | * timer is started to prevent us from waiting forever in case | |
836 | * something goes wrong (see the ide_timer_expiry() handler later on). | |
837 | * | |
838 | * See also ide_execute_command | |
839 | */ | |
840 | static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
841 | unsigned int timeout, ide_expiry_t *expiry) | |
842 | { | |
843 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
844 | ||
845 | if (hwgroup->handler != NULL) { | |
846 | printk(KERN_CRIT "%s: ide_set_handler: handler not null; " | |
847 | "old=%p, new=%p\n", | |
848 | drive->name, hwgroup->handler, handler); | |
849 | } | |
850 | hwgroup->handler = handler; | |
851 | hwgroup->expiry = expiry; | |
852 | hwgroup->timer.expires = jiffies + timeout; | |
23450319 | 853 | hwgroup->req_gen_timer = hwgroup->req_gen; |
1da177e4 LT |
854 | add_timer(&hwgroup->timer); |
855 | } | |
856 | ||
857 | void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
858 | unsigned int timeout, ide_expiry_t *expiry) | |
859 | { | |
860 | unsigned long flags; | |
861 | spin_lock_irqsave(&ide_lock, flags); | |
862 | __ide_set_handler(drive, handler, timeout, expiry); | |
863 | spin_unlock_irqrestore(&ide_lock, flags); | |
864 | } | |
865 | ||
866 | EXPORT_SYMBOL(ide_set_handler); | |
867 | ||
868 | /** | |
869 | * ide_execute_command - execute an IDE command | |
870 | * @drive: IDE drive to issue the command against | |
871 | * @command: command byte to write | |
872 | * @handler: handler for next phase | |
873 | * @timeout: timeout for command | |
874 | * @expiry: handler to run on timeout | |
875 | * | |
876 | * Helper function to issue an IDE command. This handles the | |
877 | * atomicity requirements, command timing and ensures that the | |
878 | * handler and IRQ setup do not race. All IDE command kick off | |
879 | * should go via this function or do equivalent locking. | |
880 | */ | |
cd2a2d96 BZ |
881 | |
882 | void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, | |
883 | unsigned timeout, ide_expiry_t *expiry) | |
1da177e4 LT |
884 | { |
885 | unsigned long flags; | |
886 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
887 | ide_hwif_t *hwif = HWIF(drive); | |
888 | ||
889 | spin_lock_irqsave(&ide_lock, flags); | |
890 | ||
125e1874 | 891 | BUG_ON(hwgroup->handler); |
1da177e4 LT |
892 | hwgroup->handler = handler; |
893 | hwgroup->expiry = expiry; | |
894 | hwgroup->timer.expires = jiffies + timeout; | |
23450319 | 895 | hwgroup->req_gen_timer = hwgroup->req_gen; |
1da177e4 LT |
896 | add_timer(&hwgroup->timer); |
897 | hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); | |
898 | /* Drive takes 400nS to respond, we must avoid the IRQ being | |
899 | serviced before that. | |
900 | ||
901 | FIXME: we could skip this delay with care on non shared | |
902 | devices | |
903 | */ | |
904 | ndelay(400); | |
905 | spin_unlock_irqrestore(&ide_lock, flags); | |
906 | } | |
907 | ||
908 | EXPORT_SYMBOL(ide_execute_command); | |
909 | ||
910 | ||
911 | /* needed below */ | |
912 | static ide_startstop_t do_reset1 (ide_drive_t *, int); | |
913 | ||
914 | /* | |
915 | * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
916 | * during an atapi drive reset operation. If the drive has not yet responded, | |
917 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
918 | * for another 50ms. | |
919 | */ | |
920 | static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) | |
921 | { | |
922 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
923 | ide_hwif_t *hwif = HWIF(drive); | |
924 | u8 stat; | |
925 | ||
926 | SELECT_DRIVE(drive); | |
927 | udelay (10); | |
928 | ||
929 | if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { | |
930 | printk("%s: ATAPI reset complete\n", drive->name); | |
931 | } else { | |
932 | if (time_before(jiffies, hwgroup->poll_timeout)) { | |
125e1874 | 933 | BUG_ON(HWGROUP(drive)->handler != NULL); |
1da177e4 LT |
934 | ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); |
935 | /* continue polling */ | |
936 | return ide_started; | |
937 | } | |
938 | /* end of polling */ | |
939 | hwgroup->polling = 0; | |
940 | printk("%s: ATAPI reset timed-out, status=0x%02x\n", | |
941 | drive->name, stat); | |
942 | /* do it the old fashioned way */ | |
943 | return do_reset1(drive, 1); | |
944 | } | |
945 | /* done polling */ | |
946 | hwgroup->polling = 0; | |
913759ac | 947 | hwgroup->resetting = 0; |
1da177e4 LT |
948 | return ide_stopped; |
949 | } | |
950 | ||
951 | /* | |
952 | * reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
953 | * during an ide reset operation. If the drives have not yet responded, | |
954 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
955 | * for another 50ms. | |
956 | */ | |
957 | static ide_startstop_t reset_pollfunc (ide_drive_t *drive) | |
958 | { | |
959 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
960 | ide_hwif_t *hwif = HWIF(drive); | |
961 | u8 tmp; | |
962 | ||
963 | if (hwif->reset_poll != NULL) { | |
964 | if (hwif->reset_poll(drive)) { | |
965 | printk(KERN_ERR "%s: host reset_poll failure for %s.\n", | |
966 | hwif->name, drive->name); | |
967 | return ide_stopped; | |
968 | } | |
969 | } | |
970 | ||
971 | if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { | |
972 | if (time_before(jiffies, hwgroup->poll_timeout)) { | |
125e1874 | 973 | BUG_ON(HWGROUP(drive)->handler != NULL); |
1da177e4 LT |
974 | ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); |
975 | /* continue polling */ | |
976 | return ide_started; | |
977 | } | |
978 | printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); | |
979 | drive->failures++; | |
980 | } else { | |
981 | printk("%s: reset: ", hwif->name); | |
982 | if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { | |
983 | printk("success\n"); | |
984 | drive->failures = 0; | |
985 | } else { | |
986 | drive->failures++; | |
987 | printk("master: "); | |
988 | switch (tmp & 0x7f) { | |
989 | case 1: printk("passed"); | |
990 | break; | |
991 | case 2: printk("formatter device error"); | |
992 | break; | |
993 | case 3: printk("sector buffer error"); | |
994 | break; | |
995 | case 4: printk("ECC circuitry error"); | |
996 | break; | |
997 | case 5: printk("controlling MPU error"); | |
998 | break; | |
999 | default:printk("error (0x%02x?)", tmp); | |
1000 | } | |
1001 | if (tmp & 0x80) | |
1002 | printk("; slave: failed"); | |
1003 | printk("\n"); | |
1004 | } | |
1005 | } | |
1006 | hwgroup->polling = 0; /* done polling */ | |
913759ac | 1007 | hwgroup->resetting = 0; /* done reset attempt */ |
1da177e4 LT |
1008 | return ide_stopped; |
1009 | } | |
1010 | ||
1011 | static void check_dma_crc(ide_drive_t *drive) | |
1012 | { | |
1013 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
1014 | if (drive->crc_count) { | |
7469aaf6 | 1015 | drive->hwif->dma_off_quietly(drive); |
1da177e4 LT |
1016 | ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); |
1017 | if (drive->current_speed >= XFER_SW_DMA_0) | |
1018 | (void) HWIF(drive)->ide_dma_on(drive); | |
1019 | } else | |
7469aaf6 | 1020 | ide_dma_off(drive); |
1da177e4 LT |
1021 | #endif |
1022 | } | |
1023 | ||
1024 | static void ide_disk_pre_reset(ide_drive_t *drive) | |
1025 | { | |
1026 | int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; | |
1027 | ||
1028 | drive->special.all = 0; | |
1029 | drive->special.b.set_geometry = legacy; | |
1030 | drive->special.b.recalibrate = legacy; | |
4ee06b7e | 1031 | drive->mult_count = 0; |
1da177e4 LT |
1032 | if (!drive->keep_settings && !drive->using_dma) |
1033 | drive->mult_req = 0; | |
1034 | if (drive->mult_req != drive->mult_count) | |
1035 | drive->special.b.set_multmode = 1; | |
1036 | } | |
1037 | ||
1038 | static void pre_reset(ide_drive_t *drive) | |
1039 | { | |
1040 | if (drive->media == ide_disk) | |
1041 | ide_disk_pre_reset(drive); | |
1042 | else | |
1043 | drive->post_reset = 1; | |
1044 | ||
1045 | if (!drive->keep_settings) { | |
1046 | if (drive->using_dma) { | |
1047 | check_dma_crc(drive); | |
1048 | } else { | |
1049 | drive->unmask = 0; | |
1050 | drive->io_32bit = 0; | |
1051 | } | |
1052 | return; | |
1053 | } | |
1054 | if (drive->using_dma) | |
1055 | check_dma_crc(drive); | |
1056 | ||
1057 | if (HWIF(drive)->pre_reset != NULL) | |
1058 | HWIF(drive)->pre_reset(drive); | |
1059 | ||
513daadd SS |
1060 | if (drive->current_speed != 0xff) |
1061 | drive->desired_speed = drive->current_speed; | |
1062 | drive->current_speed = 0xff; | |
1da177e4 LT |
1063 | } |
1064 | ||
1065 | /* | |
1066 | * do_reset1() attempts to recover a confused drive by resetting it. | |
1067 | * Unfortunately, resetting a disk drive actually resets all devices on | |
1068 | * the same interface, so it can really be thought of as resetting the | |
1069 | * interface rather than resetting the drive. | |
1070 | * | |
1071 | * ATAPI devices have their own reset mechanism which allows them to be | |
1072 | * individually reset without clobbering other devices on the same interface. | |
1073 | * | |
1074 | * Unfortunately, the IDE interface does not generate an interrupt to let | |
1075 | * us know when the reset operation has finished, so we must poll for this. | |
1076 | * Equally poor, though, is the fact that this may a very long time to complete, | |
1077 | * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, | |
1078 | * we set a timer to poll at 50ms intervals. | |
1079 | */ | |
1080 | static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) | |
1081 | { | |
1082 | unsigned int unit; | |
1083 | unsigned long flags; | |
1084 | ide_hwif_t *hwif; | |
1085 | ide_hwgroup_t *hwgroup; | |
1086 | ||
1087 | spin_lock_irqsave(&ide_lock, flags); | |
1088 | hwif = HWIF(drive); | |
1089 | hwgroup = HWGROUP(drive); | |
1090 | ||
1091 | /* We must not reset with running handlers */ | |
125e1874 | 1092 | BUG_ON(hwgroup->handler != NULL); |
1da177e4 LT |
1093 | |
1094 | /* For an ATAPI device, first try an ATAPI SRST. */ | |
1095 | if (drive->media != ide_disk && !do_not_try_atapi) { | |
913759ac | 1096 | hwgroup->resetting = 1; |
1da177e4 LT |
1097 | pre_reset(drive); |
1098 | SELECT_DRIVE(drive); | |
1099 | udelay (20); | |
68ad9910 AC |
1100 | hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); |
1101 | ndelay(400); | |
1da177e4 LT |
1102 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; |
1103 | hwgroup->polling = 1; | |
1104 | __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); | |
1105 | spin_unlock_irqrestore(&ide_lock, flags); | |
1106 | return ide_started; | |
1107 | } | |
1108 | ||
1109 | /* | |
1110 | * First, reset any device state data we were maintaining | |
1111 | * for any of the drives on this interface. | |
1112 | */ | |
1113 | for (unit = 0; unit < MAX_DRIVES; ++unit) | |
1114 | pre_reset(&hwif->drives[unit]); | |
1115 | ||
1da177e4 LT |
1116 | if (!IDE_CONTROL_REG) { |
1117 | spin_unlock_irqrestore(&ide_lock, flags); | |
1118 | return ide_stopped; | |
1119 | } | |
1120 | ||
913759ac | 1121 | hwgroup->resetting = 1; |
1da177e4 LT |
1122 | /* |
1123 | * Note that we also set nIEN while resetting the device, | |
1124 | * to mask unwanted interrupts from the interface during the reset. | |
1125 | * However, due to the design of PC hardware, this will cause an | |
1126 | * immediate interrupt due to the edge transition it produces. | |
1127 | * This single interrupt gives us a "fast poll" for drives that | |
1128 | * recover from reset very quickly, saving us the first 50ms wait time. | |
1129 | */ | |
1130 | /* set SRST and nIEN */ | |
1131 | hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); | |
1132 | /* more than enough time */ | |
1133 | udelay(10); | |
1134 | if (drive->quirk_list == 2) { | |
1135 | /* clear SRST and nIEN */ | |
1136 | hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); | |
1137 | } else { | |
1138 | /* clear SRST, leave nIEN */ | |
1139 | hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); | |
1140 | } | |
1141 | /* more than enough time */ | |
1142 | udelay(10); | |
1143 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; | |
1144 | hwgroup->polling = 1; | |
1145 | __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); | |
1146 | ||
1147 | /* | |
1148 | * Some weird controller like resetting themselves to a strange | |
1149 | * state when the disks are reset this way. At least, the Winbond | |
1150 | * 553 documentation says that | |
1151 | */ | |
4ee06b7e | 1152 | if (hwif->resetproc) |
1da177e4 | 1153 | hwif->resetproc(drive); |
1da177e4 LT |
1154 | |
1155 | spin_unlock_irqrestore(&ide_lock, flags); | |
1156 | return ide_started; | |
1157 | } | |
1158 | ||
1159 | /* | |
1160 | * ide_do_reset() is the entry point to the drive/interface reset code. | |
1161 | */ | |
1162 | ||
1163 | ide_startstop_t ide_do_reset (ide_drive_t *drive) | |
1164 | { | |
1165 | return do_reset1(drive, 0); | |
1166 | } | |
1167 | ||
1168 | EXPORT_SYMBOL(ide_do_reset); | |
1169 | ||
1170 | /* | |
1171 | * ide_wait_not_busy() waits for the currently selected device on the hwif | |
1172 | * to report a non-busy status, see comments in probe_hwif(). | |
1173 | */ | |
1174 | int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) | |
1175 | { | |
1176 | u8 stat = 0; | |
1177 | ||
1178 | while(timeout--) { | |
1179 | /* | |
1180 | * Turn this into a schedule() sleep once I'm sure | |
1181 | * about locking issues (2.5 work ?). | |
1182 | */ | |
1183 | mdelay(1); | |
1184 | stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); | |
1185 | if ((stat & BUSY_STAT) == 0) | |
1186 | return 0; | |
1187 | /* | |
1188 | * Assume a value of 0xff means nothing is connected to | |
1189 | * the interface and it doesn't implement the pull-down | |
1190 | * resistor on D7. | |
1191 | */ | |
1192 | if (stat == 0xff) | |
1193 | return -ENODEV; | |
6842f8c8 | 1194 | touch_softlockup_watchdog(); |
1e86240f | 1195 | touch_nmi_watchdog(); |
1da177e4 LT |
1196 | } |
1197 | return -EBUSY; | |
1198 | } | |
1199 | ||
1200 | EXPORT_SYMBOL_GPL(ide_wait_not_busy); | |
1201 |