[deliverable/linux.git] / drivers / ide / pci / alim15x3.c

/*
 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
 *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
 *
 *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
 *  May be copied or modified under the terms of the GNU General Public License
 *  Copyright (C) 2002 Alan Cox <alan@redhat.com>
 *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
 *  Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
 *  Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
 *
 *  (U)DMA capable version of ali 1533/1543(C), 1535(D)
 *
 **********************************************************************
 *  9/7/99 --Parts from the above author are included and need to be
 *  converted into standard interface, once I finish the thought.
 *
 *  Recent changes
 *	Don't use LBA48 mode on ALi <= 0xC4
 *	Don't poke 0x79 with a non ALi northbridge
 *	Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
 *	Allow UDMA6 on revisions > 0xC4
 *
 *  Documentation
 *	Chipset documentation available under NDA only
 *
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/dmi.h>

#include <asm/io.h>

/*
 *	ALi devices are not plug in. Otherwise these static values would
 *	need to go. They ought to go away anyway
 */
 
static u8 m5229_revision;
static u8 chip_is_1543c_e;
static struct pci_dev *isa_dev;

/**
 *	ali_set_pio_mode	-	set host controller for PIO mode
 *	@drive: drive
 *	@pio: PIO mode number
 *
 *	Program the controller for the given PIO mode.
 */

static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = HWIF(drive);
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	int s_time, a_time, c_time;
	u8 s_clc, a_clc, r_clc;
	unsigned long flags;
	int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
	int port = hwif->channel ? 0x5c : 0x58;
	int portFIFO = hwif->channel ? 0x55 : 0x54;
	u8 cd_dma_fifo = 0;
	int unit = drive->select.b.unit & 1;

	s_time = ide_pio_timings[pio].setup_time;
	a_time = ide_pio_timings[pio].active_time;
	if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
		s_clc = 0;
	if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
		a_clc = 0;
	c_time = ide_pio_timings[pio].cycle_time;

	if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
		r_clc = 1;
	} else {
		if (r_clc >= 16)
			r_clc = 0;
	}
	local_irq_save(flags);
	
	/* 
	 * PIO mode => ATA FIFO on, ATAPI FIFO off
	 */
	pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
	if (drive->media==ide_disk) {
		if (unit) {
			pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
		} else {
			pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
		}
	} else {
		if (unit) {
			pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
		} else {
			pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
		}
	}
	
	pci_write_config_byte(dev, port, s_clc);
	pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc);
	local_irq_restore(flags);
}

/**
 *	ali_udma_filter		-	compute UDMA mask
 *	@drive: IDE device
 *
 *	Return available UDMA modes.
 *
 *	The actual rules for the ALi are:
 *		No UDMA on revisions <= 0x20
 *		Disk only for revisions < 0xC2
 *		Not WDC drives for revisions < 0xC2
 *
 *	FIXME: WDC ifdef needs to die
 */

static u8 ali_udma_filter(ide_drive_t *drive)
{
	if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
		if (drive->media != ide_disk)
			return 0;
#ifndef CONFIG_WDC_ALI15X3
		if (chip_is_1543c_e && strstr(drive->id->model, "WDC "))
			return 0;
#endif
	}

	return drive->hwif->ultra_mask;
}

/**
 *	ali_set_dma_mode	-	set host controller for DMA mode
 *	@drive: drive
 *	@speed: DMA mode
 *
 *	Configure the hardware for the desired IDE transfer mode.
 */

static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= to_pci_dev(hwif->dev);
	u8 speed1		= speed;
	u8 unit			= (drive->select.b.unit & 0x01);
	u8 tmpbyte		= 0x00;
	int m5229_udma		= (hwif->channel) ? 0x57 : 0x56;

	if (speed == XFER_UDMA_6)
		speed1 = 0x47;

	if (speed < XFER_UDMA_0) {
		u8 ultra_enable	= (unit) ? 0x7f : 0xf7;
		/*
		 * clear "ultra enable" bit
		 */
		pci_read_config_byte(dev, m5229_udma, &tmpbyte);
		tmpbyte &= ultra_enable;
		pci_write_config_byte(dev, m5229_udma, tmpbyte);

		/*
		 * FIXME: Oh, my... DMA timings are never set.
		 */
	} else {
		pci_read_config_byte(dev, m5229_udma, &tmpbyte);
		tmpbyte &= (0x0f << ((1-unit) << 2));
		/*
		 * enable ultra dma and set timing
		 */
		tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
		pci_write_config_byte(dev, m5229_udma, tmpbyte);
		if (speed >= XFER_UDMA_3) {
			pci_read_config_byte(dev, 0x4b, &tmpbyte);
			tmpbyte |= 1;
			pci_write_config_byte(dev, 0x4b, tmpbyte);
		}
	}
}

/**
 *	ali15x3_dma_setup	-	begin a DMA phase
 *	@drive:	target device
 *
 *	Returns 1 if the DMA cannot be performed, zero on success.
 */

static int ali15x3_dma_setup(ide_drive_t *drive)
{
	if (m5229_revision < 0xC2 && drive->media != ide_disk) {
		if (rq_data_dir(drive->hwif->hwgroup->rq))
			return 1;	/* try PIO instead of DMA */
	}
	return ide_dma_setup(drive);
}

/**
 *	init_chipset_ali15x3	-	Initialise an ALi IDE controller
 *	@dev: PCI device
 *	@name: Name of the controller
 *
 *	This function initializes the ALI IDE controller and where 
 *	appropriate also sets up the 1533 southbridge.
 */
  
static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const char *name)
{
	unsigned long flags;
	u8 tmpbyte;
	struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));

	m5229_revision = dev->revision;

	isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);

	local_irq_save(flags);

	if (m5229_revision < 0xC2) {
		/*
		 * revision 0x20 (1543-E, 1543-F)
		 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
		 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
		 */
		pci_read_config_byte(dev, 0x4b, &tmpbyte);
		/*
		 * clear bit 7
		 */
		pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
		/*
		 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
		 */
		if (m5229_revision >= 0x20 && isa_dev) {
			pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
			chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
		}
		goto out;
	}

	/*
	 * 1543C-B?, 1535, 1535D, 1553
	 * Note 1: not all "motherboard" support this detection
	 * Note 2: if no udma 66 device, the detection may "error".
	 *         but in this case, we will not set the device to
	 *         ultra 66, the detection result is not important
	 */

	/*
	 * enable "Cable Detection", m5229, 0x4b, bit3
	 */
	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);

	/*
	 * We should only tune the 1533 enable if we are using an ALi
	 * North bridge. We might have no north found on some zany
	 * box without a device at 0:0.0. The ALi bridge will be at
	 * 0:0.0 so if we didn't find one we know what is cooking.
	 */
	if (north && north->vendor != PCI_VENDOR_ID_AL)
		goto out;

	if (m5229_revision < 0xC5 && isa_dev)
	{	
		/*
		 * set south-bridge's enable bit, m1533, 0x79
		 */

		pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
		if (m5229_revision == 0xC2) {
			/*
			 * 1543C-B0 (m1533, 0x79, bit 2)
			 */
			pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
		} else if (m5229_revision >= 0xC3) {
			/*
			 * 1553/1535 (m1533, 0x79, bit 1)
			 */
			pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
		}
	}

out:
	/*
	 * CD_ROM DMA on (m5229, 0x53, bit0)
	 *      Enable this bit even if we want to use PIO.
	 * PIO FIFO off (m5229, 0x53, bit1)
	 *      The hardware will use 0x54h and 0x55h to control PIO FIFO.
	 *	(Not on later devices it seems)
	 *
	 *	0x53 changes meaning on later revs - we must no touch
	 *	bit 1 on them.  Need to check if 0x20 is the right break.
	 */
	if (m5229_revision >= 0x20) {
		pci_read_config_byte(dev, 0x53, &tmpbyte);

		if (m5229_revision <= 0x20)
			tmpbyte = (tmpbyte & (~0x02)) | 0x01;
		else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
			tmpbyte |= 0x03;
		else
			tmpbyte |= 0x01;

		pci_write_config_byte(dev, 0x53, tmpbyte);
	}
	pci_dev_put(north);
	pci_dev_put(isa_dev);
	local_irq_restore(flags);
	return 0;
}

/*
 *	Cable special cases
 */

static const struct dmi_system_id cable_dmi_table[] = {
	{
		.ident = "HP Pavilion N5430",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
		},
	},
	{
		.ident = "Toshiba Satellite S1800-814",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
			DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
		},
	},
	{ }
};

static int ali_cable_override(struct pci_dev *pdev)
{
	/* Fujitsu P2000 */
	if (pdev->subsystem_vendor == 0x10CF &&
	    pdev->subsystem_device == 0x10AF)
		return 1;

	/* Mitac 8317 (Winbook-A) and relatives */
	if (pdev->subsystem_vendor == 0x1071 &&
	    pdev->subsystem_device == 0x8317)
		return 1;

	/* Systems by DMI */
	if (dmi_check_system(cable_dmi_table))
		return 1;

	return 0;
}

/**
 *	ali_cable_detect	-	cable detection
 *	@hwif: IDE interface
 *
 *	This checks if the controller and the cable are capable
 *	of UDMA66 transfers. It doesn't check the drives.
 *	But see note 2 below!
 *
 *	FIXME: frobs bits that are not defined on newer ALi devicea
 */

static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	unsigned long flags;
	u8 cbl = ATA_CBL_PATA40, tmpbyte;

	local_irq_save(flags);

	if (m5229_revision >= 0xC2) {
		/*
		 * m5229 80-pin cable detection (from Host View)
		 *
		 * 0x4a bit0 is 0 => primary channel has 80-pin
		 * 0x4a bit1 is 0 => secondary channel has 80-pin
		 *
		 * Certain laptops use short but suitable cables
		 * and don't implement the detect logic.
		 */
		if (ali_cable_override(dev))
			cbl = ATA_CBL_PATA40_SHORT;
		else {
			pci_read_config_byte(dev, 0x4a, &tmpbyte);
			if ((tmpbyte & (1 << hwif->channel)) == 0)
				cbl = ATA_CBL_PATA80;
		}
	}

	local_irq_restore(flags);

	return cbl;
}

#if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
/**
 *	init_hwif_ali15x3	-	Initialize the ALI IDE x86 stuff
 *	@hwif: interface to configure
 *
 *	Obtain the IRQ tables for an ALi based IDE solution on the PC
 *	class platforms. This part of the code isn't applicable to the
 *	Sparc and PowerPC systems.
 */

static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	u8 ideic, inmir;
	s8 irq_routing_table[] = { -1,  9, 3, 10, 4,  5, 7,  6,
				      1, 11, 0, 12, 0, 14, 0, 15 };
	int irq = -1;

	if (dev->device == PCI_DEVICE_ID_AL_M5229)
		hwif->irq = hwif->channel ? 15 : 14;

	if (isa_dev) {
		/*
		 * read IDE interface control
		 */
		pci_read_config_byte(isa_dev, 0x58, &ideic);

		/* bit0, bit1 */
		ideic = ideic & 0x03;

		/* get IRQ for IDE Controller */
		if ((hwif->channel && ideic == 0x03) ||
		    (!hwif->channel && !ideic)) {
			/*
			 * get SIRQ1 routing table
			 */
			pci_read_config_byte(isa_dev, 0x44, &inmir);
			inmir = inmir & 0x0f;
			irq = irq_routing_table[inmir];
		} else if (hwif->channel && !(ideic & 0x01)) {
			/*
			 * get SIRQ2 routing table
			 */
			pci_read_config_byte(isa_dev, 0x75, &inmir);
			inmir = inmir & 0x0f;
			irq = irq_routing_table[inmir];
		}
		if(irq >= 0)
			hwif->irq = irq;
	}
}
#else
#define init_hwif_ali15x3 NULL
#endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */

/**
 *	init_dma_ali15x3	-	set up DMA on ALi15x3
 *	@hwif: IDE interface
 *	@d: IDE port info
 *
 *	Set up the DMA functionality on the ALi 15x3.
 */

static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
				      const struct ide_port_info *d)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	unsigned long base = ide_pci_dma_base(hwif, d);

	if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
		return -1;

	if (!hwif->channel)
		outb(inb(base + 2) & 0x60, base + 2);

	printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx\n",
			 hwif->name, base, base + 7);

	if (ide_allocate_dma_engine(hwif))
		return -1;

	ide_setup_dma(hwif, base);

	return 0;
}

static const struct ide_port_ops ali_port_ops = {
	.set_pio_mode		= ali_set_pio_mode,
	.set_dma_mode		= ali_set_dma_mode,
	.udma_filter		= ali_udma_filter,
	.cable_detect		= ali_cable_detect,
};

static const struct ide_dma_ops ali_dma_ops = {
	.dma_host_set		= ide_dma_host_set,
	.dma_setup		= ali15x3_dma_setup,
	.dma_exec_cmd		= ide_dma_exec_cmd,
	.dma_start		= ide_dma_start,
	.dma_end		= __ide_dma_end,
	.dma_test_irq		= ide_dma_test_irq,
	.dma_lost_irq		= ide_dma_lost_irq,
	.dma_timeout		= ide_dma_timeout,
};

static const struct ide_port_info ali15x3_chipset __devinitdata = {
	.name		= "ALI15X3",
	.init_chipset	= init_chipset_ali15x3,
	.init_hwif	= init_hwif_ali15x3,
	.init_dma	= init_dma_ali15x3,
	.port_ops	= &ali_port_ops,
	.pio_mask	= ATA_PIO5,
	.swdma_mask	= ATA_SWDMA2,
	.mwdma_mask	= ATA_MWDMA2,
};

/**
 *	alim15x3_init_one	-	set up an ALi15x3 IDE controller
 *	@dev: PCI device to set up
 *
 *	Perform the actual set up for an ALi15x3 that has been found by the
 *	hot plug layer.
 */
 
static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct ide_port_info d = ali15x3_chipset;
	u8 rev = dev->revision, idx = id->driver_data;

	/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
	if (rev <= 0xC4)
		d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;

	if (rev >= 0x20) {
		if (rev == 0x20)
			d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;

		if (rev < 0xC2)
			d.udma_mask = ATA_UDMA2;
		else if (rev == 0xC2 || rev == 0xC3)
			d.udma_mask = ATA_UDMA4;
		else if (rev == 0xC4)
			d.udma_mask = ATA_UDMA5;
		else
			d.udma_mask = ATA_UDMA6;

		d.dma_ops = &ali_dma_ops;
	} else {
		d.host_flags |= IDE_HFLAG_NO_DMA;

		d.mwdma_mask = d.swdma_mask = 0;
	}

	if (idx == 0)
		d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;

	return ide_setup_pci_device(dev, &d);
}


static const struct pci_device_id alim15x3_pci_tbl[] = {
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);

static struct pci_driver driver = {
	.name		= "ALI15x3_IDE",
	.id_table	= alim15x3_pci_tbl,
	.probe		= alim15x3_init_one,
};

static int __init ali15x3_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(ali15x3_ide_init);

MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
	3	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
	4	* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
	5	*
	6	* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
	7	* May be copied or modified under the terms of the GNU General Public License
	8	* Copyright (C) 2002 Alan Cox <alan@redhat.com>
	9	* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
21b82477	10	* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
95ba8c17	11	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
1da177e4 LT	12	*
	13	* (U)DMA capable version of ali 1533/1543(C), 1535(D)
	14	*
	15	**********************************************************************
	16	* 9/7/99 --Parts from the above author are included and need to be
	17	* converted into standard interface, once I finish the thought.
	18	*
	19	* Recent changes
	20	* Don't use LBA48 mode on ALi <= 0xC4
	21	* Don't poke 0x79 with a non ALi northbridge
	22	* Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
	23	* Allow UDMA6 on revisions > 0xC4
	24	*
	25	* Documentation
	26	* Chipset documentation available under NDA only
	27	*
	28	*/
	29
1da177e4 LT	30	#include <linux/module.h>
	31	#include <linux/types.h>
	32	#include <linux/kernel.h>
	33	#include <linux/pci.h>
1da177e4 LT	34	#include <linux/hdreg.h>
	35	#include <linux/ide.h>
	36	#include <linux/init.h>
95ba8c17	37	#include <linux/dmi.h>
1da177e4 LT	38
	39	#include <asm/io.h>
	40
1da177e4 LT	41	/*
	42	* ALi devices are not plug in. Otherwise these static values would
	43	* need to go. They ought to go away anyway
	44	*/
	45
	46	static u8 m5229_revision;
	47	static u8 chip_is_1543c_e;
	48	static struct pci_dev *isa_dev;
	49
1da177e4	50	/**
88b2b32b	51	* ali_set_pio_mode - set host controller for PIO mode
26bcb879 BZ	52	* @drive: drive
26bcb879 BZ	53	* @pio: PIO mode number
21b82477	54	*
26bcb879	55	* Program the controller for the given PIO mode.
1da177e4	56	*/
26bcb879	57
88b2b32b	58	static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	59	{
1da177e4	60	ide_hwif_t *hwif = HWIF(drive);
36501650	61	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4 LT	62	int s_time, a_time, c_time;
	63	u8 s_clc, a_clc, r_clc;
	64	unsigned long flags;
ebae41a5	65	int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
1da177e4 LT	66	int port = hwif->channel ? 0x5c : 0x58;
	67	int portFIFO = hwif->channel ? 0x55 : 0x54;
	68	u8 cd_dma_fifo = 0;
	69	int unit = drive->select.b.unit & 1;
	70
1da177e4 LT	71	s_time = ide_pio_timings[pio].setup_time;
	72	a_time = ide_pio_timings[pio].active_time;
	73	if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
	74	s_clc = 0;
	75	if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
	76	a_clc = 0;
	77	c_time = ide_pio_timings[pio].cycle_time;
	78
1da177e4 LT	79	if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
	80	r_clc = 1;
	81	} else {
	82	if (r_clc >= 16)
	83	r_clc = 0;
	84	}
	85	local_irq_save(flags);
	86
	87	/*
	88	* PIO mode => ATA FIFO on, ATAPI FIFO off
	89	*/
	90	pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
	91	if (drive->media==ide_disk) {
	92	if (unit) {
	93	pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) \| 0x50);
	94	} else {
	95	pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) \| 0x05);
	96	}
	97	} else {
	98	if (unit) {
	99	pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
	100	} else {
	101	pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
	102	}
	103	}
	104
	105	pci_write_config_byte(dev, port, s_clc);
	106	pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) \| r_clc);
	107	local_irq_restore(flags);
21b82477 SS	108	}
21b82477 SS	109
1da177e4	110	/**
2d5eaa6d BZ	111	* ali_udma_filter - compute UDMA mask
2d5eaa6d BZ	112	* @drive: IDE device
1da177e4	113	*
2d5eaa6d BZ	114	* Return available UDMA modes.
	115	*
	116	* The actual rules for the ALi are:
1da177e4 LT	117	* No UDMA on revisions <= 0x20
	118	* Disk only for revisions < 0xC2
	119	* Not WDC drives for revisions < 0xC2
	120	*
	121	* FIXME: WDC ifdef needs to die
	122	*/
1da177e4	123
2d5eaa6d	124	static u8 ali_udma_filter(ide_drive_t *drive)
1da177e4	125	{
2d5eaa6d BZ	126	if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
	127	if (drive->media != ide_disk)
	128	return 0;
	129	#ifndef CONFIG_WDC_ALI15X3
	130	if (chip_is_1543c_e && strstr(drive->id->model, "WDC "))
	131	return 0;
	132	#endif
1da177e4 LT	133	}
1da177e4 LT	134
2d5eaa6d	135	return drive->hwif->ultra_mask;
1da177e4 LT	136	}
	137
	138	/**
88b2b32b BZ	139	* ali_set_dma_mode - set host controller for DMA mode
	140	* @drive: drive
	141	* @speed: DMA mode
1da177e4 LT	142	*
1da177e4 LT	143	* Configure the hardware for the desired IDE transfer mode.
1da177e4	144	*/
f212ff28	145
88b2b32b	146	static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
1da177e4 LT	147	{
1da177e4 LT	148	ide_hwif_t *hwif = HWIF(drive);
36501650	149	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4 LT	150	u8 speed1 = speed;
	151	u8 unit = (drive->select.b.unit & 0x01);
	152	u8 tmpbyte = 0x00;
	153	int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
	154
	155	if (speed == XFER_UDMA_6)
	156	speed1 = 0x47;
	157
	158	if (speed < XFER_UDMA_0) {
	159	u8 ultra_enable = (unit) ? 0x7f : 0xf7;
	160	/*
	161	* clear "ultra enable" bit
	162	*/
	163	pci_read_config_byte(dev, m5229_udma, &tmpbyte);
	164	tmpbyte &= ultra_enable;
	165	pci_write_config_byte(dev, m5229_udma, tmpbyte);
	166
a6fe837e BZ	167	/*
	168	* FIXME: Oh, my... DMA timings are never set.
	169	*/
1da177e4 LT	170	} else {
	171	pci_read_config_byte(dev, m5229_udma, &tmpbyte);
	172	tmpbyte &= (0x0f << ((1-unit) << 2));
	173	/*
	174	* enable ultra dma and set timing
	175	*/
	176	tmpbyte \|= ((0x08 \| ((4-speed1)&0x07)) << (unit << 2));
	177	pci_write_config_byte(dev, m5229_udma, tmpbyte);
	178	if (speed >= XFER_UDMA_3) {
	179	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	180	tmpbyte \|= 1;
	181	pci_write_config_byte(dev, 0x4b, tmpbyte);
	182	}
	183	}
1da177e4 LT	184	}
1da177e4 LT	185
1da177e4 LT	186	/**
	187	* ali15x3_dma_setup - begin a DMA phase
	188	* @drive: target device
	189	*
	190	* Returns 1 if the DMA cannot be performed, zero on success.
	191	*/
	192
	193	static int ali15x3_dma_setup(ide_drive_t *drive)
	194	{
	195	if (m5229_revision < 0xC2 && drive->media != ide_disk) {
	196	if (rq_data_dir(drive->hwif->hwgroup->rq))
	197	return 1; /* try PIO instead of DMA */
	198	}
	199	return ide_dma_setup(drive);
	200	}
	201
	202	/**
	203	* init_chipset_ali15x3 - Initialise an ALi IDE controller
	204	* @dev: PCI device
	205	* @name: Name of the controller
	206	*
	207	* This function initializes the ALI IDE controller and where
	208	* appropriate also sets up the 1533 southbridge.
	209	*/
	210
c2f12589	211	static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev dev, const char name)
1da177e4 LT	212	{
	213	unsigned long flags;
	214	u8 tmpbyte;
b1489009	215	struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
1da177e4	216
44c10138	217	m5229_revision = dev->revision;
1da177e4	218
b1489009	219	isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
1da177e4	220
1da177e4 LT	221	local_irq_save(flags);
	222
	223	if (m5229_revision < 0xC2) {
	224	/*
	225	* revision 0x20 (1543-E, 1543-F)
	226	* revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
	227	* clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
	228	*/
	229	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	230	/*
	231	* clear bit 7
	232	*/
	233	pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
cad221aa BZ	234	/*
	235	* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
	236	*/
	237	if (m5229_revision >= 0x20 && isa_dev) {
	238	pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
	239	chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
	240	}
b1489009	241	goto out;
1da177e4 LT	242	}
	243
	244	/*
	245	* 1543C-B?, 1535, 1535D, 1553
	246	* Note 1: not all "motherboard" support this detection
	247	* Note 2: if no udma 66 device, the detection may "error".
	248	* but in this case, we will not set the device to
	249	* ultra 66, the detection result is not important
	250	*/
	251
	252	/*
	253	* enable "Cable Detection", m5229, 0x4b, bit3
	254	*/
	255	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	256	pci_write_config_byte(dev, 0x4b, tmpbyte \| 0x08);
	257
	258	/*
	259	* We should only tune the 1533 enable if we are using an ALi
	260	* North bridge. We might have no north found on some zany
	261	* box without a device at 0:0.0. The ALi bridge will be at
	262	* 0:0.0 so if we didn't find one we know what is cooking.
	263	*/
b1489009 AC	264	if (north && north->vendor != PCI_VENDOR_ID_AL)
b1489009 AC	265	goto out;
1da177e4 LT	266
	267	if (m5229_revision < 0xC5 && isa_dev)
	268	{
	269	/*
	270	* set south-bridge's enable bit, m1533, 0x79
	271	*/
	272
	273	pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
	274	if (m5229_revision == 0xC2) {
	275	/*
	276	* 1543C-B0 (m1533, 0x79, bit 2)
	277	*/
	278	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x04);
	279	} else if (m5229_revision >= 0xC3) {
	280	/*
	281	* 1553/1535 (m1533, 0x79, bit 1)
	282	*/
	283	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x02);
	284	}
	285	}
cad221aa	286
b1489009	287	out:
cad221aa BZ	288	/*
	289	* CD_ROM DMA on (m5229, 0x53, bit0)
	290	* Enable this bit even if we want to use PIO.
	291	* PIO FIFO off (m5229, 0x53, bit1)
	292	* The hardware will use 0x54h and 0x55h to control PIO FIFO.
	293	* (Not on later devices it seems)
	294	*
	295	* 0x53 changes meaning on later revs - we must no touch
	296	* bit 1 on them. Need to check if 0x20 is the right break.
	297	*/
	298	if (m5229_revision >= 0x20) {
	299	pci_read_config_byte(dev, 0x53, &tmpbyte);
	300
	301	if (m5229_revision <= 0x20)
	302	tmpbyte = (tmpbyte & (~0x02)) \| 0x01;
	303	else if (m5229_revision == 0xc7 \|\| m5229_revision == 0xc8)
	304	tmpbyte \|= 0x03;
	305	else
	306	tmpbyte \|= 0x01;
	307
	308	pci_write_config_byte(dev, 0x53, tmpbyte);
	309	}
b1489009 AC	310	pci_dev_put(north);
b1489009 AC	311	pci_dev_put(isa_dev);
1da177e4 LT	312	local_irq_restore(flags);
	313	return 0;
	314	}
	315
95ba8c17 BZ	316	/*
	317	* Cable special cases
	318	*/
	319
1855256c	320	static const struct dmi_system_id cable_dmi_table[] = {
95ba8c17 BZ	321	{
	322	.ident = "HP Pavilion N5430",
	323	.matches = {
	324	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
8663fd6d	325	DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
95ba8c17 BZ	326	},
95ba8c17 BZ	327	},
03e6f489 DE	328	{
	329	.ident = "Toshiba Satellite S1800-814",
	330	.matches = {
	331	DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
	332	DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
	333	},
	334	},
95ba8c17 BZ	335	{ }
	336	};
	337
	338	static int ali_cable_override(struct pci_dev *pdev)
	339	{
	340	/* Fujitsu P2000 */
	341	if (pdev->subsystem_vendor == 0x10CF &&
	342	pdev->subsystem_device == 0x10AF)
	343	return 1;
	344
d151456a BZ	345	/* Mitac 8317 (Winbook-A) and relatives */
	346	if (pdev->subsystem_vendor == 0x1071 &&
	347	pdev->subsystem_device == 0x8317)
	348	return 1;
	349
95ba8c17 BZ	350	/* Systems by DMI */
	351	if (dmi_check_system(cable_dmi_table))
	352	return 1;
	353
	354	return 0;
	355	}
	356
1da177e4	357	/**
ac95beed	358	* ali_cable_detect - cable detection
1da177e4 LT	359	* @hwif: IDE interface
	360	*
	361	* This checks if the controller and the cable are capable
	362	* of UDMA66 transfers. It doesn't check the drives.
	363	* But see note 2 below!
	364	*
	365	* FIXME: frobs bits that are not defined on newer ALi devicea
	366	*/
	367
ac95beed	368	static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
1da177e4	369	{
36501650	370	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4	371	unsigned long flags;
95ba8c17	372	u8 cbl = ATA_CBL_PATA40, tmpbyte;
1da177e4 LT	373
	374	local_irq_save(flags);
	375
	376	if (m5229_revision >= 0xC2) {
	377	/*
95ba8c17 BZ	378	* m5229 80-pin cable detection (from Host View)
	379	*
	380	* 0x4a bit0 is 0 => primary channel has 80-pin
	381	* 0x4a bit1 is 0 => secondary channel has 80-pin
	382	*
	383	* Certain laptops use short but suitable cables
	384	* and don't implement the detect logic.
1da177e4	385	*/
95ba8c17 BZ	386	if (ali_cable_override(dev))
	387	cbl = ATA_CBL_PATA40_SHORT;
	388	else {
	389	pci_read_config_byte(dev, 0x4a, &tmpbyte);
	390	if ((tmpbyte & (1 << hwif->channel)) == 0)
	391	cbl = ATA_CBL_PATA80;
	392	}
1da177e4 LT	393	}
1da177e4 LT	394
1da177e4 LT	395	local_irq_restore(flags);
1da177e4 LT	396
95ba8c17	397	return cbl;
1da177e4 LT	398	}
1da177e4 LT	399
6d1cee44	400	#if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
1da177e4 LT	401	/**
	402	* init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
	403	* @hwif: interface to configure
	404	*
	405	* Obtain the IRQ tables for an ALi based IDE solution on the PC
	406	* class platforms. This part of the code isn't applicable to the
6d1cee44	407	* Sparc and PowerPC systems.
1da177e4 LT	408	*/
1da177e4 LT	409
c2f12589	410	static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
1da177e4	411	{
36501650	412	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4 LT	413	u8 ideic, inmir;
	414	s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
	415	1, 11, 0, 12, 0, 14, 0, 15 };
	416	int irq = -1;
	417
36501650	418	if (dev->device == PCI_DEVICE_ID_AL_M5229)
1da177e4 LT	419	hwif->irq = hwif->channel ? 15 : 14;
	420
	421	if (isa_dev) {
	422	/*
	423	* read IDE interface control
	424	*/
	425	pci_read_config_byte(isa_dev, 0x58, &ideic);
	426
	427	/* bit0, bit1 */
	428	ideic = ideic & 0x03;
	429
	430	/* get IRQ for IDE Controller */
	431	if ((hwif->channel && ideic == 0x03) \|\|
	432	(!hwif->channel && !ideic)) {
	433	/*
	434	* get SIRQ1 routing table
	435	*/
	436	pci_read_config_byte(isa_dev, 0x44, &inmir);
	437	inmir = inmir & 0x0f;
	438	irq = irq_routing_table[inmir];
	439	} else if (hwif->channel && !(ideic & 0x01)) {
	440	/*
	441	* get SIRQ2 routing table
	442	*/
	443	pci_read_config_byte(isa_dev, 0x75, &inmir);
	444	inmir = inmir & 0x0f;
	445	irq = irq_routing_table[inmir];
	446	}
	447	if(irq >= 0)
	448	hwif->irq = irq;
	449	}
1da177e4	450	}
6d1cee44 AV	451	#else
	452	#define init_hwif_ali15x3 NULL
	453	#endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
1da177e4 LT	454
	455	/**
	456	* init_dma_ali15x3 - set up DMA on ALi15x3
	457	* @hwif: IDE interface
b123f56e	458	* @d: IDE port info
1da177e4	459	*
b123f56e	460	* Set up the DMA functionality on the ALi 15x3.
1da177e4 LT	461	*/
1da177e4 LT	462
b123f56e BZ	463	static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
b123f56e BZ	464	const struct ide_port_info *d)
1da177e4	465	{
b123f56e BZ	466	struct pci_dev *dev = to_pci_dev(hwif->dev);
	467	unsigned long base = ide_pci_dma_base(hwif, d);
	468
	469	if (base == 0 \|\| ide_pci_set_master(dev, d->name) < 0)
	470	return -1;
	471
0ecdca26	472	if (!hwif->channel)
b123f56e BZ	473	outb(inb(base + 2) & 0x60, base + 2);
	474
	475	printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
	476	hwif->name, base, base + 7);
	477
	478	if (ide_allocate_dma_engine(hwif))
	479	return -1;
	480
f37afdac	481	ide_setup_dma(hwif, base);
b123f56e BZ	482
b123f56e BZ	483	return 0;
1da177e4 LT	484	}
1da177e4 LT	485
ac95beed BZ	486	static const struct ide_port_ops ali_port_ops = {
	487	.set_pio_mode = ali_set_pio_mode,
	488	.set_dma_mode = ali_set_dma_mode,
	489	.udma_filter = ali_udma_filter,
	490	.cable_detect = ali_cable_detect,
	491	};
	492
f37afdac BZ	493	static const struct ide_dma_ops ali_dma_ops = {
f37afdac BZ	494	.dma_host_set = ide_dma_host_set,
5e37bdc0	495	.dma_setup = ali15x3_dma_setup,
f37afdac BZ	496	.dma_exec_cmd = ide_dma_exec_cmd,
	497	.dma_start = ide_dma_start,
	498	.dma_end = __ide_dma_end,
	499	.dma_test_irq = ide_dma_test_irq,
	500	.dma_lost_irq = ide_dma_lost_irq,
	501	.dma_timeout = ide_dma_timeout,
5e37bdc0 BZ	502	};
5e37bdc0 BZ	503
85620436	504	static const struct ide_port_info ali15x3_chipset __devinitdata = {
1da177e4 LT	505	.name = "ALI15X3",
	506	.init_chipset = init_chipset_ali15x3,
	507	.init_hwif = init_hwif_ali15x3,
	508	.init_dma = init_dma_ali15x3,
ac95beed	509	.port_ops = &ali_port_ops,
4099d143	510	.pio_mask = ATA_PIO5,
5f8b6c34 BZ	511	.swdma_mask = ATA_SWDMA2,
5f8b6c34 BZ	512	.mwdma_mask = ATA_MWDMA2,
1da177e4 LT	513	};
	514
	515	/**
	516	* alim15x3_init_one - set up an ALi15x3 IDE controller
	517	* @dev: PCI device to set up
	518	*
	519	* Perform the actual set up for an ALi15x3 that has been found by the
	520	* hot plug layer.
	521	*/
	522
	523	static int __devinit alim15x3_init_one(struct pci_dev dev, const struct pci_device_id id)
	524	{
039788e1	525	struct ide_port_info d = ali15x3_chipset;
8ac2b42a	526	u8 rev = dev->revision, idx = id->driver_data;
1da177e4	527
28328307 BZ	528	/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
	529	if (rev <= 0xC4)
	530	d.host_flags \|= IDE_HFLAG_NO_LBA48_DMA;
	531
	532	if (rev >= 0x20) {
	533	if (rev == 0x20)
	534	d.host_flags \|= IDE_HFLAG_NO_ATAPI_DMA;
	535
	536	if (rev < 0xC2)
	537	d.udma_mask = ATA_UDMA2;
	538	else if (rev == 0xC2 \|\| rev == 0xC3)
	539	d.udma_mask = ATA_UDMA4;
	540	else if (rev == 0xC4)
	541	d.udma_mask = ATA_UDMA5;
	542	else
	543	d.udma_mask = ATA_UDMA6;
5e37bdc0 BZ	544
5e37bdc0 BZ	545	d.dma_ops = &ali_dma_ops;
6d36b95f BZ	546	} else {
	547	d.host_flags \|= IDE_HFLAG_NO_DMA;
	548
	549	d.mwdma_mask = d.swdma_mask = 0;
28328307 BZ	550	}
28328307 BZ	551
8ac2b42a BZ	552	if (idx == 0)
	553	d.host_flags \|= IDE_HFLAG_CLEAR_SIMPLEX;
	554
28328307	555	return ide_setup_pci_device(dev, &d);
1da177e4 LT	556	}
	557
	558
9cbcc5e3 BZ	559	static const struct pci_device_id alim15x3_pci_tbl[] = {
9cbcc5e3 BZ	560	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
8ac2b42a	561	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
1da177e4 LT	562	{ 0, },
	563	};
	564	MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
	565
	566	static struct pci_driver driver = {
	567	.name = "ALI15x3_IDE",
	568	.id_table = alim15x3_pci_tbl,
	569	.probe = alim15x3_init_one,
	570	};
	571
82ab1eec	572	static int __init ali15x3_ide_init(void)
1da177e4 LT	573	{
	574	return ide_pci_register_driver(&driver);
	575	}
	576
	577	module_init(ali15x3_ide_init);
	578
	579	MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
	580	MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
	581	MODULE_LICENSE("GPL");