Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
3 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
4 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
5 | * | |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
7 | * May be copied or modified under the terms of the GNU General Public License | |
8 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | |
9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | |
21b82477 | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
95ba8c17 | 11 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
1da177e4 LT |
12 | * |
13 | * (U)DMA capable version of ali 1533/1543(C), 1535(D) | |
14 | * | |
15 | ********************************************************************** | |
16 | * 9/7/99 --Parts from the above author are included and need to be | |
17 | * converted into standard interface, once I finish the thought. | |
18 | * | |
19 | * Recent changes | |
20 | * Don't use LBA48 mode on ALi <= 0xC4 | |
21 | * Don't poke 0x79 with a non ALi northbridge | |
22 | * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) | |
23 | * Allow UDMA6 on revisions > 0xC4 | |
24 | * | |
25 | * Documentation | |
26 | * Chipset documentation available under NDA only | |
27 | * | |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/types.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/pci.h> | |
1da177e4 LT |
34 | #include <linux/hdreg.h> |
35 | #include <linux/ide.h> | |
36 | #include <linux/init.h> | |
95ba8c17 | 37 | #include <linux/dmi.h> |
1da177e4 LT |
38 | |
39 | #include <asm/io.h> | |
40 | ||
ced3ec8a BZ |
41 | #define DRV_NAME "alim15x3" |
42 | ||
63b1623e BZ |
43 | /* |
44 | * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking | |
45 | * (this is DANGEROUS and could result in data corruption). | |
46 | */ | |
47 | static int wdc_udma; | |
48 | ||
49 | module_param(wdc_udma, bool, 0); | |
50 | MODULE_PARM_DESC(wdc_udma, | |
51 | "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)"); | |
52 | ||
1da177e4 LT |
53 | /* |
54 | * ALi devices are not plug in. Otherwise these static values would | |
55 | * need to go. They ought to go away anyway | |
56 | */ | |
57 | ||
58 | static u8 m5229_revision; | |
59 | static u8 chip_is_1543c_e; | |
60 | static struct pci_dev *isa_dev; | |
61 | ||
1da177e4 | 62 | /** |
88b2b32b | 63 | * ali_set_pio_mode - set host controller for PIO mode |
26bcb879 BZ |
64 | * @drive: drive |
65 | * @pio: PIO mode number | |
21b82477 | 66 | * |
26bcb879 | 67 | * Program the controller for the given PIO mode. |
1da177e4 | 68 | */ |
26bcb879 | 69 | |
88b2b32b | 70 | static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 71 | { |
1da177e4 | 72 | ide_hwif_t *hwif = HWIF(drive); |
36501650 | 73 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
288911af BZ |
74 | struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); |
75 | int s_time = t->setup, a_time = t->active, c_time = t->cycle; | |
1da177e4 LT |
76 | u8 s_clc, a_clc, r_clc; |
77 | unsigned long flags; | |
30e5ee4d | 78 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; |
1da177e4 LT |
79 | int port = hwif->channel ? 0x5c : 0x58; |
80 | int portFIFO = hwif->channel ? 0x55 : 0x54; | |
81 | u8 cd_dma_fifo = 0; | |
82 | int unit = drive->select.b.unit & 1; | |
83 | ||
1da177e4 LT |
84 | if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) |
85 | s_clc = 0; | |
86 | if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8) | |
87 | a_clc = 0; | |
1da177e4 | 88 | |
1da177e4 LT |
89 | if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) { |
90 | r_clc = 1; | |
91 | } else { | |
92 | if (r_clc >= 16) | |
93 | r_clc = 0; | |
94 | } | |
95 | local_irq_save(flags); | |
96 | ||
97 | /* | |
98 | * PIO mode => ATA FIFO on, ATAPI FIFO off | |
99 | */ | |
100 | pci_read_config_byte(dev, portFIFO, &cd_dma_fifo); | |
101 | if (drive->media==ide_disk) { | |
102 | if (unit) { | |
103 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50); | |
104 | } else { | |
105 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05); | |
106 | } | |
107 | } else { | |
108 | if (unit) { | |
109 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F); | |
110 | } else { | |
111 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0); | |
112 | } | |
113 | } | |
114 | ||
115 | pci_write_config_byte(dev, port, s_clc); | |
116 | pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc); | |
117 | local_irq_restore(flags); | |
21b82477 SS |
118 | } |
119 | ||
1da177e4 | 120 | /** |
2d5eaa6d BZ |
121 | * ali_udma_filter - compute UDMA mask |
122 | * @drive: IDE device | |
1da177e4 | 123 | * |
2d5eaa6d BZ |
124 | * Return available UDMA modes. |
125 | * | |
126 | * The actual rules for the ALi are: | |
1da177e4 LT |
127 | * No UDMA on revisions <= 0x20 |
128 | * Disk only for revisions < 0xC2 | |
63b1623e | 129 | * Not WDC drives on M1543C-E (?) |
1da177e4 | 130 | */ |
1da177e4 | 131 | |
2d5eaa6d | 132 | static u8 ali_udma_filter(ide_drive_t *drive) |
1da177e4 | 133 | { |
2d5eaa6d BZ |
134 | if (m5229_revision > 0x20 && m5229_revision < 0xC2) { |
135 | if (drive->media != ide_disk) | |
136 | return 0; | |
4dde4492 BZ |
137 | if (wdc_udma == 0 && chip_is_1543c_e && |
138 | strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) | |
2d5eaa6d | 139 | return 0; |
1da177e4 LT |
140 | } |
141 | ||
2d5eaa6d | 142 | return drive->hwif->ultra_mask; |
1da177e4 LT |
143 | } |
144 | ||
145 | /** | |
88b2b32b BZ |
146 | * ali_set_dma_mode - set host controller for DMA mode |
147 | * @drive: drive | |
148 | * @speed: DMA mode | |
1da177e4 LT |
149 | * |
150 | * Configure the hardware for the desired IDE transfer mode. | |
1da177e4 | 151 | */ |
f212ff28 | 152 | |
88b2b32b | 153 | static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) |
1da177e4 LT |
154 | { |
155 | ide_hwif_t *hwif = HWIF(drive); | |
36501650 | 156 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 LT |
157 | u8 speed1 = speed; |
158 | u8 unit = (drive->select.b.unit & 0x01); | |
159 | u8 tmpbyte = 0x00; | |
160 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | |
161 | ||
162 | if (speed == XFER_UDMA_6) | |
163 | speed1 = 0x47; | |
164 | ||
165 | if (speed < XFER_UDMA_0) { | |
166 | u8 ultra_enable = (unit) ? 0x7f : 0xf7; | |
167 | /* | |
168 | * clear "ultra enable" bit | |
169 | */ | |
170 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
171 | tmpbyte &= ultra_enable; | |
172 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
173 | ||
a6fe837e BZ |
174 | /* |
175 | * FIXME: Oh, my... DMA timings are never set. | |
176 | */ | |
1da177e4 LT |
177 | } else { |
178 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
179 | tmpbyte &= (0x0f << ((1-unit) << 2)); | |
180 | /* | |
181 | * enable ultra dma and set timing | |
182 | */ | |
183 | tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); | |
184 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
185 | if (speed >= XFER_UDMA_3) { | |
186 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
187 | tmpbyte |= 1; | |
188 | pci_write_config_byte(dev, 0x4b, tmpbyte); | |
189 | } | |
190 | } | |
1da177e4 LT |
191 | } |
192 | ||
1da177e4 LT |
193 | /** |
194 | * ali15x3_dma_setup - begin a DMA phase | |
195 | * @drive: target device | |
196 | * | |
197 | * Returns 1 if the DMA cannot be performed, zero on success. | |
198 | */ | |
199 | ||
200 | static int ali15x3_dma_setup(ide_drive_t *drive) | |
201 | { | |
202 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { | |
203 | if (rq_data_dir(drive->hwif->hwgroup->rq)) | |
204 | return 1; /* try PIO instead of DMA */ | |
205 | } | |
206 | return ide_dma_setup(drive); | |
207 | } | |
208 | ||
209 | /** | |
210 | * init_chipset_ali15x3 - Initialise an ALi IDE controller | |
211 | * @dev: PCI device | |
1da177e4 LT |
212 | * |
213 | * This function initializes the ALI IDE controller and where | |
214 | * appropriate also sets up the 1533 southbridge. | |
215 | */ | |
a326b02b BZ |
216 | |
217 | static unsigned int __devinit init_chipset_ali15x3(struct pci_dev *dev) | |
1da177e4 LT |
218 | { |
219 | unsigned long flags; | |
220 | u8 tmpbyte; | |
b1489009 | 221 | struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); |
1da177e4 | 222 | |
44c10138 | 223 | m5229_revision = dev->revision; |
1da177e4 | 224 | |
b1489009 | 225 | isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
1da177e4 | 226 | |
1da177e4 LT |
227 | local_irq_save(flags); |
228 | ||
229 | if (m5229_revision < 0xC2) { | |
230 | /* | |
231 | * revision 0x20 (1543-E, 1543-F) | |
232 | * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) | |
233 | * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 | |
234 | */ | |
235 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
236 | /* | |
237 | * clear bit 7 | |
238 | */ | |
239 | pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); | |
cad221aa BZ |
240 | /* |
241 | * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 | |
242 | */ | |
243 | if (m5229_revision >= 0x20 && isa_dev) { | |
244 | pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); | |
245 | chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; | |
246 | } | |
b1489009 | 247 | goto out; |
1da177e4 LT |
248 | } |
249 | ||
250 | /* | |
251 | * 1543C-B?, 1535, 1535D, 1553 | |
252 | * Note 1: not all "motherboard" support this detection | |
253 | * Note 2: if no udma 66 device, the detection may "error". | |
254 | * but in this case, we will not set the device to | |
255 | * ultra 66, the detection result is not important | |
256 | */ | |
257 | ||
258 | /* | |
259 | * enable "Cable Detection", m5229, 0x4b, bit3 | |
260 | */ | |
261 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
262 | pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); | |
263 | ||
264 | /* | |
265 | * We should only tune the 1533 enable if we are using an ALi | |
266 | * North bridge. We might have no north found on some zany | |
267 | * box without a device at 0:0.0. The ALi bridge will be at | |
268 | * 0:0.0 so if we didn't find one we know what is cooking. | |
269 | */ | |
b1489009 AC |
270 | if (north && north->vendor != PCI_VENDOR_ID_AL) |
271 | goto out; | |
1da177e4 LT |
272 | |
273 | if (m5229_revision < 0xC5 && isa_dev) | |
274 | { | |
275 | /* | |
276 | * set south-bridge's enable bit, m1533, 0x79 | |
277 | */ | |
278 | ||
279 | pci_read_config_byte(isa_dev, 0x79, &tmpbyte); | |
280 | if (m5229_revision == 0xC2) { | |
281 | /* | |
282 | * 1543C-B0 (m1533, 0x79, bit 2) | |
283 | */ | |
284 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); | |
285 | } else if (m5229_revision >= 0xC3) { | |
286 | /* | |
287 | * 1553/1535 (m1533, 0x79, bit 1) | |
288 | */ | |
289 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); | |
290 | } | |
291 | } | |
cad221aa | 292 | |
b1489009 | 293 | out: |
cad221aa BZ |
294 | /* |
295 | * CD_ROM DMA on (m5229, 0x53, bit0) | |
296 | * Enable this bit even if we want to use PIO. | |
297 | * PIO FIFO off (m5229, 0x53, bit1) | |
298 | * The hardware will use 0x54h and 0x55h to control PIO FIFO. | |
299 | * (Not on later devices it seems) | |
300 | * | |
301 | * 0x53 changes meaning on later revs - we must no touch | |
302 | * bit 1 on them. Need to check if 0x20 is the right break. | |
303 | */ | |
304 | if (m5229_revision >= 0x20) { | |
305 | pci_read_config_byte(dev, 0x53, &tmpbyte); | |
306 | ||
307 | if (m5229_revision <= 0x20) | |
308 | tmpbyte = (tmpbyte & (~0x02)) | 0x01; | |
309 | else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) | |
310 | tmpbyte |= 0x03; | |
311 | else | |
312 | tmpbyte |= 0x01; | |
313 | ||
314 | pci_write_config_byte(dev, 0x53, tmpbyte); | |
315 | } | |
b1489009 AC |
316 | pci_dev_put(north); |
317 | pci_dev_put(isa_dev); | |
1da177e4 LT |
318 | local_irq_restore(flags); |
319 | return 0; | |
320 | } | |
321 | ||
95ba8c17 BZ |
322 | /* |
323 | * Cable special cases | |
324 | */ | |
325 | ||
1855256c | 326 | static const struct dmi_system_id cable_dmi_table[] = { |
95ba8c17 BZ |
327 | { |
328 | .ident = "HP Pavilion N5430", | |
329 | .matches = { | |
330 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
8663fd6d | 331 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
95ba8c17 BZ |
332 | }, |
333 | }, | |
03e6f489 DE |
334 | { |
335 | .ident = "Toshiba Satellite S1800-814", | |
336 | .matches = { | |
337 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
338 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
339 | }, | |
340 | }, | |
95ba8c17 BZ |
341 | { } |
342 | }; | |
343 | ||
344 | static int ali_cable_override(struct pci_dev *pdev) | |
345 | { | |
346 | /* Fujitsu P2000 */ | |
347 | if (pdev->subsystem_vendor == 0x10CF && | |
348 | pdev->subsystem_device == 0x10AF) | |
349 | return 1; | |
350 | ||
d151456a BZ |
351 | /* Mitac 8317 (Winbook-A) and relatives */ |
352 | if (pdev->subsystem_vendor == 0x1071 && | |
353 | pdev->subsystem_device == 0x8317) | |
354 | return 1; | |
355 | ||
95ba8c17 BZ |
356 | /* Systems by DMI */ |
357 | if (dmi_check_system(cable_dmi_table)) | |
358 | return 1; | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
1da177e4 | 363 | /** |
ac95beed | 364 | * ali_cable_detect - cable detection |
1da177e4 LT |
365 | * @hwif: IDE interface |
366 | * | |
367 | * This checks if the controller and the cable are capable | |
368 | * of UDMA66 transfers. It doesn't check the drives. | |
369 | * But see note 2 below! | |
370 | * | |
371 | * FIXME: frobs bits that are not defined on newer ALi devicea | |
372 | */ | |
373 | ||
f454cbe8 | 374 | static u8 ali_cable_detect(ide_hwif_t *hwif) |
1da177e4 | 375 | { |
36501650 | 376 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 377 | unsigned long flags; |
95ba8c17 | 378 | u8 cbl = ATA_CBL_PATA40, tmpbyte; |
1da177e4 LT |
379 | |
380 | local_irq_save(flags); | |
381 | ||
382 | if (m5229_revision >= 0xC2) { | |
383 | /* | |
95ba8c17 BZ |
384 | * m5229 80-pin cable detection (from Host View) |
385 | * | |
386 | * 0x4a bit0 is 0 => primary channel has 80-pin | |
387 | * 0x4a bit1 is 0 => secondary channel has 80-pin | |
388 | * | |
389 | * Certain laptops use short but suitable cables | |
390 | * and don't implement the detect logic. | |
1da177e4 | 391 | */ |
95ba8c17 BZ |
392 | if (ali_cable_override(dev)) |
393 | cbl = ATA_CBL_PATA40_SHORT; | |
394 | else { | |
395 | pci_read_config_byte(dev, 0x4a, &tmpbyte); | |
396 | if ((tmpbyte & (1 << hwif->channel)) == 0) | |
397 | cbl = ATA_CBL_PATA80; | |
398 | } | |
1da177e4 LT |
399 | } |
400 | ||
1da177e4 LT |
401 | local_irq_restore(flags); |
402 | ||
95ba8c17 | 403 | return cbl; |
1da177e4 LT |
404 | } |
405 | ||
6d1cee44 | 406 | #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) |
1da177e4 LT |
407 | /** |
408 | * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff | |
409 | * @hwif: interface to configure | |
410 | * | |
411 | * Obtain the IRQ tables for an ALi based IDE solution on the PC | |
412 | * class platforms. This part of the code isn't applicable to the | |
6d1cee44 | 413 | * Sparc and PowerPC systems. |
1da177e4 LT |
414 | */ |
415 | ||
c2f12589 | 416 | static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) |
1da177e4 | 417 | { |
36501650 | 418 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 LT |
419 | u8 ideic, inmir; |
420 | s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, | |
421 | 1, 11, 0, 12, 0, 14, 0, 15 }; | |
422 | int irq = -1; | |
423 | ||
36501650 | 424 | if (dev->device == PCI_DEVICE_ID_AL_M5229) |
1da177e4 LT |
425 | hwif->irq = hwif->channel ? 15 : 14; |
426 | ||
427 | if (isa_dev) { | |
428 | /* | |
429 | * read IDE interface control | |
430 | */ | |
431 | pci_read_config_byte(isa_dev, 0x58, &ideic); | |
432 | ||
433 | /* bit0, bit1 */ | |
434 | ideic = ideic & 0x03; | |
435 | ||
436 | /* get IRQ for IDE Controller */ | |
437 | if ((hwif->channel && ideic == 0x03) || | |
438 | (!hwif->channel && !ideic)) { | |
439 | /* | |
440 | * get SIRQ1 routing table | |
441 | */ | |
442 | pci_read_config_byte(isa_dev, 0x44, &inmir); | |
443 | inmir = inmir & 0x0f; | |
444 | irq = irq_routing_table[inmir]; | |
445 | } else if (hwif->channel && !(ideic & 0x01)) { | |
446 | /* | |
447 | * get SIRQ2 routing table | |
448 | */ | |
449 | pci_read_config_byte(isa_dev, 0x75, &inmir); | |
450 | inmir = inmir & 0x0f; | |
451 | irq = irq_routing_table[inmir]; | |
452 | } | |
453 | if(irq >= 0) | |
454 | hwif->irq = irq; | |
455 | } | |
1da177e4 | 456 | } |
6d1cee44 AV |
457 | #else |
458 | #define init_hwif_ali15x3 NULL | |
459 | #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */ | |
1da177e4 LT |
460 | |
461 | /** | |
462 | * init_dma_ali15x3 - set up DMA on ALi15x3 | |
463 | * @hwif: IDE interface | |
b123f56e | 464 | * @d: IDE port info |
1da177e4 | 465 | * |
b123f56e | 466 | * Set up the DMA functionality on the ALi 15x3. |
1da177e4 LT |
467 | */ |
468 | ||
b123f56e BZ |
469 | static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, |
470 | const struct ide_port_info *d) | |
1da177e4 | 471 | { |
b123f56e BZ |
472 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
473 | unsigned long base = ide_pci_dma_base(hwif, d); | |
474 | ||
ebb00fb5 BZ |
475 | if (base == 0) |
476 | return -1; | |
477 | ||
478 | hwif->dma_base = base; | |
479 | ||
480 | if (ide_pci_check_simplex(hwif, d) < 0) | |
481 | return -1; | |
482 | ||
483 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e BZ |
484 | return -1; |
485 | ||
0ecdca26 | 486 | if (!hwif->channel) |
b123f56e BZ |
487 | outb(inb(base + 2) & 0x60, base + 2); |
488 | ||
489 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
490 | hwif->name, base, base + 7); | |
491 | ||
492 | if (ide_allocate_dma_engine(hwif)) | |
493 | return -1; | |
494 | ||
81e8d5a3 | 495 | hwif->dma_ops = &sff_dma_ops; |
b123f56e BZ |
496 | |
497 | return 0; | |
1da177e4 LT |
498 | } |
499 | ||
ac95beed BZ |
500 | static const struct ide_port_ops ali_port_ops = { |
501 | .set_pio_mode = ali_set_pio_mode, | |
502 | .set_dma_mode = ali_set_dma_mode, | |
503 | .udma_filter = ali_udma_filter, | |
504 | .cable_detect = ali_cable_detect, | |
505 | }; | |
506 | ||
f37afdac BZ |
507 | static const struct ide_dma_ops ali_dma_ops = { |
508 | .dma_host_set = ide_dma_host_set, | |
5e37bdc0 | 509 | .dma_setup = ali15x3_dma_setup, |
f37afdac BZ |
510 | .dma_exec_cmd = ide_dma_exec_cmd, |
511 | .dma_start = ide_dma_start, | |
512 | .dma_end = __ide_dma_end, | |
513 | .dma_test_irq = ide_dma_test_irq, | |
514 | .dma_lost_irq = ide_dma_lost_irq, | |
515 | .dma_timeout = ide_dma_timeout, | |
5e37bdc0 BZ |
516 | }; |
517 | ||
85620436 | 518 | static const struct ide_port_info ali15x3_chipset __devinitdata = { |
ced3ec8a | 519 | .name = DRV_NAME, |
1da177e4 LT |
520 | .init_chipset = init_chipset_ali15x3, |
521 | .init_hwif = init_hwif_ali15x3, | |
522 | .init_dma = init_dma_ali15x3, | |
ac95beed | 523 | .port_ops = &ali_port_ops, |
4099d143 | 524 | .pio_mask = ATA_PIO5, |
5f8b6c34 BZ |
525 | .swdma_mask = ATA_SWDMA2, |
526 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
527 | }; |
528 | ||
529 | /** | |
530 | * alim15x3_init_one - set up an ALi15x3 IDE controller | |
531 | * @dev: PCI device to set up | |
532 | * | |
533 | * Perform the actual set up for an ALi15x3 that has been found by the | |
534 | * hot plug layer. | |
535 | */ | |
536 | ||
537 | static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
538 | { | |
039788e1 | 539 | struct ide_port_info d = ali15x3_chipset; |
8ac2b42a | 540 | u8 rev = dev->revision, idx = id->driver_data; |
1da177e4 | 541 | |
28328307 BZ |
542 | /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ |
543 | if (rev <= 0xC4) | |
544 | d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; | |
545 | ||
546 | if (rev >= 0x20) { | |
547 | if (rev == 0x20) | |
548 | d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; | |
549 | ||
550 | if (rev < 0xC2) | |
551 | d.udma_mask = ATA_UDMA2; | |
552 | else if (rev == 0xC2 || rev == 0xC3) | |
553 | d.udma_mask = ATA_UDMA4; | |
554 | else if (rev == 0xC4) | |
555 | d.udma_mask = ATA_UDMA5; | |
556 | else | |
557 | d.udma_mask = ATA_UDMA6; | |
5e37bdc0 BZ |
558 | |
559 | d.dma_ops = &ali_dma_ops; | |
6d36b95f BZ |
560 | } else { |
561 | d.host_flags |= IDE_HFLAG_NO_DMA; | |
562 | ||
563 | d.mwdma_mask = d.swdma_mask = 0; | |
28328307 BZ |
564 | } |
565 | ||
8ac2b42a BZ |
566 | if (idx == 0) |
567 | d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; | |
568 | ||
6cdf6eb3 | 569 | return ide_pci_init_one(dev, &d, NULL); |
1da177e4 LT |
570 | } |
571 | ||
572 | ||
9cbcc5e3 BZ |
573 | static const struct pci_device_id alim15x3_pci_tbl[] = { |
574 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, | |
8ac2b42a | 575 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, |
1da177e4 LT |
576 | { 0, }, |
577 | }; | |
578 | MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); | |
579 | ||
580 | static struct pci_driver driver = { | |
581 | .name = "ALI15x3_IDE", | |
582 | .id_table = alim15x3_pci_tbl, | |
583 | .probe = alim15x3_init_one, | |
8ee3f3b6 | 584 | .remove = ide_pci_remove, |
1da177e4 LT |
585 | }; |
586 | ||
82ab1eec | 587 | static int __init ali15x3_ide_init(void) |
1da177e4 LT |
588 | { |
589 | return ide_pci_register_driver(&driver); | |
590 | } | |
591 | ||
8ee3f3b6 BZ |
592 | static void __exit ali15x3_ide_exit(void) |
593 | { | |
594 | return pci_unregister_driver(&driver); | |
595 | } | |
596 | ||
1da177e4 | 597 | module_init(ali15x3_ide_init); |
8ee3f3b6 | 598 | module_exit(ali15x3_ide_exit); |
1da177e4 LT |
599 | |
600 | MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox"); | |
601 | MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); | |
602 | MODULE_LICENSE("GPL"); |