[deliverable/linux.git] / drivers / ide / pci / it8213.c

/*
 * ITE 8213 IDE driver
 *
 * Copyright (C) 2006 Jack Lee
 * Copyright (C) 2006 Alan Cox
 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>

#include <asm/io.h>

/**
 *	it8213_dma_2_pio		-	return the PIO mode matching DMA
 *	@xfer_rate: transfer speed
 *
 *	Returns the nearest equivalent PIO timing for the PIO or DMA
 *	mode requested by the controller.
 */

static u8 it8213_dma_2_pio (u8 xfer_rate) {
	switch(xfer_rate) {
		case XFER_UDMA_6:
		case XFER_UDMA_5:
		case XFER_UDMA_4:
		case XFER_UDMA_3:
		case XFER_UDMA_2:
		case XFER_UDMA_1:
		case XFER_UDMA_0:
		case XFER_MW_DMA_2:
		case XFER_PIO_4:
			return 4;
		case XFER_MW_DMA_1:
		case XFER_PIO_3:
			return 3;
		case XFER_SW_DMA_2:
		case XFER_PIO_2:
			return 2;
		case XFER_MW_DMA_0:
		case XFER_SW_DMA_1:
		case XFER_SW_DMA_0:
		case XFER_PIO_1:
		case XFER_PIO_0:
		case XFER_PIO_SLOW:
		default:
			return 0;
	}
}

/*
 *	it8213_tuneproc	-	tune a drive
 *	@drive: drive to tune
 *	@pio: desired PIO mode
 *
 *	Set the interface PIO mode.
 */

static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	int is_slave		= drive->dn & 1;
	int master_port		= 0x40;
	int slave_port		= 0x44;
	unsigned long flags;
	u16 master_data;
	u8 slave_data;
	static DEFINE_SPINLOCK(tune_lock);
	int control = 0;

	static const u8 timings[][2]= {
					{ 0, 0 },
					{ 0, 0 },
					{ 1, 0 },
					{ 2, 1 },
					{ 2, 3 }, };

	pio = ide_get_best_pio_mode(drive, pio, 4);

	spin_lock_irqsave(&tune_lock, flags);
	pci_read_config_word(dev, master_port, &master_data);

	if (pio > 1)
		control |= 1;	/* Programmable timing on */
	if (drive->media != ide_disk)
		control |= 4;	/* ATAPI */
	if (pio > 2)
		control |= 2;	/* IORDY */
	if (is_slave) {
		master_data |=  0x4000;
		master_data &= ~0x0070;
		if (pio > 1)
			master_data = master_data | (control << 4);
		pci_read_config_byte(dev, slave_port, &slave_data);
		slave_data = slave_data & 0xf0;
		slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
	} else {
		master_data &= ~0x3307;
		if (pio > 1)
			master_data = master_data | control;
		master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
	}
	pci_write_config_word(dev, master_port, master_data);
	if (is_slave)
		pci_write_config_byte(dev, slave_port, slave_data);
	spin_unlock_irqrestore(&tune_lock, flags);
}

/**
 *	it8213_tune_chipset	-	set controller timings
 *	@drive: Drive to set up
 *	@xferspeed: speed we want to achieve
 *
 *	Tune the ITE chipset for the desired mode. If we can't achieve
 *	the desired mode then tune for a lower one, but ultimately
 *	make the thing work.
 */

static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
{

	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	u8 maslave		= 0x40;
	u8 speed		= ide_rate_filter(drive, xferspeed);
	int a_speed		= 3 << (drive->dn * 4);
	int u_flag		= 1 << drive->dn;
	int v_flag		= 0x01 << drive->dn;
	int w_flag		= 0x10 << drive->dn;
	int u_speed		= 0;
	u16			reg4042, reg4a;
	u8			reg48, reg54, reg55;

	pci_read_config_word(dev, maslave, &reg4042);
	pci_read_config_byte(dev, 0x48, &reg48);
	pci_read_config_word(dev, 0x4a, &reg4a);
	pci_read_config_byte(dev, 0x54, &reg54);
	pci_read_config_byte(dev, 0x55, &reg55);

	switch(speed) {
		case XFER_UDMA_6:
		case XFER_UDMA_4:
		case XFER_UDMA_2:	u_speed = 2 << (drive->dn * 4); break;
		case XFER_UDMA_5:
		case XFER_UDMA_3:
		case XFER_UDMA_1:	u_speed = 1 << (drive->dn * 4); break;
		case XFER_UDMA_0:	u_speed = 0 << (drive->dn * 4); break;
			break;
		case XFER_MW_DMA_2:
		case XFER_MW_DMA_1:
		case XFER_SW_DMA_2:
			break;
		case XFER_PIO_4:
		case XFER_PIO_3:
		case XFER_PIO_2:
		case XFER_PIO_1:
		case XFER_PIO_0:
			break;
		default:
			return -1;
	}

	if (speed >= XFER_UDMA_0) {
		if (!(reg48 & u_flag))
			pci_write_config_byte(dev, 0x48, reg48 | u_flag);
		if (speed >= XFER_UDMA_5) {
			pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
		} else {
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
		}

		if ((reg4a & a_speed) != u_speed)
			pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
		if (speed > XFER_UDMA_2) {
			if (!(reg54 & v_flag))
				pci_write_config_byte(dev, 0x54, reg54 | v_flag);
		} else
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	} else {
		if (reg48 & u_flag)
			pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
		if (reg4a & a_speed)
			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
		if (reg54 & v_flag)
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
		if (reg55 & w_flag)
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
	}
	it8213_tuneproc(drive, it8213_dma_2_pio(speed));
	return ide_config_drive_speed(drive, speed);
}

/**
 *	it8213_configure_drive_for_dma	-	set up for DMA transfers
 *	@drive: drive we are going to set up
 *
 *	Set up the drive for DMA, tune the controller and drive as
 *	required. If the drive isn't suitable for DMA or we hit
 *	other problems then we will drop down to PIO and set up
 *	PIO appropriately
 */

static int it8213_config_drive_for_dma (ide_drive_t *drive)
{
	u8 pio;

	if (ide_tune_dma(drive))
		return 0;

	pio = ide_get_best_pio_mode(drive, 255, 4);
	it8213_tune_chipset(drive, XFER_PIO_0 + pio);

	return -1;
}

/**
 *	init_hwif_it8213	-	set up hwif structs
 *	@hwif: interface to set up
 *
 *	We do the basic set up of the interface structure. The IT8212
 *	requires several custom handlers so we override the default
 *	ide DMA handlers appropriately
 */

static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
{
	u8 reg42h = 0;

	hwif->speedproc = &it8213_tune_chipset;
	hwif->tuneproc	= &it8213_tuneproc;

	hwif->autodma = 0;

	hwif->drives[0].autotune = 1;
	hwif->drives[1].autotune = 1;

	if (!hwif->dma_base)
		return;

	hwif->atapi_dma = 1;
	hwif->ultra_mask = 0x7f;
	hwif->mwdma_mask = 0x06;
	hwif->swdma_mask = 0x04;

	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);

	hwif->ide_dma_check = &it8213_config_drive_for_dma;

	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
		hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;

	/*
	 *	The BIOS often doesn't set up DMA on this controller
	 *	so we always do it.
	 */
	if (!noautodma)
		hwif->autodma = 1;

	hwif->drives[0].autodma = hwif->autodma;
	hwif->drives[1].autodma = hwif->autodma;
}


#define DECLARE_ITE_DEV(name_str)			\
	{						\
		.name		= name_str,		\
		.init_hwif	= init_hwif_it8213,	\
		.autodma	= AUTODMA,		\
		.enablebits	= {{0x41,0x80,0x80}}, \
		.bootable	= ON_BOARD,		\
		.host_flags	= IDE_HFLAG_SINGLE,	\
		.pio_mask	= ATA_PIO4,		\
	}

static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	/* 0 */ DECLARE_ITE_DEV("IT8213"),
};


/**
 *	it8213_init_one	-	pci layer discovery entry
 *	@dev: PCI device
 *	@id: ident table entry
 *
 *	Called by the PCI code when it finds an ITE8213 controller. As
 *	this device follows the standard interfaces we can use the
 *	standard helper functions to do almost all the work for us.
 */

static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	return 0;
}


static struct pci_device_id it8213_pci_tbl[] = {
	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
	{ 0, },
};

MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);

static struct pci_driver driver = {
	.name		= "ITE8213_IDE",
	.id_table	= it8213_pci_tbl,
	.probe		= it8213_init_one,
};

static int __init it8213_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(it8213_ide_init);

MODULE_AUTHOR("Jack Lee, Alan Cox");
MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
MODULE_LICENSE("GPL");
Commit	Line	Data
67881826 BZ	1	/*
	2	* ITE 8213 IDE driver
	3	*
	4	* Copyright (C) 2006 Jack Lee
	5	* Copyright (C) 2006 Alan Cox
	6	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
	7	*/
	8
9c6712c0 JL	9	#include <linux/kernel.h>
	10	#include <linux/types.h>
	11	#include <linux/module.h>
	12	#include <linux/pci.h>
	13	#include <linux/delay.h>
	14	#include <linux/hdreg.h>
	15	#include <linux/ide.h>
	16	#include <linux/init.h>
	17
	18	#include <asm/io.h>
	19
9c6712c0 JL	20	/**
	21	* it8213_dma_2_pio - return the PIO mode matching DMA
	22	* @xfer_rate: transfer speed
	23	*
	24	* Returns the nearest equivalent PIO timing for the PIO or DMA
	25	* mode requested by the controller.
	26	*/
	27
	28	static u8 it8213_dma_2_pio (u8 xfer_rate) {
	29	switch(xfer_rate) {
	30	case XFER_UDMA_6:
	31	case XFER_UDMA_5:
	32	case XFER_UDMA_4:
	33	case XFER_UDMA_3:
	34	case XFER_UDMA_2:
	35	case XFER_UDMA_1:
	36	case XFER_UDMA_0:
	37	case XFER_MW_DMA_2:
	38	case XFER_PIO_4:
	39	return 4;
	40	case XFER_MW_DMA_1:
	41	case XFER_PIO_3:
	42	return 3;
	43	case XFER_SW_DMA_2:
	44	case XFER_PIO_2:
	45	return 2;
	46	case XFER_MW_DMA_0:
	47	case XFER_SW_DMA_1:
	48	case XFER_SW_DMA_0:
	49	case XFER_PIO_1:
	50	case XFER_PIO_0:
	51	case XFER_PIO_SLOW:
	52	default:
	53	return 0;
	54	}
	55	}
	56
9c6712c0 JL	57	/*
	58	* it8213_tuneproc - tune a drive
	59	* @drive: drive to tune
67881826	60	* @pio: desired PIO mode
9c6712c0	61	*
67881826	62	* Set the interface PIO mode.
9c6712c0 JL	63	*/
9c6712c0 JL	64
67881826	65	static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
9c6712c0 JL	66	{
	67	ide_hwif_t *hwif = HWIF(drive);
	68	struct pci_dev *dev = hwif->pci_dev;
67881826	69	int is_slave = drive->dn & 1;
9c6712c0 JL	70	int master_port = 0x40;
	71	int slave_port = 0x44;
	72	unsigned long flags;
	73	u16 master_data;
	74	u8 slave_data;
67881826 BZ	75	static DEFINE_SPINLOCK(tune_lock);
67881826 BZ	76	int control = 0;
9c6712c0	77
67881826 BZ	78	static const u8 timings[][2]= {
	79	{ 0, 0 },
	80	{ 0, 0 },
	81	{ 1, 0 },
	82	{ 2, 1 },
	83	{ 2, 3 }, };
9c6712c0	84
2134758d	85	pio = ide_get_best_pio_mode(drive, pio, 4);
9c6712c0 JL	86
	87	spin_lock_irqsave(&tune_lock, flags);
	88	pci_read_config_word(dev, master_port, &master_data);
67881826 BZ	89
	90	if (pio > 1)
	91	control \|= 1; /* Programmable timing on */
	92	if (drive->media != ide_disk)
	93	control \|= 4; /* ATAPI */
	94	if (pio > 2)
	95	control \|= 2; /* IORDY */
9c6712c0	96	if (is_slave) {
67881826 BZ	97	master_data \|= 0x4000;
67881826 BZ	98	master_data &= ~0x0070;
9c6712c0	99	if (pio > 1)
67881826	100	master_data = master_data \| (control << 4);
9c6712c0 JL	101	pci_read_config_byte(dev, slave_port, &slave_data);
9c6712c0 JL	102	slave_data = slave_data & 0xf0;
67881826	103	slave_data = slave_data \| (timings[pio][0] << 2) \| timings[pio][1];
9c6712c0	104	} else {
67881826	105	master_data &= ~0x3307;
9c6712c0	106	if (pio > 1)
67881826	107	master_data = master_data \| control;
9c6712c0 JL	108	master_data = master_data \| (timings[pio][0] << 12) \| (timings[pio][1] << 8);
	109	}
	110	pci_write_config_word(dev, master_port, master_data);
	111	if (is_slave)
	112	pci_write_config_byte(dev, slave_port, slave_data);
	113	spin_unlock_irqrestore(&tune_lock, flags);
	114	}
	115
9c6712c0 JL	116	/**
	117	* it8213_tune_chipset - set controller timings
	118	* @drive: Drive to set up
	119	* @xferspeed: speed we want to achieve
	120	*
	121	* Tune the ITE chipset for the desired mode. If we can't achieve
	122	* the desired mode then tune for a lower one, but ultimately
	123	* make the thing work.
	124	*/
	125
67881826	126	static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
9c6712c0 JL	127	{
	128
	129	ide_hwif_t *hwif = HWIF(drive);
	130	struct pci_dev *dev = hwif->pci_dev;
	131	u8 maslave = 0x40;
2d5eaa6d	132	u8 speed = ide_rate_filter(drive, xferspeed);
9c6712c0 JL	133	int a_speed = 3 << (drive->dn * 4);
	134	int u_flag = 1 << drive->dn;
	135	int v_flag = 0x01 << drive->dn;
	136	int w_flag = 0x10 << drive->dn;
	137	int u_speed = 0;
	138	u16 reg4042, reg4a;
	139	u8 reg48, reg54, reg55;
	140
	141	pci_read_config_word(dev, maslave, &reg4042);
	142	pci_read_config_byte(dev, 0x48, &reg48);
	143	pci_read_config_word(dev, 0x4a, &reg4a);
	144	pci_read_config_byte(dev, 0x54, &reg54);
	145	pci_read_config_byte(dev, 0x55, &reg55);
	146
	147	switch(speed) {
	148	case XFER_UDMA_6:
	149	case XFER_UDMA_4:
67881826	150	case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
9c6712c0 JL	151	case XFER_UDMA_5:
9c6712c0 JL	152	case XFER_UDMA_3:
67881826 BZ	153	case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break;
67881826 BZ	154	case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
9c6712c0 JL	155	break;
	156	case XFER_MW_DMA_2:
	157	case XFER_MW_DMA_1:
67881826	158	case XFER_SW_DMA_2:
9c6712c0 JL	159	break;
	160	case XFER_PIO_4:
	161	case XFER_PIO_3:
	162	case XFER_PIO_2:
	163	case XFER_PIO_1:
	164	case XFER_PIO_0:
	165	break;
	166	default:
	167	return -1;
	168	}
	169
67881826	170	if (speed >= XFER_UDMA_0) {
9c6712c0 JL	171	if (!(reg48 & u_flag))
	172	pci_write_config_byte(dev, 0x48, reg48 \| u_flag);
	173	if (speed >= XFER_UDMA_5) {
	174	pci_write_config_byte(dev, 0x55, (u8) reg55\|w_flag);
	175	} else {
	176	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
	177	}
	178
	179	if ((reg4a & a_speed) != u_speed)
	180	pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) \| u_speed);
67881826	181	if (speed > XFER_UDMA_2) {
9c6712c0 JL	182	if (!(reg54 & v_flag))
	183	pci_write_config_byte(dev, 0x54, reg54 \| v_flag);
	184	} else
	185	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
67881826	186	} else {
9c6712c0 JL	187	if (reg48 & u_flag)
	188	pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
	189	if (reg4a & a_speed)
	190	pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
	191	if (reg54 & v_flag)
	192	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	193	if (reg55 & w_flag)
	194	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
67881826	195	}
9c6712c0 JL	196	it8213_tuneproc(drive, it8213_dma_2_pio(speed));
9c6712c0 JL	197	return ide_config_drive_speed(drive, speed);
67881826	198	}
9c6712c0	199
9c6712c0 JL	200	/**
	201	* it8213_configure_drive_for_dma - set up for DMA transfers
	202	* @drive: drive we are going to set up
	203	*
	204	* Set up the drive for DMA, tune the controller and drive as
	205	* required. If the drive isn't suitable for DMA or we hit
	206	* other problems then we will drop down to PIO and set up
	207	* PIO appropriately
	208	*/
	209
	210	static int it8213_config_drive_for_dma (ide_drive_t *drive)
	211	{
3608b5d7	212	u8 pio;
67881826	213
29e744d0	214	if (ide_tune_dma(drive))
3608b5d7	215	return 0;
9c6712c0	216
2134758d	217	pio = ide_get_best_pio_mode(drive, 255, 4);
3608b5d7	218	it8213_tune_chipset(drive, XFER_PIO_0 + pio);
9c6712c0	219
3608b5d7	220	return -1;
9c6712c0 JL	221	}
9c6712c0 JL	222
9c6712c0 JL	223	/**
	224	* init_hwif_it8213 - set up hwif structs
	225	* @hwif: interface to set up
	226	*
	227	* We do the basic set up of the interface structure. The IT8212
	228	* requires several custom handlers so we override the default
	229	* ide DMA handlers appropriately
	230	*/
	231
	232	static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
	233	{
49521f97	234	u8 reg42h = 0;
9c6712c0 JL	235
	236	hwif->speedproc = &it8213_tune_chipset;
	237	hwif->tuneproc = &it8213_tuneproc;
	238
	239	hwif->autodma = 0;
	240
	241	hwif->drives[0].autotune = 1;
	242	hwif->drives[1].autotune = 1;
	243
	244	if (!hwif->dma_base)
67881826 BZ	245	return;
67881826 BZ	246
9c6712c0 JL	247	hwif->atapi_dma = 1;
9c6712c0 JL	248	hwif->ultra_mask = 0x7f;
67881826 BZ	249	hwif->mwdma_mask = 0x06;
67881826 BZ	250	hwif->swdma_mask = 0x04;
9c6712c0 JL	251
9c6712c0 JL	252	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
9c6712c0 JL	253
9c6712c0 JL	254	hwif->ide_dma_check = &it8213_config_drive_for_dma;
49521f97 BZ	255
	256	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
	257	hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
9c6712c0 JL	258
	259	/*
	260	* The BIOS often doesn't set up DMA on this controller
	261	* so we always do it.
	262	*/
	263	if (!noautodma)
	264	hwif->autodma = 1;
	265
	266	hwif->drives[0].autodma = hwif->autodma;
	267	hwif->drives[1].autodma = hwif->autodma;
9c6712c0 JL	268	}
	269
	270
	271	#define DECLARE_ITE_DEV(name_str) \
	272	{ \
	273	.name = name_str, \
9c6712c0	274	.init_hwif = init_hwif_it8213, \
67881826	275	.autodma = AUTODMA, \
9c6712c0 JL	276	.enablebits = {{0x41,0x80,0x80}}, \
9c6712c0 JL	277	.bootable = ON_BOARD, \
a5d8c5c8	278	.host_flags = IDE_HFLAG_SINGLE, \
4099d143	279	.pio_mask = ATA_PIO4, \
9c6712c0 JL	280	}
	281
	282	static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	283	/* 0 */ DECLARE_ITE_DEV("IT8213"),
	284	};
	285
	286
	287	/**
	288	* it8213_init_one - pci layer discovery entry
	289	* @dev: PCI device
	290	* @id: ident table entry
	291	*
	292	* Called by the PCI code when it finds an ITE8213 controller. As
	293	* this device follows the standard interfaces we can use the
	294	* standard helper functions to do almost all the work for us.
	295	*/
	296
	297	static int __devinit it8213_init_one(struct pci_dev dev, const struct pci_device_id id)
	298	{
	299	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	300	return 0;
	301	}
	302
	303
	304	static struct pci_device_id it8213_pci_tbl[] = {
67881826	305	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
9c6712c0 JL	306	{ 0, },
	307	};
	308
	309	MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
	310
	311	static struct pci_driver driver = {
	312	.name = "ITE8213_IDE",
	313	.id_table = it8213_pci_tbl,
	314	.probe = it8213_init_one,
	315	};
	316
	317	static int __init it8213_ide_init(void)
	318	{
67881826 BZ	319	return ide_pci_register_driver(&driver);
67881826 BZ	320	}
9c6712c0 JL	321
	322	module_init(it8213_ide_init);
	323
67881826	324	MODULE_AUTHOR("Jack Lee, Alan Cox");
9c6712c0 JL	325	MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
9c6712c0 JL	326	MODULE_LICENSE("GPL");