[deliverable/linux.git] / drivers / ide / pci / it8213.c

/*
 * ITE 8213 IDE driver
 *
 * Copyright (C) 2006 Jack Lee
 * Copyright (C) 2006 Alan Cox
 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>

#include <asm/io.h>

/**
 *	it8213_set_pio_mode	-	set host controller for PIO mode
 *	@drive: drive
 *	@pio: PIO mode number
 *
 *	Set the interface PIO mode.
 */

static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	int is_slave		= drive->dn & 1;
	int master_port		= 0x40;
	int slave_port		= 0x44;
	unsigned long flags;
	u16 master_data;
	u8 slave_data;
	static DEFINE_SPINLOCK(tune_lock);
	int control = 0;

	static const u8 timings[][2]= {
					{ 0, 0 },
					{ 0, 0 },
					{ 1, 0 },
					{ 2, 1 },
					{ 2, 3 }, };

	spin_lock_irqsave(&tune_lock, flags);
	pci_read_config_word(dev, master_port, &master_data);

	if (pio > 1)
		control |= 1;	/* Programmable timing on */
	if (drive->media != ide_disk)
		control |= 4;	/* ATAPI */
	if (pio > 2)
		control |= 2;	/* IORDY */
	if (is_slave) {
		master_data |=  0x4000;
		master_data &= ~0x0070;
		if (pio > 1)
			master_data = master_data | (control << 4);
		pci_read_config_byte(dev, slave_port, &slave_data);
		slave_data = slave_data & 0xf0;
		slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
	} else {
		master_data &= ~0x3307;
		if (pio > 1)
			master_data = master_data | control;
		master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
	}
	pci_write_config_word(dev, master_port, master_data);
	if (is_slave)
		pci_write_config_byte(dev, slave_port, slave_data);
	spin_unlock_irqrestore(&tune_lock, flags);
}

/**
 *	it8213_set_dma_mode	-	set host controller for DMA mode
 *	@drive: drive
 *	@speed: DMA mode
 *
 *	Tune the ITE chipset for the DMA mode.
 */

static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	u8 maslave		= 0x40;
	int a_speed		= 3 << (drive->dn * 4);
	int u_flag		= 1 << drive->dn;
	int v_flag		= 0x01 << drive->dn;
	int w_flag		= 0x10 << drive->dn;
	int u_speed		= 0;
	u16			reg4042, reg4a;
	u8			reg48, reg54, reg55;

	pci_read_config_word(dev, maslave, &reg4042);
	pci_read_config_byte(dev, 0x48, &reg48);
	pci_read_config_word(dev, 0x4a, &reg4a);
	pci_read_config_byte(dev, 0x54, &reg54);
	pci_read_config_byte(dev, 0x55, &reg55);

	switch(speed) {
		case XFER_UDMA_6:
		case XFER_UDMA_4:
		case XFER_UDMA_2:	u_speed = 2 << (drive->dn * 4); break;
		case XFER_UDMA_5:
		case XFER_UDMA_3:
		case XFER_UDMA_1:	u_speed = 1 << (drive->dn * 4); break;
		case XFER_UDMA_0:	u_speed = 0 << (drive->dn * 4); break;
			break;
		case XFER_MW_DMA_2:
		case XFER_MW_DMA_1:
		case XFER_SW_DMA_2:
			break;
		default:
			return;
	}

	if (speed >= XFER_UDMA_0) {
		if (!(reg48 & u_flag))
			pci_write_config_byte(dev, 0x48, reg48 | u_flag);
		if (speed >= XFER_UDMA_5) {
			pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
		} else {
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
		}

		if ((reg4a & a_speed) != u_speed)
			pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
		if (speed > XFER_UDMA_2) {
			if (!(reg54 & v_flag))
				pci_write_config_byte(dev, 0x54, reg54 | v_flag);
		} else
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	} else {
		const u8 mwdma_to_pio[] = { 0, 3, 4 };
		u8 pio;

		if (reg48 & u_flag)
			pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
		if (reg4a & a_speed)
			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
		if (reg54 & v_flag)
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
		if (reg55 & w_flag)
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);

		if (speed >= XFER_MW_DMA_0)
			pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
		else
			pio = 2; /* only SWDMA2 is allowed */

		it8213_set_pio_mode(drive, pio);
	}
}

/**
 *	init_hwif_it8213	-	set up hwif structs
 *	@hwif: interface to set up
 *
 *	We do the basic set up of the interface structure.
 */

static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
{
	u8 reg42h = 0;

	hwif->set_dma_mode = &it8213_set_dma_mode;
	hwif->set_pio_mode = &it8213_set_pio_mode;

	hwif->autodma = 0;

	hwif->drives[0].autotune = 1;
	hwif->drives[1].autotune = 1;

	if (!hwif->dma_base)
		return;

	hwif->atapi_dma = 1;
	hwif->ultra_mask = 0x7f;
	hwif->mwdma_mask = 0x06;
	hwif->swdma_mask = 0x04;

	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);

	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
		hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;

	/*
	 *	The BIOS often doesn't set up DMA on this controller
	 *	so we always do it.
	 */
	if (!noautodma)
		hwif->autodma = 1;

	hwif->drives[0].autodma = hwif->autodma;
	hwif->drives[1].autodma = hwif->autodma;
}


#define DECLARE_ITE_DEV(name_str)			\
	{						\
		.name		= name_str,		\
		.init_hwif	= init_hwif_it8213,	\
		.autodma	= AUTODMA,		\
		.enablebits	= {{0x41,0x80,0x80}}, \
		.bootable	= ON_BOARD,		\
		.host_flags	= IDE_HFLAG_SINGLE,	\
		.pio_mask	= ATA_PIO4,		\
	}

static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	/* 0 */ DECLARE_ITE_DEV("IT8213"),
};


/**
 *	it8213_init_one	-	pci layer discovery entry
 *	@dev: PCI device
 *	@id: ident table entry
 *
 *	Called by the PCI code when it finds an ITE8213 controller. As
 *	this device follows the standard interfaces we can use the
 *	standard helper functions to do almost all the work for us.
 */

static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	return 0;
}


static struct pci_device_id it8213_pci_tbl[] = {
	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
	{ 0, },
};

MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);

static struct pci_driver driver = {
	.name		= "ITE8213_IDE",
	.id_table	= it8213_pci_tbl,
	.probe		= it8213_init_one,
};

static int __init it8213_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(it8213_ide_init);

MODULE_AUTHOR("Jack Lee, Alan Cox");
MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
MODULE_LICENSE("GPL");
Commit	Line	Data
67881826 BZ	1	/*
	2	* ITE 8213 IDE driver
	3	*
	4	* Copyright (C) 2006 Jack Lee
	5	* Copyright (C) 2006 Alan Cox
	6	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
	7	*/
	8
9c6712c0 JL	9	#include <linux/kernel.h>
	10	#include <linux/types.h>
	11	#include <linux/module.h>
	12	#include <linux/pci.h>
	13	#include <linux/delay.h>
	14	#include <linux/hdreg.h>
	15	#include <linux/ide.h>
	16	#include <linux/init.h>
	17
	18	#include <asm/io.h>
	19
88b2b32b BZ	20	/**
	21	* it8213_set_pio_mode - set host controller for PIO mode
	22	* @drive: drive
	23	* @pio: PIO mode number
9c6712c0	24	*
67881826	25	* Set the interface PIO mode.
9c6712c0 JL	26	*/
9c6712c0 JL	27
88b2b32b	28	static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
9c6712c0 JL	29	{
	30	ide_hwif_t *hwif = HWIF(drive);
	31	struct pci_dev *dev = hwif->pci_dev;
67881826	32	int is_slave = drive->dn & 1;
9c6712c0 JL	33	int master_port = 0x40;
	34	int slave_port = 0x44;
	35	unsigned long flags;
	36	u16 master_data;
	37	u8 slave_data;
67881826 BZ	38	static DEFINE_SPINLOCK(tune_lock);
67881826 BZ	39	int control = 0;
9c6712c0	40
67881826 BZ	41	static const u8 timings[][2]= {
	42	{ 0, 0 },
	43	{ 0, 0 },
	44	{ 1, 0 },
	45	{ 2, 1 },
	46	{ 2, 3 }, };
9c6712c0	47
9c6712c0 JL	48	spin_lock_irqsave(&tune_lock, flags);
9c6712c0 JL	49	pci_read_config_word(dev, master_port, &master_data);
67881826 BZ	50
	51	if (pio > 1)
	52	control \|= 1; /* Programmable timing on */
	53	if (drive->media != ide_disk)
	54	control \|= 4; /* ATAPI */
	55	if (pio > 2)
	56	control \|= 2; /* IORDY */
9c6712c0	57	if (is_slave) {
67881826 BZ	58	master_data \|= 0x4000;
67881826 BZ	59	master_data &= ~0x0070;
9c6712c0	60	if (pio > 1)
67881826	61	master_data = master_data \| (control << 4);
9c6712c0 JL	62	pci_read_config_byte(dev, slave_port, &slave_data);
9c6712c0 JL	63	slave_data = slave_data & 0xf0;
67881826	64	slave_data = slave_data \| (timings[pio][0] << 2) \| timings[pio][1];
9c6712c0	65	} else {
67881826	66	master_data &= ~0x3307;
9c6712c0	67	if (pio > 1)
67881826	68	master_data = master_data \| control;
9c6712c0 JL	69	master_data = master_data \| (timings[pio][0] << 12) \| (timings[pio][1] << 8);
	70	}
	71	pci_write_config_word(dev, master_port, master_data);
	72	if (is_slave)
	73	pci_write_config_byte(dev, slave_port, slave_data);
	74	spin_unlock_irqrestore(&tune_lock, flags);
	75	}
	76
9c6712c0	77	/**
88b2b32b BZ	78	* it8213_set_dma_mode - set host controller for DMA mode
	79	* @drive: drive
	80	* @speed: DMA mode
9c6712c0	81	*
88b2b32b	82	* Tune the ITE chipset for the DMA mode.
9c6712c0 JL	83	*/
9c6712c0 JL	84
88b2b32b	85	static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
9c6712c0	86	{
9c6712c0 JL	87	ide_hwif_t *hwif = HWIF(drive);
	88	struct pci_dev *dev = hwif->pci_dev;
	89	u8 maslave = 0x40;
9c6712c0 JL	90	int a_speed = 3 << (drive->dn * 4);
	91	int u_flag = 1 << drive->dn;
	92	int v_flag = 0x01 << drive->dn;
	93	int w_flag = 0x10 << drive->dn;
	94	int u_speed = 0;
	95	u16 reg4042, reg4a;
1c54a93d	96	u8 reg48, reg54, reg55;
9c6712c0 JL	97
	98	pci_read_config_word(dev, maslave, &reg4042);
	99	pci_read_config_byte(dev, 0x48, &reg48);
	100	pci_read_config_word(dev, 0x4a, &reg4a);
	101	pci_read_config_byte(dev, 0x54, &reg54);
	102	pci_read_config_byte(dev, 0x55, &reg55);
	103
	104	switch(speed) {
	105	case XFER_UDMA_6:
	106	case XFER_UDMA_4:
67881826	107	case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
9c6712c0 JL	108	case XFER_UDMA_5:
9c6712c0 JL	109	case XFER_UDMA_3:
67881826 BZ	110	case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break;
67881826 BZ	111	case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
9c6712c0 JL	112	break;
	113	case XFER_MW_DMA_2:
	114	case XFER_MW_DMA_1:
67881826	115	case XFER_SW_DMA_2:
9c6712c0	116	break;
9c6712c0	117	default:
88b2b32b	118	return;
9c6712c0 JL	119	}
9c6712c0 JL	120
67881826	121	if (speed >= XFER_UDMA_0) {
9c6712c0 JL	122	if (!(reg48 & u_flag))
	123	pci_write_config_byte(dev, 0x48, reg48 \| u_flag);
	124	if (speed >= XFER_UDMA_5) {
	125	pci_write_config_byte(dev, 0x55, (u8) reg55\|w_flag);
	126	} else {
	127	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
	128	}
	129
	130	if ((reg4a & a_speed) != u_speed)
	131	pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) \| u_speed);
67881826	132	if (speed > XFER_UDMA_2) {
9c6712c0 JL	133	if (!(reg54 & v_flag))
	134	pci_write_config_byte(dev, 0x54, reg54 \| v_flag);
	135	} else
	136	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
67881826	137	} else {
8c91abf8	138	const u8 mwdma_to_pio[] = { 0, 3, 4 };
1c54a93d	139	u8 pio;
8c91abf8	140
9c6712c0 JL	141	if (reg48 & u_flag)
	142	pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
	143	if (reg4a & a_speed)
	144	pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
	145	if (reg54 & v_flag)
	146	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	147	if (reg55 & w_flag)
	148	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
8c91abf8 BZ	149
	150	if (speed >= XFER_MW_DMA_0)
	151	pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
	152	else
	153	pio = 2; /* only SWDMA2 is allowed */
68aaf815	154
1c54a93d BZ	155	it8213_set_pio_mode(drive, pio);
1c54a93d BZ	156	}
67881826	157	}
9c6712c0	158
9c6712c0 JL	159	/**
	160	* init_hwif_it8213 - set up hwif structs
	161	* @hwif: interface to set up
	162	*
0ae2e178	163	* We do the basic set up of the interface structure.
9c6712c0 JL	164	*/
	165
	166	static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
	167	{
49521f97	168	u8 reg42h = 0;
9c6712c0	169
88b2b32b	170	hwif->set_dma_mode = &it8213_set_dma_mode;
26bcb879	171	hwif->set_pio_mode = &it8213_set_pio_mode;
9c6712c0 JL	172
	173	hwif->autodma = 0;
	174
	175	hwif->drives[0].autotune = 1;
	176	hwif->drives[1].autotune = 1;
	177
	178	if (!hwif->dma_base)
67881826 BZ	179	return;
67881826 BZ	180
9c6712c0 JL	181	hwif->atapi_dma = 1;
9c6712c0 JL	182	hwif->ultra_mask = 0x7f;
67881826 BZ	183	hwif->mwdma_mask = 0x06;
67881826 BZ	184	hwif->swdma_mask = 0x04;
9c6712c0 JL	185
9c6712c0 JL	186	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
9c6712c0	187
49521f97 BZ	188	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
49521f97 BZ	189	hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
9c6712c0 JL	190
	191	/*
	192	* The BIOS often doesn't set up DMA on this controller
	193	* so we always do it.
	194	*/
	195	if (!noautodma)
	196	hwif->autodma = 1;
	197
	198	hwif->drives[0].autodma = hwif->autodma;
	199	hwif->drives[1].autodma = hwif->autodma;
9c6712c0 JL	200	}
	201
	202
	203	#define DECLARE_ITE_DEV(name_str) \
	204	{ \
	205	.name = name_str, \
9c6712c0	206	.init_hwif = init_hwif_it8213, \
67881826	207	.autodma = AUTODMA, \
9c6712c0 JL	208	.enablebits = {{0x41,0x80,0x80}}, \
9c6712c0 JL	209	.bootable = ON_BOARD, \
a5d8c5c8	210	.host_flags = IDE_HFLAG_SINGLE, \
4099d143	211	.pio_mask = ATA_PIO4, \
9c6712c0 JL	212	}
	213
	214	static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	215	/* 0 */ DECLARE_ITE_DEV("IT8213"),
	216	};
	217
	218
	219	/**
	220	* it8213_init_one - pci layer discovery entry
	221	* @dev: PCI device
	222	* @id: ident table entry
	223	*
	224	* Called by the PCI code when it finds an ITE8213 controller. As
	225	* this device follows the standard interfaces we can use the
	226	* standard helper functions to do almost all the work for us.
	227	*/
	228
	229	static int __devinit it8213_init_one(struct pci_dev dev, const struct pci_device_id id)
	230	{
	231	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	232	return 0;
	233	}
	234
	235
	236	static struct pci_device_id it8213_pci_tbl[] = {
67881826	237	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
9c6712c0 JL	238	{ 0, },
	239	};
	240
	241	MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
	242
	243	static struct pci_driver driver = {
	244	.name = "ITE8213_IDE",
	245	.id_table = it8213_pci_tbl,
	246	.probe = it8213_init_one,
	247	};
	248
	249	static int __init it8213_ide_init(void)
	250	{
67881826 BZ	251	return ide_pci_register_driver(&driver);
67881826 BZ	252	}
9c6712c0 JL	253
	254	module_init(it8213_ide_init);
	255
67881826	256	MODULE_AUTHOR("Jack Lee, Alan Cox");
9c6712c0 JL	257	MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
9c6712c0 JL	258	MODULE_LICENSE("GPL");