Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * VIA IDE driver for Linux. Supported southbridges: |
3 | * | |
4 | * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b, | |
5 | * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a, | |
a7dec1e0 | 6 | * vt8235, vt8237, vt8237a |
1da177e4 LT |
7 | * |
8 | * Copyright (c) 2000-2002 Vojtech Pavlik | |
75b1d975 | 9 | * Copyright (c) 2007 Bartlomiej Zolnierkiewicz |
1da177e4 LT |
10 | * |
11 | * Based on the work of: | |
12 | * Michel Aubry | |
13 | * Jeff Garzik | |
14 | * Andre Hedrick | |
15 | * | |
16 | * Documentation: | |
17 | * Obsolete device documentation publically available from via.com.tw | |
18 | * Current device documentation available under NDA only | |
19 | */ | |
20 | ||
21 | /* | |
22 | * This program is free software; you can redistribute it and/or modify it | |
23 | * under the terms of the GNU General Public License version 2 as published by | |
24 | * the Free Software Foundation. | |
25 | */ | |
26 | ||
1da177e4 LT |
27 | #include <linux/module.h> |
28 | #include <linux/kernel.h> | |
1da177e4 LT |
29 | #include <linux/pci.h> |
30 | #include <linux/init.h> | |
31 | #include <linux/ide.h> | |
bdab00b7 BZ |
32 | #include <linux/dmi.h> |
33 | ||
74a9d5f1 | 34 | #ifdef CONFIG_PPC_CHRP |
1da177e4 LT |
35 | #include <asm/processor.h> |
36 | #endif | |
37 | ||
38 | #include "ide-timing.h" | |
39 | ||
1da177e4 LT |
40 | #define VIA_IDE_ENABLE 0x40 |
41 | #define VIA_IDE_CONFIG 0x41 | |
42 | #define VIA_FIFO_CONFIG 0x43 | |
43 | #define VIA_MISC_1 0x44 | |
44 | #define VIA_MISC_2 0x45 | |
45 | #define VIA_MISC_3 0x46 | |
46 | #define VIA_DRIVE_TIMING 0x48 | |
47 | #define VIA_8BIT_TIMING 0x4e | |
48 | #define VIA_ADDRESS_SETUP 0x4c | |
49 | #define VIA_UDMA_TIMING 0x50 | |
50 | ||
75b1d975 BZ |
51 | #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */ |
52 | #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */ | |
53 | #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */ | |
54 | #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */ | |
55 | #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */ | |
56 | #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */ | |
1da177e4 LT |
57 | |
58 | /* | |
59 | * VIA SouthBridge chips. | |
60 | */ | |
61 | ||
62 | static struct via_isa_bridge { | |
63 | char *name; | |
64 | u16 id; | |
65 | u8 rev_min; | |
66 | u8 rev_max; | |
75b1d975 BZ |
67 | u8 udma_mask; |
68 | u8 flags; | |
1da177e4 | 69 | } via_isa_bridges[] = { |
b311ec4a | 70 | { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
75b1d975 BZ |
71 | { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
72 | { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
73 | { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
74 | { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
75 | { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
76 | { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
77 | { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
78 | { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, | |
79 | { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, }, | |
80 | { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, }, | |
81 | { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, }, | |
82 | { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, }, | |
83 | { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, }, | |
84 | { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, | |
85 | { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, }, | |
86 | { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, | |
87 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO }, | |
88 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ }, | |
89 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO }, | |
90 | { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO }, | |
91 | { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO }, | |
92 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK }, | |
93 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, | |
1da177e4 LT |
94 | { NULL } |
95 | }; | |
96 | ||
1da177e4 | 97 | static unsigned int via_clock; |
75b1d975 | 98 | static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; |
1da177e4 | 99 | |
7462cbff DD |
100 | struct via82cxxx_dev |
101 | { | |
102 | struct via_isa_bridge *via_config; | |
103 | unsigned int via_80w; | |
104 | }; | |
105 | ||
1da177e4 LT |
106 | /** |
107 | * via_set_speed - write timing registers | |
108 | * @dev: PCI device | |
109 | * @dn: device | |
110 | * @timing: IDE timing data to use | |
111 | * | |
112 | * via_set_speed writes timing values to the chipset registers | |
113 | */ | |
114 | ||
7462cbff | 115 | static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing) |
1da177e4 | 116 | { |
36501650 BZ |
117 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
118 | struct via82cxxx_dev *vdev = pci_get_drvdata(dev); | |
1da177e4 LT |
119 | u8 t; |
120 | ||
7462cbff | 121 | if (~vdev->via_config->flags & VIA_BAD_AST) { |
1da177e4 LT |
122 | pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t); |
123 | t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1)); | |
124 | pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t); | |
125 | } | |
126 | ||
127 | pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)), | |
128 | ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1)); | |
129 | ||
130 | pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), | |
131 | ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); | |
132 | ||
75b1d975 BZ |
133 | switch (vdev->via_config->udma_mask) { |
134 | case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; | |
135 | case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; | |
136 | case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; | |
137 | case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; | |
138 | default: return; | |
1da177e4 LT |
139 | } |
140 | ||
141 | pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); | |
142 | } | |
143 | ||
144 | /** | |
145 | * via_set_drive - configure transfer mode | |
146 | * @drive: Drive to set up | |
147 | * @speed: desired speed | |
148 | * | |
88b2b32b BZ |
149 | * via_set_drive() computes timing values configures the chipset to |
150 | * a desired transfer mode. It also can be called by upper layers. | |
1da177e4 LT |
151 | */ |
152 | ||
88b2b32b | 153 | static void via_set_drive(ide_drive_t *drive, const u8 speed) |
1da177e4 | 154 | { |
36501650 BZ |
155 | ide_hwif_t *hwif = drive->hwif; |
156 | ide_drive_t *peer = hwif->drives + (~drive->dn & 1); | |
157 | struct pci_dev *dev = to_pci_dev(hwif->dev); | |
158 | struct via82cxxx_dev *vdev = pci_get_drvdata(dev); | |
1da177e4 LT |
159 | struct ide_timing t, p; |
160 | unsigned int T, UT; | |
161 | ||
1da177e4 LT |
162 | T = 1000000000 / via_clock; |
163 | ||
75b1d975 BZ |
164 | switch (vdev->via_config->udma_mask) { |
165 | case ATA_UDMA2: UT = T; break; | |
166 | case ATA_UDMA4: UT = T/2; break; | |
167 | case ATA_UDMA5: UT = T/3; break; | |
168 | case ATA_UDMA6: UT = T/4; break; | |
169 | default: UT = T; | |
1da177e4 LT |
170 | } |
171 | ||
172 | ide_timing_compute(drive, speed, &t, T, UT); | |
173 | ||
174 | if (peer->present) { | |
175 | ide_timing_compute(peer, peer->current_speed, &p, T, UT); | |
176 | ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT); | |
177 | } | |
178 | ||
7462cbff | 179 | via_set_speed(HWIF(drive), drive->dn, &t); |
1da177e4 LT |
180 | } |
181 | ||
182 | /** | |
88b2b32b | 183 | * via_set_pio_mode - set host controller for PIO mode |
26bcb879 BZ |
184 | * @drive: drive |
185 | * @pio: PIO mode number | |
1da177e4 LT |
186 | * |
187 | * A callback from the upper layers for PIO-only tuning. | |
188 | */ | |
189 | ||
26bcb879 | 190 | static void via_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 191 | { |
26bcb879 | 192 | via_set_drive(drive, XFER_PIO_0 + pio); |
1da177e4 LT |
193 | } |
194 | ||
7462cbff DD |
195 | static struct via_isa_bridge *via_config_find(struct pci_dev **isa) |
196 | { | |
197 | struct via_isa_bridge *via_config; | |
7462cbff DD |
198 | |
199 | for (via_config = via_isa_bridges; via_config->id; via_config++) | |
652aa162 | 200 | if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA + |
7462cbff DD |
201 | !!(via_config->flags & VIA_BAD_ID), |
202 | via_config->id, NULL))) { | |
203 | ||
44c10138 AK |
204 | if ((*isa)->revision >= via_config->rev_min && |
205 | (*isa)->revision <= via_config->rev_max) | |
7462cbff | 206 | break; |
652aa162 | 207 | pci_dev_put(*isa); |
7462cbff DD |
208 | } |
209 | ||
210 | return via_config; | |
1da177e4 LT |
211 | } |
212 | ||
cd36beec BZ |
213 | /* |
214 | * Check and handle 80-wire cable presence | |
215 | */ | |
216 | static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) | |
217 | { | |
218 | int i; | |
219 | ||
75b1d975 BZ |
220 | switch (vdev->via_config->udma_mask) { |
221 | case ATA_UDMA4: | |
cd36beec BZ |
222 | for (i = 24; i >= 0; i -= 8) |
223 | if (((u >> (i & 16)) & 8) && | |
224 | ((u >> i) & 0x20) && | |
225 | (((u >> i) & 7) < 2)) { | |
226 | /* | |
227 | * 2x PCI clock and | |
228 | * UDMA w/ < 3T/cycle | |
229 | */ | |
230 | vdev->via_80w |= (1 << (1 - (i >> 4))); | |
231 | } | |
232 | break; | |
233 | ||
75b1d975 | 234 | case ATA_UDMA5: |
cd36beec BZ |
235 | for (i = 24; i >= 0; i -= 8) |
236 | if (((u >> i) & 0x10) || | |
237 | (((u >> i) & 0x20) && | |
238 | (((u >> i) & 7) < 4))) { | |
239 | /* BIOS 80-wire bit or | |
240 | * UDMA w/ < 60ns/cycle | |
241 | */ | |
242 | vdev->via_80w |= (1 << (1 - (i >> 4))); | |
243 | } | |
244 | break; | |
245 | ||
75b1d975 | 246 | case ATA_UDMA6: |
cd36beec BZ |
247 | for (i = 24; i >= 0; i -= 8) |
248 | if (((u >> i) & 0x10) || | |
249 | (((u >> i) & 0x20) && | |
250 | (((u >> i) & 7) < 6))) { | |
251 | /* BIOS 80-wire bit or | |
252 | * UDMA w/ < 60ns/cycle | |
253 | */ | |
254 | vdev->via_80w |= (1 << (1 - (i >> 4))); | |
255 | } | |
256 | break; | |
257 | } | |
258 | } | |
259 | ||
1da177e4 LT |
260 | /** |
261 | * init_chipset_via82cxxx - initialization handler | |
262 | * @dev: PCI device | |
263 | * @name: Name of interface | |
264 | * | |
265 | * The initialization callback. Here we determine the IDE chip type | |
266 | * and initialize its drive independent registers. | |
267 | */ | |
268 | ||
f3718d3e | 269 | static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name) |
1da177e4 LT |
270 | { |
271 | struct pci_dev *isa = NULL; | |
cd36beec | 272 | struct via82cxxx_dev *vdev; |
7462cbff | 273 | struct via_isa_bridge *via_config; |
1da177e4 | 274 | u8 t, v; |
cd36beec BZ |
275 | u32 u; |
276 | ||
277 | vdev = kzalloc(sizeof(*vdev), GFP_KERNEL); | |
278 | if (!vdev) { | |
279 | printk(KERN_ERR "VP_IDE: out of memory :(\n"); | |
280 | return -ENOMEM; | |
281 | } | |
282 | pci_set_drvdata(dev, vdev); | |
1da177e4 LT |
283 | |
284 | /* | |
285 | * Find the ISA bridge to see how good the IDE is. | |
286 | */ | |
cd36beec | 287 | vdev->via_config = via_config = via_config_find(&isa); |
23a1b2a7 AC |
288 | |
289 | /* We checked this earlier so if it fails here deeep badness | |
290 | is involved */ | |
291 | ||
292 | BUG_ON(!via_config->id); | |
1da177e4 LT |
293 | |
294 | /* | |
cd36beec | 295 | * Detect cable and configure Clk66 |
1da177e4 | 296 | */ |
cd36beec BZ |
297 | pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); |
298 | ||
299 | via_cable_detect(vdev, u); | |
1da177e4 | 300 | |
75b1d975 | 301 | if (via_config->udma_mask == ATA_UDMA4) { |
7462cbff | 302 | /* Enable Clk66 */ |
7462cbff DD |
303 | pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); |
304 | } else if (via_config->flags & VIA_BAD_CLK66) { | |
1da177e4 | 305 | /* Would cause trouble on 596a and 686 */ |
1da177e4 LT |
306 | pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008); |
307 | } | |
308 | ||
309 | /* | |
310 | * Check whether interfaces are enabled. | |
311 | */ | |
312 | ||
313 | pci_read_config_byte(dev, VIA_IDE_ENABLE, &v); | |
314 | ||
315 | /* | |
316 | * Set up FIFO sizes and thresholds. | |
317 | */ | |
318 | ||
319 | pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t); | |
320 | ||
321 | /* Disable PREQ# till DDACK# */ | |
322 | if (via_config->flags & VIA_BAD_PREQ) { | |
323 | /* Would crash on 586b rev 41 */ | |
324 | t &= 0x7f; | |
325 | } | |
326 | ||
327 | /* Fix FIFO split between channels */ | |
328 | if (via_config->flags & VIA_SET_FIFO) { | |
329 | t &= (t & 0x9f); | |
330 | switch (v & 3) { | |
331 | case 2: t |= 0x00; break; /* 16 on primary */ | |
332 | case 1: t |= 0x60; break; /* 16 on secondary */ | |
333 | case 3: t |= 0x20; break; /* 8 pri 8 sec */ | |
334 | } | |
335 | } | |
336 | ||
337 | pci_write_config_byte(dev, VIA_FIFO_CONFIG, t); | |
338 | ||
339 | /* | |
340 | * Determine system bus clock. | |
341 | */ | |
342 | ||
343 | via_clock = system_bus_clock() * 1000; | |
344 | ||
345 | switch (via_clock) { | |
346 | case 33000: via_clock = 33333; break; | |
347 | case 37000: via_clock = 37500; break; | |
348 | case 41000: via_clock = 41666; break; | |
349 | } | |
350 | ||
351 | if (via_clock < 20000 || via_clock > 50000) { | |
352 | printk(KERN_WARNING "VP_IDE: User given PCI clock speed " | |
353 | "impossible (%d), using 33 MHz instead.\n", via_clock); | |
354 | printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want " | |
355 | "to assume 80-wire cable.\n"); | |
356 | via_clock = 33333; | |
357 | } | |
358 | ||
359 | /* | |
360 | * Print the boot message. | |
361 | */ | |
362 | ||
75b1d975 | 363 | printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s " |
1da177e4 | 364 | "controller on pci%s\n", |
44c10138 | 365 | via_config->name, isa->revision, |
75b1d975 BZ |
366 | via_config->udma_mask ? "U" : "MW", |
367 | via_dma[via_config->udma_mask ? | |
368 | (fls(via_config->udma_mask) - 1) : 0], | |
1da177e4 LT |
369 | pci_name(dev)); |
370 | ||
652aa162 | 371 | pci_dev_put(isa); |
1da177e4 LT |
372 | return 0; |
373 | } | |
374 | ||
bdab00b7 BZ |
375 | /* |
376 | * Cable special cases | |
377 | */ | |
378 | ||
1855256c | 379 | static const struct dmi_system_id cable_dmi_table[] = { |
bdab00b7 BZ |
380 | { |
381 | .ident = "Acer Ferrari 3400", | |
382 | .matches = { | |
383 | DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."), | |
384 | DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"), | |
385 | }, | |
386 | }, | |
387 | { } | |
388 | }; | |
389 | ||
58e47bb1 | 390 | static int via_cable_override(struct pci_dev *pdev) |
bdab00b7 BZ |
391 | { |
392 | /* Systems by DMI */ | |
393 | if (dmi_check_system(cable_dmi_table)) | |
394 | return 1; | |
58e47bb1 BZ |
395 | |
396 | /* Arima W730-K8/Targa Visionary 811/... */ | |
397 | if (pdev->subsystem_vendor == 0x161F && | |
398 | pdev->subsystem_device == 0x2032) | |
399 | return 1; | |
400 | ||
bdab00b7 BZ |
401 | return 0; |
402 | } | |
403 | ||
404 | static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif) | |
405 | { | |
36501650 | 406 | struct pci_dev *pdev = to_pci_dev(hwif->dev); |
58e47bb1 | 407 | struct via82cxxx_dev *vdev = pci_get_drvdata(pdev); |
bdab00b7 | 408 | |
58e47bb1 | 409 | if (via_cable_override(pdev)) |
bdab00b7 BZ |
410 | return ATA_CBL_PATA40_SHORT; |
411 | ||
412 | if ((vdev->via_80w >> hwif->channel) & 1) | |
413 | return ATA_CBL_PATA80; | |
414 | else | |
415 | return ATA_CBL_PATA40; | |
416 | } | |
417 | ||
f3718d3e | 418 | static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) |
1da177e4 | 419 | { |
26bcb879 | 420 | hwif->set_pio_mode = &via_set_pio_mode; |
88b2b32b | 421 | hwif->set_dma_mode = &via_set_drive; |
1da177e4 | 422 | |
bfa14b42 | 423 | hwif->cable_detect = via82cxxx_cable_detect; |
1da177e4 LT |
424 | } |
425 | ||
85620436 | 426 | static const struct ide_port_info via82cxxx_chipset __devinitdata = { |
6157332e BZ |
427 | .name = "VP_IDE", |
428 | .init_chipset = init_chipset_via82cxxx, | |
429 | .init_hwif = init_hwif_via82cxxx, | |
430 | .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, | |
431 | .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | | |
432 | IDE_HFLAG_PIO_NO_DOWNGRADE | | |
4db90a14 | 433 | IDE_HFLAG_ABUSE_SET_DMA_MODE | |
6157332e BZ |
434 | IDE_HFLAG_POST_SET_MODE | |
435 | IDE_HFLAG_IO_32BIT | | |
436 | IDE_HFLAG_BOOTABLE, | |
437 | .pio_mask = ATA_PIO5, | |
438 | .swdma_mask = ATA_SWDMA2, | |
439 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
440 | }; |
441 | ||
442 | static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
443 | { | |
23a1b2a7 AC |
444 | struct pci_dev *isa = NULL; |
445 | struct via_isa_bridge *via_config; | |
6157332e | 446 | u8 idx = id->driver_data; |
039788e1 | 447 | struct ide_port_info d; |
6157332e BZ |
448 | |
449 | d = via82cxxx_chipset; | |
8acf28c0 | 450 | |
23a1b2a7 AC |
451 | /* |
452 | * Find the ISA bridge and check we know what it is. | |
453 | */ | |
454 | via_config = via_config_find(&isa); | |
455 | pci_dev_put(isa); | |
456 | if (!via_config->id) { | |
457 | printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n"); | |
458 | return -ENODEV; | |
459 | } | |
8acf28c0 | 460 | |
6157332e BZ |
461 | if (idx == 0) |
462 | d.host_flags |= IDE_HFLAG_NO_AUTODMA; | |
caea7602 | 463 | else |
6157332e BZ |
464 | d.enablebits[1].reg = d.enablebits[0].reg = 0; |
465 | ||
466 | if ((via_config->flags & VIA_NO_UNMASK) == 0) | |
467 | d.host_flags |= IDE_HFLAG_UNMASK_IRQS; | |
caea7602 | 468 | |
8acf28c0 BZ |
469 | #ifdef CONFIG_PPC_CHRP |
470 | if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos) | |
6157332e | 471 | d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS; |
8acf28c0 BZ |
472 | #endif |
473 | ||
6157332e | 474 | d.udma_mask = via_config->udma_mask; |
8acf28c0 | 475 | |
6157332e | 476 | return ide_setup_pci_device(dev, &d); |
1da177e4 LT |
477 | } |
478 | ||
9cbcc5e3 BZ |
479 | static const struct pci_device_id via_pci_tbl[] = { |
480 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 }, | |
481 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 }, | |
84f7e451 | 482 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 }, |
9cbcc5e3 BZ |
483 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 }, |
484 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 }, | |
1da177e4 LT |
485 | { 0, }, |
486 | }; | |
487 | MODULE_DEVICE_TABLE(pci, via_pci_tbl); | |
488 | ||
489 | static struct pci_driver driver = { | |
490 | .name = "VIA_IDE", | |
491 | .id_table = via_pci_tbl, | |
492 | .probe = via_init_one, | |
493 | }; | |
494 | ||
82ab1eec | 495 | static int __init via_ide_init(void) |
1da177e4 LT |
496 | { |
497 | return ide_pci_register_driver(&driver); | |
498 | } | |
499 | ||
500 | module_init(via_ide_init); | |
501 | ||
502 | MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick"); | |
503 | MODULE_DESCRIPTION("PCI driver module for VIA IDE"); | |
504 | MODULE_LICENSE("GPL"); |