Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
59bca8cc BZ |
2 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 1995-1998 Mark Lord | |
ad7c52d0 | 4 | * Copyright (C) 2007-2009 Bartlomiej Zolnierkiewicz |
58f189fc | 5 | * |
1da177e4 | 6 | * May be copied or modified under the terms of the GNU General Public License |
1da177e4 LT |
7 | */ |
8 | ||
1da177e4 LT |
9 | #include <linux/types.h> |
10 | #include <linux/kernel.h> | |
38789fda | 11 | #include <linux/export.h> |
1da177e4 LT |
12 | #include <linux/pci.h> |
13 | #include <linux/init.h> | |
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/ide.h> | |
16 | #include <linux/dma-mapping.h> | |
17 | ||
18 | #include <asm/io.h> | |
1da177e4 | 19 | |
1da177e4 LT |
20 | /** |
21 | * ide_setup_pci_baseregs - place a PCI IDE controller native | |
22 | * @dev: PCI device of interface to switch native | |
23 | * @name: Name of interface | |
24 | * | |
25 | * We attempt to place the PCI interface into PCI native mode. If | |
26 | * we succeed the BARs are ok and the controller is in PCI mode. | |
846bb88a | 27 | * Returns 0 on success or an errno code. |
1da177e4 LT |
28 | * |
29 | * FIXME: if we program the interface and then fail to set the BARS | |
30 | * we don't switch it back to legacy mode. Do we actually care ?? | |
31 | */ | |
846bb88a PC |
32 | |
33 | static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name) | |
1da177e4 LT |
34 | { |
35 | u8 progif = 0; | |
36 | ||
37 | /* | |
38 | * Place both IDE interfaces into PCI "native" mode: | |
39 | */ | |
40 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
41 | (progif & 5) != 5) { | |
42 | if ((progif & 0xa) != 0xa) { | |
28cfd8af BZ |
43 | printk(KERN_INFO "%s %s: device not capable of full " |
44 | "native PCI mode\n", name, pci_name(dev)); | |
1da177e4 LT |
45 | return -EOPNOTSUPP; |
46 | } | |
28cfd8af BZ |
47 | printk(KERN_INFO "%s %s: placing both ports into native PCI " |
48 | "mode\n", name, pci_name(dev)); | |
1da177e4 LT |
49 | (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); |
50 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
51 | (progif & 5) != 5) { | |
28cfd8af BZ |
52 | printk(KERN_ERR "%s %s: rewrite of PROGIF failed, " |
53 | "wanted 0x%04x, got 0x%04x\n", | |
54 | name, pci_name(dev), progif | 5, progif); | |
1da177e4 LT |
55 | return -EOPNOTSUPP; |
56 | } | |
57 | } | |
58 | return 0; | |
59 | } | |
60 | ||
61 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
28cfd8af | 62 | static int ide_pci_clear_simplex(unsigned long dma_base, const char *name) |
8ac2b42a BZ |
63 | { |
64 | u8 dma_stat = inb(dma_base + 2); | |
65 | ||
66 | outb(dma_stat & 0x60, dma_base + 2); | |
67 | dma_stat = inb(dma_base + 2); | |
28cfd8af BZ |
68 | |
69 | return (dma_stat & 0x80) ? 1 : 0; | |
8ac2b42a BZ |
70 | } |
71 | ||
1da177e4 | 72 | /** |
b123f56e | 73 | * ide_pci_dma_base - setup BMIBA |
039788e1 | 74 | * @hwif: IDE interface |
b123f56e | 75 | * @d: IDE port info |
1da177e4 | 76 | * |
c58e79dd | 77 | * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. |
1da177e4 LT |
78 | */ |
79 | ||
b123f56e | 80 | unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d) |
1da177e4 | 81 | { |
36501650 BZ |
82 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
83 | unsigned long dma_base = 0; | |
1da177e4 | 84 | |
13572144 | 85 | if (hwif->host_flags & IDE_HFLAG_MMIO) |
1da177e4 LT |
86 | return hwif->dma_base; |
87 | ||
88 | if (hwif->mate && hwif->mate->dma_base) { | |
89 | dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); | |
90 | } else { | |
9ffcf364 BZ |
91 | u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; |
92 | ||
93 | dma_base = pci_resource_start(dev, baridx); | |
94 | ||
aea5d375 | 95 | if (dma_base == 0) { |
28cfd8af BZ |
96 | printk(KERN_ERR "%s %s: DMA base is invalid\n", |
97 | d->name, pci_name(dev)); | |
aea5d375 BZ |
98 | return 0; |
99 | } | |
1da177e4 LT |
100 | } |
101 | ||
aea5d375 BZ |
102 | if (hwif->channel) |
103 | dma_base += 8; | |
104 | ||
ebb00fb5 BZ |
105 | return dma_base; |
106 | } | |
107 | EXPORT_SYMBOL_GPL(ide_pci_dma_base); | |
108 | ||
109 | int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d) | |
110 | { | |
28cfd8af | 111 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
ebb00fb5 BZ |
112 | u8 dma_stat; |
113 | ||
114 | if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520)) | |
8ac2b42a BZ |
115 | goto out; |
116 | ||
117 | if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { | |
28cfd8af BZ |
118 | if (ide_pci_clear_simplex(hwif->dma_base, d->name)) |
119 | printk(KERN_INFO "%s %s: simplex device: DMA forced\n", | |
120 | d->name, pci_name(dev)); | |
8ac2b42a BZ |
121 | goto out; |
122 | } | |
123 | ||
124 | /* | |
125 | * If the device claims "simplex" DMA, this means that only one of | |
126 | * the two interfaces can be trusted with DMA at any point in time | |
127 | * (so we should enable DMA only on one of the two interfaces). | |
128 | * | |
129 | * FIXME: At this point we haven't probed the drives so we can't make | |
130 | * the appropriate decision. Really we should defer this problem until | |
131 | * we tune the drive then try to grab DMA ownership if we want to be | |
132 | * the DMA end. This has to be become dynamic to handle hot-plug. | |
133 | */ | |
592b5315 | 134 | dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); |
8ac2b42a | 135 | if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { |
28cfd8af BZ |
136 | printk(KERN_INFO "%s %s: simplex device: DMA disabled\n", |
137 | d->name, pci_name(dev)); | |
ebb00fb5 | 138 | return -1; |
1da177e4 | 139 | } |
8ac2b42a | 140 | out: |
ebb00fb5 | 141 | return 0; |
1da177e4 | 142 | } |
ebb00fb5 | 143 | EXPORT_SYMBOL_GPL(ide_pci_check_simplex); |
d54452fb BZ |
144 | |
145 | /* | |
146 | * Set up BM-DMA capability (PnP BIOS should have done this) | |
147 | */ | |
b123f56e | 148 | int ide_pci_set_master(struct pci_dev *dev, const char *name) |
d54452fb BZ |
149 | { |
150 | u16 pcicmd; | |
151 | ||
152 | pci_read_config_word(dev, PCI_COMMAND, &pcicmd); | |
153 | ||
154 | if ((pcicmd & PCI_COMMAND_MASTER) == 0) { | |
155 | pci_set_master(dev); | |
156 | ||
157 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || | |
158 | (pcicmd & PCI_COMMAND_MASTER) == 0) { | |
28cfd8af BZ |
159 | printk(KERN_ERR "%s %s: error updating PCICMD\n", |
160 | name, pci_name(dev)); | |
d54452fb BZ |
161 | return -EIO; |
162 | } | |
163 | } | |
164 | ||
165 | return 0; | |
166 | } | |
b123f56e | 167 | EXPORT_SYMBOL_GPL(ide_pci_set_master); |
1da177e4 LT |
168 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
169 | ||
85620436 | 170 | void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 | 171 | { |
28cfd8af BZ |
172 | printk(KERN_INFO "%s %s: IDE controller (0x%04x:0x%04x rev 0x%02x)\n", |
173 | d->name, pci_name(dev), | |
174 | dev->vendor, dev->device, dev->revision); | |
1da177e4 | 175 | } |
1da177e4 LT |
176 | EXPORT_SYMBOL_GPL(ide_setup_pci_noise); |
177 | ||
178 | ||
179 | /** | |
180 | * ide_pci_enable - do PCI enables | |
181 | * @dev: PCI device | |
039788e1 | 182 | * @d: IDE port info |
1da177e4 LT |
183 | * |
184 | * Enable the IDE PCI device. We attempt to enable the device in full | |
09483916 BH |
185 | * but if that fails then we only need IO space. The PCI code should |
186 | * have setup the proper resources for us already for controllers in | |
187 | * legacy mode. | |
846bb88a | 188 | * |
1da177e4 LT |
189 | * Returns zero on success or an error code |
190 | */ | |
039788e1 | 191 | |
85620436 | 192 | static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 | 193 | { |
0d1bad21 | 194 | int ret, bars; |
1da177e4 LT |
195 | |
196 | if (pci_enable_device(dev)) { | |
09483916 | 197 | ret = pci_enable_device_io(dev); |
1da177e4 | 198 | if (ret < 0) { |
28cfd8af BZ |
199 | printk(KERN_WARNING "%s %s: couldn't enable device\n", |
200 | d->name, pci_name(dev)); | |
1da177e4 LT |
201 | goto out; |
202 | } | |
28cfd8af BZ |
203 | printk(KERN_WARNING "%s %s: BIOS configuration fixed\n", |
204 | d->name, pci_name(dev)); | |
1da177e4 LT |
205 | } |
206 | ||
207 | /* | |
039788e1 BZ |
208 | * assume all devices can do 32-bit DMA for now, we can add |
209 | * a DMA mask field to the struct ide_port_info if we need it | |
210 | * (or let lower level driver set the DMA mask) | |
1da177e4 | 211 | */ |
d681f116 | 212 | ret = dma_set_mask(&dev->dev, DMA_BIT_MASK(32)); |
1da177e4 | 213 | if (ret < 0) { |
28cfd8af BZ |
214 | printk(KERN_ERR "%s %s: can't set DMA mask\n", |
215 | d->name, pci_name(dev)); | |
1da177e4 LT |
216 | goto out; |
217 | } | |
218 | ||
0d1bad21 BZ |
219 | if (d->host_flags & IDE_HFLAG_SINGLE) |
220 | bars = (1 << 2) - 1; | |
221 | else | |
222 | bars = (1 << 4) - 1; | |
1da177e4 | 223 | |
0d1bad21 BZ |
224 | if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) { |
225 | if (d->host_flags & IDE_HFLAG_CS5520) | |
226 | bars |= (1 << 2); | |
227 | else | |
228 | bars |= (1 << 4); | |
229 | } | |
230 | ||
231 | ret = pci_request_selected_regions(dev, bars, d->name); | |
232 | if (ret < 0) | |
28cfd8af BZ |
233 | printk(KERN_ERR "%s %s: can't reserve resources\n", |
234 | d->name, pci_name(dev)); | |
1da177e4 LT |
235 | out: |
236 | return ret; | |
237 | } | |
238 | ||
239 | /** | |
240 | * ide_pci_configure - configure an unconfigured device | |
241 | * @dev: PCI device | |
039788e1 | 242 | * @d: IDE port info |
1da177e4 LT |
243 | * |
244 | * Enable and configure the PCI device we have been passed. | |
245 | * Returns zero on success or an error code. | |
246 | */ | |
039788e1 | 247 | |
85620436 | 248 | static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) |
1da177e4 LT |
249 | { |
250 | u16 pcicmd = 0; | |
251 | /* | |
252 | * PnP BIOS was *supposed* to have setup this device, but we | |
253 | * can do it ourselves, so long as the BIOS has assigned an IRQ | |
254 | * (or possibly the device is using a "legacy header" for IRQs). | |
255 | * Maybe the user deliberately *disabled* the device, | |
256 | * but we'll eventually ignore it again if no drives respond. | |
257 | */ | |
846bb88a PC |
258 | if (ide_setup_pci_baseregs(dev, d->name) || |
259 | pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) { | |
28cfd8af BZ |
260 | printk(KERN_INFO "%s %s: device disabled (BIOS)\n", |
261 | d->name, pci_name(dev)); | |
1da177e4 LT |
262 | return -ENODEV; |
263 | } | |
264 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { | |
28cfd8af BZ |
265 | printk(KERN_ERR "%s %s: error accessing PCI regs\n", |
266 | d->name, pci_name(dev)); | |
1da177e4 LT |
267 | return -EIO; |
268 | } | |
269 | if (!(pcicmd & PCI_COMMAND_IO)) { | |
28cfd8af BZ |
270 | printk(KERN_ERR "%s %s: unable to enable IDE controller\n", |
271 | d->name, pci_name(dev)); | |
1da177e4 LT |
272 | return -ENXIO; |
273 | } | |
274 | return 0; | |
275 | } | |
276 | ||
277 | /** | |
278 | * ide_pci_check_iomem - check a register is I/O | |
039788e1 BZ |
279 | * @dev: PCI device |
280 | * @d: IDE port info | |
281 | * @bar: BAR number | |
1da177e4 | 282 | * |
1baccff8 SS |
283 | * Checks if a BAR is configured and points to MMIO space. If so, |
284 | * return an error code. Otherwise return 0 | |
1da177e4 | 285 | */ |
039788e1 | 286 | |
1baccff8 SS |
287 | static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, |
288 | int bar) | |
1da177e4 LT |
289 | { |
290 | ulong flags = pci_resource_flags(dev, bar); | |
846bb88a | 291 | |
1da177e4 LT |
292 | /* Unconfigured ? */ |
293 | if (!flags || pci_resource_len(dev, bar) == 0) | |
294 | return 0; | |
295 | ||
1baccff8 SS |
296 | /* I/O space */ |
297 | if (flags & IORESOURCE_IO) | |
1da177e4 | 298 | return 0; |
846bb88a | 299 | |
1da177e4 | 300 | /* Bad */ |
1da177e4 LT |
301 | return -EINVAL; |
302 | } | |
303 | ||
304 | /** | |
9f36d314 | 305 | * ide_hw_configure - configure a struct ide_hw instance |
1da177e4 | 306 | * @dev: PCI device holding interface |
039788e1 | 307 | * @d: IDE port info |
1ebf7493 | 308 | * @port: port number |
9f36d314 | 309 | * @hw: struct ide_hw instance corresponding to this port |
1da177e4 LT |
310 | * |
311 | * Perform the initial set up for the hardware interface structure. This | |
312 | * is done per interface port rather than per PCI device. There may be | |
313 | * more than one port per device. | |
314 | * | |
48c3c107 | 315 | * Returns zero on success or an error code. |
1da177e4 | 316 | */ |
039788e1 | 317 | |
48c3c107 | 318 | static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d, |
9f36d314 | 319 | unsigned int port, struct ide_hw *hw) |
1da177e4 LT |
320 | { |
321 | unsigned long ctl = 0, base = 0; | |
1da177e4 | 322 | |
a5d8c5c8 | 323 | if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { |
1baccff8 SS |
324 | if (ide_pci_check_iomem(dev, d, 2 * port) || |
325 | ide_pci_check_iomem(dev, d, 2 * port + 1)) { | |
28cfd8af BZ |
326 | printk(KERN_ERR "%s %s: I/O baseregs (BIOS) are " |
327 | "reported as MEM for port %d!\n", | |
328 | d->name, pci_name(dev), port); | |
48c3c107 | 329 | return -EINVAL; |
1baccff8 | 330 | } |
846bb88a | 331 | |
1da177e4 LT |
332 | ctl = pci_resource_start(dev, 2*port+1); |
333 | base = pci_resource_start(dev, 2*port); | |
c1da678b | 334 | } else { |
1da177e4 LT |
335 | /* Use default values */ |
336 | ctl = port ? 0x374 : 0x3f4; | |
337 | base = port ? 0x170 : 0x1f0; | |
338 | } | |
bad7c825 | 339 | |
c1da678b | 340 | if (!base || !ctl) { |
28cfd8af BZ |
341 | printk(KERN_ERR "%s %s: bad PCI BARs for port %d, skipping\n", |
342 | d->name, pci_name(dev), port); | |
48c3c107 | 343 | return -EINVAL; |
c1da678b BZ |
344 | } |
345 | ||
c97c6aca | 346 | memset(hw, 0, sizeof(*hw)); |
c97c6aca | 347 | hw->dev = &dev->dev; |
c97c6aca BZ |
348 | ide_std_init_ports(hw, base, ctl | 2); |
349 | ||
48c3c107 | 350 | return 0; |
1da177e4 LT |
351 | } |
352 | ||
c413b9b9 | 353 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
1da177e4 LT |
354 | /** |
355 | * ide_hwif_setup_dma - configure DMA interface | |
039788e1 | 356 | * @hwif: IDE interface |
c413b9b9 | 357 | * @d: IDE port info |
1da177e4 LT |
358 | * |
359 | * Set up the DMA base for the interface. Enable the master bits as | |
360 | * necessary and attempt to bring the device DMA into a ready to use | |
361 | * state | |
362 | */ | |
039788e1 | 363 | |
b123f56e | 364 | int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) |
1da177e4 | 365 | { |
c413b9b9 | 366 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 367 | |
47b68788 | 368 | if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || |
1da177e4 LT |
369 | ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && |
370 | (dev->class & 0x80))) { | |
b123f56e | 371 | unsigned long base = ide_pci_dma_base(hwif, d); |
d54452fb | 372 | |
ebb00fb5 BZ |
373 | if (base == 0) |
374 | return -1; | |
375 | ||
376 | hwif->dma_base = base; | |
377 | ||
592b5315 SS |
378 | if (hwif->dma_ops == NULL) |
379 | hwif->dma_ops = &sff_dma_ops; | |
380 | ||
ebb00fb5 BZ |
381 | if (ide_pci_check_simplex(hwif, d) < 0) |
382 | return -1; | |
383 | ||
384 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e | 385 | return -1; |
d54452fb | 386 | |
13572144 | 387 | if (hwif->host_flags & IDE_HFLAG_MMIO) |
63158d5c BZ |
388 | printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); |
389 | else | |
390 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
391 | hwif->name, base, base + 7); | |
392 | ||
393 | hwif->extra_base = base + (hwif->channel ? 8 : 16); | |
394 | ||
b123f56e BZ |
395 | if (ide_allocate_dma_engine(hwif)) |
396 | return -1; | |
b123f56e | 397 | } |
d54452fb | 398 | |
b123f56e | 399 | return 0; |
039788e1 | 400 | } |
c413b9b9 | 401 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
1da177e4 LT |
402 | |
403 | /** | |
404 | * ide_setup_pci_controller - set up IDE PCI | |
405 | * @dev: PCI device | |
039788e1 | 406 | * @d: IDE port info |
1da177e4 | 407 | * @noisy: verbose flag |
1da177e4 LT |
408 | * |
409 | * Set up the PCI and controller side of the IDE interface. This brings | |
410 | * up the PCI side of the device, checks that the device is enabled | |
411 | * and enables it if need be | |
412 | */ | |
039788e1 | 413 | |
a95925a3 BZ |
414 | static int ide_setup_pci_controller(struct pci_dev *dev, |
415 | const struct ide_port_info *d, int noisy) | |
1da177e4 LT |
416 | { |
417 | int ret; | |
1da177e4 LT |
418 | u16 pcicmd; |
419 | ||
420 | if (noisy) | |
421 | ide_setup_pci_noise(dev, d); | |
422 | ||
423 | ret = ide_pci_enable(dev, d); | |
424 | if (ret < 0) | |
425 | goto out; | |
426 | ||
427 | ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); | |
428 | if (ret < 0) { | |
28cfd8af BZ |
429 | printk(KERN_ERR "%s %s: error accessing PCI regs\n", |
430 | d->name, pci_name(dev)); | |
1da177e4 LT |
431 | goto out; |
432 | } | |
433 | if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ | |
434 | ret = ide_pci_configure(dev, d); | |
435 | if (ret < 0) | |
436 | goto out; | |
28cfd8af BZ |
437 | printk(KERN_INFO "%s %s: device enabled (Linux)\n", |
438 | d->name, pci_name(dev)); | |
1da177e4 LT |
439 | } |
440 | ||
1da177e4 LT |
441 | out: |
442 | return ret; | |
443 | } | |
444 | ||
445 | /** | |
446 | * ide_pci_setup_ports - configure ports/devices on PCI IDE | |
447 | * @dev: PCI device | |
039788e1 | 448 | * @d: IDE port info |
9f36d314 BZ |
449 | * @hw: struct ide_hw instances corresponding to this PCI IDE device |
450 | * @hws: struct ide_hw pointers table to update | |
1da177e4 LT |
451 | * |
452 | * Scan the interfaces attached to this device and do any | |
453 | * necessary per port setup. Attach the devices and ask the | |
454 | * generic DMA layer to do its work for us. | |
455 | * | |
456 | * Normally called automaticall from do_ide_pci_setup_device, | |
457 | * but is also used directly as a helper function by some controllers | |
458 | * where the chipset setup is not the default PCI IDE one. | |
459 | */ | |
8447d9d5 | 460 | |
c97c6aca | 461 | void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, |
9f36d314 | 462 | struct ide_hw *hw, struct ide_hw **hws) |
1da177e4 | 463 | { |
a5d8c5c8 | 464 | int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; |
1da177e4 LT |
465 | u8 tmp; |
466 | ||
1da177e4 LT |
467 | /* |
468 | * Set up the IDE ports | |
469 | */ | |
cf6e854e | 470 | |
a5d8c5c8 | 471 | for (port = 0; port < channels; ++port) { |
c0ae5023 | 472 | const struct ide_pci_enablebit *e = &d->enablebits[port]; |
85620436 | 473 | |
1da177e4 | 474 | if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || |
cf6e854e | 475 | (tmp & e->mask) != e->val)) { |
28cfd8af BZ |
476 | printk(KERN_INFO "%s %s: IDE port disabled\n", |
477 | d->name, pci_name(dev)); | |
1da177e4 | 478 | continue; /* port not enabled */ |
cf6e854e | 479 | } |
1da177e4 | 480 | |
86ccf37c | 481 | if (ide_hw_configure(dev, d, port, hw + port)) |
1da177e4 LT |
482 | continue; |
483 | ||
c97c6aca | 484 | *(hws + port) = hw + port; |
1ebf7493 | 485 | } |
1da177e4 | 486 | } |
1da177e4 LT |
487 | EXPORT_SYMBOL_GPL(ide_pci_setup_ports); |
488 | ||
489 | /* | |
490 | * ide_setup_pci_device() looks at the primary/secondary interfaces | |
491 | * on a PCI IDE device and, if they are enabled, prepares the IDE driver | |
492 | * for use with them. This generic code works for most PCI chipsets. | |
493 | * | |
494 | * One thing that is not standardized is the location of the | |
495 | * primary/secondary interface "enable/disable" bits. For chipsets that | |
039788e1 | 496 | * we "know" about, this information is in the struct ide_port_info; |
1da177e4 LT |
497 | * for all other chipsets, we just assume both interfaces are enabled. |
498 | */ | |
039788e1 | 499 | static int do_ide_setup_pci_device(struct pci_dev *dev, |
85620436 | 500 | const struct ide_port_info *d, |
51d87ed0 | 501 | u8 noisy) |
1da177e4 | 502 | { |
1da177e4 LT |
503 | int pciirq, ret; |
504 | ||
1da177e4 LT |
505 | /* |
506 | * Can we trust the reported IRQ? | |
507 | */ | |
508 | pciirq = dev->irq; | |
509 | ||
708e5f9e BZ |
510 | /* |
511 | * This allows offboard ide-pci cards the enable a BIOS, | |
512 | * verify interrupt settings of split-mirror pci-config | |
513 | * space, place chipset into init-mode, and/or preserve | |
514 | * an interrupt if the card is not native ide support. | |
515 | */ | |
a326b02b | 516 | ret = d->init_chipset ? d->init_chipset(dev) : 0; |
708e5f9e BZ |
517 | if (ret < 0) |
518 | goto out; | |
519 | ||
8c6de94c | 520 | if (ide_pci_is_in_compatibility_mode(dev)) { |
1da177e4 | 521 | if (noisy) |
28cfd8af BZ |
522 | printk(KERN_INFO "%s %s: not 100%% native mode: will " |
523 | "probe irqs later\n", d->name, pci_name(dev)); | |
2ed0ef54 | 524 | pciirq = 0; |
28cfd8af BZ |
525 | } else if (!pciirq && noisy) { |
526 | printk(KERN_WARNING "%s %s: bad irq (%d): will probe later\n", | |
527 | d->name, pci_name(dev), pciirq); | |
528 | } else if (noisy) { | |
529 | printk(KERN_INFO "%s %s: 100%% native mode on irq %d\n", | |
530 | d->name, pci_name(dev), pciirq); | |
1da177e4 LT |
531 | } |
532 | ||
51d87ed0 | 533 | ret = pciirq; |
1da177e4 LT |
534 | out: |
535 | return ret; | |
536 | } | |
537 | ||
6cdf6eb3 BZ |
538 | int ide_pci_init_two(struct pci_dev *dev1, struct pci_dev *dev2, |
539 | const struct ide_port_info *d, void *priv) | |
1da177e4 LT |
540 | { |
541 | struct pci_dev *pdev[] = { dev1, dev2 }; | |
6cdf6eb3 | 542 | struct ide_host *host; |
ad7c52d0 | 543 | int ret, i, n_ports = dev2 ? 4 : 2; |
9f36d314 | 544 | struct ide_hw hw[4], *hws[] = { NULL, NULL, NULL, NULL }; |
1da177e4 | 545 | |
ad7c52d0 | 546 | for (i = 0; i < n_ports / 2; i++) { |
a742d6cf BZ |
547 | ret = ide_setup_pci_controller(pdev[i], d, !i); |
548 | if (ret < 0) | |
549 | goto out; | |
550 | ||
86ccf37c | 551 | ide_pci_setup_ports(pdev[i], d, &hw[i*2], &hws[i*2]); |
6cdf6eb3 | 552 | } |
8c2eece5 | 553 | |
ad7c52d0 | 554 | host = ide_host_alloc(d, hws, n_ports); |
6cdf6eb3 BZ |
555 | if (host == NULL) { |
556 | ret = -ENOMEM; | |
557 | goto out; | |
558 | } | |
559 | ||
560 | host->dev[0] = &dev1->dev; | |
ad7c52d0 BZ |
561 | if (dev2) |
562 | host->dev[1] = &dev2->dev; | |
6cdf6eb3 BZ |
563 | |
564 | host->host_priv = priv; | |
255115fb BZ |
565 | host->irq_flags = IRQF_SHARED; |
566 | ||
ef0b0427 | 567 | pci_set_drvdata(pdev[0], host); |
ad7c52d0 BZ |
568 | if (dev2) |
569 | pci_set_drvdata(pdev[1], host); | |
6cdf6eb3 | 570 | |
ad7c52d0 | 571 | for (i = 0; i < n_ports / 2; i++) { |
51d87ed0 BZ |
572 | ret = do_ide_setup_pci_device(pdev[i], d, !i); |
573 | ||
1da177e4 LT |
574 | /* |
575 | * FIXME: Mom, mom, they stole me the helper function to undo | |
576 | * do_ide_setup_pci_device() on the first device! | |
577 | */ | |
578 | if (ret < 0) | |
579 | goto out; | |
51d87ed0 | 580 | |
8c2eece5 | 581 | /* fixup IRQ */ |
f65dedfd | 582 | if (ide_pci_is_in_compatibility_mode(pdev[i])) { |
5bae8bf4 BZ |
583 | hw[i*2].irq = pci_get_legacy_ide_irq(pdev[i], 0); |
584 | hw[i*2 + 1].irq = pci_get_legacy_ide_irq(pdev[i], 1); | |
f65dedfd BZ |
585 | } else |
586 | hw[i*2 + 1].irq = hw[i*2].irq = ret; | |
1da177e4 LT |
587 | } |
588 | ||
6cdf6eb3 BZ |
589 | ret = ide_host_register(host, d, hws); |
590 | if (ret) | |
591 | ide_host_free(host); | |
1da177e4 LT |
592 | out: |
593 | return ret; | |
594 | } | |
6cdf6eb3 | 595 | EXPORT_SYMBOL_GPL(ide_pci_init_two); |
ef0b0427 | 596 | |
ad7c52d0 BZ |
597 | int ide_pci_init_one(struct pci_dev *dev, const struct ide_port_info *d, |
598 | void *priv) | |
599 | { | |
600 | return ide_pci_init_two(dev, NULL, d, priv); | |
601 | } | |
602 | EXPORT_SYMBOL_GPL(ide_pci_init_one); | |
603 | ||
ef0b0427 BZ |
604 | void ide_pci_remove(struct pci_dev *dev) |
605 | { | |
606 | struct ide_host *host = pci_get_drvdata(dev); | |
607 | struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL; | |
608 | int bars; | |
609 | ||
610 | if (host->host_flags & IDE_HFLAG_SINGLE) | |
611 | bars = (1 << 2) - 1; | |
612 | else | |
613 | bars = (1 << 4) - 1; | |
614 | ||
615 | if ((host->host_flags & IDE_HFLAG_NO_DMA) == 0) { | |
616 | if (host->host_flags & IDE_HFLAG_CS5520) | |
617 | bars |= (1 << 2); | |
618 | else | |
619 | bars |= (1 << 4); | |
620 | } | |
621 | ||
622 | ide_host_remove(host); | |
623 | ||
624 | if (dev2) | |
625 | pci_release_selected_regions(dev2, bars); | |
626 | pci_release_selected_regions(dev, bars); | |
627 | ||
628 | if (dev2) | |
629 | pci_disable_device(dev2); | |
630 | pci_disable_device(dev); | |
631 | } | |
632 | EXPORT_SYMBOL_GPL(ide_pci_remove); | |
feb22b7f BZ |
633 | |
634 | #ifdef CONFIG_PM | |
635 | int ide_pci_suspend(struct pci_dev *dev, pm_message_t state) | |
636 | { | |
637 | pci_save_state(dev); | |
638 | pci_disable_device(dev); | |
639 | pci_set_power_state(dev, pci_choose_state(dev, state)); | |
640 | ||
641 | return 0; | |
642 | } | |
643 | EXPORT_SYMBOL_GPL(ide_pci_suspend); | |
644 | ||
645 | int ide_pci_resume(struct pci_dev *dev) | |
646 | { | |
647 | struct ide_host *host = pci_get_drvdata(dev); | |
648 | int rc; | |
649 | ||
650 | pci_set_power_state(dev, PCI_D0); | |
651 | ||
652 | rc = pci_enable_device(dev); | |
653 | if (rc) | |
654 | return rc; | |
655 | ||
656 | pci_restore_state(dev); | |
657 | pci_set_master(dev); | |
658 | ||
659 | if (host->init_chipset) | |
660 | host->init_chipset(dev); | |
661 | ||
662 | return 0; | |
663 | } | |
664 | EXPORT_SYMBOL_GPL(ide_pci_resume); | |
665 | #endif |