[deliverable/linux.git] / drivers / iio / adc / ad7291.c

/*
 * AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
 *
 * Copyright 2010-2011 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/sysfs.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>

#include <linux/platform_data/ad7291.h>

/*
 * Simplified handling
 *
 * If no events enabled - single polled channel read
 * If event enabled direct reads disable unless channel
 * is in the read mask.
 *
 * The noise-delayed bit as per datasheet suggestion is always enabled.
 */

/*
 * AD7291 registers definition
 */
#define AD7291_COMMAND			0x00
#define AD7291_VOLTAGE			0x01
#define AD7291_T_SENSE			0x02
#define AD7291_T_AVERAGE		0x03
#define AD7291_DATA_HIGH(x)		((x) * 3 + 0x4)
#define AD7291_DATA_LOW(x)		((x) * 3 + 0x5)
#define AD7291_HYST(x)			((x) * 3 + 0x6)
#define AD7291_VOLTAGE_ALERT_STATUS	0x1F
#define AD7291_T_ALERT_STATUS		0x20

#define AD7291_BITS			12
#define AD7291_VOLTAGE_LIMIT_COUNT	8


/*
 * AD7291 command
 */
#define AD7291_AUTOCYCLE		BIT(0)
#define AD7291_RESET			BIT(1)
#define AD7291_ALERT_CLEAR		BIT(2)
#define AD7291_ALERT_POLARITY		BIT(3)
#define AD7291_EXT_REF			BIT(4)
#define AD7291_NOISE_DELAY		BIT(5)
#define AD7291_T_SENSE_MASK		BIT(7)
#define AD7291_VOLTAGE_MASK		GENMASK(15, 8)
#define AD7291_VOLTAGE_OFFSET		8

/*
 * AD7291 value masks
 */
#define AD7291_VALUE_MASK		GENMASK(11, 0)

/*
 * AD7291 alert register bits
 */
#define AD7291_T_LOW			BIT(0)
#define AD7291_T_HIGH			BIT(1)
#define AD7291_T_AVG_LOW		BIT(2)
#define AD7291_T_AVG_HIGH		BIT(3)
#define AD7291_V_LOW(x)			BIT((x) * 2)
#define AD7291_V_HIGH(x)		BIT((x) * 2 + 1)


struct ad7291_chip_info {
	struct i2c_client	*client;
	struct regulator	*reg;
	u16			command;
	u16			c_mask;	/* Active voltage channels for events */
	struct mutex		state_lock;
};

static int ad7291_i2c_read(struct ad7291_chip_info *chip, u8 reg, u16 *data)
{
	struct i2c_client *client = chip->client;
	int ret = 0;

	ret = i2c_smbus_read_word_swapped(client, reg);
	if (ret < 0) {
		dev_err(&client->dev, "I2C read error\n");
		return ret;
	}

	*data = ret;

	return 0;
}

static int ad7291_i2c_write(struct ad7291_chip_info *chip, u8 reg, u16 data)
{
	return i2c_smbus_write_word_swapped(chip->client, reg, data);
}

static irqreturn_t ad7291_event_handler(int irq, void *private)
{
	struct iio_dev *indio_dev = private;
	struct ad7291_chip_info *chip = iio_priv(private);
	u16 t_status, v_status;
	u16 command;
	int i;
	s64 timestamp = iio_get_time_ns();

	if (ad7291_i2c_read(chip, AD7291_T_ALERT_STATUS, &t_status))
		return IRQ_HANDLED;

	if (ad7291_i2c_read(chip, AD7291_VOLTAGE_ALERT_STATUS, &v_status))
		return IRQ_HANDLED;

	if (!(t_status || v_status))
		return IRQ_HANDLED;

	command = chip->command | AD7291_ALERT_CLEAR;
	ad7291_i2c_write(chip, AD7291_COMMAND, command);

	command = chip->command & ~AD7291_ALERT_CLEAR;
	ad7291_i2c_write(chip, AD7291_COMMAND, command);

	/* For now treat t_sense and t_sense_average the same */
	if ((t_status & AD7291_T_LOW) || (t_status & AD7291_T_AVG_LOW))
		iio_push_event(indio_dev,
			       IIO_UNMOD_EVENT_CODE(IIO_TEMP,
						    0,
						    IIO_EV_TYPE_THRESH,
						    IIO_EV_DIR_FALLING),
			       timestamp);
	if ((t_status & AD7291_T_HIGH) || (t_status & AD7291_T_AVG_HIGH))
		iio_push_event(indio_dev,
			       IIO_UNMOD_EVENT_CODE(IIO_TEMP,
						    0,
						    IIO_EV_TYPE_THRESH,
						    IIO_EV_DIR_RISING),
			       timestamp);

	for (i = 0; i < AD7291_VOLTAGE_LIMIT_COUNT; i++) {
		if (v_status & AD7291_V_LOW(i))
			iio_push_event(indio_dev,
				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
							    i,
							    IIO_EV_TYPE_THRESH,
							    IIO_EV_DIR_FALLING),
				       timestamp);
		if (v_status & AD7291_V_HIGH(i))
			iio_push_event(indio_dev,
				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
							    i,
							    IIO_EV_TYPE_THRESH,
							    IIO_EV_DIR_RISING),
				       timestamp);
	}

	return IRQ_HANDLED;
}

static unsigned int ad7291_threshold_reg(const struct iio_chan_spec *chan,
					 enum iio_event_direction dir,
					 enum iio_event_info info)
{
	unsigned int offset;

	switch (chan->type) {
	case IIO_VOLTAGE:
		offset = chan->channel;
		break;
	case IIO_TEMP:
		offset = AD7291_VOLTAGE_OFFSET;
		break;
	default:
	    return 0;
	}

	switch (info) {
	case IIO_EV_INFO_VALUE:
		if (dir == IIO_EV_DIR_FALLING)
			return AD7291_DATA_HIGH(offset);
		else
			return AD7291_DATA_LOW(offset);
	case IIO_EV_INFO_HYSTERESIS:
		return AD7291_HYST(offset);
	default:
		break;
	}
	return 0;
}

static int ad7291_read_event_value(struct iio_dev *indio_dev,
				   const struct iio_chan_spec *chan,
				   enum iio_event_type type,
				   enum iio_event_direction dir,
				   enum iio_event_info info,
				   int *val, int *val2)
{
	struct ad7291_chip_info *chip = iio_priv(indio_dev);
	int ret;
	u16 uval;

	ret = ad7291_i2c_read(chip, ad7291_threshold_reg(chan, dir, info),
			      &uval);
	if (ret < 0)
		return ret;

	if (info == IIO_EV_INFO_HYSTERESIS || chan->type == IIO_VOLTAGE)
		*val = uval & AD7291_VALUE_MASK;

	else
		*val = sign_extend32(uval, 11);

	return IIO_VAL_INT;
}

static int ad7291_write_event_value(struct iio_dev *indio_dev,
				    const struct iio_chan_spec *chan,
				    enum iio_event_type type,
				    enum iio_event_direction dir,
				    enum iio_event_info info,
				    int val, int val2)
{
	struct ad7291_chip_info *chip = iio_priv(indio_dev);

	if (info == IIO_EV_INFO_HYSTERESIS || chan->type == IIO_VOLTAGE) {
		if (val > AD7291_VALUE_MASK || val < 0)
			return -EINVAL;
	} else {
		if (val > 2047 || val < -2048)
			return -EINVAL;
	}

	return ad7291_i2c_write(chip, ad7291_threshold_reg(chan, dir, info),
				val);
}

static int ad7291_read_event_config(struct iio_dev *indio_dev,
				    const struct iio_chan_spec *chan,
				    enum iio_event_type type,
				    enum iio_event_direction dir)
{
	struct ad7291_chip_info *chip = iio_priv(indio_dev);
	/*
	 * To be enabled the channel must simply be on. If any are enabled
	 * we are in continuous sampling mode
	 */

	switch (chan->type) {
	case IIO_VOLTAGE:
		return !!(chip->c_mask & BIT(15 - chan->channel));
	case IIO_TEMP:
		/* always on */
		return 1;
	default:
		return -EINVAL;
	}

}

static int ad7291_write_event_config(struct iio_dev *indio_dev,
				     const struct iio_chan_spec *chan,
				     enum iio_event_type type,
				     enum iio_event_direction dir,
				     int state)
{
	int ret = 0;
	struct ad7291_chip_info *chip = iio_priv(indio_dev);
	unsigned int mask;
	u16 regval;

	mutex_lock(&chip->state_lock);
	regval = chip->command;
	/*
	 * To be enabled the channel must simply be on. If any are enabled
	 * use continuous sampling mode.
	 * Possible to disable temp as well but that makes single read tricky.
	 */

	mask = BIT(15 - chan->channel);

	switch (chan->type) {
	case IIO_VOLTAGE:
		if ((!state) && (chip->c_mask & mask))
			chip->c_mask &= ~mask;
		else if (state && (!(chip->c_mask & mask)))
			chip->c_mask |= mask;
		else
			break;

		regval &= ~AD7291_AUTOCYCLE;
		regval |= chip->c_mask;
		if (chip->c_mask) /* Enable autocycle? */
			regval |= AD7291_AUTOCYCLE;

		ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval);
		if (ret < 0)
			goto error_ret;

		chip->command = regval;
		break;
	default:
		ret = -EINVAL;
	}

error_ret:
	mutex_unlock(&chip->state_lock);
	return ret;
}

static int ad7291_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long mask)
{
	int ret;
	struct ad7291_chip_info *chip = iio_priv(indio_dev);
	u16 regval;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		switch (chan->type) {
		case IIO_VOLTAGE:
			mutex_lock(&chip->state_lock);
			/* If in autocycle mode drop through */
			if (chip->command & AD7291_AUTOCYCLE) {
				mutex_unlock(&chip->state_lock);
				return -EBUSY;
			}
			/* Enable this channel alone */
			regval = chip->command & (~AD7291_VOLTAGE_MASK);
			regval |= BIT(15 - chan->channel);
			ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval);
			if (ret < 0) {
				mutex_unlock(&chip->state_lock);
				return ret;
			}
			/* Read voltage */
			ret = i2c_smbus_read_word_swapped(chip->client,
							  AD7291_VOLTAGE);
			if (ret < 0) {
				mutex_unlock(&chip->state_lock);
				return ret;
			}
			*val = ret & AD7291_VALUE_MASK;
			mutex_unlock(&chip->state_lock);
			return IIO_VAL_INT;
		case IIO_TEMP:
			/* Assumes tsense bit of command register always set */
			ret = i2c_smbus_read_word_swapped(chip->client,
							  AD7291_T_SENSE);
			if (ret < 0)
				return ret;
			*val = sign_extend32(ret, 11);
			return IIO_VAL_INT;
		default:
			return -EINVAL;
		}
	case IIO_CHAN_INFO_AVERAGE_RAW:
		ret = i2c_smbus_read_word_swapped(chip->client,
						  AD7291_T_AVERAGE);
			if (ret < 0)
				return ret;
			*val = sign_extend32(ret, 11);
			return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		switch (chan->type) {
		case IIO_VOLTAGE:
			if (chip->reg) {
				int vref;

				vref = regulator_get_voltage(chip->reg);
				if (vref < 0)
					return vref;
				*val = vref / 1000;
			} else {
				*val = 2500;
			}
			*val2 = AD7291_BITS;
			return IIO_VAL_FRACTIONAL_LOG2;
		case IIO_TEMP:
			/*
			 * One LSB of the ADC corresponds to 0.25 deg C.
			 * The temperature reading is in 12-bit twos
			 * complement format
			 */
			*val = 250;
			return IIO_VAL_INT;
		default:
			return -EINVAL;
		}
	default:
		return -EINVAL;
	}
}

static const struct iio_event_spec ad7291_events[] = {
	{
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_RISING,
		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
			BIT(IIO_EV_INFO_ENABLE),
	}, {
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_FALLING,
		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
			BIT(IIO_EV_INFO_ENABLE),
	}, {
		.type = IIO_EV_TYPE_THRESH,
		.dir = IIO_EV_DIR_EITHER,
		.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
	},
};

#define AD7291_VOLTAGE_CHAN(_chan)					\
{									\
	.type = IIO_VOLTAGE,						\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),		\
	.indexed = 1,							\
	.channel = _chan,						\
	.event_spec = ad7291_events,					\
	.num_event_specs = ARRAY_SIZE(ad7291_events),			\
}

static const struct iio_chan_spec ad7291_channels[] = {
	AD7291_VOLTAGE_CHAN(0),
	AD7291_VOLTAGE_CHAN(1),
	AD7291_VOLTAGE_CHAN(2),
	AD7291_VOLTAGE_CHAN(3),
	AD7291_VOLTAGE_CHAN(4),
	AD7291_VOLTAGE_CHAN(5),
	AD7291_VOLTAGE_CHAN(6),
	AD7291_VOLTAGE_CHAN(7),
	{
		.type = IIO_TEMP,
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
				BIT(IIO_CHAN_INFO_AVERAGE_RAW) |
				BIT(IIO_CHAN_INFO_SCALE),
		.indexed = 1,
		.channel = 0,
		.event_spec = ad7291_events,
		.num_event_specs = ARRAY_SIZE(ad7291_events),
	}
};

static const struct iio_info ad7291_info = {
	.read_raw = &ad7291_read_raw,
	.read_event_config = &ad7291_read_event_config,
	.write_event_config = &ad7291_write_event_config,
	.read_event_value = &ad7291_read_event_value,
	.write_event_value = &ad7291_write_event_value,
	.driver_module = THIS_MODULE,
};

static int ad7291_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct ad7291_platform_data *pdata = client->dev.platform_data;
	struct ad7291_chip_info *chip;
	struct iio_dev *indio_dev;
	int ret;

	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
	if (!indio_dev)
		return -ENOMEM;
	chip = iio_priv(indio_dev);

	if (pdata && pdata->use_external_ref) {
		chip->reg = devm_regulator_get(&client->dev, "vref");
		if (IS_ERR(chip->reg))
			return PTR_ERR(chip->reg);

		ret = regulator_enable(chip->reg);
		if (ret)
			return ret;
	}

	mutex_init(&chip->state_lock);
	/* this is only used for device removal purposes */
	i2c_set_clientdata(client, indio_dev);

	chip->client = client;

	chip->command = AD7291_NOISE_DELAY |
			AD7291_T_SENSE_MASK | /* Tsense always enabled */
			AD7291_ALERT_POLARITY; /* set irq polarity low level */

	if (pdata && pdata->use_external_ref)
		chip->command |= AD7291_EXT_REF;

	indio_dev->name = id->name;
	indio_dev->channels = ad7291_channels;
	indio_dev->num_channels = ARRAY_SIZE(ad7291_channels);

	indio_dev->dev.parent = &client->dev;
	indio_dev->info = &ad7291_info;
	indio_dev->modes = INDIO_DIRECT_MODE;

	ret = ad7291_i2c_write(chip, AD7291_COMMAND, AD7291_RESET);
	if (ret) {
		ret = -EIO;
		goto error_disable_reg;
	}

	ret = ad7291_i2c_write(chip, AD7291_COMMAND, chip->command);
	if (ret) {
		ret = -EIO;
		goto error_disable_reg;
	}

	if (client->irq > 0) {
		ret = request_threaded_irq(client->irq,
					   NULL,
					   &ad7291_event_handler,
					   IRQF_TRIGGER_LOW | IRQF_ONESHOT,
					   id->name,
					   indio_dev);
		if (ret)
			goto error_disable_reg;
	}

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_unreg_irq;

	return 0;

error_unreg_irq:
	if (client->irq)
		free_irq(client->irq, indio_dev);
error_disable_reg:
	if (chip->reg)
		regulator_disable(chip->reg);

	return ret;
}

static int ad7291_remove(struct i2c_client *client)
{
	struct iio_dev *indio_dev = i2c_get_clientdata(client);
	struct ad7291_chip_info *chip = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);

	if (client->irq)
		free_irq(client->irq, indio_dev);

	if (chip->reg)
		regulator_disable(chip->reg);

	return 0;
}

static const struct i2c_device_id ad7291_id[] = {
	{ "ad7291", 0 },
	{}
};

MODULE_DEVICE_TABLE(i2c, ad7291_id);

static struct i2c_driver ad7291_driver = {
	.driver = {
		.name = KBUILD_MODNAME,
	},
	.probe = ad7291_probe,
	.remove = ad7291_remove,
	.id_table = ad7291_id,
};
module_i2c_driver(ad7291_driver);

MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
MODULE_DESCRIPTION("Analog Devices AD7291 ADC driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
ddaecd5b	1	/*
f22c1cf0	2	* AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
ddaecd5b	3	*
f22c1cf0	4	* Copyright 2010-2011 Analog Devices Inc.
ddaecd5b SZ	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
ddaecd5b	9	#include <linux/device.h>
3b1cae7c	10	#include <linux/err.h>
ddaecd5b	11	#include <linux/i2c.h>
3b1cae7c LPC	12	#include <linux/interrupt.h>
3b1cae7c LPC	13	#include <linux/kernel.h>
99c97852	14	#include <linux/module.h>
4fd24247	15	#include <linux/mutex.h>
3b424f33	16	#include <linux/regulator/consumer.h>
3b1cae7c LPC	17	#include <linux/slab.h>
3b1cae7c LPC	18	#include <linux/sysfs.h>
ddaecd5b	19
06458e27 JC	20	#include <linux/iio/iio.h>
	21	#include <linux/iio/sysfs.h>
	22	#include <linux/iio/events.h>
ddaecd5b	23
3b1cae7c	24	#include <linux/platform_data/ad7291.h>
1df9d1d4	25
4fd24247 JC	26	/*
	27	* Simplified handling
	28	*
	29	* If no events enabled - single polled channel read
	30	* If event enabled direct reads disable unless channel
	31	* is in the read mask.
	32	*
	33	* The noise-delayed bit as per datasheet suggestion is always enabled.
4fd24247	34	*/
3b424f33	35
ddaecd5b SZ	36	/*
	37	* AD7291 registers definition
	38	*/
81e2edbe MH	39	#define AD7291_COMMAND 0x00
	40	#define AD7291_VOLTAGE 0x01
	41	#define AD7291_T_SENSE 0x02
	42	#define AD7291_T_AVERAGE 0x03
3f8db0d4 LPC	43	#define AD7291_DATA_HIGH(x) ((x) * 3 + 0x4)
	44	#define AD7291_DATA_LOW(x) ((x) * 3 + 0x5)
	45	#define AD7291_HYST(x) ((x) * 3 + 0x6)
00feefbb	46	#define AD7291_VOLTAGE_ALERT_STATUS 0x1F
ddaecd5b SZ	47	#define AD7291_T_ALERT_STATUS 0x20
ddaecd5b SZ	48
5714d0c1	49	#define AD7291_BITS 12
81e2edbe MH	50	#define AD7291_VOLTAGE_LIMIT_COUNT 8
	51
	52
ddaecd5b SZ	53	/*
	54	* AD7291 command
	55	*/
5714d0c1 HK	56	#define AD7291_AUTOCYCLE BIT(0)
	57	#define AD7291_RESET BIT(1)
	58	#define AD7291_ALERT_CLEAR BIT(2)
	59	#define AD7291_ALERT_POLARITY BIT(3)
	60	#define AD7291_EXT_REF BIT(4)
	61	#define AD7291_NOISE_DELAY BIT(5)
	62	#define AD7291_T_SENSE_MASK BIT(7)
	63	#define AD7291_VOLTAGE_MASK GENMASK(15, 8)
	64	#define AD7291_VOLTAGE_OFFSET 8
ddaecd5b SZ	65
	66	/*
	67	* AD7291 value masks
	68	*/
5714d0c1	69	#define AD7291_VALUE_MASK GENMASK(11, 0)
ddaecd5b	70
cfa71bf3 HK	71	/*
	72	* AD7291 alert register bits
	73	*/
	74	#define AD7291_T_LOW BIT(0)
	75	#define AD7291_T_HIGH BIT(1)
	76	#define AD7291_T_AVG_LOW BIT(2)
	77	#define AD7291_T_AVG_HIGH BIT(3)
	78	#define AD7291_V_LOW(x) BIT((x) * 2)
	79	#define AD7291_V_HIGH(x) BIT((x) * 2 + 1)
ddaecd5b	80
3b424f33	81
ddaecd5b	82	struct ad7291_chip_info {
3b424f33 MH	83	struct i2c_client *client;
3b424f33 MH	84	struct regulator *reg;
3b424f33	85	u16 command;
06420c2d	86	u16 c_mask; /* Active voltage channels for events */
e68b1db1	87	struct mutex state_lock;
ddaecd5b SZ	88	};
ddaecd5b SZ	89
ddaecd5b SZ	90	static int ad7291_i2c_read(struct ad7291_chip_info chip, u8 reg, u16 data)
	91	{
	92	struct i2c_client *client = chip->client;
	93	int ret = 0;
	94
7bd49fe1	95	ret = i2c_smbus_read_word_swapped(client, reg);
ddaecd5b SZ	96	if (ret < 0) {
	97	dev_err(&client->dev, "I2C read error\n");
	98	return ret;
	99	}
	100
7bd49fe1	101	*data = ret;
ddaecd5b SZ	102
	103	return 0;
	104	}
	105
	106	static int ad7291_i2c_write(struct ad7291_chip_info *chip, u8 reg, u16 data)
	107	{
7bd49fe1	108	return i2c_smbus_write_word_swapped(chip->client, reg, data);
ddaecd5b SZ	109	}
ddaecd5b SZ	110
58c0323c	111	static irqreturn_t ad7291_event_handler(int irq, void *private)
ddaecd5b	112	{
58c0323c	113	struct iio_dev *indio_dev = private;
d4397972	114	struct ad7291_chip_info *chip = iio_priv(private);
ddaecd5b SZ	115	u16 t_status, v_status;
	116	u16 command;
	117	int i;
58c0323c	118	s64 timestamp = iio_get_time_ns();
ddaecd5b SZ	119
ddaecd5b SZ	120	if (ad7291_i2c_read(chip, AD7291_T_ALERT_STATUS, &t_status))
58c0323c	121	return IRQ_HANDLED;
ddaecd5b SZ	122
ddaecd5b SZ	123	if (ad7291_i2c_read(chip, AD7291_VOLTAGE_ALERT_STATUS, &v_status))
58c0323c	124	return IRQ_HANDLED;
ddaecd5b SZ	125
ddaecd5b SZ	126	if (!(t_status \|\| v_status))
58c0323c	127	return IRQ_HANDLED;
ddaecd5b	128
f22c1cf0	129	command = chip->command \| AD7291_ALERT_CLEAR;
ddaecd5b SZ	130	ad7291_i2c_write(chip, AD7291_COMMAND, command);
ddaecd5b SZ	131
f22c1cf0	132	command = chip->command & ~AD7291_ALERT_CLEAR;
ddaecd5b SZ	133	ad7291_i2c_write(chip, AD7291_COMMAND, command);
ddaecd5b SZ	134
4fd24247	135	/* For now treat t_sense and t_sense_average the same */
cfa71bf3	136	if ((t_status & AD7291_T_LOW) \|\| (t_status & AD7291_T_AVG_LOW))
5aa96188	137	iio_push_event(indio_dev,
b206c3bb JC	138	IIO_UNMOD_EVENT_CODE(IIO_TEMP,
	139	0,
	140	IIO_EV_TYPE_THRESH,
	141	IIO_EV_DIR_FALLING),
	142	timestamp);
cfa71bf3	143	if ((t_status & AD7291_T_HIGH) \|\| (t_status & AD7291_T_AVG_HIGH))
5aa96188	144	iio_push_event(indio_dev,
b206c3bb JC	145	IIO_UNMOD_EVENT_CODE(IIO_TEMP,
	146	0,
	147	IIO_EV_TYPE_THRESH,
	148	IIO_EV_DIR_RISING),
	149	timestamp);
	150
cfa71bf3 HK	151	for (i = 0; i < AD7291_VOLTAGE_LIMIT_COUNT; i++) {
cfa71bf3 HK	152	if (v_status & AD7291_V_LOW(i))
5aa96188	153	iio_push_event(indio_dev,
6835cb6b	154	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cfa71bf3	155	i,
b206c3bb JC	156	IIO_EV_TYPE_THRESH,
	157	IIO_EV_DIR_FALLING),
	158	timestamp);
cfa71bf3	159	if (v_status & AD7291_V_HIGH(i))
5aa96188	160	iio_push_event(indio_dev,
6835cb6b	161	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cfa71bf3	162	i,
b206c3bb JC	163	IIO_EV_TYPE_THRESH,
	164	IIO_EV_DIR_RISING),
	165	timestamp);
ddaecd5b	166	}
ddaecd5b	167
58c0323c	168	return IRQ_HANDLED;
ddaecd5b SZ	169	}
ddaecd5b SZ	170
b80a674b	171	static unsigned int ad7291_threshold_reg(const struct iio_chan_spec *chan,
975d98ce HK	172	enum iio_event_direction dir,
975d98ce HK	173	enum iio_event_info info)
3f8db0d4 LPC	174	{
	175	unsigned int offset;
	176
b80a674b	177	switch (chan->type) {
3f8db0d4	178	case IIO_VOLTAGE:
b80a674b	179	offset = chan->channel;
3f8db0d4 LPC	180	break;
3f8db0d4 LPC	181	case IIO_TEMP:
5714d0c1	182	offset = AD7291_VOLTAGE_OFFSET;
3f8db0d4 LPC	183	break;
	184	default:
	185	return 0;
	186	}
	187
ec87197f LPC	188	switch (info) {
ec87197f LPC	189	case IIO_EV_INFO_VALUE:
975d98ce HK	190	if (dir == IIO_EV_DIR_FALLING)
	191	return AD7291_DATA_HIGH(offset);
	192	else
	193	return AD7291_DATA_LOW(offset);
ec87197f	194	case IIO_EV_INFO_HYSTERESIS:
975d98ce	195	return AD7291_HYST(offset);
ec87197f	196	default:
975d98ce	197	break;
ec87197f LPC	198	}
ec87197f LPC	199	return 0;
3f8db0d4	200	}
ddaecd5b	201
4fd24247	202	static int ad7291_read_event_value(struct iio_dev *indio_dev,
b80a674b LPC	203	const struct iio_chan_spec *chan,
	204	enum iio_event_type type,
	205	enum iio_event_direction dir,
	206	enum iio_event_info info,
	207	int val, int val2)
ddaecd5b	208	{
4fd24247	209	struct ad7291_chip_info *chip = iio_priv(indio_dev);
4fd24247	210	int ret;
4fd24247	211	u16 uval;
4fd24247	212
ec87197f	213	ret = ad7291_i2c_read(chip, ad7291_threshold_reg(chan, dir, info),
975d98ce	214	&uval);
3f8db0d4 LPC	215	if (ret < 0)
	216	return ret;
	217
ec87197f	218	if (info == IIO_EV_INFO_HYSTERESIS \|\| chan->type == IIO_VOLTAGE)
81e2edbe	219	*val = uval & AD7291_VALUE_MASK;
ec87197f LPC	220
ec87197f LPC	221	else
88198d2b	222	*val = sign_extend32(uval, 11);
ec87197f LPC	223
ec87197f LPC	224	return IIO_VAL_INT;
4fd24247	225	}
ddaecd5b	226
4fd24247	227	static int ad7291_write_event_value(struct iio_dev *indio_dev,
b80a674b LPC	228	const struct iio_chan_spec *chan,
	229	enum iio_event_type type,
	230	enum iio_event_direction dir,
	231	enum iio_event_info info,
	232	int val, int val2)
4fd24247 JC	233	{
4fd24247 JC	234	struct ad7291_chip_info *chip = iio_priv(indio_dev);
4fd24247	235
ec87197f	236	if (info == IIO_EV_INFO_HYSTERESIS \|\| chan->type == IIO_VOLTAGE) {
a3ef65d3	237	if (val > AD7291_VALUE_MASK \|\| val < 0)
4fd24247	238	return -EINVAL;
ec87197f	239	} else {
4fd24247 JC	240	if (val > 2047 \|\| val < -2048)
4fd24247 JC	241	return -EINVAL;
3f8db0d4 LPC	242	}
3f8db0d4 LPC	243
ec87197f	244	return ad7291_i2c_write(chip, ad7291_threshold_reg(chan, dir, info),
975d98ce	245	val);
ddaecd5b SZ	246	}
ddaecd5b SZ	247
4fd24247	248	static int ad7291_read_event_config(struct iio_dev *indio_dev,
b80a674b LPC	249	const struct iio_chan_spec *chan,
	250	enum iio_event_type type,
	251	enum iio_event_direction dir)
ddaecd5b	252	{
4fd24247	253	struct ad7291_chip_info *chip = iio_priv(indio_dev);
975d98ce HK	254	/*
	255	* To be enabled the channel must simply be on. If any are enabled
	256	* we are in continuous sampling mode
	257	*/
4fd24247	258
b80a674b	259	switch (chan->type) {
4fd24247	260	case IIO_VOLTAGE:
8a32f65f	261	return !!(chip->c_mask & BIT(15 - chan->channel));
4fd24247 JC	262	case IIO_TEMP:
	263	/* always on */
	264	return 1;
	265	default:
ddaecd5b	266	return -EINVAL;
4fd24247	267	}
ddaecd5b	268
4fd24247	269	}
ddaecd5b	270
4fd24247	271	static int ad7291_write_event_config(struct iio_dev *indio_dev,
b80a674b LPC	272	const struct iio_chan_spec *chan,
	273	enum iio_event_type type,
	274	enum iio_event_direction dir,
4fd24247 JC	275	int state)
	276	{
	277	int ret = 0;
	278	struct ad7291_chip_info *chip = iio_priv(indio_dev);
b80a674b	279	unsigned int mask;
4fd24247 JC	280	u16 regval;
	281
	282	mutex_lock(&chip->state_lock);
	283	regval = chip->command;
	284	/*
	285	* To be enabled the channel must simply be on. If any are enabled
	286	* use continuous sampling mode.
	287	* Possible to disable temp as well but that makes single read tricky.
	288	*/
81e2edbe	289
b80a674b LPC	290	mask = BIT(15 - chan->channel);
	291
	292	switch (chan->type) {
4fd24247	293	case IIO_VOLTAGE:
b80a674b LPC	294	if ((!state) && (chip->c_mask & mask))
	295	chip->c_mask &= ~mask;
	296	else if (state && (!(chip->c_mask & mask)))
	297	chip->c_mask \|= mask;
4fd24247 JC	298	else
	299	break;
	300
81e2edbe	301	regval &= ~AD7291_AUTOCYCLE;
06420c2d	302	regval \|= chip->c_mask;
4fd24247 JC	303	if (chip->c_mask) /* Enable autocycle? */
	304	regval \|= AD7291_AUTOCYCLE;
	305
	306	ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval);
	307	if (ret < 0)
	308	goto error_ret;
	309
	310	chip->command = regval;
	311	break;
	312	default:
	313	ret = -EINVAL;
	314	}
ddaecd5b	315
4fd24247 JC	316	error_ret:
4fd24247 JC	317	mutex_unlock(&chip->state_lock);
ddaecd5b SZ	318	return ret;
	319	}
	320
4fd24247 JC	321	static int ad7291_read_raw(struct iio_dev *indio_dev,
	322	struct iio_chan_spec const *chan,
	323	int *val,
	324	int *val2,
	325	long mask)
	326	{
	327	int ret;
	328	struct ad7291_chip_info *chip = iio_priv(indio_dev);
	329	u16 regval;
4fd24247 JC	330
4fd24247 JC	331	switch (mask) {
b11f98ff	332	case IIO_CHAN_INFO_RAW:
4fd24247 JC	333	switch (chan->type) {
	334	case IIO_VOLTAGE:
	335	mutex_lock(&chip->state_lock);
	336	/* If in autocycle mode drop through */
06420c2d	337	if (chip->command & AD7291_AUTOCYCLE) {
4fd24247 JC	338	mutex_unlock(&chip->state_lock);
	339	return -EBUSY;
	340	}
	341	/* Enable this channel alone */
	342	regval = chip->command & (~AD7291_VOLTAGE_MASK);
5714d0c1	343	regval \|= BIT(15 - chan->channel);
4fd24247 JC	344	ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval);
	345	if (ret < 0) {
	346	mutex_unlock(&chip->state_lock);
	347	return ret;
	348	}
	349	/* Read voltage */
7bd49fe1	350	ret = i2c_smbus_read_word_swapped(chip->client,
975d98ce	351	AD7291_VOLTAGE);
4fd24247 JC	352	if (ret < 0) {
	353	mutex_unlock(&chip->state_lock);
	354	return ret;
	355	}
7bd49fe1	356	*val = ret & AD7291_VALUE_MASK;
4fd24247 JC	357	mutex_unlock(&chip->state_lock);
	358	return IIO_VAL_INT;
	359	case IIO_TEMP:
	360	/* Assumes tsense bit of command register always set */
7bd49fe1	361	ret = i2c_smbus_read_word_swapped(chip->client,
975d98ce	362	AD7291_T_SENSE);
4fd24247 JC	363	if (ret < 0)
4fd24247 JC	364	return ret;
88198d2b	365	*val = sign_extend32(ret, 11);
4fd24247 JC	366	return IIO_VAL_INT;
	367	default:
	368	return -EINVAL;
	369	}
c8a9f805	370	case IIO_CHAN_INFO_AVERAGE_RAW:
7bd49fe1	371	ret = i2c_smbus_read_word_swapped(chip->client,
975d98ce	372	AD7291_T_AVERAGE);
4fd24247 JC	373	if (ret < 0)
4fd24247 JC	374	return ret;
88198d2b	375	*val = sign_extend32(ret, 11);
4fd24247	376	return IIO_VAL_INT;
c8a9f805 JC	377	case IIO_CHAN_INFO_SCALE:
	378	switch (chan->type) {
	379	case IIO_VOLTAGE:
1df9d1d4 LPC	380	if (chip->reg) {
1df9d1d4 LPC	381	int vref;
3b1cae7c	382
1df9d1d4 LPC	383	vref = regulator_get_voltage(chip->reg);
	384	if (vref < 0)
	385	return vref;
	386	*val = vref / 1000;
	387	} else {
	388	*val = 2500;
	389	}
73a4445f LPC	390	*val2 = AD7291_BITS;
73a4445f LPC	391	return IIO_VAL_FRACTIONAL_LOG2;
c8a9f805 JC	392	case IIO_TEMP:
	393	/*
	394	* One LSB of the ADC corresponds to 0.25 deg C.
	395	* The temperature reading is in 12-bit twos
	396	* complement format
	397	*/
	398	*val = 250;
	399	return IIO_VAL_INT;
	400	default:
	401	return -EINVAL;
	402	}
4fd24247 JC	403	default:
	404	return -EINVAL;
	405	}
	406	}
ddaecd5b	407
b80a674b LPC	408	static const struct iio_event_spec ad7291_events[] = {
	409	{
	410	.type = IIO_EV_TYPE_THRESH,
	411	.dir = IIO_EV_DIR_RISING,
	412	.mask_separate = BIT(IIO_EV_INFO_VALUE) \|
	413	BIT(IIO_EV_INFO_ENABLE),
	414	}, {
	415	.type = IIO_EV_TYPE_THRESH,
	416	.dir = IIO_EV_DIR_FALLING,
	417	.mask_separate = BIT(IIO_EV_INFO_VALUE) \|
	418	BIT(IIO_EV_INFO_ENABLE),
ec87197f LPC	419	}, {
	420	.type = IIO_EV_TYPE_THRESH,
	421	.dir = IIO_EV_DIR_EITHER,
	422	.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
b80a674b LPC	423	},
	424	};
	425
4fd24247 JC	426	#define AD7291_VOLTAGE_CHAN(_chan) \
	427	{ \
	428	.type = IIO_VOLTAGE, \
0325948a JC	429	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0325948a JC	430	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
4fd24247 JC	431	.indexed = 1, \
4fd24247 JC	432	.channel = _chan, \
b80a674b LPC	433	.event_spec = ad7291_events, \
b80a674b LPC	434	.num_event_specs = ARRAY_SIZE(ad7291_events), \
4fd24247 JC	435	}
	436
	437	static const struct iio_chan_spec ad7291_channels[] = {
	438	AD7291_VOLTAGE_CHAN(0),
	439	AD7291_VOLTAGE_CHAN(1),
	440	AD7291_VOLTAGE_CHAN(2),
	441	AD7291_VOLTAGE_CHAN(3),
	442	AD7291_VOLTAGE_CHAN(4),
	443	AD7291_VOLTAGE_CHAN(5),
	444	AD7291_VOLTAGE_CHAN(6),
	445	AD7291_VOLTAGE_CHAN(7),
	446	{
	447	.type = IIO_TEMP,
0325948a JC	448	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \|
	449	BIT(IIO_CHAN_INFO_AVERAGE_RAW) \|
	450	BIT(IIO_CHAN_INFO_SCALE),
4fd24247 JC	451	.indexed = 1,
4fd24247 JC	452	.channel = 0,
b80a674b LPC	453	.event_spec = ad7291_events,
b80a674b LPC	454	.num_event_specs = ARRAY_SIZE(ad7291_events),
4fd24247	455	}
ddaecd5b SZ	456	};
ddaecd5b SZ	457
6fe8135f	458	static const struct iio_info ad7291_info = {
4fd24247	459	.read_raw = &ad7291_read_raw,
cb955852 LPC	460	.read_event_config = &ad7291_read_event_config,
	461	.write_event_config = &ad7291_write_event_config,
	462	.read_event_value = &ad7291_read_event_value,
	463	.write_event_value = &ad7291_write_event_value,
bb377961	464	.driver_module = THIS_MODULE,
6fe8135f JC	465	};
6fe8135f JC	466
4ae1c61f	467	static int ad7291_probe(struct i2c_client *client,
975d98ce	468	const struct i2c_device_id *id)
ddaecd5b	469	{
1df9d1d4	470	struct ad7291_platform_data *pdata = client->dev.platform_data;
ddaecd5b	471	struct ad7291_chip_info *chip;
d4397972	472	struct iio_dev *indio_dev;
b70e19c2	473	int ret;
ddaecd5b	474
3e70bad9 SK	475	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
	476	if (!indio_dev)
	477	return -ENOMEM;
03bda05d	478	chip = iio_priv(indio_dev);
3b424f33	479
1df9d1d4	480	if (pdata && pdata->use_external_ref) {
3e70bad9	481	chip->reg = devm_regulator_get(&client->dev, "vref");
1df9d1d4	482	if (IS_ERR(chip->reg))
b70e19c2	483	return PTR_ERR(chip->reg);
1df9d1d4	484
3b424f33 MH	485	ret = regulator_enable(chip->reg);
3b424f33 MH	486	if (ret)
3e70bad9	487	return ret;
3b424f33 MH	488	}
3b424f33 MH	489
4fd24247	490	mutex_init(&chip->state_lock);
ddaecd5b	491	/* this is only used for device removal purposes */
d4397972	492	i2c_set_clientdata(client, indio_dev);
ddaecd5b SZ	493
ddaecd5b SZ	494	chip->client = client;
c11f02ed MH	495
	496	chip->command = AD7291_NOISE_DELAY \|
	497	AD7291_T_SENSE_MASK \| /* Tsense always enabled */
	498	AD7291_ALERT_POLARITY; /* set irq polarity low level */
ddaecd5b	499
1df9d1d4	500	if (pdata && pdata->use_external_ref)
3b424f33	501	chip->command \|= AD7291_EXT_REF;
3b424f33	502
d4397972	503	indio_dev->name = id->name;
4fd24247 JC	504	indio_dev->channels = ad7291_channels;
	505	indio_dev->num_channels = ARRAY_SIZE(ad7291_channels);
	506
d4397972 JC	507	indio_dev->dev.parent = &client->dev;
	508	indio_dev->info = &ad7291_info;
	509	indio_dev->modes = INDIO_DIRECT_MODE;
ddaecd5b	510
c11f02ed MH	511	ret = ad7291_i2c_write(chip, AD7291_COMMAND, AD7291_RESET);
	512	if (ret) {
	513	ret = -EIO;
	514	goto error_disable_reg;
	515	}
	516
	517	ret = ad7291_i2c_write(chip, AD7291_COMMAND, chip->command);
	518	if (ret) {
	519	ret = -EIO;
	520	goto error_disable_reg;
	521	}
	522
ddaecd5b	523	if (client->irq > 0) {
58c0323c JC	524	ret = request_threaded_irq(client->irq,
	525	NULL,
	526	&ad7291_event_handler,
	527	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
845bd12a	528	id->name,
d4397972	529	indio_dev);
ddaecd5b	530	if (ret)
3b424f33	531	goto error_disable_reg;
ddaecd5b SZ	532	}
ddaecd5b SZ	533
26d25ae3 JC	534	ret = iio_device_register(indio_dev);
	535	if (ret)
	536	goto error_unreg_irq;
	537
ddaecd5b SZ	538	return 0;
	539
	540	error_unreg_irq:
4fd24247 JC	541	if (client->irq)
4fd24247 JC	542	free_irq(client->irq, indio_dev);
3b424f33	543	error_disable_reg:
1df9d1d4	544	if (chip->reg)
3b424f33	545	regulator_disable(chip->reg);
3e70bad9	546
ddaecd5b SZ	547	return ret;
	548	}
	549
447d4f29	550	static int ad7291_remove(struct i2c_client *client)
ddaecd5b	551	{
d4397972	552	struct iio_dev *indio_dev = i2c_get_clientdata(client);
3b424f33	553	struct ad7291_chip_info *chip = iio_priv(indio_dev);
ddaecd5b	554
d2fffd6c JC	555	iio_device_unregister(indio_dev);
d2fffd6c JC	556
ddaecd5b	557	if (client->irq)
d4397972	558	free_irq(client->irq, indio_dev);
3b424f33	559
3e70bad9	560	if (chip->reg)
3b424f33	561	regulator_disable(chip->reg);
ddaecd5b SZ	562
	563	return 0;
	564	}
	565
	566	static const struct i2c_device_id ad7291_id[] = {
	567	{ "ad7291", 0 },
	568	{}
	569	};
	570
	571	MODULE_DEVICE_TABLE(i2c, ad7291_id);
	572
	573	static struct i2c_driver ad7291_driver = {
	574	.driver = {
e68b1db1	575	.name = KBUILD_MODNAME,
ddaecd5b SZ	576	},
ddaecd5b SZ	577	.probe = ad7291_probe,
e543acf0	578	.remove = ad7291_remove,
ddaecd5b SZ	579	.id_table = ad7291_id,
ddaecd5b SZ	580	};
6e5af184	581	module_i2c_driver(ad7291_driver);
ddaecd5b SZ	582
ddaecd5b SZ	583	MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
e68b1db1	584	MODULE_DESCRIPTION("Analog Devices AD7291 ADC driver");
ddaecd5b	585	MODULE_LICENSE("GPL v2");