Commit | Line | Data |
---|---|---|
985dbe77 MH |
1 | /* |
2 | * iio/adc/ad799x.c | |
630097f7 | 3 | * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc. |
985dbe77 MH |
4 | * |
5 | * based on iio/adc/max1363 | |
6 | * Copyright (C) 2008-2010 Jonathan Cameron | |
7 | * | |
8 | * based on linux/drivers/i2c/chips/max123x | |
9 | * Copyright (C) 2002-2004 Stefan Eletzhofer | |
10 | * | |
11 | * based on linux/drivers/acron/char/pcf8583.c | |
12 | * Copyright (C) 2000 Russell King | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | * | |
18 | * ad799x.c | |
19 | * | |
20 | * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997, | |
21 | * ad7998 and similar chips. | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/interrupt.h> | |
985dbe77 MH |
26 | #include <linux/device.h> |
27 | #include <linux/kernel.h> | |
28 | #include <linux/sysfs.h> | |
985dbe77 MH |
29 | #include <linux/i2c.h> |
30 | #include <linux/regulator/consumer.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/err.h> | |
99c97852 | 34 | #include <linux/module.h> |
e1c6e2a2 | 35 | #include <linux/bitops.h> |
985dbe77 | 36 | |
06458e27 JC |
37 | #include <linux/iio/iio.h> |
38 | #include <linux/iio/sysfs.h> | |
39 | #include <linux/iio/events.h> | |
40 | #include <linux/iio/buffer.h> | |
396590b3 LPC |
41 | #include <linux/iio/trigger_consumer.h> |
42 | #include <linux/iio/triggered_buffer.h> | |
cdf38709 | 43 | |
396590b3 | 44 | #define AD799X_CHANNEL_SHIFT 4 |
e1c6e2a2 | 45 | |
396590b3 LPC |
46 | /* |
47 | * AD7991, AD7995 and AD7999 defines | |
48 | */ | |
49 | ||
50 | #define AD7991_REF_SEL 0x08 | |
51 | #define AD7991_FLTR 0x04 | |
52 | #define AD7991_BIT_TRIAL_DELAY 0x02 | |
53 | #define AD7991_SAMPLE_DELAY 0x01 | |
54 | ||
55 | /* | |
56 | * AD7992, AD7993, AD7994, AD7997 and AD7998 defines | |
57 | */ | |
58 | ||
e1c6e2a2 PM |
59 | #define AD7998_FLTR BIT(3) |
60 | #define AD7998_ALERT_EN BIT(2) | |
61 | #define AD7998_BUSY_ALERT BIT(1) | |
62 | #define AD7998_BUSY_ALERT_POL BIT(0) | |
396590b3 LPC |
63 | |
64 | #define AD7998_CONV_RES_REG 0x0 | |
65 | #define AD7998_ALERT_STAT_REG 0x1 | |
66 | #define AD7998_CONF_REG 0x2 | |
67 | #define AD7998_CYCLE_TMR_REG 0x3 | |
68 | ||
69 | #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4) | |
70 | #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5) | |
71 | #define AD7998_HYST_REG(x) ((x) * 3 + 0x6) | |
72 | ||
e1c6e2a2 | 73 | #define AD7998_CYC_MASK GENMASK(2, 0) |
396590b3 LPC |
74 | #define AD7998_CYC_DIS 0x0 |
75 | #define AD7998_CYC_TCONF_32 0x1 | |
76 | #define AD7998_CYC_TCONF_64 0x2 | |
77 | #define AD7998_CYC_TCONF_128 0x3 | |
78 | #define AD7998_CYC_TCONF_256 0x4 | |
79 | #define AD7998_CYC_TCONF_512 0x5 | |
80 | #define AD7998_CYC_TCONF_1024 0x6 | |
81 | #define AD7998_CYC_TCONF_2048 0x7 | |
82 | ||
83 | #define AD7998_ALERT_STAT_CLEAR 0xFF | |
84 | ||
85 | /* | |
86 | * AD7997 and AD7997 defines | |
87 | */ | |
88 | ||
e1c6e2a2 PM |
89 | #define AD7997_8_READ_SINGLE BIT(7) |
90 | #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4)) | |
396590b3 LPC |
91 | |
92 | enum { | |
93 | ad7991, | |
94 | ad7995, | |
95 | ad7999, | |
96 | ad7992, | |
97 | ad7993, | |
98 | ad7994, | |
99 | ad7997, | |
100 | ad7998 | |
101 | }; | |
102 | ||
103 | /** | |
91556c69 | 104 | * struct ad799x_chip_config - chip specific information |
396590b3 | 105 | * @channel: channel specification |
396590b3 | 106 | * @default_config: device default configuration |
a3eeb159 | 107 | * @info: pointer to iio_info struct |
396590b3 | 108 | */ |
91556c69 | 109 | struct ad799x_chip_config { |
ef0bf6f8 | 110 | const struct iio_chan_spec channel[9]; |
396590b3 LPC |
111 | u16 default_config; |
112 | const struct iio_info *info; | |
113 | }; | |
114 | ||
91556c69 PM |
115 | /** |
116 | * struct ad799x_chip_info - chip specific information | |
117 | * @num_channels: number of channels | |
118 | * @noirq_config: device configuration w/o IRQ | |
119 | * @irq_config: device configuration w/IRQ | |
120 | */ | |
121 | struct ad799x_chip_info { | |
122 | int num_channels; | |
123 | const struct ad799x_chip_config noirq_config; | |
124 | const struct ad799x_chip_config irq_config; | |
125 | }; | |
126 | ||
396590b3 LPC |
127 | struct ad799x_state { |
128 | struct i2c_client *client; | |
91556c69 | 129 | const struct ad799x_chip_config *chip_config; |
396590b3 LPC |
130 | struct regulator *reg; |
131 | struct regulator *vref; | |
132 | unsigned id; | |
133 | u16 config; | |
134 | ||
135 | u8 *rx_buf; | |
136 | unsigned int transfer_size; | |
137 | }; | |
138 | ||
89ca79af PM |
139 | static int ad799x_write_config(struct ad799x_state *st, u16 val) |
140 | { | |
141 | switch (st->id) { | |
142 | case ad7997: | |
143 | case ad7998: | |
144 | return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG, | |
145 | val); | |
2eacc608 LPC |
146 | case ad7992: |
147 | case ad7993: | |
148 | case ad7994: | |
89ca79af PM |
149 | return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG, |
150 | val); | |
2eacc608 LPC |
151 | default: |
152 | /* Will be written when doing a conversion */ | |
153 | st->config = val; | |
154 | return 0; | |
89ca79af PM |
155 | } |
156 | } | |
157 | ||
158 | static int ad799x_read_config(struct ad799x_state *st) | |
159 | { | |
160 | switch (st->id) { | |
161 | case ad7997: | |
162 | case ad7998: | |
163 | return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG); | |
2eacc608 LPC |
164 | case ad7992: |
165 | case ad7993: | |
166 | case ad7994: | |
89ca79af | 167 | return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG); |
2eacc608 LPC |
168 | default: |
169 | /* No readback support */ | |
170 | return st->config; | |
89ca79af PM |
171 | } |
172 | } | |
173 | ||
396590b3 LPC |
174 | /** |
175 | * ad799x_trigger_handler() bh of trigger launched polling to ring buffer | |
176 | * | |
177 | * Currently there is no option in this driver to disable the saving of | |
178 | * timestamps within the ring. | |
179 | **/ | |
180 | static irqreturn_t ad799x_trigger_handler(int irq, void *p) | |
181 | { | |
182 | struct iio_poll_func *pf = p; | |
183 | struct iio_dev *indio_dev = pf->indio_dev; | |
184 | struct ad799x_state *st = iio_priv(indio_dev); | |
185 | int b_sent; | |
186 | u8 cmd; | |
187 | ||
188 | switch (st->id) { | |
189 | case ad7991: | |
190 | case ad7995: | |
191 | case ad7999: | |
192 | cmd = st->config | | |
193 | (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT); | |
194 | break; | |
195 | case ad7992: | |
196 | case ad7993: | |
197 | case ad7994: | |
198 | cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) | | |
199 | AD7998_CONV_RES_REG; | |
200 | break; | |
201 | case ad7997: | |
202 | case ad7998: | |
203 | cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG; | |
204 | break; | |
205 | default: | |
206 | cmd = 0; | |
207 | } | |
208 | ||
209 | b_sent = i2c_smbus_read_i2c_block_data(st->client, | |
210 | cmd, st->transfer_size, st->rx_buf); | |
211 | if (b_sent < 0) | |
212 | goto out; | |
213 | ||
214 | iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, | |
215 | iio_get_time_ns()); | |
216 | out: | |
217 | iio_trigger_notify_done(indio_dev->trig); | |
218 | ||
219 | return IRQ_HANDLED; | |
220 | } | |
985dbe77 | 221 | |
8235841b | 222 | static int ad799x_update_scan_mode(struct iio_dev *indio_dev, |
ae3805c3 | 223 | const unsigned long *scan_mask) |
985dbe77 | 224 | { |
ae3805c3 LPC |
225 | struct ad799x_state *st = iio_priv(indio_dev); |
226 | ||
d8dca330 LPC |
227 | kfree(st->rx_buf); |
228 | st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); | |
229 | if (!st->rx_buf) | |
230 | return -ENOMEM; | |
231 | ||
232 | st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2; | |
233 | ||
ae3805c3 | 234 | switch (st->id) { |
8235841b PM |
235 | case ad7992: |
236 | case ad7993: | |
237 | case ad7994: | |
ae3805c3 LPC |
238 | case ad7997: |
239 | case ad7998: | |
8235841b PM |
240 | st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT); |
241 | st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT); | |
242 | return ad799x_write_config(st, st->config); | |
ae3805c3 | 243 | default: |
bd3bd432 | 244 | return 0; |
ae3805c3 | 245 | } |
985dbe77 MH |
246 | } |
247 | ||
d22fd9c5 | 248 | static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch) |
985dbe77 | 249 | { |
d22fd9c5 | 250 | u8 cmd; |
985dbe77 | 251 | |
d22fd9c5 MH |
252 | switch (st->id) { |
253 | case ad7991: | |
254 | case ad7995: | |
255 | case ad7999: | |
e1c6e2a2 | 256 | cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT); |
d22fd9c5 MH |
257 | break; |
258 | case ad7992: | |
259 | case ad7993: | |
260 | case ad7994: | |
e1c6e2a2 | 261 | cmd = BIT(ch) << AD799X_CHANNEL_SHIFT; |
d22fd9c5 MH |
262 | break; |
263 | case ad7997: | |
264 | case ad7998: | |
265 | cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE; | |
266 | break; | |
267 | default: | |
268 | return -EINVAL; | |
985dbe77 MH |
269 | } |
270 | ||
54154471 | 271 | return i2c_smbus_read_word_swapped(st->client, cmd); |
985dbe77 MH |
272 | } |
273 | ||
84f79ecb | 274 | static int ad799x_read_raw(struct iio_dev *indio_dev, |
d22fd9c5 MH |
275 | struct iio_chan_spec const *chan, |
276 | int *val, | |
277 | int *val2, | |
278 | long m) | |
985dbe77 | 279 | { |
d22fd9c5 | 280 | int ret; |
84f79ecb | 281 | struct ad799x_state *st = iio_priv(indio_dev); |
d22fd9c5 MH |
282 | |
283 | switch (m) { | |
b11f98ff | 284 | case IIO_CHAN_INFO_RAW: |
84f79ecb JC |
285 | mutex_lock(&indio_dev->mlock); |
286 | if (iio_buffer_enabled(indio_dev)) | |
729bbf54 | 287 | ret = -EBUSY; |
d22fd9c5 | 288 | else |
58dffaed | 289 | ret = ad799x_scan_direct(st, chan->scan_index); |
84f79ecb | 290 | mutex_unlock(&indio_dev->mlock); |
985dbe77 | 291 | |
985dbe77 | 292 | if (ret < 0) |
d22fd9c5 | 293 | return ret; |
5357ba3d | 294 | *val = (ret >> chan->scan_type.shift) & |
e1c6e2a2 | 295 | GENMASK(chan->scan_type.realbits - 1, 0); |
d22fd9c5 | 296 | return IIO_VAL_INT; |
c8a9f805 | 297 | case IIO_CHAN_INFO_SCALE: |
2deaf23b HK |
298 | ret = regulator_get_voltage(st->vref); |
299 | if (ret < 0) | |
300 | return ret; | |
301 | *val = ret / 1000; | |
b740f48a LPC |
302 | *val2 = chan->scan_type.realbits; |
303 | return IIO_VAL_FRACTIONAL_LOG2; | |
985dbe77 | 304 | } |
d22fd9c5 | 305 | return -EINVAL; |
985dbe77 | 306 | } |
24cba406 JC |
307 | static const unsigned int ad7998_frequencies[] = { |
308 | [AD7998_CYC_DIS] = 0, | |
309 | [AD7998_CYC_TCONF_32] = 15625, | |
310 | [AD7998_CYC_TCONF_64] = 7812, | |
311 | [AD7998_CYC_TCONF_128] = 3906, | |
312 | [AD7998_CYC_TCONF_512] = 976, | |
313 | [AD7998_CYC_TCONF_1024] = 488, | |
314 | [AD7998_CYC_TCONF_2048] = 244, | |
315 | }; | |
54154471 | 316 | |
985dbe77 MH |
317 | static ssize_t ad799x_read_frequency(struct device *dev, |
318 | struct device_attribute *attr, | |
319 | char *buf) | |
320 | { | |
62c51839 | 321 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 322 | struct ad799x_state *st = iio_priv(indio_dev); |
985dbe77 | 323 | |
54154471 PM |
324 | int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); |
325 | if (ret < 0) | |
985dbe77 MH |
326 | return ret; |
327 | ||
54154471 | 328 | return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]); |
985dbe77 MH |
329 | } |
330 | ||
331 | static ssize_t ad799x_write_frequency(struct device *dev, | |
332 | struct device_attribute *attr, | |
333 | const char *buf, | |
334 | size_t len) | |
335 | { | |
62c51839 | 336 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 337 | struct ad799x_state *st = iio_priv(indio_dev); |
985dbe77 MH |
338 | |
339 | long val; | |
24cba406 | 340 | int ret, i; |
985dbe77 | 341 | |
f86f8362 | 342 | ret = kstrtol(buf, 10, &val); |
985dbe77 MH |
343 | if (ret) |
344 | return ret; | |
345 | ||
84f79ecb | 346 | mutex_lock(&indio_dev->mlock); |
54154471 PM |
347 | ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); |
348 | if (ret < 0) | |
985dbe77 MH |
349 | goto error_ret_mutex; |
350 | /* Wipe the bits clean */ | |
54154471 | 351 | ret &= ~AD7998_CYC_MASK; |
985dbe77 | 352 | |
24cba406 JC |
353 | for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++) |
354 | if (val == ad7998_frequencies[i]) | |
355 | break; | |
356 | if (i == ARRAY_SIZE(ad7998_frequencies)) { | |
985dbe77 MH |
357 | ret = -EINVAL; |
358 | goto error_ret_mutex; | |
359 | } | |
54154471 PM |
360 | |
361 | ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG, | |
362 | ret | i); | |
363 | if (ret < 0) | |
364 | goto error_ret_mutex; | |
365 | ret = len; | |
985dbe77 MH |
366 | |
367 | error_ret_mutex: | |
84f79ecb | 368 | mutex_unlock(&indio_dev->mlock); |
985dbe77 | 369 | |
54154471 | 370 | return ret; |
985dbe77 MH |
371 | } |
372 | ||
84f79ecb | 373 | static int ad799x_read_event_config(struct iio_dev *indio_dev, |
5b9e048a LPC |
374 | const struct iio_chan_spec *chan, |
375 | enum iio_event_type type, | |
376 | enum iio_event_direction dir) | |
231c5c3b | 377 | { |
1d15330a PM |
378 | struct ad799x_state *st = iio_priv(indio_dev); |
379 | ||
380 | if (!(st->config & AD7998_ALERT_EN)) | |
381 | return 0; | |
382 | ||
383 | if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index)) | |
384 | return 1; | |
385 | ||
386 | return 0; | |
231c5c3b JC |
387 | } |
388 | ||
3008d082 PM |
389 | static int ad799x_write_event_config(struct iio_dev *indio_dev, |
390 | const struct iio_chan_spec *chan, | |
391 | enum iio_event_type type, | |
392 | enum iio_event_direction dir, | |
393 | int state) | |
394 | { | |
395 | struct ad799x_state *st = iio_priv(indio_dev); | |
396 | int ret; | |
397 | ||
398 | mutex_lock(&indio_dev->mlock); | |
399 | if (iio_buffer_enabled(indio_dev)) { | |
400 | ret = -EBUSY; | |
401 | goto done; | |
402 | } | |
403 | ||
404 | if (state) | |
405 | st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT; | |
406 | else | |
407 | st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT); | |
408 | ||
409 | if (st->config >> AD799X_CHANNEL_SHIFT) | |
410 | st->config |= AD7998_ALERT_EN; | |
411 | else | |
412 | st->config &= ~AD7998_ALERT_EN; | |
413 | ||
414 | ret = ad799x_write_config(st, st->config); | |
415 | ||
416 | done: | |
417 | mutex_unlock(&indio_dev->mlock); | |
418 | ||
419 | return ret; | |
420 | } | |
421 | ||
ba1d7961 LPC |
422 | static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan, |
423 | enum iio_event_direction dir, | |
424 | enum iio_event_info info) | |
69582b88 | 425 | { |
ba1d7961 LPC |
426 | switch (info) { |
427 | case IIO_EV_INFO_VALUE: | |
428 | if (dir == IIO_EV_DIR_FALLING) | |
429 | return AD7998_DATALOW_REG(chan->channel); | |
430 | else | |
431 | return AD7998_DATAHIGH_REG(chan->channel); | |
432 | case IIO_EV_INFO_HYSTERESIS: | |
433 | return AD7998_HYST_REG(chan->channel); | |
434 | default: | |
435 | return -EINVAL; | |
436 | } | |
437 | ||
438 | return 0; | |
69582b88 | 439 | } |
231c5c3b JC |
440 | |
441 | static int ad799x_write_event_value(struct iio_dev *indio_dev, | |
5b9e048a LPC |
442 | const struct iio_chan_spec *chan, |
443 | enum iio_event_type type, | |
444 | enum iio_event_direction dir, | |
445 | enum iio_event_info info, | |
446 | int val, int val2) | |
231c5c3b JC |
447 | { |
448 | int ret; | |
449 | struct ad799x_state *st = iio_priv(indio_dev); | |
231c5c3b | 450 | |
e1c6e2a2 | 451 | if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0)) |
361d7950 PM |
452 | return -EINVAL; |
453 | ||
231c5c3b | 454 | mutex_lock(&indio_dev->mlock); |
54154471 PM |
455 | ret = i2c_smbus_write_word_swapped(st->client, |
456 | ad799x_threshold_reg(chan, dir, info), | |
361d7950 | 457 | val << chan->scan_type.shift); |
231c5c3b JC |
458 | mutex_unlock(&indio_dev->mlock); |
459 | ||
460 | return ret; | |
461 | } | |
462 | ||
463 | static int ad799x_read_event_value(struct iio_dev *indio_dev, | |
5b9e048a LPC |
464 | const struct iio_chan_spec *chan, |
465 | enum iio_event_type type, | |
466 | enum iio_event_direction dir, | |
467 | enum iio_event_info info, | |
468 | int *val, int *val2) | |
231c5c3b JC |
469 | { |
470 | int ret; | |
471 | struct ad799x_state *st = iio_priv(indio_dev); | |
231c5c3b JC |
472 | |
473 | mutex_lock(&indio_dev->mlock); | |
54154471 PM |
474 | ret = i2c_smbus_read_word_swapped(st->client, |
475 | ad799x_threshold_reg(chan, dir, info)); | |
231c5c3b JC |
476 | mutex_unlock(&indio_dev->mlock); |
477 | if (ret < 0) | |
478 | return ret; | |
54154471 | 479 | *val = (ret >> chan->scan_type.shift) & |
102447ad | 480 | GENMASK(chan->scan_type.realbits - 1, 0); |
231c5c3b | 481 | |
5b9e048a | 482 | return IIO_VAL_INT; |
231c5c3b JC |
483 | } |
484 | ||
72148f6e | 485 | static irqreturn_t ad799x_event_handler(int irq, void *private) |
985dbe77 | 486 | { |
72148f6e | 487 | struct iio_dev *indio_dev = private; |
d8aea29b | 488 | struct ad799x_state *st = iio_priv(private); |
72148f6e | 489 | int i, ret; |
985dbe77 | 490 | |
54154471 PM |
491 | ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG); |
492 | if (ret <= 0) | |
f654a7e2 | 493 | goto done; |
985dbe77 | 494 | |
54154471 PM |
495 | if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG, |
496 | AD7998_ALERT_STAT_CLEAR) < 0) | |
f654a7e2 | 497 | goto done; |
985dbe77 | 498 | |
985dbe77 | 499 | for (i = 0; i < 8; i++) { |
e1c6e2a2 | 500 | if (ret & BIT(i)) |
5aa96188 | 501 | iio_push_event(indio_dev, |
72148f6e | 502 | i & 0x1 ? |
6835cb6b | 503 | IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, |
cdf38709 JC |
504 | (i >> 1), |
505 | IIO_EV_TYPE_THRESH, | |
506 | IIO_EV_DIR_RISING) : | |
6835cb6b | 507 | IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, |
cdf38709 JC |
508 | (i >> 1), |
509 | IIO_EV_TYPE_THRESH, | |
510 | IIO_EV_DIR_FALLING), | |
72148f6e | 511 | iio_get_time_ns()); |
985dbe77 MH |
512 | } |
513 | ||
f654a7e2 | 514 | done: |
72148f6e | 515 | return IRQ_HANDLED; |
985dbe77 MH |
516 | } |
517 | ||
985dbe77 MH |
518 | static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, |
519 | ad799x_read_frequency, | |
520 | ad799x_write_frequency); | |
521 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0"); | |
522 | ||
ba1d7961 | 523 | static struct attribute *ad799x_event_attributes[] = { |
985dbe77 MH |
524 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
525 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
526 | NULL, | |
527 | }; | |
528 | ||
ba1d7961 LPC |
529 | static struct attribute_group ad799x_event_attrs_group = { |
530 | .attrs = ad799x_event_attributes, | |
985dbe77 MH |
531 | }; |
532 | ||
6fe8135f JC |
533 | static const struct iio_info ad7991_info = { |
534 | .read_raw = &ad799x_read_raw, | |
535 | .driver_module = THIS_MODULE, | |
536 | }; | |
537 | ||
91556c69 PM |
538 | static const struct iio_info ad7993_4_7_8_noirq_info = { |
539 | .read_raw = &ad799x_read_raw, | |
540 | .driver_module = THIS_MODULE, | |
8235841b | 541 | .update_scan_mode = ad799x_update_scan_mode, |
91556c69 PM |
542 | }; |
543 | ||
544 | static const struct iio_info ad7993_4_7_8_irq_info = { | |
6fe8135f | 545 | .read_raw = &ad799x_read_raw, |
ba1d7961 | 546 | .event_attrs = &ad799x_event_attrs_group, |
cb955852 | 547 | .read_event_config = &ad799x_read_event_config, |
3008d082 | 548 | .write_event_config = &ad799x_write_event_config, |
cb955852 LPC |
549 | .read_event_value = &ad799x_read_event_value, |
550 | .write_event_value = &ad799x_write_event_value, | |
6fe8135f | 551 | .driver_module = THIS_MODULE, |
8235841b | 552 | .update_scan_mode = ad799x_update_scan_mode, |
6fe8135f JC |
553 | }; |
554 | ||
5b9e048a LPC |
555 | static const struct iio_event_spec ad799x_events[] = { |
556 | { | |
557 | .type = IIO_EV_TYPE_THRESH, | |
558 | .dir = IIO_EV_DIR_RISING, | |
559 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
560 | BIT(IIO_EV_INFO_ENABLE), | |
561 | }, { | |
562 | .type = IIO_EV_TYPE_THRESH, | |
563 | .dir = IIO_EV_DIR_FALLING, | |
d180371d | 564 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | |
5b9e048a | 565 | BIT(IIO_EV_INFO_ENABLE), |
ba1d7961 LPC |
566 | }, { |
567 | .type = IIO_EV_TYPE_THRESH, | |
568 | .dir = IIO_EV_DIR_EITHER, | |
569 | .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS), | |
5b9e048a LPC |
570 | }, |
571 | }; | |
231c5c3b | 572 | |
5b9e048a | 573 | #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \ |
ae6d6489 LPC |
574 | .type = IIO_VOLTAGE, \ |
575 | .indexed = 1, \ | |
576 | .channel = (_index), \ | |
577 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
d00698df | 578 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
ae6d6489 | 579 | .scan_index = (_index), \ |
83d5f324 JC |
580 | .scan_type = { \ |
581 | .sign = 'u', \ | |
582 | .realbits = (_realbits), \ | |
583 | .storagebits = 16, \ | |
584 | .shift = 12 - (_realbits), \ | |
585 | .endianness = IIO_BE, \ | |
586 | }, \ | |
5b9e048a LPC |
587 | .event_spec = _ev_spec, \ |
588 | .num_event_specs = _num_ev_spec, \ | |
ae6d6489 LPC |
589 | } |
590 | ||
5b9e048a LPC |
591 | #define AD799X_CHANNEL(_index, _realbits) \ |
592 | _AD799X_CHANNEL(_index, _realbits, NULL, 0) | |
593 | ||
594 | #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \ | |
595 | _AD799X_CHANNEL(_index, _realbits, ad799x_events, \ | |
596 | ARRAY_SIZE(ad799x_events)) | |
597 | ||
985dbe77 MH |
598 | static const struct ad799x_chip_info ad799x_chip_info_tbl[] = { |
599 | [ad7991] = { | |
d22fd9c5 | 600 | .num_channels = 5, |
91556c69 PM |
601 | .noirq_config = { |
602 | .channel = { | |
603 | AD799X_CHANNEL(0, 12), | |
604 | AD799X_CHANNEL(1, 12), | |
605 | AD799X_CHANNEL(2, 12), | |
606 | AD799X_CHANNEL(3, 12), | |
607 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
608 | }, | |
609 | .info = &ad7991_info, | |
610 | }, | |
985dbe77 MH |
611 | }, |
612 | [ad7995] = { | |
d22fd9c5 | 613 | .num_channels = 5, |
91556c69 PM |
614 | .noirq_config = { |
615 | .channel = { | |
616 | AD799X_CHANNEL(0, 10), | |
617 | AD799X_CHANNEL(1, 10), | |
618 | AD799X_CHANNEL(2, 10), | |
619 | AD799X_CHANNEL(3, 10), | |
620 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
621 | }, | |
622 | .info = &ad7991_info, | |
623 | }, | |
985dbe77 MH |
624 | }, |
625 | [ad7999] = { | |
d22fd9c5 | 626 | .num_channels = 5, |
91556c69 PM |
627 | .noirq_config = { |
628 | .channel = { | |
629 | AD799X_CHANNEL(0, 8), | |
630 | AD799X_CHANNEL(1, 8), | |
631 | AD799X_CHANNEL(2, 8), | |
632 | AD799X_CHANNEL(3, 8), | |
633 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
634 | }, | |
635 | .info = &ad7991_info, | |
636 | }, | |
985dbe77 MH |
637 | }, |
638 | [ad7992] = { | |
d22fd9c5 | 639 | .num_channels = 3, |
91556c69 PM |
640 | .noirq_config = { |
641 | .channel = { | |
642 | AD799X_CHANNEL(0, 12), | |
643 | AD799X_CHANNEL(1, 12), | |
644 | IIO_CHAN_SOFT_TIMESTAMP(3), | |
645 | }, | |
646 | .info = &ad7993_4_7_8_noirq_info, | |
647 | }, | |
648 | .irq_config = { | |
649 | .channel = { | |
650 | AD799X_CHANNEL_WITH_EVENTS(0, 12), | |
651 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
652 | IIO_CHAN_SOFT_TIMESTAMP(3), | |
653 | }, | |
0f7ddcc1 | 654 | .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, |
91556c69 PM |
655 | .info = &ad7993_4_7_8_irq_info, |
656 | }, | |
985dbe77 MH |
657 | }, |
658 | [ad7993] = { | |
d22fd9c5 | 659 | .num_channels = 5, |
91556c69 PM |
660 | .noirq_config = { |
661 | .channel = { | |
662 | AD799X_CHANNEL(0, 10), | |
663 | AD799X_CHANNEL(1, 10), | |
664 | AD799X_CHANNEL(2, 10), | |
665 | AD799X_CHANNEL(3, 10), | |
666 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
667 | }, | |
668 | .info = &ad7993_4_7_8_noirq_info, | |
669 | }, | |
670 | .irq_config = { | |
671 | .channel = { | |
672 | AD799X_CHANNEL_WITH_EVENTS(0, 10), | |
673 | AD799X_CHANNEL_WITH_EVENTS(1, 10), | |
674 | AD799X_CHANNEL_WITH_EVENTS(2, 10), | |
675 | AD799X_CHANNEL_WITH_EVENTS(3, 10), | |
676 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
677 | }, | |
0f7ddcc1 | 678 | .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, |
91556c69 PM |
679 | .info = &ad7993_4_7_8_irq_info, |
680 | }, | |
985dbe77 MH |
681 | }, |
682 | [ad7994] = { | |
d22fd9c5 | 683 | .num_channels = 5, |
91556c69 PM |
684 | .noirq_config = { |
685 | .channel = { | |
686 | AD799X_CHANNEL(0, 12), | |
687 | AD799X_CHANNEL(1, 12), | |
688 | AD799X_CHANNEL(2, 12), | |
689 | AD799X_CHANNEL(3, 12), | |
690 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
691 | }, | |
692 | .info = &ad7993_4_7_8_noirq_info, | |
693 | }, | |
694 | .irq_config = { | |
695 | .channel = { | |
696 | AD799X_CHANNEL_WITH_EVENTS(0, 12), | |
697 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
698 | AD799X_CHANNEL_WITH_EVENTS(2, 12), | |
699 | AD799X_CHANNEL_WITH_EVENTS(3, 12), | |
700 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
701 | }, | |
0f7ddcc1 | 702 | .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, |
91556c69 PM |
703 | .info = &ad7993_4_7_8_irq_info, |
704 | }, | |
985dbe77 MH |
705 | }, |
706 | [ad7997] = { | |
d22fd9c5 | 707 | .num_channels = 9, |
91556c69 PM |
708 | .noirq_config = { |
709 | .channel = { | |
710 | AD799X_CHANNEL(0, 10), | |
711 | AD799X_CHANNEL(1, 10), | |
712 | AD799X_CHANNEL(2, 10), | |
713 | AD799X_CHANNEL(3, 10), | |
714 | AD799X_CHANNEL(4, 10), | |
715 | AD799X_CHANNEL(5, 10), | |
716 | AD799X_CHANNEL(6, 10), | |
717 | AD799X_CHANNEL(7, 10), | |
718 | IIO_CHAN_SOFT_TIMESTAMP(8), | |
719 | }, | |
720 | .info = &ad7993_4_7_8_noirq_info, | |
721 | }, | |
722 | .irq_config = { | |
723 | .channel = { | |
724 | AD799X_CHANNEL_WITH_EVENTS(0, 10), | |
725 | AD799X_CHANNEL_WITH_EVENTS(1, 10), | |
726 | AD799X_CHANNEL_WITH_EVENTS(2, 10), | |
727 | AD799X_CHANNEL_WITH_EVENTS(3, 10), | |
728 | AD799X_CHANNEL(4, 10), | |
729 | AD799X_CHANNEL(5, 10), | |
730 | AD799X_CHANNEL(6, 10), | |
731 | AD799X_CHANNEL(7, 10), | |
732 | IIO_CHAN_SOFT_TIMESTAMP(8), | |
733 | }, | |
0f7ddcc1 | 734 | .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, |
91556c69 PM |
735 | .info = &ad7993_4_7_8_irq_info, |
736 | }, | |
985dbe77 MH |
737 | }, |
738 | [ad7998] = { | |
d22fd9c5 | 739 | .num_channels = 9, |
91556c69 PM |
740 | .noirq_config = { |
741 | .channel = { | |
742 | AD799X_CHANNEL(0, 12), | |
743 | AD799X_CHANNEL(1, 12), | |
744 | AD799X_CHANNEL(2, 12), | |
745 | AD799X_CHANNEL(3, 12), | |
746 | AD799X_CHANNEL(4, 12), | |
747 | AD799X_CHANNEL(5, 12), | |
748 | AD799X_CHANNEL(6, 12), | |
749 | AD799X_CHANNEL(7, 12), | |
750 | IIO_CHAN_SOFT_TIMESTAMP(8), | |
751 | }, | |
752 | .info = &ad7993_4_7_8_noirq_info, | |
753 | }, | |
754 | .irq_config = { | |
755 | .channel = { | |
756 | AD799X_CHANNEL_WITH_EVENTS(0, 12), | |
757 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
758 | AD799X_CHANNEL_WITH_EVENTS(2, 12), | |
759 | AD799X_CHANNEL_WITH_EVENTS(3, 12), | |
760 | AD799X_CHANNEL(4, 12), | |
761 | AD799X_CHANNEL(5, 12), | |
762 | AD799X_CHANNEL(6, 12), | |
763 | AD799X_CHANNEL(7, 12), | |
764 | IIO_CHAN_SOFT_TIMESTAMP(8), | |
765 | }, | |
0f7ddcc1 | 766 | .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, |
91556c69 PM |
767 | .info = &ad7993_4_7_8_irq_info, |
768 | }, | |
985dbe77 MH |
769 | }, |
770 | }; | |
771 | ||
4ae1c61f | 772 | static int ad799x_probe(struct i2c_client *client, |
985dbe77 MH |
773 | const struct i2c_device_id *id) |
774 | { | |
26d25ae3 | 775 | int ret; |
1bf7ac76 | 776 | struct ad799x_state *st; |
6a88fa48 | 777 | struct iio_dev *indio_dev; |
91556c69 PM |
778 | const struct ad799x_chip_info *chip_info = |
779 | &ad799x_chip_info_tbl[id->driver_data]; | |
1bf7ac76 | 780 | |
6a88fa48 | 781 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); |
1bf7ac76 MH |
782 | if (indio_dev == NULL) |
783 | return -ENOMEM; | |
985dbe77 | 784 | |
1bf7ac76 | 785 | st = iio_priv(indio_dev); |
985dbe77 | 786 | /* this is only used for device removal purposes */ |
1bf7ac76 | 787 | i2c_set_clientdata(client, indio_dev); |
985dbe77 | 788 | |
985dbe77 | 789 | st->id = id->driver_data; |
91556c69 PM |
790 | if (client->irq > 0 && chip_info->irq_config.info) |
791 | st->chip_config = &chip_info->irq_config; | |
792 | else | |
793 | st->chip_config = &chip_info->noirq_config; | |
985dbe77 MH |
794 | |
795 | /* TODO: Add pdata options for filtering and bit delay */ | |
796 | ||
6a88fa48 | 797 | st->reg = devm_regulator_get(&client->dev, "vcc"); |
2deaf23b HK |
798 | if (IS_ERR(st->reg)) |
799 | return PTR_ERR(st->reg); | |
800 | ret = regulator_enable(st->reg); | |
801 | if (ret) | |
802 | return ret; | |
803 | st->vref = devm_regulator_get(&client->dev, "vref"); | |
804 | if (IS_ERR(st->vref)) { | |
805 | ret = PTR_ERR(st->vref); | |
806 | goto error_disable_reg; | |
985dbe77 | 807 | } |
2deaf23b HK |
808 | ret = regulator_enable(st->vref); |
809 | if (ret) | |
810 | goto error_disable_reg; | |
811 | ||
985dbe77 MH |
812 | st->client = client; |
813 | ||
1bf7ac76 MH |
814 | indio_dev->dev.parent = &client->dev; |
815 | indio_dev->name = id->name; | |
91556c69 | 816 | indio_dev->info = st->chip_config->info; |
6fe8135f | 817 | |
1bf7ac76 | 818 | indio_dev->modes = INDIO_DIRECT_MODE; |
91556c69 PM |
819 | indio_dev->channels = st->chip_config->channel; |
820 | indio_dev->num_channels = chip_info->num_channels; | |
1bf7ac76 | 821 | |
0f7ddcc1 PM |
822 | ret = ad799x_write_config(st, st->chip_config->default_config); |
823 | if (ret < 0) | |
824 | goto error_disable_reg; | |
825 | ret = ad799x_read_config(st); | |
826 | if (ret < 0) | |
827 | goto error_disable_reg; | |
828 | st->config = ret; | |
829 | ||
396590b3 LPC |
830 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
831 | &ad799x_trigger_handler, NULL); | |
985dbe77 | 832 | if (ret) |
82a5803c | 833 | goto error_disable_vref; |
985dbe77 | 834 | |
6fe8135f | 835 | if (client->irq > 0) { |
cc7c0f7e HK |
836 | ret = devm_request_threaded_irq(&client->dev, |
837 | client->irq, | |
838 | NULL, | |
839 | ad799x_event_handler, | |
840 | IRQF_TRIGGER_FALLING | | |
841 | IRQF_ONESHOT, | |
842 | client->name, | |
843 | indio_dev); | |
985dbe77 MH |
844 | if (ret) |
845 | goto error_cleanup_ring; | |
985dbe77 | 846 | } |
26d25ae3 JC |
847 | ret = iio_device_register(indio_dev); |
848 | if (ret) | |
cc7c0f7e | 849 | goto error_cleanup_ring; |
985dbe77 MH |
850 | |
851 | return 0; | |
1bf7ac76 | 852 | |
985dbe77 | 853 | error_cleanup_ring: |
396590b3 | 854 | iio_triggered_buffer_cleanup(indio_dev); |
82a5803c DC |
855 | error_disable_vref: |
856 | regulator_disable(st->vref); | |
985dbe77 | 857 | error_disable_reg: |
82a5803c | 858 | regulator_disable(st->reg); |
1bf7ac76 | 859 | |
985dbe77 MH |
860 | return ret; |
861 | } | |
862 | ||
447d4f29 | 863 | static int ad799x_remove(struct i2c_client *client) |
985dbe77 | 864 | { |
1bf7ac76 MH |
865 | struct iio_dev *indio_dev = i2c_get_clientdata(client); |
866 | struct ad799x_state *st = iio_priv(indio_dev); | |
985dbe77 | 867 | |
d2fffd6c | 868 | iio_device_unregister(indio_dev); |
985dbe77 | 869 | |
396590b3 | 870 | iio_triggered_buffer_cleanup(indio_dev); |
82a5803c DC |
871 | regulator_disable(st->vref); |
872 | regulator_disable(st->reg); | |
d8dca330 | 873 | kfree(st->rx_buf); |
985dbe77 MH |
874 | |
875 | return 0; | |
876 | } | |
877 | ||
878 | static const struct i2c_device_id ad799x_id[] = { | |
879 | { "ad7991", ad7991 }, | |
880 | { "ad7995", ad7995 }, | |
881 | { "ad7999", ad7999 }, | |
882 | { "ad7992", ad7992 }, | |
883 | { "ad7993", ad7993 }, | |
884 | { "ad7994", ad7994 }, | |
885 | { "ad7997", ad7997 }, | |
886 | { "ad7998", ad7998 }, | |
887 | {} | |
888 | }; | |
889 | ||
890 | MODULE_DEVICE_TABLE(i2c, ad799x_id); | |
891 | ||
892 | static struct i2c_driver ad799x_driver = { | |
893 | .driver = { | |
894 | .name = "ad799x", | |
895 | }, | |
896 | .probe = ad799x_probe, | |
e543acf0 | 897 | .remove = ad799x_remove, |
985dbe77 MH |
898 | .id_table = ad799x_id, |
899 | }; | |
6e5af184 | 900 | module_i2c_driver(ad799x_driver); |
985dbe77 MH |
901 | |
902 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
903 | MODULE_DESCRIPTION("Analog Devices AD799x ADC"); | |
904 | MODULE_LICENSE("GPL v2"); |