[deliverable/linux.git] / drivers / iio / dac / ad5446.c

/*
 * AD5446 SPI DAC driver
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/spi/spi.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>

#include "ad5446.h"

static int ad5446_write(struct ad5446_state *st, unsigned val)
{
	__be16 data = cpu_to_be16(val);
	return spi_write(st->spi, &data, sizeof(data));
}

static int ad5660_write(struct ad5446_state *st, unsigned val)
{
	uint8_t data[3];

	data[0] = (val >> 16) & 0xFF;
	data[1] = (val >> 8) & 0xFF;
	data[2] = val & 0xFF;

	return spi_write(st->spi, data, sizeof(data));
}

static const char * const ad5446_powerdown_modes[] = {
	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
};

static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, unsigned int mode)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	st->pwr_down_mode = mode + 1;

	return 0;
}

static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return st->pwr_down_mode - 1;
}

static const struct iio_enum ad5446_powerdown_mode_enum = {
	.items = ad5446_powerdown_modes,
	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	.get = ad5446_get_powerdown_mode,
	.set = ad5446_set_powerdown_mode,
};

static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
					   uintptr_t private,
					   const struct iio_chan_spec *chan,
					   char *buf)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return sprintf(buf, "%d\n", st->pwr_down);
}

static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
					    uintptr_t private,
					    const struct iio_chan_spec *chan,
					    const char *buf, size_t len)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	unsigned int shift;
	unsigned int val;
	bool powerdown;
	int ret;

	ret = strtobool(buf, &powerdown);
	if (ret)
		return ret;

	mutex_lock(&indio_dev->mlock);
	st->pwr_down = powerdown;

	if (st->pwr_down) {
		shift = chan->scan_type.realbits + chan->scan_type.shift;
		val = st->pwr_down_mode << shift;
	} else {
		val = st->cached_val;
	}

	ret = st->chip_info->write(st, val);
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}

static const struct iio_chan_spec_ext_info ad5064_ext_info_powerdown[] = {
	{
		.name = "powerdown",
		.read = ad5446_read_dac_powerdown,
		.write = ad5446_write_dac_powerdown,
	},
	IIO_ENUM("powerdown_mode", false, &ad5446_powerdown_mode_enum),
	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
	{ },
};

#define _AD5446_CHANNEL(bits, storage, shift, ext) { \
	.type = IIO_VOLTAGE, \
	.indexed = 1, \
	.output = 1, \
	.channel = 0, \
	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
	IIO_CHAN_INFO_SCALE_SHARED_BIT,	\
	.scan_type = IIO_ST('u', (bits), (storage), (shift)), \
	.ext_info = (ext), \
}

#define AD5446_CHANNEL(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, NULL)

#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, ad5064_ext_info_powerdown)

static const struct ad5446_chip_info ad5446_chip_info_tbl[] = {
	[ID_AD5444] = {
		.channel = AD5446_CHANNEL(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5446] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5450] = {
		.channel = AD5446_CHANNEL(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5451] = {
		.channel = AD5446_CHANNEL(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5541A] = {
		.channel = AD5446_CHANNEL(16, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5512A] = {
		.channel = AD5446_CHANNEL(12, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5553] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5601] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5611] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5621] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5620_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5620_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5640_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5640_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5660_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5660_write,
	},
	[ID_AD5660_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5660_write,
	},
	[ID_AD5662] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.write = ad5660_write,
	},
};

static int ad5446_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	unsigned long scale_uv;

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		*val = st->cached_val;
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
		*val =  scale_uv / 1000;
		*val2 = (scale_uv % 1000) * 1000;
		return IIO_VAL_INT_PLUS_MICRO;

	}
	return -EINVAL;
}

static int ad5446_write_raw(struct iio_dev *indio_dev,
			       struct iio_chan_spec const *chan,
			       int val,
			       int val2,
			       long mask)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	int ret = 0;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		if (val >= (1 << chan->scan_type.realbits) || val < 0)
			return -EINVAL;

		val <<= chan->scan_type.shift;
		mutex_lock(&indio_dev->mlock);
		st->cached_val = val;
		if (!st->pwr_down)
			ret = st->chip_info->write(st, val);
		mutex_unlock(&indio_dev->mlock);
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

static const struct iio_info ad5446_info = {
	.read_raw = ad5446_read_raw,
	.write_raw = ad5446_write_raw,
	.driver_module = THIS_MODULE,
};

static int __devinit ad5446_probe(struct spi_device *spi)
{
	struct ad5446_state *st;
	struct iio_dev *indio_dev;
	struct regulator *reg;
	int ret, voltage_uv = 0;

	reg = regulator_get(&spi->dev, "vcc");
	if (!IS_ERR(reg)) {
		ret = regulator_enable(reg);
		if (ret)
			goto error_put_reg;

		voltage_uv = regulator_get_voltage(reg);
	}

	indio_dev = iio_device_alloc(sizeof(*st));
	if (indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_disable_reg;
	}
	st = iio_priv(indio_dev);
	st->chip_info =
		&ad5446_chip_info_tbl[spi_get_device_id(spi)->driver_data];

	spi_set_drvdata(spi, indio_dev);
	st->reg = reg;
	st->spi = spi;

	/* Establish that the iio_dev is a child of the spi device */
	indio_dev->dev.parent = &spi->dev;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->info = &ad5446_info;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels = &st->chip_info->channel;
	indio_dev->num_channels = 1;

	st->pwr_down_mode = MODE_PWRDWN_1k;

	if (st->chip_info->int_vref_mv)
		st->vref_mv = st->chip_info->int_vref_mv;
	else if (voltage_uv)
		st->vref_mv = voltage_uv / 1000;
	else
		dev_warn(&spi->dev, "reference voltage unspecified\n");

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_free_device;

	return 0;

error_free_device:
	iio_device_free(indio_dev);
error_disable_reg:
	if (!IS_ERR(reg))
		regulator_disable(reg);
error_put_reg:
	if (!IS_ERR(reg))
		regulator_put(reg);

	return ret;
}

static int ad5446_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct ad5446_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	if (!IS_ERR(st->reg)) {
		regulator_disable(st->reg);
		regulator_put(st->reg);
	}
	iio_device_free(indio_dev);

	return 0;
}

static const struct spi_device_id ad5446_id[] = {
	{"ad5444", ID_AD5444},
	{"ad5446", ID_AD5446},
	{"ad5450", ID_AD5450},
	{"ad5451", ID_AD5451},
	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
	{"ad5512a", ID_AD5512A},
	{"ad5541a", ID_AD5541A},
	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
	{"ad5553", ID_AD5553},
	{"ad5601", ID_AD5601},
	{"ad5611", ID_AD5611},
	{"ad5621", ID_AD5621},
	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	{"ad5640-2500", ID_AD5640_2500},
	{"ad5640-1250", ID_AD5640_1250},
	{"ad5660-2500", ID_AD5660_2500},
	{"ad5660-1250", ID_AD5660_1250},
	{"ad5662", ID_AD5662},
	{}
};
MODULE_DEVICE_TABLE(spi, ad5446_id);

static struct spi_driver ad5446_driver = {
	.driver = {
		.name	= "ad5446",
		.owner	= THIS_MODULE,
	},
	.probe		= ad5446_probe,
	.remove		= __devexit_p(ad5446_remove),
	.id_table	= ad5446_id,
};
module_spi_driver(ad5446_driver);

MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b5a49481 MH	1	/*
	2	* AD5446 SPI DAC driver
	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/workqueue.h>
	11	#include <linux/device.h>
	12	#include <linux/kernel.h>
	13	#include <linux/slab.h>
	14	#include <linux/sysfs.h>
	15	#include <linux/list.h>
	16	#include <linux/spi/spi.h>
	17	#include <linux/regulator/consumer.h>
	18	#include <linux/err.h>
99c97852	19	#include <linux/module.h>
b5a49481	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
b5a49481 MH	23
	24	#include "ad5446.h"
	25
cae329e0	26	static int ad5446_write(struct ad5446_state *st, unsigned val)
d846263d	27	{
af836d9a LPC	28	__be16 data = cpu_to_be16(val);
af836d9a LPC	29	return spi_write(st->spi, &data, sizeof(data));
d846263d MH	30	}
d846263d MH	31
cae329e0	32	static int ad5660_write(struct ad5446_state *st, unsigned val)
d846263d	33	{
af836d9a LPC	34	uint8_t data[3];
af836d9a LPC	35
af836d9a LPC	36	data[0] = (val >> 16) & 0xFF;
	37	data[1] = (val >> 8) & 0xFF;
	38	data[2] = val & 0xFF;
bbed4dc7	39
af836d9a	40	return spi_write(st->spi, data, sizeof(data));
bbed4dc7 MH	41	}
bbed4dc7 MH	42
83f0f572	43	static const char * const ad5446_powerdown_modes[] = {
09d48aa9	44	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572 LPC	45	};
83f0f572 LPC	46
09d48aa9 LPC	47	static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	48	const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7	49	{
638e59fc	50	struct ad5446_state *st = iio_priv(indio_dev);
83f0f572	51
09d48aa9	52	st->pwr_down_mode = mode + 1;
bbed4dc7	53
09d48aa9	54	return 0;
bbed4dc7 MH	55	}
bbed4dc7 MH	56
09d48aa9 LPC	57	static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	58	const struct iio_chan_spec *chan)
bbed4dc7	59	{
638e59fc	60	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7	61
09d48aa9	62	return st->pwr_down_mode - 1;
bbed4dc7 MH	63	}
bbed4dc7 MH	64
09d48aa9 LPC	65	static const struct iio_enum ad5446_powerdown_mode_enum = {
	66	.items = ad5446_powerdown_modes,
	67	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	68	.get = ad5446_get_powerdown_mode,
	69	.set = ad5446_set_powerdown_mode,
	70	};
	71
83f0f572	72	static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	73	uintptr_t private,
83f0f572	74	const struct iio_chan_spec *chan,
bbed4dc7 MH	75	char *buf)
bbed4dc7 MH	76	{
638e59fc	77	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 MH	78
	79	return sprintf(buf, "%d\n", st->pwr_down);
	80	}
	81
83f0f572	82	static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	83	uintptr_t private,
83f0f572	84	const struct iio_chan_spec *chan,
bbed4dc7 MH	85	const char *buf, size_t len)
bbed4dc7 MH	86	{
638e59fc	87	struct ad5446_state *st = iio_priv(indio_dev);
cae329e0 LPC	88	unsigned int shift;
cae329e0 LPC	89	unsigned int val;
83f0f572	90	bool powerdown;
bbed4dc7 MH	91	int ret;
bbed4dc7 MH	92
83f0f572	93	ret = strtobool(buf, &powerdown);
bbed4dc7 MH	94	if (ret)
	95	return ret;
	96
638e59fc	97	mutex_lock(&indio_dev->mlock);
83f0f572	98	st->pwr_down = powerdown;
bbed4dc7	99
cae329e0 LPC	100	if (st->pwr_down) {
	101	shift = chan->scan_type.realbits + chan->scan_type.shift;
	102	val = st->pwr_down_mode << shift;
	103	} else {
	104	val = st->cached_val;
	105	}
bbed4dc7	106
cae329e0	107	ret = st->chip_info->write(st, val);
638e59fc	108	mutex_unlock(&indio_dev->mlock);
bbed4dc7 MH	109
	110	return ret ? ret : len;
	111	}
	112
83f0f572 LPC	113	static const struct iio_chan_spec_ext_info ad5064_ext_info_powerdown[] = {
	114	{
	115	.name = "powerdown",
	116	.read = ad5446_read_dac_powerdown,
	117	.write = ad5446_write_dac_powerdown,
83f0f572	118	},
09d48aa9 LPC	119	IIO_ENUM("powerdown_mode", false, &ad5446_powerdown_mode_enum),
09d48aa9 LPC	120	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572	121	{ },
b5a49481 MH	122	};
b5a49481 MH	123
83f0f572	124	#define _AD5446_CHANNEL(bits, storage, shift, ext) { \
33ad6b21 LPC	125	.type = IIO_VOLTAGE, \
	126	.indexed = 1, \
	127	.output = 1, \
	128	.channel = 0, \
09f4eb40 JC	129	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \| \
09f4eb40 JC	130	IIO_CHAN_INFO_SCALE_SHARED_BIT, \
83f0f572 LPC	131	.scan_type = IIO_ST('u', (bits), (storage), (shift)), \
83f0f572 LPC	132	.ext_info = (ext), \
33ad6b21 LPC	133	}
33ad6b21 LPC	134
83f0f572 LPC	135	#define AD5446_CHANNEL(bits, storage, shift) \
	136	_AD5446_CHANNEL(bits, storage, shift, NULL)
	137
	138	#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
	139	_AD5446_CHANNEL(bits, storage, shift, ad5064_ext_info_powerdown)
	140
b5a49481 MH	141	static const struct ad5446_chip_info ad5446_chip_info_tbl[] = {
b5a49481 MH	142	[ID_AD5444] = {
33ad6b21	143	.channel = AD5446_CHANNEL(12, 16, 2),
cae329e0	144	.write = ad5446_write,
b5a49481 MH	145	},
b5a49481 MH	146	[ID_AD5446] = {
33ad6b21	147	.channel = AD5446_CHANNEL(14, 16, 0),
cae329e0	148	.write = ad5446_write,
b5a49481	149	},
779c0c46 LPC	150	[ID_AD5450] = {
	151	.channel = AD5446_CHANNEL(8, 16, 6),
	152	.write = ad5446_write,
	153	},
	154	[ID_AD5451] = {
	155	.channel = AD5446_CHANNEL(10, 16, 4),
	156	.write = ad5446_write,
	157	},
67d1c1f4	158	[ID_AD5541A] = {
33ad6b21	159	.channel = AD5446_CHANNEL(16, 16, 0),
cae329e0	160	.write = ad5446_write,
67d1c1f4	161	},
b5a49481	162	[ID_AD5512A] = {
33ad6b21	163	.channel = AD5446_CHANNEL(12, 16, 4),
cae329e0	164	.write = ad5446_write,
d846263d	165	},
0772268a	166	[ID_AD5553] = {
33ad6b21	167	.channel = AD5446_CHANNEL(14, 16, 0),
cae329e0	168	.write = ad5446_write,
0772268a	169	},
2b61535a	170	[ID_AD5601] = {
83f0f572	171	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
cae329e0	172	.write = ad5446_write,
2b61535a MH	173	},
2b61535a MH	174	[ID_AD5611] = {
83f0f572	175	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
cae329e0	176	.write = ad5446_write,
2b61535a MH	177	},
2b61535a MH	178	[ID_AD5621] = {
83f0f572	179	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
cae329e0	180	.write = ad5446_write,
2b61535a	181	},
d846263d	182	[ID_AD5620_2500] = {
83f0f572	183	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
d846263d	184	.int_vref_mv = 2500,
cae329e0	185	.write = ad5446_write,
d846263d MH	186	},
d846263d MH	187	[ID_AD5620_1250] = {
83f0f572	188	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
d846263d	189	.int_vref_mv = 1250,
cae329e0	190	.write = ad5446_write,
d846263d MH	191	},
d846263d MH	192	[ID_AD5640_2500] = {
83f0f572	193	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
d846263d	194	.int_vref_mv = 2500,
cae329e0	195	.write = ad5446_write,
d846263d MH	196	},
d846263d MH	197	[ID_AD5640_1250] = {
83f0f572	198	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
d846263d	199	.int_vref_mv = 1250,
cae329e0	200	.write = ad5446_write,
d846263d MH	201	},
d846263d MH	202	[ID_AD5660_2500] = {
83f0f572	203	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
d846263d	204	.int_vref_mv = 2500,
cae329e0	205	.write = ad5660_write,
d846263d MH	206	},
d846263d MH	207	[ID_AD5660_1250] = {
83f0f572	208	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
d846263d	209	.int_vref_mv = 1250,
cae329e0	210	.write = ad5660_write,
b5a49481	211	},
18e5ab31 LPC	212	[ID_AD5662] = {
	213	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	214	.write = ad5660_write,
	215	},
b5a49481 MH	216	};
b5a49481 MH	217
33ad6b21 LPC	218	static int ad5446_read_raw(struct iio_dev *indio_dev,
	219	struct iio_chan_spec const *chan,
	220	int *val,
	221	int *val2,
	222	long m)
	223	{
	224	struct ad5446_state *st = iio_priv(indio_dev);
	225	unsigned long scale_uv;
	226
	227	switch (m) {
5e06bdfb LPC	228	case IIO_CHAN_INFO_RAW:
	229	*val = st->cached_val;
	230	return IIO_VAL_INT;
33ad6b21 LPC	231	case IIO_CHAN_INFO_SCALE:
	232	scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
	233	*val = scale_uv / 1000;
	234	val2 = (scale_uv % 1000) 1000;
	235	return IIO_VAL_INT_PLUS_MICRO;
	236
	237	}
	238	return -EINVAL;
	239	}
	240
	241	static int ad5446_write_raw(struct iio_dev *indio_dev,
	242	struct iio_chan_spec const *chan,
	243	int val,
	244	int val2,
	245	long mask)
	246	{
	247	struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0	248	int ret = 0;
33ad6b21 LPC	249
33ad6b21 LPC	250	switch (mask) {
09f4eb40	251	case IIO_CHAN_INFO_RAW:
33ad6b21 LPC	252	if (val >= (1 << chan->scan_type.realbits) \|\| val < 0)
	253	return -EINVAL;
	254
	255	val <<= chan->scan_type.shift;
	256	mutex_lock(&indio_dev->mlock);
	257	st->cached_val = val;
af836d9a	258	if (!st->pwr_down)
cae329e0	259	ret = st->chip_info->write(st, val);
33ad6b21 LPC	260	mutex_unlock(&indio_dev->mlock);
	261	break;
	262	default:
	263	ret = -EINVAL;
	264	}
	265
	266	return ret;
	267	}
	268
6fe8135f	269	static const struct iio_info ad5446_info = {
7389266c JC	270	.read_raw = ad5446_read_raw,
	271	.write_raw = ad5446_write_raw,
	272	.driver_module = THIS_MODULE,
	273	};
	274
b5a49481 MH	275	static int __devinit ad5446_probe(struct spi_device *spi)
	276	{
	277	struct ad5446_state *st;
86729fc4 JC	278	struct iio_dev *indio_dev;
86729fc4 JC	279	struct regulator *reg;
b5a49481 MH	280	int ret, voltage_uv = 0;
b5a49481 MH	281
86729fc4 JC	282	reg = regulator_get(&spi->dev, "vcc");
	283	if (!IS_ERR(reg)) {
	284	ret = regulator_enable(reg);
b5a49481 MH	285	if (ret)
	286	goto error_put_reg;
	287
86729fc4	288	voltage_uv = regulator_get_voltage(reg);
b5a49481 MH	289	}
b5a49481 MH	290
7cbb7537	291	indio_dev = iio_device_alloc(sizeof(*st));
86729fc4 JC	292	if (indio_dev == NULL) {
	293	ret = -ENOMEM;
	294	goto error_disable_reg;
	295	}
	296	st = iio_priv(indio_dev);
b5a49481 MH	297	st->chip_info =
	298	&ad5446_chip_info_tbl[spi_get_device_id(spi)->driver_data];
	299
86729fc4 JC	300	spi_set_drvdata(spi, indio_dev);
86729fc4 JC	301	st->reg = reg;
b5a49481 MH	302	st->spi = spi;
b5a49481 MH	303
4abf6f8b	304	/* Establish that the iio_dev is a child of the spi device */
86729fc4 JC	305	indio_dev->dev.parent = &spi->dev;
86729fc4 JC	306	indio_dev->name = spi_get_device_id(spi)->name;
83f0f572	307	indio_dev->info = &ad5446_info;
86729fc4	308	indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21 LPC	309	indio_dev->channels = &st->chip_info->channel;
33ad6b21 LPC	310	indio_dev->num_channels = 1;
b5a49481	311
09d48aa9 LPC	312	st->pwr_down_mode = MODE_PWRDWN_1k;
09d48aa9 LPC	313
4e5d3f92	314	if (st->chip_info->int_vref_mv)
bbed4dc7	315	st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92 LPC	316	else if (voltage_uv)
	317	st->vref_mv = voltage_uv / 1000;
	318	else
	319	dev_warn(&spi->dev, "reference voltage unspecified\n");
b5a49481	320
86729fc4	321	ret = iio_device_register(indio_dev);
b5a49481 MH	322	if (ret)
	323	goto error_free_device;
	324
	325	return 0;
	326
	327	error_free_device:
7cbb7537	328	iio_device_free(indio_dev);
b5a49481	329	error_disable_reg:
86729fc4 JC	330	if (!IS_ERR(reg))
86729fc4 JC	331	regulator_disable(reg);
b5a49481	332	error_put_reg:
86729fc4 JC	333	if (!IS_ERR(reg))
	334	regulator_put(reg);
	335
b5a49481 MH	336	return ret;
	337	}
	338
	339	static int ad5446_remove(struct spi_device *spi)
	340	{
86729fc4 JC	341	struct iio_dev *indio_dev = spi_get_drvdata(spi);
86729fc4 JC	342	struct ad5446_state *st = iio_priv(indio_dev);
b5a49481 MH	343
b5a49481 MH	344	iio_device_unregister(indio_dev);
d2fffd6c JC	345	if (!IS_ERR(st->reg)) {
	346	regulator_disable(st->reg);
	347	regulator_put(st->reg);
b5a49481	348	}
7cbb7537	349	iio_device_free(indio_dev);
d2fffd6c	350
b5a49481 MH	351	return 0;
	352	}
	353
	354	static const struct spi_device_id ad5446_id[] = {
	355	{"ad5444", ID_AD5444},
	356	{"ad5446", ID_AD5446},
779c0c46 LPC	357	{"ad5450", ID_AD5450},
	358	{"ad5451", ID_AD5451},
	359	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	360	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481	361	{"ad5512a", ID_AD5512A},
67d1c1f4	362	{"ad5541a", ID_AD5541A},
11a7df48 LPC	363	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
11a7df48 LPC	364	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0	365	{"ad5553", ID_AD5553},
2b61535a MH	366	{"ad5601", ID_AD5601},
	367	{"ad5611", ID_AD5611},
	368	{"ad5621", ID_AD5621},
d846263d MH	369	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	370	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	371	{"ad5640-2500", ID_AD5640_2500},
	372	{"ad5640-1250", ID_AD5640_1250},
	373	{"ad5660-2500", ID_AD5660_2500},
	374	{"ad5660-1250", ID_AD5660_1250},
18e5ab31	375	{"ad5662", ID_AD5662},
b5a49481 MH	376	{}
b5a49481 MH	377	};
55e4390c	378	MODULE_DEVICE_TABLE(spi, ad5446_id);
b5a49481 MH	379
	380	static struct spi_driver ad5446_driver = {
	381	.driver = {
	382	.name = "ad5446",
b5a49481 MH	383	.owner = THIS_MODULE,
	384	},
	385	.probe = ad5446_probe,
	386	.remove = __devexit_p(ad5446_remove),
	387	.id_table = ad5446_id,
	388	};
ae6ae6fe	389	module_spi_driver(ad5446_driver);
b5a49481 MH	390
	391	MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
	392	MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
	393	MODULE_LICENSE("GPL v2");