Merge tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / drivers / iio / dac / ad5446.c
CommitLineData
b5a49481
MH
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/workqueue.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/list.h>
16#include <linux/spi/spi.h>
3ec36a2c 17#include <linux/i2c.h>
b5a49481
MH
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
99c97852 20#include <linux/module.h>
b5a49481 21
06458e27
JC
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
b5a49481 24
2e15c903
JFD
25#define MODE_PWRDWN_1k 0x1
26#define MODE_PWRDWN_100k 0x2
27#define MODE_PWRDWN_TRISTATE 0x3
28
29/**
30 * struct ad5446_state - driver instance specific data
31 * @spi: spi_device
32 * @chip_info: chip model specific constants, available modes etc
33 * @reg: supply regulator
34 * @vref_mv: actual reference voltage used
35 */
36
37struct ad5446_state {
38 struct device *dev;
39 const struct ad5446_chip_info *chip_info;
40 struct regulator *reg;
41 unsigned short vref_mv;
42 unsigned cached_val;
43 unsigned pwr_down_mode;
44 unsigned pwr_down;
45};
46
47/**
48 * struct ad5446_chip_info - chip specific information
49 * @channel: channel spec for the DAC
50 * @int_vref_mv: AD5620/40/60: the internal reference voltage
51 * @write: chip specific helper function to write to the register
52 */
53
54struct ad5446_chip_info {
55 struct iio_chan_spec channel;
56 u16 int_vref_mv;
57 int (*write)(struct ad5446_state *st, unsigned val);
58};
b5a49481 59
83f0f572 60static const char * const ad5446_powerdown_modes[] = {
09d48aa9 61 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572
LPC
62};
63
09d48aa9
LPC
64static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
65 const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7 66{
638e59fc 67 struct ad5446_state *st = iio_priv(indio_dev);
83f0f572 68
09d48aa9 69 st->pwr_down_mode = mode + 1;
bbed4dc7 70
09d48aa9 71 return 0;
bbed4dc7
MH
72}
73
09d48aa9
LPC
74static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
75 const struct iio_chan_spec *chan)
bbed4dc7 76{
638e59fc 77 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 78
09d48aa9 79 return st->pwr_down_mode - 1;
bbed4dc7
MH
80}
81
09d48aa9
LPC
82static const struct iio_enum ad5446_powerdown_mode_enum = {
83 .items = ad5446_powerdown_modes,
84 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
85 .get = ad5446_get_powerdown_mode,
86 .set = ad5446_set_powerdown_mode,
87};
88
83f0f572 89static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 90 uintptr_t private,
83f0f572 91 const struct iio_chan_spec *chan,
bbed4dc7
MH
92 char *buf)
93{
638e59fc 94 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7
MH
95
96 return sprintf(buf, "%d\n", st->pwr_down);
97}
98
83f0f572 99static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 100 uintptr_t private,
83f0f572 101 const struct iio_chan_spec *chan,
bbed4dc7
MH
102 const char *buf, size_t len)
103{
638e59fc 104 struct ad5446_state *st = iio_priv(indio_dev);
cae329e0
LPC
105 unsigned int shift;
106 unsigned int val;
83f0f572 107 bool powerdown;
bbed4dc7
MH
108 int ret;
109
83f0f572 110 ret = strtobool(buf, &powerdown);
bbed4dc7
MH
111 if (ret)
112 return ret;
113
638e59fc 114 mutex_lock(&indio_dev->mlock);
83f0f572 115 st->pwr_down = powerdown;
bbed4dc7 116
cae329e0
LPC
117 if (st->pwr_down) {
118 shift = chan->scan_type.realbits + chan->scan_type.shift;
119 val = st->pwr_down_mode << shift;
120 } else {
121 val = st->cached_val;
122 }
bbed4dc7 123
cae329e0 124 ret = st->chip_info->write(st, val);
638e59fc 125 mutex_unlock(&indio_dev->mlock);
bbed4dc7
MH
126
127 return ret ? ret : len;
128}
129
3ec36a2c 130static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
83f0f572
LPC
131 {
132 .name = "powerdown",
133 .read = ad5446_read_dac_powerdown,
134 .write = ad5446_write_dac_powerdown,
3704432f 135 .shared = IIO_SEPARATE,
83f0f572 136 },
3704432f 137 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
09d48aa9 138 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572 139 { },
b5a49481
MH
140};
141
e3019c21 142#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
33ad6b21
LPC
143 .type = IIO_VOLTAGE, \
144 .indexed = 1, \
145 .output = 1, \
146 .channel = 0, \
2f6a4a44
JC
147 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
148 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
e3019c21
JC
149 .scan_type = { \
150 .sign = 'u', \
151 .realbits = (bits), \
152 .storagebits = (storage), \
153 .shift = (_shift), \
154 }, \
83f0f572 155 .ext_info = (ext), \
33ad6b21
LPC
156}
157
83f0f572
LPC
158#define AD5446_CHANNEL(bits, storage, shift) \
159 _AD5446_CHANNEL(bits, storage, shift, NULL)
160
161#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
3ec36a2c 162 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
b5a49481 163
33ad6b21
LPC
164static int ad5446_read_raw(struct iio_dev *indio_dev,
165 struct iio_chan_spec const *chan,
166 int *val,
167 int *val2,
168 long m)
169{
170 struct ad5446_state *st = iio_priv(indio_dev);
33ad6b21
LPC
171
172 switch (m) {
5e06bdfb
LPC
173 case IIO_CHAN_INFO_RAW:
174 *val = st->cached_val;
175 return IIO_VAL_INT;
33ad6b21 176 case IIO_CHAN_INFO_SCALE:
0a99b601
LPC
177 *val = st->vref_mv;
178 *val2 = chan->scan_type.realbits;
179 return IIO_VAL_FRACTIONAL_LOG2;
33ad6b21
LPC
180 }
181 return -EINVAL;
182}
183
184static int ad5446_write_raw(struct iio_dev *indio_dev,
185 struct iio_chan_spec const *chan,
186 int val,
187 int val2,
188 long mask)
189{
190 struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0 191 int ret = 0;
33ad6b21
LPC
192
193 switch (mask) {
09f4eb40 194 case IIO_CHAN_INFO_RAW:
33ad6b21
LPC
195 if (val >= (1 << chan->scan_type.realbits) || val < 0)
196 return -EINVAL;
197
198 val <<= chan->scan_type.shift;
199 mutex_lock(&indio_dev->mlock);
200 st->cached_val = val;
af836d9a 201 if (!st->pwr_down)
cae329e0 202 ret = st->chip_info->write(st, val);
33ad6b21
LPC
203 mutex_unlock(&indio_dev->mlock);
204 break;
205 default:
206 ret = -EINVAL;
207 }
208
209 return ret;
210}
211
6fe8135f 212static const struct iio_info ad5446_info = {
7389266c
JC
213 .read_raw = ad5446_read_raw,
214 .write_raw = ad5446_write_raw,
215 .driver_module = THIS_MODULE,
216};
217
fc52692c
GKH
218static int ad5446_probe(struct device *dev, const char *name,
219 const struct ad5446_chip_info *chip_info)
b5a49481
MH
220{
221 struct ad5446_state *st;
86729fc4
JC
222 struct iio_dev *indio_dev;
223 struct regulator *reg;
b5a49481
MH
224 int ret, voltage_uv = 0;
225
ba727295 226 reg = devm_regulator_get(dev, "vcc");
86729fc4
JC
227 if (!IS_ERR(reg)) {
228 ret = regulator_enable(reg);
b5a49481 229 if (ret)
ba727295 230 return ret;
b5a49481 231
13e57ee2
AL
232 ret = regulator_get_voltage(reg);
233 if (ret < 0)
234 goto error_disable_reg;
235
236 voltage_uv = ret;
b5a49481
MH
237 }
238
ba727295 239 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
86729fc4
JC
240 if (indio_dev == NULL) {
241 ret = -ENOMEM;
242 goto error_disable_reg;
243 }
244 st = iio_priv(indio_dev);
3ec36a2c 245 st->chip_info = chip_info;
b5a49481 246
3ec36a2c 247 dev_set_drvdata(dev, indio_dev);
86729fc4 248 st->reg = reg;
3ec36a2c 249 st->dev = dev;
b5a49481 250
3ec36a2c
JFD
251 /* Establish that the iio_dev is a child of the device */
252 indio_dev->dev.parent = dev;
253 indio_dev->name = name;
83f0f572 254 indio_dev->info = &ad5446_info;
86729fc4 255 indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21
LPC
256 indio_dev->channels = &st->chip_info->channel;
257 indio_dev->num_channels = 1;
b5a49481 258
09d48aa9
LPC
259 st->pwr_down_mode = MODE_PWRDWN_1k;
260
4e5d3f92 261 if (st->chip_info->int_vref_mv)
bbed4dc7 262 st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92
LPC
263 else if (voltage_uv)
264 st->vref_mv = voltage_uv / 1000;
265 else
3ec36a2c 266 dev_warn(dev, "reference voltage unspecified\n");
b5a49481 267
86729fc4 268 ret = iio_device_register(indio_dev);
b5a49481 269 if (ret)
ba727295 270 goto error_disable_reg;
b5a49481
MH
271
272 return 0;
273
b5a49481 274error_disable_reg:
86729fc4
JC
275 if (!IS_ERR(reg))
276 regulator_disable(reg);
b5a49481
MH
277 return ret;
278}
279
3ec36a2c 280static int ad5446_remove(struct device *dev)
b5a49481 281{
3ec36a2c 282 struct iio_dev *indio_dev = dev_get_drvdata(dev);
86729fc4 283 struct ad5446_state *st = iio_priv(indio_dev);
b5a49481
MH
284
285 iio_device_unregister(indio_dev);
ba727295 286 if (!IS_ERR(st->reg))
d2fffd6c 287 regulator_disable(st->reg);
d2fffd6c 288
b5a49481
MH
289 return 0;
290}
291
3ec36a2c
JFD
292#if IS_ENABLED(CONFIG_SPI_MASTER)
293
294static int ad5446_write(struct ad5446_state *st, unsigned val)
295{
296 struct spi_device *spi = to_spi_device(st->dev);
297 __be16 data = cpu_to_be16(val);
298
299 return spi_write(spi, &data, sizeof(data));
300}
301
302static int ad5660_write(struct ad5446_state *st, unsigned val)
303{
304 struct spi_device *spi = to_spi_device(st->dev);
305 uint8_t data[3];
306
307 data[0] = (val >> 16) & 0xFF;
308 data[1] = (val >> 8) & 0xFF;
309 data[2] = val & 0xFF;
310
311 return spi_write(spi, data, sizeof(data));
312}
313
314/**
315 * ad5446_supported_spi_device_ids:
316 * The AD5620/40/60 parts are available in different fixed internal reference
317 * voltage options. The actual part numbers may look differently
318 * (and a bit cryptic), however this style is used to make clear which
319 * parts are supported here.
320 */
321enum ad5446_supported_spi_device_ids {
2fafbce2
LPC
322 ID_AD5300,
323 ID_AD5310,
324 ID_AD5320,
3ec36a2c
JFD
325 ID_AD5444,
326 ID_AD5446,
327 ID_AD5450,
328 ID_AD5451,
329 ID_AD5541A,
330 ID_AD5512A,
331 ID_AD5553,
332 ID_AD5601,
333 ID_AD5611,
334 ID_AD5621,
4fa2a9e4 335 ID_AD5641,
3ec36a2c
JFD
336 ID_AD5620_2500,
337 ID_AD5620_1250,
338 ID_AD5640_2500,
339 ID_AD5640_1250,
340 ID_AD5660_2500,
341 ID_AD5660_1250,
342 ID_AD5662,
343};
344
345static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
2fafbce2
LPC
346 [ID_AD5300] = {
347 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
348 .write = ad5446_write,
349 },
350 [ID_AD5310] = {
351 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
352 .write = ad5446_write,
353 },
354 [ID_AD5320] = {
355 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
356 .write = ad5446_write,
357 },
3ec36a2c
JFD
358 [ID_AD5444] = {
359 .channel = AD5446_CHANNEL(12, 16, 2),
360 .write = ad5446_write,
361 },
362 [ID_AD5446] = {
363 .channel = AD5446_CHANNEL(14, 16, 0),
364 .write = ad5446_write,
365 },
366 [ID_AD5450] = {
367 .channel = AD5446_CHANNEL(8, 16, 6),
368 .write = ad5446_write,
369 },
370 [ID_AD5451] = {
371 .channel = AD5446_CHANNEL(10, 16, 4),
372 .write = ad5446_write,
373 },
374 [ID_AD5541A] = {
375 .channel = AD5446_CHANNEL(16, 16, 0),
376 .write = ad5446_write,
377 },
378 [ID_AD5512A] = {
379 .channel = AD5446_CHANNEL(12, 16, 4),
380 .write = ad5446_write,
381 },
382 [ID_AD5553] = {
383 .channel = AD5446_CHANNEL(14, 16, 0),
384 .write = ad5446_write,
385 },
386 [ID_AD5601] = {
387 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
388 .write = ad5446_write,
389 },
390 [ID_AD5611] = {
391 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
392 .write = ad5446_write,
393 },
394 [ID_AD5621] = {
395 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
396 .write = ad5446_write,
397 },
4fa2a9e4
AM
398 [ID_AD5641] = {
399 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
400 .write = ad5446_write,
401 },
3ec36a2c
JFD
402 [ID_AD5620_2500] = {
403 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
404 .int_vref_mv = 2500,
405 .write = ad5446_write,
406 },
407 [ID_AD5620_1250] = {
408 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
409 .int_vref_mv = 1250,
410 .write = ad5446_write,
411 },
412 [ID_AD5640_2500] = {
413 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
414 .int_vref_mv = 2500,
415 .write = ad5446_write,
416 },
417 [ID_AD5640_1250] = {
418 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
419 .int_vref_mv = 1250,
420 .write = ad5446_write,
421 },
422 [ID_AD5660_2500] = {
423 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
424 .int_vref_mv = 2500,
425 .write = ad5660_write,
426 },
427 [ID_AD5660_1250] = {
428 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
429 .int_vref_mv = 1250,
430 .write = ad5660_write,
431 },
432 [ID_AD5662] = {
433 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
434 .write = ad5660_write,
435 },
436};
437
438static const struct spi_device_id ad5446_spi_ids[] = {
2fafbce2
LPC
439 {"ad5300", ID_AD5300},
440 {"ad5310", ID_AD5310},
441 {"ad5320", ID_AD5320},
b5a49481
MH
442 {"ad5444", ID_AD5444},
443 {"ad5446", ID_AD5446},
779c0c46
LPC
444 {"ad5450", ID_AD5450},
445 {"ad5451", ID_AD5451},
446 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
447 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481 448 {"ad5512a", ID_AD5512A},
67d1c1f4 449 {"ad5541a", ID_AD5541A},
11a7df48
LPC
450 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
451 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0 452 {"ad5553", ID_AD5553},
2b61535a
MH
453 {"ad5601", ID_AD5601},
454 {"ad5611", ID_AD5611},
455 {"ad5621", ID_AD5621},
4fa2a9e4 456 {"ad5641", ID_AD5641},
d846263d
MH
457 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
458 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
459 {"ad5640-2500", ID_AD5640_2500},
460 {"ad5640-1250", ID_AD5640_1250},
461 {"ad5660-2500", ID_AD5660_2500},
462 {"ad5660-1250", ID_AD5660_1250},
18e5ab31 463 {"ad5662", ID_AD5662},
b5a49481
MH
464 {}
465};
3ec36a2c
JFD
466MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
467
fc52692c 468static int ad5446_spi_probe(struct spi_device *spi)
3ec36a2c
JFD
469{
470 const struct spi_device_id *id = spi_get_device_id(spi);
471
472 return ad5446_probe(&spi->dev, id->name,
473 &ad5446_spi_chip_info[id->driver_data]);
474}
b5a49481 475
fc52692c 476static int ad5446_spi_remove(struct spi_device *spi)
3ec36a2c
JFD
477{
478 return ad5446_remove(&spi->dev);
479}
480
481static struct spi_driver ad5446_spi_driver = {
b5a49481
MH
482 .driver = {
483 .name = "ad5446",
b5a49481 484 },
3ec36a2c 485 .probe = ad5446_spi_probe,
fc52692c 486 .remove = ad5446_spi_remove,
3ec36a2c
JFD
487 .id_table = ad5446_spi_ids,
488};
489
490static int __init ad5446_spi_register_driver(void)
491{
492 return spi_register_driver(&ad5446_spi_driver);
493}
494
495static void ad5446_spi_unregister_driver(void)
496{
497 spi_unregister_driver(&ad5446_spi_driver);
498}
499
500#else
501
502static inline int ad5446_spi_register_driver(void) { return 0; }
503static inline void ad5446_spi_unregister_driver(void) { }
504
505#endif
506
507#if IS_ENABLED(CONFIG_I2C)
508
509static int ad5622_write(struct ad5446_state *st, unsigned val)
510{
511 struct i2c_client *client = to_i2c_client(st->dev);
512 __be16 data = cpu_to_be16(val);
513
514 return i2c_master_send(client, (char *)&data, sizeof(data));
515}
516
517/**
518 * ad5446_supported_i2c_device_ids:
519 * The AD5620/40/60 parts are available in different fixed internal reference
520 * voltage options. The actual part numbers may look differently
521 * (and a bit cryptic), however this style is used to make clear which
522 * parts are supported here.
523 */
524enum ad5446_supported_i2c_device_ids {
525 ID_AD5602,
526 ID_AD5612,
527 ID_AD5622,
528};
529
530static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
531 [ID_AD5602] = {
532 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
533 .write = ad5622_write,
534 },
535 [ID_AD5612] = {
536 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
537 .write = ad5622_write,
538 },
539 [ID_AD5622] = {
540 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
541 .write = ad5622_write,
542 },
b5a49481 543};
3ec36a2c 544
fc52692c
GKH
545static int ad5446_i2c_probe(struct i2c_client *i2c,
546 const struct i2c_device_id *id)
3ec36a2c
JFD
547{
548 return ad5446_probe(&i2c->dev, id->name,
549 &ad5446_i2c_chip_info[id->driver_data]);
550}
551
fc52692c 552static int ad5446_i2c_remove(struct i2c_client *i2c)
3ec36a2c
JFD
553{
554 return ad5446_remove(&i2c->dev);
555}
556
557static const struct i2c_device_id ad5446_i2c_ids[] = {
bf832380
LPC
558 {"ad5301", ID_AD5602},
559 {"ad5311", ID_AD5612},
560 {"ad5321", ID_AD5622},
3ec36a2c
JFD
561 {"ad5602", ID_AD5602},
562 {"ad5612", ID_AD5612},
563 {"ad5622", ID_AD5622},
564 {}
565};
566MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
567
568static struct i2c_driver ad5446_i2c_driver = {
569 .driver = {
570 .name = "ad5446",
3ec36a2c
JFD
571 },
572 .probe = ad5446_i2c_probe,
fc52692c 573 .remove = ad5446_i2c_remove,
3ec36a2c
JFD
574 .id_table = ad5446_i2c_ids,
575};
576
577static int __init ad5446_i2c_register_driver(void)
578{
579 return i2c_add_driver(&ad5446_i2c_driver);
580}
581
582static void __exit ad5446_i2c_unregister_driver(void)
583{
584 i2c_del_driver(&ad5446_i2c_driver);
585}
586
587#else
588
589static inline int ad5446_i2c_register_driver(void) { return 0; }
590static inline void ad5446_i2c_unregister_driver(void) { }
591
592#endif
593
594static int __init ad5446_init(void)
595{
596 int ret;
597
598 ret = ad5446_spi_register_driver();
599 if (ret)
600 return ret;
601
602 ret = ad5446_i2c_register_driver();
603 if (ret) {
604 ad5446_spi_unregister_driver();
605 return ret;
606 }
607
608 return 0;
609}
610module_init(ad5446_init);
611
612static void __exit ad5446_exit(void)
613{
614 ad5446_i2c_unregister_driver();
615 ad5446_spi_unregister_driver();
616}
617module_exit(ad5446_exit);
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MH
618
619MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
620MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
621MODULE_LICENSE("GPL v2");
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