Commit | Line | Data |
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b5a49481 MH |
1 | /* |
2 | * AD5446 SPI DAC driver | |
3 | * | |
4 | * Copyright 2010 Analog Devices Inc. | |
5 | * | |
6 | * Licensed under the GPL-2 or later. | |
7 | */ | |
d846263d MH |
8 | #ifndef IIO_DAC_AD5446_H_ |
9 | #define IIO_DAC_AD5446_H_ | |
b5a49481 MH |
10 | |
11 | /* DAC Control Bits */ | |
12 | ||
13 | #define AD5446_LOAD (0x0 << 14) /* Load and update */ | |
14 | #define AD5446_SDO_DIS (0x1 << 14) /* Disable SDO */ | |
15 | #define AD5446_NOP (0x2 << 14) /* No operation */ | |
16 | #define AD5446_CLK_RISING (0x3 << 14) /* Clock data on rising edge */ | |
17 | ||
d846263d MH |
18 | #define AD5620_LOAD (0x0 << 14) /* Load and update Norm Operation*/ |
19 | #define AD5620_PWRDWN_1k (0x1 << 14) /* Power-down: 1kOhm to GND */ | |
20 | #define AD5620_PWRDWN_100k (0x2 << 14) /* Power-down: 100kOhm to GND */ | |
21 | #define AD5620_PWRDWN_TRISTATE (0x3 << 14) /* Power-down: Three-state */ | |
22 | ||
23 | #define AD5660_LOAD (0x0 << 16) /* Load and update Norm Operation*/ | |
24 | #define AD5660_PWRDWN_1k (0x1 << 16) /* Power-down: 1kOhm to GND */ | |
25 | #define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */ | |
26 | #define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */ | |
27 | ||
bbed4dc7 MH |
28 | #define MODE_PWRDWN_1k 0x1 |
29 | #define MODE_PWRDWN_100k 0x2 | |
30 | #define MODE_PWRDWN_TRISTATE 0x3 | |
31 | ||
d846263d MH |
32 | /** |
33 | * struct ad5446_state - driver instance specific data | |
d846263d MH |
34 | * @spi: spi_device |
35 | * @chip_info: chip model specific constants, available modes etc | |
36 | * @reg: supply regulator | |
d846263d | 37 | * @vref_mv: actual reference voltage used |
d846263d | 38 | */ |
b5a49481 MH |
39 | |
40 | struct ad5446_state { | |
b5a49481 MH |
41 | struct spi_device *spi; |
42 | const struct ad5446_chip_info *chip_info; | |
43 | struct regulator *reg; | |
b5a49481 | 44 | unsigned short vref_mv; |
bbed4dc7 MH |
45 | unsigned cached_val; |
46 | unsigned pwr_down_mode; | |
47 | unsigned pwr_down; | |
d846263d MH |
48 | }; |
49 | ||
50 | /** | |
4f765482 | 51 | * struct ad5446_chip_info - chip specific information |
33ad6b21 | 52 | * @channel: channel spec for the DAC |
d846263d | 53 | * @int_vref_mv: AD5620/40/60: the internal reference voltage |
cae329e0 | 54 | * @write: chip specific helper function to write to the register |
d846263d MH |
55 | */ |
56 | ||
57 | struct ad5446_chip_info { | |
33ad6b21 | 58 | struct iio_chan_spec channel; |
bbed4dc7 | 59 | u16 int_vref_mv; |
cae329e0 | 60 | int (*write)(struct ad5446_state *st, unsigned val); |
b5a49481 MH |
61 | }; |
62 | ||
d846263d MH |
63 | /** |
64 | * ad5446_supported_device_ids: | |
65 | * The AD5620/40/60 parts are available in different fixed internal reference | |
66 | * voltage options. The actual part numbers may look differently | |
67 | * (and a bit cryptic), however this style is used to make clear which | |
68 | * parts are supported here. | |
69 | */ | |
70 | ||
b5a49481 MH |
71 | enum ad5446_supported_device_ids { |
72 | ID_AD5444, | |
73 | ID_AD5446, | |
779c0c46 LPC |
74 | ID_AD5450, |
75 | ID_AD5451, | |
67d1c1f4 | 76 | ID_AD5541A, |
b5a49481 | 77 | ID_AD5512A, |
0772268a | 78 | ID_AD5553, |
2b61535a MH |
79 | ID_AD5601, |
80 | ID_AD5611, | |
81 | ID_AD5621, | |
d846263d MH |
82 | ID_AD5620_2500, |
83 | ID_AD5620_1250, | |
84 | ID_AD5640_2500, | |
85 | ID_AD5640_1250, | |
86 | ID_AD5660_2500, | |
87 | ID_AD5660_1250, | |
18e5ab31 | 88 | ID_AD5662, |
b5a49481 MH |
89 | }; |
90 | ||
d846263d | 91 | #endif /* IIO_DAC_AD5446_H_ */ |