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MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / drivers / iio / imu / kmx61.c
CommitLineData
20ffac27
DB		 1/*
2 * KMX61 - Kionix 6-axis Accelerometer/Magnetometer
3 *
4 * Copyright (c) 2014, Intel Corporation.
5 *
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
9 *
10 * IIO driver for KMX61 (7-bit I2C slave address 0x0E or 0x0F).
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/i2c.h>
b25862c5
DB		 16#include <linux/acpi.h>
17#include <linux/gpio/consumer.h>
aff8609a 18#include <linux/interrupt.h>
3b9c40e6 19#include <linux/pm.h>
aff8609a 20#include <linux/pm_runtime.h>
20ffac27
DB		 21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
fd3ae7a9 23#include <linux/iio/events.h>
c3a23ecc
DB		 24#include <linux/iio/trigger.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/triggered_buffer.h>
27#include <linux/iio/trigger_consumer.h>
20ffac27
DB		 28
29#define KMX61_DRV_NAME "kmx61"
b25862c5 30#define KMX61_GPIO_NAME "kmx61_int"
c3a23ecc 31#define KMX61_IRQ_NAME "kmx61_event"
20ffac27
DB		 32
33#define KMX61_REG_WHO_AM_I 0x00
fd3ae7a9
DB		 34#define KMX61_REG_INS1 0x01
35#define KMX61_REG_INS2 0x02
20ffac27
DB		 36
37/*
38 * three 16-bit accelerometer output registers for X/Y/Z axis
39 * we use only XOUT_L as a base register, all other addresses
40 * can be obtained by applying an offset and are provided here
41 * only for clarity.
42 */
43#define KMX61_ACC_XOUT_L 0x0A
44#define KMX61_ACC_XOUT_H 0x0B
45#define KMX61_ACC_YOUT_L 0x0C
46#define KMX61_ACC_YOUT_H 0x0D
47#define KMX61_ACC_ZOUT_L 0x0E
48#define KMX61_ACC_ZOUT_H 0x0F
49
50/*
51 * one 16-bit temperature output register
52 */
53#define KMX61_TEMP_L 0x10
54#define KMX61_TEMP_H 0x11
55
56/*
57 * three 16-bit magnetometer output registers for X/Y/Z axis
58 */
59#define KMX61_MAG_XOUT_L 0x12
60#define KMX61_MAG_XOUT_H 0x13
61#define KMX61_MAG_YOUT_L 0x14
62#define KMX61_MAG_YOUT_H 0x15
63#define KMX61_MAG_ZOUT_L 0x16
64#define KMX61_MAG_ZOUT_H 0x17
65
c3a23ecc 66#define KMX61_REG_INL 0x28
20ffac27
DB		 67#define KMX61_REG_STBY 0x29
68#define KMX61_REG_CTRL1 0x2A
fd3ae7a9 69#define KMX61_REG_CTRL2 0x2B
20ffac27 70#define KMX61_REG_ODCNTL 0x2C
c3a23ecc 71#define KMX61_REG_INC1 0x2D
20ffac27 72
fd3ae7a9
DB		 73#define KMX61_REG_WUF_THRESH 0x3D
74#define KMX61_REG_WUF_TIMER 0x3E
75
20ffac27
DB		 76#define KMX61_ACC_STBY_BIT BIT(0)
77#define KMX61_MAG_STBY_BIT BIT(1)
78#define KMX61_ACT_STBY_BIT BIT(7)
79
80#define KMX61_ALL_STBY (KMX61_ACC_STBY_BIT | KMX61_MAG_STBY_BIT)
81
fd3ae7a9
DB		 82#define KMX61_REG_INS1_BIT_WUFS BIT(1)
83
84#define KMX61_REG_INS2_BIT_ZP BIT(0)
85#define KMX61_REG_INS2_BIT_ZN BIT(1)
86#define KMX61_REG_INS2_BIT_YP BIT(2)
87#define KMX61_REG_INS2_BIT_YN BIT(3)
88#define KMX61_REG_INS2_BIT_XP BIT(4)
89#define KMX61_REG_INS2_BIT_XN BIT(5)
90
20ffac27
DB		 91#define KMX61_REG_CTRL1_GSEL_MASK 0x03
92
c3a23ecc
DB		 93#define KMX61_REG_CTRL1_BIT_RES BIT(4)
94#define KMX61_REG_CTRL1_BIT_DRDYE BIT(5)
fd3ae7a9
DB		 95#define KMX61_REG_CTRL1_BIT_WUFE BIT(6)
96#define KMX61_REG_CTRL1_BIT_BTSE BIT(7)
c3a23ecc 97
fd3ae7a9 98#define KMX61_REG_INC1_BIT_WUFS BIT(0)
c3a23ecc
DB		 99#define KMX61_REG_INC1_BIT_DRDYM BIT(1)
100#define KMX61_REG_INC1_BIT_DRDYA BIT(2)
101#define KMX61_REG_INC1_BIT_IEN BIT(5)
102
20ffac27
DB		 103#define KMX61_ACC_ODR_SHIFT 0
104#define KMX61_MAG_ODR_SHIFT 4
105#define KMX61_ACC_ODR_MASK 0x0F
106#define KMX61_MAG_ODR_MASK 0xF0
107
fd3ae7a9
DB		 108#define KMX61_OWUF_MASK 0x7
109
110#define KMX61_DEFAULT_WAKE_THRESH 1
111#define KMX61_DEFAULT_WAKE_DURATION 1
112
aff8609a
DB		 113#define KMX61_SLEEP_DELAY_MS 2000
114
20ffac27
DB		 115#define KMX61_CHIP_ID 0x12
116
117/* KMX61 devices */
118#define KMX61_ACC 0x01
119#define KMX61_MAG 0x02
120
121struct kmx61_data {
122 struct i2c_client *client;
123
124 /* serialize access to non-atomic ops, e.g set_mode */
125 struct mutex lock;
126
127 /* standby state */
128 bool acc_stby;
129 bool mag_stby;
130
aff8609a
DB		 131 /* power state */
132 bool acc_ps;
133 bool mag_ps;
134
20ffac27
DB		 135 /* config bits */
136 u8 range;
137 u8 odr_bits;
fd3ae7a9
DB		 138 u8 wake_thresh;
139 u8 wake_duration;
20ffac27
DB		 140
141 /* accelerometer specific data */
142 struct iio_dev *acc_indio_dev;
c3a23ecc 143 struct iio_trigger *acc_dready_trig;
fd3ae7a9 144 struct iio_trigger *motion_trig;
c3a23ecc 145 bool acc_dready_trig_on;
fd3ae7a9
DB		 146 bool motion_trig_on;
147 bool ev_enable_state;
20ffac27
DB		 148
149 /* magnetometer specific data */
150 struct iio_dev *mag_indio_dev;
c3a23ecc
DB		 151 struct iio_trigger *mag_dready_trig;
152 bool mag_dready_trig_on;
20ffac27
DB		 153};
154
155enum kmx61_range {
156 KMX61_RANGE_2G,
157 KMX61_RANGE_4G,
158 KMX61_RANGE_8G,
159};
160
161enum kmx61_axis {
162 KMX61_AXIS_X,
163 KMX61_AXIS_Y,
164 KMX61_AXIS_Z,
165};
166
167static const u16 kmx61_uscale_table[] = {9582, 19163, 38326};
168
169static const struct {
170 int val;
171 int val2;
172 u8 odr_bits;
173} kmx61_samp_freq_table[] = { {12, 500000, 0x00},
174 {25, 0, 0x01},
175 {50, 0, 0x02},
176 {100, 0, 0x03},
177 {200, 0, 0x04},
178 {400, 0, 0x05},
179 {800, 0, 0x06},
180 {1600, 0, 0x07},
181 {0, 781000, 0x08},
182 {1, 563000, 0x09},
183 {3, 125000, 0x0A},
184 {6, 250000, 0x0B} };
185
fd3ae7a9
DB		 186static const struct {
187 int val;
188 int val2;
189 int odr_bits;
190} kmx61_wake_up_odr_table[] = { {0, 781000, 0x00},
191 {1, 563000, 0x01},
192 {3, 125000, 0x02},
193 {6, 250000, 0x03},
194 {12, 500000, 0x04},
195 {25, 0, 0x05},
196 {50, 0, 0x06},
197 {100, 0, 0x06},
198 {200, 0, 0x06},
199 {400, 0, 0x06},
200 {800, 0, 0x06},
201 {1600, 0, 0x06} };
202
20ffac27
DB		 203static IIO_CONST_ATTR(accel_scale_available, "0.009582 0.019163 0.038326");
204static IIO_CONST_ATTR(magn_scale_available, "0.001465");
205static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
206 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800");
207
208static struct attribute *kmx61_acc_attributes[] = {
209 &iio_const_attr_accel_scale_available.dev_attr.attr,
210 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
211 NULL,
212};
213
214static struct attribute *kmx61_mag_attributes[] = {
215 &iio_const_attr_magn_scale_available.dev_attr.attr,
216 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
217 NULL,
218};
219
220static const struct attribute_group kmx61_acc_attribute_group = {
221 .attrs = kmx61_acc_attributes,
222};
223
224static const struct attribute_group kmx61_mag_attribute_group = {
225 .attrs = kmx61_mag_attributes,
226};
227
fd3ae7a9
DB		 228static const struct iio_event_spec kmx61_event = {
229 .type = IIO_EV_TYPE_THRESH,
230 .dir = IIO_EV_DIR_EITHER,
231 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
232 BIT(IIO_EV_INFO_ENABLE) |
233 BIT(IIO_EV_INFO_PERIOD),
234};
235
20ffac27
DB		 236#define KMX61_ACC_CHAN(_axis) { \
237 .type = IIO_ACCEL, \
238 .modified = 1, \
239 .channel2 = IIO_MOD_ ## _axis, \
240 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
241 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
242 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
243 .address = KMX61_ACC, \
244 .scan_index = KMX61_AXIS_ ## _axis, \
245 .scan_type = { \
246 .sign = 's', \
247 .realbits = 12, \
248 .storagebits = 16, \
249 .shift = 4, \
250 .endianness = IIO_LE, \
251 }, \
fd3ae7a9
DB		 252 .event_spec = &kmx61_event, \
253 .num_event_specs = 1 \
20ffac27
DB		 254}
255
256#define KMX61_MAG_CHAN(_axis) { \
257 .type = IIO_MAGN, \
258 .modified = 1, \
259 .channel2 = IIO_MOD_ ## _axis, \
260 .address = KMX61_MAG, \
261 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
262 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
263 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
264 .scan_index = KMX61_AXIS_ ## _axis, \
265 .scan_type = { \
266 .sign = 's', \
267 .realbits = 14, \
268 .storagebits = 16, \
269 .shift = 2, \
270 .endianness = IIO_LE, \
271 }, \
272}
273
274static const struct iio_chan_spec kmx61_acc_channels[] = {
275 KMX61_ACC_CHAN(X),
276 KMX61_ACC_CHAN(Y),
277 KMX61_ACC_CHAN(Z),
278};
279
280static const struct iio_chan_spec kmx61_mag_channels[] = {
281 KMX61_MAG_CHAN(X),
282 KMX61_MAG_CHAN(Y),
283 KMX61_MAG_CHAN(Z),
284};
285
286static void kmx61_set_data(struct iio_dev *indio_dev, struct kmx61_data *data)
287{
288 struct kmx61_data **priv = iio_priv(indio_dev);
289
290 *priv = data;
291}
292
293static struct kmx61_data *kmx61_get_data(struct iio_dev *indio_dev)
294{
295 return *(struct kmx61_data **)iio_priv(indio_dev);
296}
297
298static int kmx61_convert_freq_to_bit(int val, int val2)
299{
300 int i;
301
302 for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
303 if (val == kmx61_samp_freq_table[i].val &&
304 val2 == kmx61_samp_freq_table[i].val2)
305 return kmx61_samp_freq_table[i].odr_bits;
306 return -EINVAL;
307}
308
fd3ae7a9
DB		 309static int kmx61_convert_bit_to_freq(u8 odr_bits, int *val, int *val2)
310{
311 int i;
312
313 for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
314 if (odr_bits == kmx61_samp_freq_table[i].odr_bits) {
315 *val = kmx61_samp_freq_table[i].val;
316 *val2 = kmx61_samp_freq_table[i].val2;
317 return 0;
318 }
319 return -EINVAL;
320}
321
322
323static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
324{
325 int i;
326
327 for (i = 0; i < ARRAY_SIZE(kmx61_wake_up_odr_table); ++i)
328 if (kmx61_wake_up_odr_table[i].val == val &&
329 kmx61_wake_up_odr_table[i].val2 == val2)
330 return kmx61_wake_up_odr_table[i].odr_bits;
331 return -EINVAL;
332}
333
20ffac27
DB		 334/**
335 * kmx61_set_mode() - set KMX61 device operating mode
336 * @data - kmx61 device private data pointer
337 * @mode - bitmask, indicating operating mode for @device
338 * @device - bitmask, indicating device for which @mode needs to be set
339 * @update - update stby bits stored in device's private @data
340 *
341 * For each sensor (accelerometer/magnetometer) there are two operating modes
342 * STANDBY and OPERATION. Neither accel nor magn can be disabled independently
343 * if they are both enabled. Internal sensors state is saved in acc_stby and
344 * mag_stby members of driver's private @data.
345 */
346static int kmx61_set_mode(struct kmx61_data *data, u8 mode, u8 device,
347 bool update)
348{
349 int ret;
350 int acc_stby = -1, mag_stby = -1;
351
352 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
353 if (ret < 0) {
354 dev_err(&data->client->dev, "Error reading reg_stby\n");
355 return ret;
356 }
357 if (device & KMX61_ACC) {
358 if (mode & KMX61_ACC_STBY_BIT) {
359 ret |= KMX61_ACC_STBY_BIT;
360 acc_stby = 1;
361 } else {
362 ret &= ~KMX61_ACC_STBY_BIT;
363 acc_stby = 0;
364 }
365 }
366
367 if (device & KMX61_MAG) {
368 if (mode & KMX61_MAG_STBY_BIT) {
369 ret |= KMX61_MAG_STBY_BIT;
370 mag_stby = 1;
371 } else {
372 ret &= ~KMX61_MAG_STBY_BIT;
373 mag_stby = 0;
374 }
375 }
376
377 if (mode & KMX61_ACT_STBY_BIT)
378 ret |= KMX61_ACT_STBY_BIT;
379
380 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_STBY, ret);
381 if (ret < 0) {
382 dev_err(&data->client->dev, "Error writing reg_stby\n");
383 return ret;
384 }
385
386 if (acc_stby != -1 && update)
387 data->acc_stby = acc_stby;
388 if (mag_stby != -1 && update)
389 data->mag_stby = mag_stby;
390
391 return 0;
392}
393
394static int kmx61_get_mode(struct kmx61_data *data, u8 *mode, u8 device)
395{
396 int ret;
397
398 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
399 if (ret < 0) {
400 dev_err(&data->client->dev, "Error reading reg_stby\n");
401 return ret;
402 }
403 *mode = 0;
404
405 if (device & KMX61_ACC) {
406 if (ret & KMX61_ACC_STBY_BIT)
407 *mode |= KMX61_ACC_STBY_BIT;
408 else
409 *mode &= ~KMX61_ACC_STBY_BIT;
410 }
411
412 if (device & KMX61_MAG) {
413 if (ret & KMX61_MAG_STBY_BIT)
414 *mode |= KMX61_MAG_STBY_BIT;
415 else
416 *mode &= ~KMX61_MAG_STBY_BIT;
417 }
418
419 return 0;
420}
421
ebd16366 422static int kmx61_set_wake_up_odr(struct kmx61_data *data, int val, int val2)
fd3ae7a9
DB		 423{
424 int ret, odr_bits;
425
426 odr_bits = kmx61_convert_wake_up_odr_to_bit(val, val2);
427 if (odr_bits < 0)
428 return odr_bits;
429
430 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL2,
431 odr_bits);
432 if (ret < 0)
433 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
434 return ret;
435}
436
20ffac27
DB		 437static int kmx61_set_odr(struct kmx61_data *data, int val, int val2, u8 device)
438{
439 int ret;
440 u8 mode;
441 int lodr_bits, odr_bits;
442
443 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
444 if (ret < 0)
445 return ret;
446
447 lodr_bits = kmx61_convert_freq_to_bit(val, val2);
448 if (lodr_bits < 0)
449 return lodr_bits;
450
451 /* To change ODR, accel and magn must be in STDBY */
452 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
453 true);
454 if (ret < 0)
455 return ret;
456
457 odr_bits = 0;
458 if (device & KMX61_ACC)
459 odr_bits |= lodr_bits << KMX61_ACC_ODR_SHIFT;
460 if (device & KMX61_MAG)
461 odr_bits |= lodr_bits << KMX61_MAG_ODR_SHIFT;
462
463 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_ODCNTL,
464 odr_bits);
465 if (ret < 0)
466 return ret;
467
4e843977
DB		 468 data->odr_bits = odr_bits;
469
fd3ae7a9
DB		 470 if (device & KMX61_ACC) {
471 ret = kmx61_set_wake_up_odr(data, val, val2);
472 if (ret)
473 return ret;
474 }
475
20ffac27
DB		 476 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
477}
478
479static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
480 u8 device)
481{ int i;
482 u8 lodr_bits;
483
484 if (device & KMX61_ACC)
485 lodr_bits = (data->odr_bits >> KMX61_ACC_ODR_SHIFT) &
486 KMX61_ACC_ODR_MASK;
487 else if (device & KMX61_MAG)
488 lodr_bits = (data->odr_bits >> KMX61_MAG_ODR_SHIFT) &
489 KMX61_MAG_ODR_MASK;
490 else
491 return -EINVAL;
492
493 for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
494 if (lodr_bits == kmx61_samp_freq_table[i].odr_bits) {
495 *val = kmx61_samp_freq_table[i].val;
496 *val2 = kmx61_samp_freq_table[i].val2;
497 return 0;
498 }
499 return -EINVAL;
500}
501
502static int kmx61_set_range(struct kmx61_data *data, u8 range)
503{
504 int ret;
505
506 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
507 if (ret < 0) {
508 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
509 return ret;
510 }
511
512 ret &= ~KMX61_REG_CTRL1_GSEL_MASK;
513 ret |= range & KMX61_REG_CTRL1_GSEL_MASK;
514
515 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
516 if (ret < 0) {
517 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
518 return ret;
519 }
520
521 data->range = range;
522
523 return 0;
524}
525
526static int kmx61_set_scale(struct kmx61_data *data, u16 uscale)
527{
528 int ret, i;
529 u8 mode;
530
531 for (i = 0; i < ARRAY_SIZE(kmx61_uscale_table); i++) {
532 if (kmx61_uscale_table[i] == uscale) {
533 ret = kmx61_get_mode(data, &mode,
534 KMX61_ACC | KMX61_MAG);
535 if (ret < 0)
536 return ret;
537
538 ret = kmx61_set_mode(data, KMX61_ALL_STBY,
539 KMX61_ACC | KMX61_MAG, true);
540 if (ret < 0)
541 return ret;
542
543 ret = kmx61_set_range(data, i);
544 if (ret < 0)
545 return ret;
546
547 return kmx61_set_mode(data, mode,
548 KMX61_ACC | KMX61_MAG, true);
549 }
550 }
551 return -EINVAL;
552}
553
554static int kmx61_chip_init(struct kmx61_data *data)
555{
fd3ae7a9 556 int ret, val, val2;
20ffac27
DB		 557
558 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_WHO_AM_I);
559 if (ret < 0) {
560 dev_err(&data->client->dev, "Error reading who_am_i\n");
561 return ret;
562 }
563
564 if (ret != KMX61_CHIP_ID) {
565 dev_err(&data->client->dev,
566 "Wrong chip id, got %x expected %x\n",
567 ret, KMX61_CHIP_ID);
568 return -EINVAL;
569 }
570
571 /* set accel 12bit, 4g range */
572 ret = kmx61_set_range(data, KMX61_RANGE_4G);
573 if (ret < 0)
574 return ret;
575
576 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_ODCNTL);
577 if (ret < 0) {
578 dev_err(&data->client->dev, "Error reading reg_odcntl\n");
579 return ret;
580 }
581 data->odr_bits = ret;
582
fd3ae7a9
DB		 583 /* set output data rate for wake up (motion detection) function */
584 ret = kmx61_convert_bit_to_freq(data->odr_bits, &val, &val2);
585 if (ret < 0)
586 return ret;
587
588 ret = kmx61_set_wake_up_odr(data, val, val2);
589 if (ret < 0)
590 return ret;
591
20ffac27
DB		 592 /* set acc/magn to OPERATION mode */
593 ret = kmx61_set_mode(data, 0, KMX61_ACC | KMX61_MAG, true);
594 if (ret < 0)
595 return ret;
596
fd3ae7a9
DB		 597 data->wake_thresh = KMX61_DEFAULT_WAKE_THRESH;
598 data->wake_duration = KMX61_DEFAULT_WAKE_DURATION;
599
20ffac27
DB		 600 return 0;
601}
602
c3a23ecc
DB		 603static int kmx61_setup_new_data_interrupt(struct kmx61_data *data,
604 bool status, u8 device)
605{
606 u8 mode;
607 int ret;
608
609 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
610 if (ret < 0)
611 return ret;
612
613 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
614 if (ret < 0)
615 return ret;
616
617 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
618 if (ret < 0) {
619 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
620 return ret;
621 }
622
623 if (status) {
624 ret |= KMX61_REG_INC1_BIT_IEN;
625 if (device & KMX61_ACC)
626 ret |= KMX61_REG_INC1_BIT_DRDYA;
627 if (device & KMX61_MAG)
628 ret |= KMX61_REG_INC1_BIT_DRDYM;
629 } else {
630 ret &= ~KMX61_REG_INC1_BIT_IEN;
631 if (device & KMX61_ACC)
632 ret &= ~KMX61_REG_INC1_BIT_DRDYA;
633 if (device & KMX61_MAG)
634 ret &= ~KMX61_REG_INC1_BIT_DRDYM;
635 }
636 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
637 if (ret < 0) {
638 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
639 return ret;
640 }
641
642 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
643 if (ret < 0) {
644 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
645 return ret;
646 }
647
648 if (status)
649 ret |= KMX61_REG_CTRL1_BIT_DRDYE;
650 else
651 ret &= ~KMX61_REG_CTRL1_BIT_DRDYE;
652
653 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
654 if (ret < 0) {
655 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
656 return ret;
657 }
658
28ff344e 659 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
c3a23ecc
DB		 660}
661
fd3ae7a9
DB		 662static int kmx61_chip_update_thresholds(struct kmx61_data *data)
663{
664 int ret;
665
666 ret = i2c_smbus_write_byte_data(data->client,
667 KMX61_REG_WUF_TIMER,
668 data->wake_duration);
669 if (ret < 0) {
670 dev_err(&data->client->dev, "Errow writing reg_wuf_timer\n");
671 return ret;
672 }
673
674 ret = i2c_smbus_write_byte_data(data->client,
675 KMX61_REG_WUF_THRESH,
676 data->wake_thresh);
28ff344e 677 if (ret < 0)
fd3ae7a9 678 dev_err(&data->client->dev, "Error writing reg_wuf_thresh\n");
fd3ae7a9 679
28ff344e 680 return ret;
fd3ae7a9
DB		 681}
682
683static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
0475c685 684 bool status)
fd3ae7a9
DB		 685{
686 u8 mode;
687 int ret;
688
689 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
690 if (ret < 0)
691 return ret;
692
693 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
694 if (ret < 0)
695 return ret;
696
697 ret = kmx61_chip_update_thresholds(data);
698 if (ret < 0)
699 return ret;
700
701 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
702 if (ret < 0) {
703 dev_err(&data->client->dev, "Error reading reg_inc1\n");
704 return ret;
705 }
706 if (status)
707 ret |= (KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
708 else
709 ret &= ~(KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
710
711 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
712 if (ret < 0) {
713 dev_err(&data->client->dev, "Error writing reg_inc1\n");
714 return ret;
715 }
716
717 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
718 if (ret < 0) {
719 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
720 return ret;
721 }
722
723 if (status)
724 ret |= KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE;
725 else
726 ret &= ~(KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE);
727
728 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
729 if (ret < 0) {
730 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
731 return ret;
732 }
733 mode |= KMX61_ACT_STBY_BIT;
28ff344e 734 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
fd3ae7a9
DB		 735}
736
aff8609a
DB		 737/**
738 * kmx61_set_power_state() - set power state for kmx61 @device
739 * @data - kmx61 device private pointer
740 * @on - power state to be set for @device
741 * @device - bitmask indicating device for which @on state needs to be set
742 *
743 * Notice that when ACC power state needs to be set to ON and MAG is in
744 * OPERATION then we know that kmx61_runtime_resume was already called
745 * so we must set ACC OPERATION mode here. The same happens when MAG power
746 * state needs to be set to ON and ACC is in OPERATION.
747 */
748static int kmx61_set_power_state(struct kmx61_data *data, bool on, u8 device)
749{
df1fad80 750#ifdef CONFIG_PM
aff8609a
DB		 751 int ret;
752
753 if (device & KMX61_ACC) {
754 if (on && !data->acc_ps && !data->mag_stby) {
755 ret = kmx61_set_mode(data, 0, KMX61_ACC, true);
756 if (ret < 0)
757 return ret;
758 }
759 data->acc_ps = on;
760 }
761 if (device & KMX61_MAG) {
762 if (on && !data->mag_ps && !data->acc_stby) {
763 ret = kmx61_set_mode(data, 0, KMX61_MAG, true);
764 if (ret < 0)
765 return ret;
766 }
767 data->mag_ps = on;
768 }
769
770 if (on) {
771 ret = pm_runtime_get_sync(&data->client->dev);
772 } else {
773 pm_runtime_mark_last_busy(&data->client->dev);
774 ret = pm_runtime_put_autosuspend(&data->client->dev);
775 }
776 if (ret < 0) {
777 dev_err(&data->client->dev,
778 "Failed: kmx61_set_power_state for %d, ret %d\n",
779 on, ret);
780 if (on)
781 pm_runtime_put_noidle(&data->client->dev);
782
783 return ret;
784 }
785#endif
786 return 0;
787}
788
20ffac27
DB		 789static int kmx61_read_measurement(struct kmx61_data *data, u8 base, u8 offset)
790{
791 int ret;
792 u8 reg = base + offset * 2;
793
794 ret = i2c_smbus_read_word_data(data->client, reg);
795 if (ret < 0)
796 dev_err(&data->client->dev, "failed to read reg at %x\n", reg);
797
798 return ret;
799}
800
801static int kmx61_read_raw(struct iio_dev *indio_dev,
802 struct iio_chan_spec const *chan, int *val,
803 int *val2, long mask)
804{
805 int ret;
806 u8 base_reg;
807 struct kmx61_data *data = kmx61_get_data(indio_dev);
808
809 switch (mask) {
810 case IIO_CHAN_INFO_RAW:
811 switch (chan->type) {
812 case IIO_ACCEL:
813 base_reg = KMX61_ACC_XOUT_L;
814 break;
815 case IIO_MAGN:
816 base_reg = KMX61_MAG_XOUT_L;
817 break;
818 default:
819 return -EINVAL;
820 }
821 mutex_lock(&data->lock);
822
a3da4fa3
DB		 823 ret = kmx61_set_power_state(data, true, chan->address);
824 if (ret) {
825 mutex_unlock(&data->lock);
826 return ret;
827 }
828
20ffac27
DB		 829 ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
830 if (ret < 0) {
aff8609a 831 kmx61_set_power_state(data, false, chan->address);
20ffac27
DB		 832 mutex_unlock(&data->lock);
833 return ret;
834 }
835 *val = sign_extend32(ret >> chan->scan_type.shift,
836 chan->scan_type.realbits - 1);
a3da4fa3 837 ret = kmx61_set_power_state(data, false, chan->address);
20ffac27
DB		 838
839 mutex_unlock(&data->lock);
a3da4fa3
DB		 840 if (ret)
841 return ret;
20ffac27
DB		 842 return IIO_VAL_INT;
843 case IIO_CHAN_INFO_SCALE:
844 switch (chan->type) {
845 case IIO_ACCEL:
846 *val = 0;
847 *val2 = kmx61_uscale_table[data->range];
848 return IIO_VAL_INT_PLUS_MICRO;
849 case IIO_MAGN:
850 /* 14 bits res, 1465 microGauss per magn count */
851 *val = 0;
852 *val2 = 1465;
853 return IIO_VAL_INT_PLUS_MICRO;
854 default:
855 return -EINVAL;
856 }
857 case IIO_CHAN_INFO_SAMP_FREQ:
858 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
859 return -EINVAL;
860
861 mutex_lock(&data->lock);
862 ret = kmx61_get_odr(data, val, val2, chan->address);
863 mutex_unlock(&data->lock);
864 if (ret)
865 return -EINVAL;
866 return IIO_VAL_INT_PLUS_MICRO;
867 }
868 return -EINVAL;
869}
870
871static int kmx61_write_raw(struct iio_dev *indio_dev,
872 struct iio_chan_spec const *chan, int val,
873 int val2, long mask)
874{
875 int ret;
876 struct kmx61_data *data = kmx61_get_data(indio_dev);
877
878 switch (mask) {
879 case IIO_CHAN_INFO_SAMP_FREQ:
880 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
881 return -EINVAL;
882
883 mutex_lock(&data->lock);
884 ret = kmx61_set_odr(data, val, val2, chan->address);
885 mutex_unlock(&data->lock);
886 return ret;
887 case IIO_CHAN_INFO_SCALE:
888 switch (chan->type) {
889 case IIO_ACCEL:
890 if (val != 0)
891 return -EINVAL;
892 mutex_lock(&data->lock);
893 ret = kmx61_set_scale(data, val2);
894 mutex_unlock(&data->lock);
895 return ret;
896 default:
897 return -EINVAL;
898 }
899 default:
900 return -EINVAL;
901 }
902}
903
fd3ae7a9
DB		 904static int kmx61_read_event(struct iio_dev *indio_dev,
905 const struct iio_chan_spec *chan,
906 enum iio_event_type type,
907 enum iio_event_direction dir,
908 enum iio_event_info info,
909 int *val, int *val2)
910{
911 struct kmx61_data *data = kmx61_get_data(indio_dev);
912
913 *val2 = 0;
914 switch (info) {
915 case IIO_EV_INFO_VALUE:
916 *val = data->wake_thresh;
28ff344e 917 return IIO_VAL_INT;
fd3ae7a9
DB		 918 case IIO_EV_INFO_PERIOD:
919 *val = data->wake_duration;
28ff344e 920 return IIO_VAL_INT;
fd3ae7a9
DB		 921 default:
922 return -EINVAL;
923 }
fd3ae7a9
DB		 924}
925
926static int kmx61_write_event(struct iio_dev *indio_dev,
dfb12ede
DB		 927 const struct iio_chan_spec *chan,
928 enum iio_event_type type,
929 enum iio_event_direction dir,
930 enum iio_event_info info,
931 int val, int val2)
fd3ae7a9
DB		 932{
933 struct kmx61_data *data = kmx61_get_data(indio_dev);
934
935 if (data->ev_enable_state)
936 return -EBUSY;
937
938 switch (info) {
939 case IIO_EV_INFO_VALUE:
940 data->wake_thresh = val;
28ff344e 941 return IIO_VAL_INT;
fd3ae7a9
DB		 942 case IIO_EV_INFO_PERIOD:
943 data->wake_duration = val;
28ff344e 944 return IIO_VAL_INT;
fd3ae7a9
DB		 945 default:
946 return -EINVAL;
947 }
fd3ae7a9
DB		 948}
949
950static int kmx61_read_event_config(struct iio_dev *indio_dev,
951 const struct iio_chan_spec *chan,
952 enum iio_event_type type,
953 enum iio_event_direction dir)
954{
955 struct kmx61_data *data = kmx61_get_data(indio_dev);
956
957 return data->ev_enable_state;
958}
959
960static int kmx61_write_event_config(struct iio_dev *indio_dev,
dfb12ede
DB		 961 const struct iio_chan_spec *chan,
962 enum iio_event_type type,
963 enum iio_event_direction dir,
964 int state)
fd3ae7a9
DB		 965{
966 struct kmx61_data *data = kmx61_get_data(indio_dev);
28ff344e 967 int ret = 0;
fd3ae7a9
DB		 968
969 if (state && data->ev_enable_state)
970 return 0;
971
972 mutex_lock(&data->lock);
973
974 if (!state && data->motion_trig_on) {
d4a4ae04 975 data->ev_enable_state = false;
28ff344e 976 goto err_unlock;
fd3ae7a9
DB		 977 }
978
979 ret = kmx61_set_power_state(data, state, KMX61_ACC);
28ff344e
DB		 980 if (ret < 0)
981 goto err_unlock;
fd3ae7a9 982
0475c685 983 ret = kmx61_setup_any_motion_interrupt(data, state);
fd3ae7a9
DB		 984 if (ret < 0) {
985 kmx61_set_power_state(data, false, KMX61_ACC);
28ff344e 986 goto err_unlock;
fd3ae7a9
DB		 987 }
988
989 data->ev_enable_state = state;
28ff344e
DB		 990
991err_unlock:
fd3ae7a9
DB		 992 mutex_unlock(&data->lock);
993
28ff344e 994 return ret;
fd3ae7a9
DB		 995}
996
c3a23ecc
DB		 997static int kmx61_acc_validate_trigger(struct iio_dev *indio_dev,
998 struct iio_trigger *trig)
999{
1000 struct kmx61_data *data = kmx61_get_data(indio_dev);
1001
fd3ae7a9 1002 if (data->acc_dready_trig != trig && data->motion_trig != trig)
c3a23ecc
DB		 1003 return -EINVAL;
1004
1005 return 0;
1006}
1007
1008static int kmx61_mag_validate_trigger(struct iio_dev *indio_dev,
1009 struct iio_trigger *trig)
1010{
1011 struct kmx61_data *data = kmx61_get_data(indio_dev);
1012
1013 if (data->mag_dready_trig != trig)
1014 return -EINVAL;
1015
1016 return 0;
1017}
1018
20ffac27
DB		 1019static const struct iio_info kmx61_acc_info = {
1020 .driver_module = THIS_MODULE,
1021 .read_raw = kmx61_read_raw,
1022 .write_raw = kmx61_write_raw,
1023 .attrs = &kmx61_acc_attribute_group,
fd3ae7a9
DB		 1024 .read_event_value = kmx61_read_event,
1025 .write_event_value = kmx61_write_event,
1026 .read_event_config = kmx61_read_event_config,
1027 .write_event_config = kmx61_write_event_config,
c3a23ecc 1028 .validate_trigger = kmx61_acc_validate_trigger,
20ffac27
DB		 1029};
1030
1031static const struct iio_info kmx61_mag_info = {
1032 .driver_module = THIS_MODULE,
1033 .read_raw = kmx61_read_raw,
1034 .write_raw = kmx61_write_raw,
1035 .attrs = &kmx61_mag_attribute_group,
c3a23ecc 1036 .validate_trigger = kmx61_mag_validate_trigger,
20ffac27
DB		 1037};
1038
c3a23ecc
DB		 1039
1040static int kmx61_data_rdy_trigger_set_state(struct iio_trigger *trig,
1041 bool state)
1042{
1043 int ret = 0;
1044 u8 device;
1045
1046 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
fd3ae7a9 1047 struct kmx61_data *data = kmx61_get_data(indio_dev);
c3a23ecc
DB		 1048
1049 mutex_lock(&data->lock);
1050
fd3ae7a9
DB		 1051 if (!state && data->ev_enable_state && data->motion_trig_on) {
1052 data->motion_trig_on = false;
28ff344e 1053 goto err_unlock;
fd3ae7a9
DB		 1054 }
1055
dbdd0e2d 1056 if (data->acc_dready_trig == trig || data->motion_trig == trig)
c3a23ecc
DB		 1057 device = KMX61_ACC;
1058 else
1059 device = KMX61_MAG;
1060
1061 ret = kmx61_set_power_state(data, state, device);
28ff344e
DB		 1062 if (ret < 0)
1063 goto err_unlock;
c3a23ecc 1064
fd3ae7a9
DB		 1065 if (data->acc_dready_trig == trig || data->mag_dready_trig == trig)
1066 ret = kmx61_setup_new_data_interrupt(data, state, device);
1067 else
0475c685 1068 ret = kmx61_setup_any_motion_interrupt(data, state);
c3a23ecc
DB		 1069 if (ret < 0) {
1070 kmx61_set_power_state(data, false, device);
28ff344e 1071 goto err_unlock;
c3a23ecc
DB		 1072 }
1073
1074 if (data->acc_dready_trig == trig)
1075 data->acc_dready_trig_on = state;
fd3ae7a9 1076 else if (data->mag_dready_trig == trig)
c3a23ecc 1077 data->mag_dready_trig_on = state;
fd3ae7a9
DB		 1078 else
1079 data->motion_trig_on = state;
28ff344e 1080err_unlock:
c3a23ecc
DB		 1081 mutex_unlock(&data->lock);
1082
28ff344e 1083 return ret;
c3a23ecc
DB		 1084}
1085
1086static int kmx61_trig_try_reenable(struct iio_trigger *trig)
1087{
1088 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1089 struct kmx61_data *data = kmx61_get_data(indio_dev);
1090 int ret;
1091
1092 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1093 if (ret < 0) {
1094 dev_err(&data->client->dev, "Error reading reg_inl\n");
1095 return ret;
1096 }
1097
1098 return 0;
1099}
1100
1101static const struct iio_trigger_ops kmx61_trigger_ops = {
1102 .set_trigger_state = kmx61_data_rdy_trigger_set_state,
1103 .try_reenable = kmx61_trig_try_reenable,
1104 .owner = THIS_MODULE,
1105};
1106
fd3ae7a9
DB		 1107static irqreturn_t kmx61_event_handler(int irq, void *private)
1108{
1109 struct kmx61_data *data = private;
1110 struct iio_dev *indio_dev = data->acc_indio_dev;
1111 int ret;
1112
1113 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS1);
1114 if (ret < 0) {
1115 dev_err(&data->client->dev, "Error reading reg_ins1\n");
1116 goto ack_intr;
1117 }
1118
1119 if (ret & KMX61_REG_INS1_BIT_WUFS) {
1120 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS2);
1121 if (ret < 0) {
1122 dev_err(&data->client->dev, "Error reading reg_ins2\n");
1123 goto ack_intr;
1124 }
1125
1126 if (ret & KMX61_REG_INS2_BIT_XN)
1127 iio_push_event(indio_dev,
1128 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1129 0,
1130 IIO_MOD_X,
1131 IIO_EV_TYPE_THRESH,
1132 IIO_EV_DIR_FALLING),
1133 0);
1134
1135 if (ret & KMX61_REG_INS2_BIT_XP)
1136 iio_push_event(indio_dev,
1137 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1138 0,
1139 IIO_MOD_X,
1140 IIO_EV_TYPE_THRESH,
1141 IIO_EV_DIR_RISING),
1142 0);
1143
1144 if (ret & KMX61_REG_INS2_BIT_YN)
1145 iio_push_event(indio_dev,
1146 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1147 0,
1148 IIO_MOD_Y,
1149 IIO_EV_TYPE_THRESH,
1150 IIO_EV_DIR_FALLING),
1151 0);
1152
1153 if (ret & KMX61_REG_INS2_BIT_YP)
1154 iio_push_event(indio_dev,
1155 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1156 0,
1157 IIO_MOD_Y,
1158 IIO_EV_TYPE_THRESH,
1159 IIO_EV_DIR_RISING),
1160 0);
1161
1162 if (ret & KMX61_REG_INS2_BIT_ZN)
1163 iio_push_event(indio_dev,
1164 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1165 0,
1166 IIO_MOD_Z,
1167 IIO_EV_TYPE_THRESH,
1168 IIO_EV_DIR_FALLING),
1169 0);
1170
1171 if (ret & KMX61_REG_INS2_BIT_ZP)
1172 iio_push_event(indio_dev,
1173 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1174 0,
1175 IIO_MOD_Z,
1176 IIO_EV_TYPE_THRESH,
1177 IIO_EV_DIR_RISING),
1178 0);
1179 }
1180
1181ack_intr:
1182 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
1183 if (ret < 0)
1184 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
1185
1186 ret |= KMX61_REG_CTRL1_BIT_RES;
1187 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
1188 if (ret < 0)
28ff344e 1189 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
fd3ae7a9
DB		 1190
1191 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1192 if (ret < 0)
1193 dev_err(&data->client->dev, "Error reading reg_inl\n");
1194
fd3ae7a9
DB		 1195 return IRQ_HANDLED;
1196}
1197
c3a23ecc
DB		 1198static irqreturn_t kmx61_data_rdy_trig_poll(int irq, void *private)
1199{
1200 struct kmx61_data *data = private;
1201
1202 if (data->acc_dready_trig_on)
1203 iio_trigger_poll(data->acc_dready_trig);
1204 if (data->mag_dready_trig_on)
1205 iio_trigger_poll(data->mag_dready_trig);
1206
fd3ae7a9
DB		 1207 if (data->motion_trig_on)
1208 iio_trigger_poll(data->motion_trig);
1209
1210 if (data->ev_enable_state)
1211 return IRQ_WAKE_THREAD;
c3a23ecc
DB		 1212 return IRQ_HANDLED;
1213}
1214
1215static irqreturn_t kmx61_trigger_handler(int irq, void *p)
1216{
1217 struct iio_poll_func *pf = p;
1218 struct iio_dev *indio_dev = pf->indio_dev;
1219 struct kmx61_data *data = kmx61_get_data(indio_dev);
1220 int bit, ret, i = 0;
6a191c70 1221 u8 base;
c3a23ecc
DB		 1222 s16 buffer[8];
1223
6a191c70
DB		 1224 if (indio_dev == data->acc_indio_dev)
1225 base = KMX61_ACC_XOUT_L;
1226 else
1227 base = KMX61_MAG_XOUT_L;
1228
c3a23ecc
DB		 1229 mutex_lock(&data->lock);
1230 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
1231 indio_dev->masklength) {
6a191c70 1232 ret = kmx61_read_measurement(data, base, bit);
c3a23ecc
DB		 1233 if (ret < 0) {
1234 mutex_unlock(&data->lock);
1235 goto err;
1236 }
1237 buffer[i++] = ret;
1238 }
1239 mutex_unlock(&data->lock);
1240
1241 iio_push_to_buffers(indio_dev, buffer);
1242err:
1243 iio_trigger_notify_done(indio_dev->trig);
1244
1245 return IRQ_HANDLED;
1246}
1247
b25862c5
DB		 1248static const char *kmx61_match_acpi_device(struct device *dev)
1249{
1250 const struct acpi_device_id *id;
1251
1252 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1253 if (!id)
1254 return NULL;
1255 return dev_name(dev);
1256}
1257
1258static int kmx61_gpio_probe(struct i2c_client *client, struct kmx61_data *data)
1259{
1260 struct device *dev;
1261 struct gpio_desc *gpio;
1262 int ret;
1263
1264 if (!client)
1265 return -EINVAL;
1266
1267 dev = &client->dev;
1268
1269 /* data ready gpio interrupt pin */
1270 gpio = devm_gpiod_get_index(dev, KMX61_GPIO_NAME, 0);
1271 if (IS_ERR(gpio)) {
1272 dev_err(dev, "acpi gpio get index failed\n");
1273 return PTR_ERR(gpio);
1274 }
1275
1276 ret = gpiod_direction_input(gpio);
1277 if (ret)
1278 return ret;
1279
1280 ret = gpiod_to_irq(gpio);
1281
1282 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1283 return ret;
1284}
1285
20ffac27
DB		 1286static struct iio_dev *kmx61_indiodev_setup(struct kmx61_data *data,
1287 const struct iio_info *info,
1288 const struct iio_chan_spec *chan,
1289 int num_channels,
1290 const char *name)
1291{
1292 struct iio_dev *indio_dev;
1293
1294 indio_dev = devm_iio_device_alloc(&data->client->dev, sizeof(data));
1295 if (!indio_dev)
1296 return ERR_PTR(-ENOMEM);
1297
1298 kmx61_set_data(indio_dev, data);
1299
1300 indio_dev->dev.parent = &data->client->dev;
1301 indio_dev->channels = chan;
1302 indio_dev->num_channels = num_channels;
1303 indio_dev->name = name;
1304 indio_dev->modes = INDIO_DIRECT_MODE;
1305 indio_dev->info = info;
1306
1307 return indio_dev;
1308}
1309
c3a23ecc
DB		 1310static struct iio_trigger *kmx61_trigger_setup(struct kmx61_data *data,
1311 struct iio_dev *indio_dev,
1312 const char *tag)
1313{
1314 struct iio_trigger *trig;
1315 int ret;
1316
1317 trig = devm_iio_trigger_alloc(&data->client->dev,
1318 "%s-%s-dev%d",
1319 indio_dev->name,
1320 tag,
1321 indio_dev->id);
1322 if (!trig)
1323 return ERR_PTR(-ENOMEM);
1324
1325 trig->dev.parent = &data->client->dev;
1326 trig->ops = &kmx61_trigger_ops;
1327 iio_trigger_set_drvdata(trig, indio_dev);
1328
1329 ret = iio_trigger_register(trig);
1330 if (ret)
1331 return ERR_PTR(ret);
1332
1333 return trig;
1334}
1335
20ffac27
DB		 1336static int kmx61_probe(struct i2c_client *client,
1337 const struct i2c_device_id *id)
1338{
1339 int ret;
1340 struct kmx61_data *data;
1341 const char *name = NULL;
1342
1343 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
1344 if (!data)
1345 return -ENOMEM;
1346
1347 i2c_set_clientdata(client, data);
1348 data->client = client;
1349
1350 mutex_init(&data->lock);
1351
b25862c5
DB		 1352 if (id)
1353 name = id->name;
1354 else if (ACPI_HANDLE(&client->dev))
1355 name = kmx61_match_acpi_device(&client->dev);
1356 else
1357 return -ENODEV;
1358
20ffac27
DB		 1359 data->acc_indio_dev =
1360 kmx61_indiodev_setup(data, &kmx61_acc_info,
1361 kmx61_acc_channels,
1362 ARRAY_SIZE(kmx61_acc_channels),
1363 name);
1364 if (IS_ERR(data->acc_indio_dev))
1365 return PTR_ERR(data->acc_indio_dev);
1366
1367 data->mag_indio_dev =
1368 kmx61_indiodev_setup(data, &kmx61_mag_info,
1369 kmx61_mag_channels,
1370 ARRAY_SIZE(kmx61_mag_channels),
1371 name);
1372 if (IS_ERR(data->mag_indio_dev))
1373 return PTR_ERR(data->mag_indio_dev);
1374
1375 ret = kmx61_chip_init(data);
1376 if (ret < 0)
1377 return ret;
1378
b25862c5
DB		 1379 if (client->irq < 0)
1380 client->irq = kmx61_gpio_probe(client, data);
1381
c3a23ecc
DB		 1382 if (client->irq >= 0) {
1383 ret = devm_request_threaded_irq(&client->dev, client->irq,
1384 kmx61_data_rdy_trig_poll,
fd3ae7a9 1385 kmx61_event_handler,
c3a23ecc
DB		 1386 IRQF_TRIGGER_RISING,
1387 KMX61_IRQ_NAME,
1388 data);
1389 if (ret)
1390 goto err_chip_uninit;
1391
1392 data->acc_dready_trig =
1393 kmx61_trigger_setup(data, data->acc_indio_dev,
1394 "dready");
28ff344e
DB		 1395 if (IS_ERR(data->acc_dready_trig)) {
1396 ret = PTR_ERR(data->acc_dready_trig);
1397 goto err_chip_uninit;
1398 }
c3a23ecc
DB		 1399
1400 data->mag_dready_trig =
1401 kmx61_trigger_setup(data, data->mag_indio_dev,
1402 "dready");
1403 if (IS_ERR(data->mag_dready_trig)) {
1404 ret = PTR_ERR(data->mag_dready_trig);
28ff344e 1405 goto err_trigger_unregister_acc_dready;
c3a23ecc
DB		 1406 }
1407
fd3ae7a9
DB		 1408 data->motion_trig =
1409 kmx61_trigger_setup(data, data->acc_indio_dev,
1410 "any-motion");
1411 if (IS_ERR(data->motion_trig)) {
1412 ret = PTR_ERR(data->motion_trig);
28ff344e 1413 goto err_trigger_unregister_mag_dready;
fd3ae7a9
DB		 1414 }
1415
c3a23ecc
DB		 1416 ret = iio_triggered_buffer_setup(data->acc_indio_dev,
1417 &iio_pollfunc_store_time,
1418 kmx61_trigger_handler,
1419 NULL);
1420 if (ret < 0) {
1421 dev_err(&data->client->dev,
1422 "Failed to setup acc triggered buffer\n");
28ff344e 1423 goto err_trigger_unregister_motion;
c3a23ecc
DB		 1424 }
1425
1426 ret = iio_triggered_buffer_setup(data->mag_indio_dev,
1427 &iio_pollfunc_store_time,
1428 kmx61_trigger_handler,
1429 NULL);
1430 if (ret < 0) {
1431 dev_err(&data->client->dev,
1432 "Failed to setup mag triggered buffer\n");
28ff344e 1433 goto err_buffer_cleanup_acc;
c3a23ecc
DB		 1434 }
1435 }
1436
20ffac27
DB		 1437 ret = iio_device_register(data->acc_indio_dev);
1438 if (ret < 0) {
1439 dev_err(&client->dev, "Failed to register acc iio device\n");
28ff344e 1440 goto err_buffer_cleanup_mag;
20ffac27
DB		 1441 }
1442
1443 ret = iio_device_register(data->mag_indio_dev);
1444 if (ret < 0) {
1445 dev_err(&client->dev, "Failed to register mag iio device\n");
aff8609a 1446 goto err_iio_unregister_acc;
20ffac27
DB		 1447 }
1448
aff8609a
DB		 1449 ret = pm_runtime_set_active(&client->dev);
1450 if (ret < 0)
1451 goto err_iio_unregister_mag;
1452
1453 pm_runtime_enable(&client->dev);
1454 pm_runtime_set_autosuspend_delay(&client->dev, KMX61_SLEEP_DELAY_MS);
1455 pm_runtime_use_autosuspend(&client->dev);
1456
20ffac27
DB		 1457 return 0;
1458
aff8609a
DB		 1459err_iio_unregister_mag:
1460 iio_device_unregister(data->mag_indio_dev);
1461err_iio_unregister_acc:
20ffac27 1462 iio_device_unregister(data->acc_indio_dev);
28ff344e
DB		 1463err_buffer_cleanup_mag:
1464 if (client->irq >= 0)
c3a23ecc 1465 iio_triggered_buffer_cleanup(data->mag_indio_dev);
28ff344e
DB		 1466err_buffer_cleanup_acc:
1467 if (client->irq >= 0)
1468 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1469err_trigger_unregister_motion:
1470 iio_trigger_unregister(data->motion_trig);
1471err_trigger_unregister_mag_dready:
1472 iio_trigger_unregister(data->mag_dready_trig);
1473err_trigger_unregister_acc_dready:
1474 iio_trigger_unregister(data->acc_dready_trig);
20ffac27
DB		 1475err_chip_uninit:
1476 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1477 return ret;
1478}
1479
1480static int kmx61_remove(struct i2c_client *client)
1481{
1482 struct kmx61_data *data = i2c_get_clientdata(client);
1483
aff8609a
DB		 1484 pm_runtime_disable(&client->dev);
1485 pm_runtime_set_suspended(&client->dev);
1486 pm_runtime_put_noidle(&client->dev);
1487
20ffac27
DB		 1488 iio_device_unregister(data->acc_indio_dev);
1489 iio_device_unregister(data->mag_indio_dev);
1490
c3a23ecc
DB		 1491 if (client->irq >= 0) {
1492 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1493 iio_triggered_buffer_cleanup(data->mag_indio_dev);
1494 iio_trigger_unregister(data->acc_dready_trig);
1495 iio_trigger_unregister(data->mag_dready_trig);
fd3ae7a9 1496 iio_trigger_unregister(data->motion_trig);
c3a23ecc
DB		 1497 }
1498
20ffac27
DB		 1499 mutex_lock(&data->lock);
1500 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1501 mutex_unlock(&data->lock);
1502
1503 return 0;
1504}
1505
3b9c40e6
DB		 1506#ifdef CONFIG_PM_SLEEP
1507static int kmx61_suspend(struct device *dev)
1508{
1509 int ret;
1510 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1511
1512 mutex_lock(&data->lock);
1513 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
1514 false);
1515 mutex_unlock(&data->lock);
1516
1517 return ret;
1518}
1519
1520static int kmx61_resume(struct device *dev)
1521{
1522 u8 stby = 0;
1523 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1524
1525 if (data->acc_stby)
1526 stby |= KMX61_ACC_STBY_BIT;
1527 if (data->mag_stby)
1528 stby |= KMX61_MAG_STBY_BIT;
1529
1530 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1531}
1532#endif
aff8609a 1533
df1fad80 1534#ifdef CONFIG_PM
aff8609a
DB		 1535static int kmx61_runtime_suspend(struct device *dev)
1536{
1537 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1538 int ret;
1539
1540 mutex_lock(&data->lock);
1541 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1542 mutex_unlock(&data->lock);
1543
1544 return ret;
1545}
1546
1547static int kmx61_runtime_resume(struct device *dev)
1548{
1549 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1550 u8 stby = 0;
1551
1552 if (!data->acc_ps)
1553 stby |= KMX61_ACC_STBY_BIT;
1554 if (!data->mag_ps)
1555 stby |= KMX61_MAG_STBY_BIT;
1556
1557 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1558}
1559#endif
1560
1561static const struct dev_pm_ops kmx61_pm_ops = {
3b9c40e6 1562 SET_SYSTEM_SLEEP_PM_OPS(kmx61_suspend, kmx61_resume)
aff8609a
DB		 1563 SET_RUNTIME_PM_OPS(kmx61_runtime_suspend, kmx61_runtime_resume, NULL)
1564};
1565
b25862c5
DB		 1566static const struct acpi_device_id kmx61_acpi_match[] = {
1567 {"KMX61021", 0},
1568 {}
1569};
1570
1571MODULE_DEVICE_TABLE(acpi, kmx61_acpi_match);
1572
20ffac27
DB		 1573static const struct i2c_device_id kmx61_id[] = {
1574 {"kmx611021", 0},
1575 {}
1576};
1577
1578MODULE_DEVICE_TABLE(i2c, kmx61_id);
1579
1580static struct i2c_driver kmx61_driver = {
1581 .driver = {
1582 .name = KMX61_DRV_NAME,
b25862c5 1583 .acpi_match_table = ACPI_PTR(kmx61_acpi_match),
aff8609a 1584 .pm = &kmx61_pm_ops,
20ffac27
DB		 1585 },
1586 .probe = kmx61_probe,
1587 .remove = kmx61_remove,
1588 .id_table = kmx61_id,
1589};
1590
1591module_i2c_driver(kmx61_driver);
1592
1593MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1594MODULE_DESCRIPTION("KMX61 accelerometer/magnetometer driver");
1595MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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