Commit | Line | Data |
---|---|---|
2690be90 PM |
1 | /* |
2 | * ltr501.c - Support for Lite-On LTR501 ambient light and proximity sensor | |
3 | * | |
4 | * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> | |
5 | * | |
6 | * This file is subject to the terms and conditions of version 2 of | |
7 | * the GNU General Public License. See the file COPYING in the main | |
8 | * directory of this archive for more details. | |
9 | * | |
10 | * 7-bit I2C slave address 0x23 | |
11 | * | |
eea53b4a | 12 | * TODO: IR LED characteristics |
2690be90 PM |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/delay.h> | |
2f2c9633 | 19 | #include <linux/regmap.h> |
772154d0 | 20 | #include <linux/acpi.h> |
2690be90 PM |
21 | |
22 | #include <linux/iio/iio.h> | |
7ac702b3 | 23 | #include <linux/iio/events.h> |
2690be90 PM |
24 | #include <linux/iio/sysfs.h> |
25 | #include <linux/iio/trigger_consumer.h> | |
26 | #include <linux/iio/buffer.h> | |
27 | #include <linux/iio/triggered_buffer.h> | |
28 | ||
29 | #define LTR501_DRV_NAME "ltr501" | |
30 | ||
31 | #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */ | |
32 | #define LTR501_PS_CONTR 0x81 /* PS operation mode */ | |
eea53b4a | 33 | #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/ |
844b4702 | 34 | #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/ |
2690be90 PM |
35 | #define LTR501_PART_ID 0x86 |
36 | #define LTR501_MANUFAC_ID 0x87 | |
37 | #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */ | |
38 | #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */ | |
39 | #define LTR501_ALS_PS_STATUS 0x8c | |
40 | #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */ | |
7ac702b3 KS |
41 | #define LTR501_INTR 0x8f /* output mode, polarity, mode */ |
42 | #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */ | |
43 | #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */ | |
44 | #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */ | |
45 | #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */ | |
eea53b4a | 46 | #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */ |
2f2c9633 | 47 | #define LTR501_MAX_REG 0x9f |
2690be90 PM |
48 | |
49 | #define LTR501_ALS_CONTR_SW_RESET BIT(2) | |
50 | #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2)) | |
51 | #define LTR501_CONTR_PS_GAIN_SHIFT 2 | |
52 | #define LTR501_CONTR_ALS_GAIN_MASK BIT(3) | |
53 | #define LTR501_CONTR_ACTIVE BIT(1) | |
54 | ||
7ac702b3 | 55 | #define LTR501_STATUS_ALS_INTR BIT(3) |
2690be90 | 56 | #define LTR501_STATUS_ALS_RDY BIT(2) |
7ac702b3 | 57 | #define LTR501_STATUS_PS_INTR BIT(1) |
2690be90 PM |
58 | #define LTR501_STATUS_PS_RDY BIT(0) |
59 | ||
60 | #define LTR501_PS_DATA_MASK 0x7ff | |
7ac702b3 KS |
61 | #define LTR501_PS_THRESH_MASK 0x7ff |
62 | #define LTR501_ALS_THRESH_MASK 0xffff | |
2690be90 | 63 | |
eea53b4a KS |
64 | #define LTR501_ALS_DEF_PERIOD 500000 |
65 | #define LTR501_PS_DEF_PERIOD 100000 | |
66 | ||
2f2c9633 KS |
67 | #define LTR501_REGMAP_NAME "ltr501_regmap" |
68 | ||
c06cee8d KS |
69 | #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \ |
70 | ((vis_coeff * vis_data) - (ir_coeff * ir_data)) | |
71 | ||
844b4702 KS |
72 | static const int int_time_mapping[] = {100000, 50000, 200000, 400000}; |
73 | ||
74 | static const struct reg_field reg_field_it = | |
75 | REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4); | |
7ac702b3 KS |
76 | static const struct reg_field reg_field_als_intr = |
77 | REG_FIELD(LTR501_INTR, 0, 0); | |
78 | static const struct reg_field reg_field_ps_intr = | |
79 | REG_FIELD(LTR501_INTR, 1, 1); | |
eea53b4a KS |
80 | static const struct reg_field reg_field_als_rate = |
81 | REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2); | |
82 | static const struct reg_field reg_field_ps_rate = | |
83 | REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3); | |
84 | static const struct reg_field reg_field_als_prst = | |
85 | REG_FIELD(LTR501_INTR_PRST, 0, 3); | |
86 | static const struct reg_field reg_field_ps_prst = | |
87 | REG_FIELD(LTR501_INTR_PRST, 4, 7); | |
88 | ||
89 | struct ltr501_samp_table { | |
90 | int freq_val; /* repetition frequency in micro HZ*/ | |
91 | int time_val; /* repetition rate in micro seconds */ | |
92 | }; | |
844b4702 | 93 | |
8592a7ee DB |
94 | #define LTR501_RESERVED_GAIN -1 |
95 | ||
96 | enum { | |
97 | ltr501 = 0, | |
98 | ltr559, | |
035ebb15 | 99 | ltr301, |
8592a7ee DB |
100 | }; |
101 | ||
102 | struct ltr501_gain { | |
103 | int scale; | |
104 | int uscale; | |
105 | }; | |
106 | ||
107 | static struct ltr501_gain ltr501_als_gain_tbl[] = { | |
108 | {1, 0}, | |
109 | {0, 5000}, | |
110 | }; | |
111 | ||
112 | static struct ltr501_gain ltr559_als_gain_tbl[] = { | |
113 | {1, 0}, | |
114 | {0, 500000}, | |
115 | {0, 250000}, | |
116 | {0, 125000}, | |
117 | {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, | |
118 | {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, | |
119 | {0, 20000}, | |
120 | {0, 10000}, | |
121 | }; | |
122 | ||
123 | static struct ltr501_gain ltr501_ps_gain_tbl[] = { | |
124 | {1, 0}, | |
125 | {0, 250000}, | |
126 | {0, 125000}, | |
127 | {0, 62500}, | |
128 | }; | |
129 | ||
130 | static struct ltr501_gain ltr559_ps_gain_tbl[] = { | |
131 | {0, 62500}, /* x16 gain */ | |
132 | {0, 31250}, /* x32 gain */ | |
133 | {0, 15625}, /* bits X1 are for x64 gain */ | |
134 | {0, 15624}, | |
135 | }; | |
136 | ||
137 | struct ltr501_chip_info { | |
138 | u8 partid; | |
139 | struct ltr501_gain *als_gain; | |
140 | int als_gain_tbl_size; | |
141 | struct ltr501_gain *ps_gain; | |
142 | int ps_gain_tbl_size; | |
143 | u8 als_mode_active; | |
144 | u8 als_gain_mask; | |
145 | u8 als_gain_shift; | |
035ebb15 DB |
146 | struct iio_chan_spec const *channels; |
147 | const int no_channels; | |
148 | const struct iio_info *info; | |
149 | const struct iio_info *info_no_irq; | |
8592a7ee DB |
150 | }; |
151 | ||
2690be90 PM |
152 | struct ltr501_data { |
153 | struct i2c_client *client; | |
154 | struct mutex lock_als, lock_ps; | |
8592a7ee | 155 | struct ltr501_chip_info *chip_info; |
2690be90 | 156 | u8 als_contr, ps_contr; |
eea53b4a | 157 | int als_period, ps_period; /* period in micro seconds */ |
2f2c9633 | 158 | struct regmap *regmap; |
844b4702 | 159 | struct regmap_field *reg_it; |
7ac702b3 KS |
160 | struct regmap_field *reg_als_intr; |
161 | struct regmap_field *reg_ps_intr; | |
eea53b4a KS |
162 | struct regmap_field *reg_als_rate; |
163 | struct regmap_field *reg_ps_rate; | |
164 | struct regmap_field *reg_als_prst; | |
165 | struct regmap_field *reg_ps_prst; | |
166 | }; | |
167 | ||
168 | static const struct ltr501_samp_table ltr501_als_samp_table[] = { | |
169 | {20000000, 50000}, {10000000, 100000}, | |
170 | {5000000, 200000}, {2000000, 500000}, | |
171 | {1000000, 1000000}, {500000, 2000000}, | |
172 | {500000, 2000000}, {500000, 2000000} | |
2690be90 PM |
173 | }; |
174 | ||
eea53b4a KS |
175 | static const struct ltr501_samp_table ltr501_ps_samp_table[] = { |
176 | {20000000, 50000}, {14285714, 70000}, | |
177 | {10000000, 100000}, {5000000, 200000}, | |
178 | {2000000, 500000}, {1000000, 1000000}, | |
179 | {500000, 2000000}, {500000, 2000000}, | |
180 | {500000, 2000000} | |
181 | }; | |
182 | ||
c08ae185 | 183 | static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab, |
eea53b4a KS |
184 | int len, int val, int val2) |
185 | { | |
186 | int i, freq; | |
187 | ||
188 | freq = val * 1000000 + val2; | |
189 | ||
190 | for (i = 0; i < len; i++) { | |
191 | if (tab[i].freq_val == freq) | |
192 | return i; | |
193 | } | |
194 | ||
195 | return -EINVAL; | |
196 | } | |
197 | ||
198 | static int ltr501_als_read_samp_freq(struct ltr501_data *data, | |
199 | int *val, int *val2) | |
200 | { | |
201 | int ret, i; | |
202 | ||
203 | ret = regmap_field_read(data->reg_als_rate, &i); | |
204 | if (ret < 0) | |
205 | return ret; | |
206 | ||
207 | if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) | |
208 | return -EINVAL; | |
209 | ||
210 | *val = ltr501_als_samp_table[i].freq_val / 1000000; | |
211 | *val2 = ltr501_als_samp_table[i].freq_val % 1000000; | |
212 | ||
213 | return IIO_VAL_INT_PLUS_MICRO; | |
214 | } | |
215 | ||
216 | static int ltr501_ps_read_samp_freq(struct ltr501_data *data, | |
217 | int *val, int *val2) | |
218 | { | |
219 | int ret, i; | |
220 | ||
221 | ret = regmap_field_read(data->reg_ps_rate, &i); | |
222 | if (ret < 0) | |
223 | return ret; | |
224 | ||
225 | if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) | |
226 | return -EINVAL; | |
227 | ||
228 | *val = ltr501_ps_samp_table[i].freq_val / 1000000; | |
229 | *val2 = ltr501_ps_samp_table[i].freq_val % 1000000; | |
230 | ||
231 | return IIO_VAL_INT_PLUS_MICRO; | |
232 | } | |
233 | ||
234 | static int ltr501_als_write_samp_freq(struct ltr501_data *data, | |
235 | int val, int val2) | |
236 | { | |
237 | int i, ret; | |
238 | ||
239 | i = ltr501_match_samp_freq(ltr501_als_samp_table, | |
240 | ARRAY_SIZE(ltr501_als_samp_table), | |
241 | val, val2); | |
242 | ||
243 | if (i < 0) | |
244 | return i; | |
245 | ||
246 | mutex_lock(&data->lock_als); | |
247 | ret = regmap_field_write(data->reg_als_rate, i); | |
248 | mutex_unlock(&data->lock_als); | |
249 | ||
250 | return ret; | |
251 | } | |
252 | ||
253 | static int ltr501_ps_write_samp_freq(struct ltr501_data *data, | |
254 | int val, int val2) | |
255 | { | |
256 | int i, ret; | |
257 | ||
258 | i = ltr501_match_samp_freq(ltr501_ps_samp_table, | |
259 | ARRAY_SIZE(ltr501_ps_samp_table), | |
260 | val, val2); | |
261 | ||
262 | if (i < 0) | |
263 | return i; | |
264 | ||
265 | mutex_lock(&data->lock_ps); | |
266 | ret = regmap_field_write(data->reg_ps_rate, i); | |
267 | mutex_unlock(&data->lock_ps); | |
268 | ||
269 | return ret; | |
270 | } | |
271 | ||
272 | static int ltr501_als_read_samp_period(struct ltr501_data *data, int *val) | |
273 | { | |
274 | int ret, i; | |
275 | ||
276 | ret = regmap_field_read(data->reg_als_rate, &i); | |
277 | if (ret < 0) | |
278 | return ret; | |
279 | ||
280 | if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) | |
281 | return -EINVAL; | |
282 | ||
283 | *val = ltr501_als_samp_table[i].time_val; | |
284 | ||
285 | return IIO_VAL_INT; | |
286 | } | |
287 | ||
288 | static int ltr501_ps_read_samp_period(struct ltr501_data *data, int *val) | |
289 | { | |
290 | int ret, i; | |
291 | ||
292 | ret = regmap_field_read(data->reg_ps_rate, &i); | |
293 | if (ret < 0) | |
294 | return ret; | |
295 | ||
296 | if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) | |
297 | return -EINVAL; | |
298 | ||
299 | *val = ltr501_ps_samp_table[i].time_val; | |
300 | ||
301 | return IIO_VAL_INT; | |
302 | } | |
303 | ||
c06cee8d KS |
304 | /* IR and visible spectrum coeff's are given in data sheet */ |
305 | static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data) | |
306 | { | |
307 | unsigned long ratio, lux; | |
308 | ||
309 | if (vis_data == 0) | |
310 | return 0; | |
311 | ||
312 | /* multiply numerator by 100 to avoid handling ratio < 1 */ | |
313 | ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data); | |
314 | ||
315 | if (ratio < 45) | |
316 | lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data); | |
317 | else if (ratio >= 45 && ratio < 64) | |
318 | lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data); | |
319 | else if (ratio >= 64 && ratio < 85) | |
320 | lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data); | |
321 | else | |
322 | lux = 0; | |
323 | ||
324 | return lux / 1000; | |
325 | } | |
326 | ||
2690be90 PM |
327 | static int ltr501_drdy(struct ltr501_data *data, u8 drdy_mask) |
328 | { | |
329 | int tries = 100; | |
2f2c9633 | 330 | int ret, status; |
2690be90 PM |
331 | |
332 | while (tries--) { | |
2f2c9633 | 333 | ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); |
2690be90 PM |
334 | if (ret < 0) |
335 | return ret; | |
2f2c9633 | 336 | if ((status & drdy_mask) == drdy_mask) |
2690be90 PM |
337 | return 0; |
338 | msleep(25); | |
339 | } | |
340 | ||
341 | dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n"); | |
342 | return -EIO; | |
343 | } | |
344 | ||
844b4702 KS |
345 | static int ltr501_set_it_time(struct ltr501_data *data, int it) |
346 | { | |
347 | int ret, i, index = -1, status; | |
348 | ||
349 | for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) { | |
350 | if (int_time_mapping[i] == it) { | |
351 | index = i; | |
352 | break; | |
353 | } | |
354 | } | |
355 | /* Make sure integ time index is valid */ | |
356 | if (index < 0) | |
357 | return -EINVAL; | |
358 | ||
359 | ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); | |
360 | if (ret < 0) | |
361 | return ret; | |
362 | ||
363 | if (status & LTR501_CONTR_ALS_GAIN_MASK) { | |
364 | /* | |
365 | * 200 ms and 400 ms integ time can only be | |
366 | * used in dynamic range 1 | |
367 | */ | |
368 | if (index > 1) | |
369 | return -EINVAL; | |
370 | } else | |
371 | /* 50 ms integ time can only be used in dynamic range 2 */ | |
372 | if (index == 1) | |
373 | return -EINVAL; | |
374 | ||
375 | return regmap_field_write(data->reg_it, index); | |
376 | } | |
377 | ||
378 | /* read int time in micro seconds */ | |
379 | static int ltr501_read_it_time(struct ltr501_data *data, int *val, int *val2) | |
380 | { | |
381 | int ret, index; | |
382 | ||
383 | ret = regmap_field_read(data->reg_it, &index); | |
384 | if (ret < 0) | |
385 | return ret; | |
386 | ||
387 | /* Make sure integ time index is valid */ | |
388 | if (index < 0 || index >= ARRAY_SIZE(int_time_mapping)) | |
389 | return -EINVAL; | |
390 | ||
391 | *val2 = int_time_mapping[index]; | |
392 | *val = 0; | |
393 | ||
394 | return IIO_VAL_INT_PLUS_MICRO; | |
395 | } | |
396 | ||
2690be90 PM |
397 | static int ltr501_read_als(struct ltr501_data *data, __le16 buf[2]) |
398 | { | |
2f2c9633 KS |
399 | int ret; |
400 | ||
401 | ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY); | |
2690be90 PM |
402 | if (ret < 0) |
403 | return ret; | |
404 | /* always read both ALS channels in given order */ | |
2f2c9633 KS |
405 | return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, |
406 | buf, 2 * sizeof(__le16)); | |
2690be90 PM |
407 | } |
408 | ||
409 | static int ltr501_read_ps(struct ltr501_data *data) | |
410 | { | |
2f2c9633 KS |
411 | int ret, status; |
412 | ||
413 | ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY); | |
414 | if (ret < 0) | |
415 | return ret; | |
416 | ||
417 | ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, | |
418 | &status, 2); | |
2690be90 PM |
419 | if (ret < 0) |
420 | return ret; | |
2f2c9633 KS |
421 | |
422 | return status; | |
2690be90 PM |
423 | } |
424 | ||
eea53b4a KS |
425 | static int ltr501_read_intr_prst(struct ltr501_data *data, |
426 | enum iio_chan_type type, | |
427 | int *val2) | |
428 | { | |
429 | int ret, samp_period, prst; | |
430 | ||
431 | switch (type) { | |
432 | case IIO_INTENSITY: | |
433 | ret = regmap_field_read(data->reg_als_prst, &prst); | |
434 | if (ret < 0) | |
435 | return ret; | |
436 | ||
437 | ret = ltr501_als_read_samp_period(data, &samp_period); | |
438 | ||
439 | if (ret < 0) | |
440 | return ret; | |
441 | *val2 = samp_period * prst; | |
442 | return IIO_VAL_INT_PLUS_MICRO; | |
443 | case IIO_PROXIMITY: | |
444 | ret = regmap_field_read(data->reg_ps_prst, &prst); | |
445 | if (ret < 0) | |
446 | return ret; | |
447 | ||
448 | ret = ltr501_ps_read_samp_period(data, &samp_period); | |
449 | ||
450 | if (ret < 0) | |
451 | return ret; | |
452 | ||
453 | *val2 = samp_period * prst; | |
454 | return IIO_VAL_INT_PLUS_MICRO; | |
455 | default: | |
456 | return -EINVAL; | |
457 | } | |
458 | ||
459 | return -EINVAL; | |
460 | } | |
461 | ||
462 | static int ltr501_write_intr_prst(struct ltr501_data *data, | |
463 | enum iio_chan_type type, | |
464 | int val, int val2) | |
465 | { | |
466 | int ret, samp_period, new_val; | |
467 | unsigned long period; | |
468 | ||
469 | if (val < 0 || val2 < 0) | |
470 | return -EINVAL; | |
471 | ||
472 | /* period in microseconds */ | |
473 | period = ((val * 1000000) + val2); | |
474 | ||
475 | switch (type) { | |
476 | case IIO_INTENSITY: | |
477 | ret = ltr501_als_read_samp_period(data, &samp_period); | |
478 | if (ret < 0) | |
479 | return ret; | |
480 | ||
481 | /* period should be atleast equal to sampling period */ | |
482 | if (period < samp_period) | |
483 | return -EINVAL; | |
484 | ||
485 | new_val = DIV_ROUND_UP(period, samp_period); | |
486 | if (new_val < 0 || new_val > 0x0f) | |
487 | return -EINVAL; | |
488 | ||
489 | mutex_lock(&data->lock_als); | |
490 | ret = regmap_field_write(data->reg_als_prst, new_val); | |
491 | mutex_unlock(&data->lock_als); | |
492 | if (ret >= 0) | |
493 | data->als_period = period; | |
494 | ||
495 | return ret; | |
496 | case IIO_PROXIMITY: | |
497 | ret = ltr501_ps_read_samp_period(data, &samp_period); | |
498 | if (ret < 0) | |
499 | return ret; | |
500 | ||
501 | /* period should be atleast equal to rate */ | |
502 | if (period < samp_period) | |
503 | return -EINVAL; | |
504 | ||
505 | new_val = DIV_ROUND_UP(period, samp_period); | |
506 | if (new_val < 0 || new_val > 0x0f) | |
507 | return -EINVAL; | |
508 | ||
509 | mutex_lock(&data->lock_ps); | |
510 | ret = regmap_field_write(data->reg_ps_prst, new_val); | |
511 | mutex_unlock(&data->lock_ps); | |
512 | if (ret >= 0) | |
513 | data->ps_period = period; | |
514 | ||
515 | return ret; | |
516 | default: | |
517 | return -EINVAL; | |
518 | } | |
519 | ||
520 | return -EINVAL; | |
521 | } | |
522 | ||
7ac702b3 KS |
523 | static const struct iio_event_spec ltr501_als_event_spec[] = { |
524 | { | |
525 | .type = IIO_EV_TYPE_THRESH, | |
526 | .dir = IIO_EV_DIR_RISING, | |
527 | .mask_separate = BIT(IIO_EV_INFO_VALUE), | |
528 | }, { | |
529 | .type = IIO_EV_TYPE_THRESH, | |
530 | .dir = IIO_EV_DIR_FALLING, | |
531 | .mask_separate = BIT(IIO_EV_INFO_VALUE), | |
532 | }, { | |
533 | .type = IIO_EV_TYPE_THRESH, | |
534 | .dir = IIO_EV_DIR_EITHER, | |
eea53b4a KS |
535 | .mask_separate = BIT(IIO_EV_INFO_ENABLE) | |
536 | BIT(IIO_EV_INFO_PERIOD), | |
7ac702b3 KS |
537 | }, |
538 | ||
539 | }; | |
540 | ||
541 | static const struct iio_event_spec ltr501_pxs_event_spec[] = { | |
542 | { | |
543 | .type = IIO_EV_TYPE_THRESH, | |
544 | .dir = IIO_EV_DIR_RISING, | |
545 | .mask_separate = BIT(IIO_EV_INFO_VALUE), | |
546 | }, { | |
547 | .type = IIO_EV_TYPE_THRESH, | |
548 | .dir = IIO_EV_DIR_FALLING, | |
549 | .mask_separate = BIT(IIO_EV_INFO_VALUE), | |
550 | }, { | |
551 | .type = IIO_EV_TYPE_THRESH, | |
552 | .dir = IIO_EV_DIR_EITHER, | |
eea53b4a KS |
553 | .mask_separate = BIT(IIO_EV_INFO_ENABLE) | |
554 | BIT(IIO_EV_INFO_PERIOD), | |
7ac702b3 KS |
555 | }, |
556 | }; | |
557 | ||
558 | #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \ | |
559 | _evspec, _evsize) { \ | |
2690be90 PM |
560 | .type = IIO_INTENSITY, \ |
561 | .modified = 1, \ | |
562 | .address = (_addr), \ | |
563 | .channel2 = (_mod), \ | |
564 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
565 | .info_mask_shared_by_type = (_shared), \ | |
566 | .scan_index = (_idx), \ | |
567 | .scan_type = { \ | |
568 | .sign = 'u', \ | |
569 | .realbits = 16, \ | |
570 | .storagebits = 16, \ | |
571 | .endianness = IIO_CPU, \ | |
7ac702b3 KS |
572 | }, \ |
573 | .event_spec = _evspec,\ | |
574 | .num_event_specs = _evsize,\ | |
2690be90 PM |
575 | } |
576 | ||
c06cee8d KS |
577 | #define LTR501_LIGHT_CHANNEL() { \ |
578 | .type = IIO_LIGHT, \ | |
579 | .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ | |
580 | .scan_index = -1, \ | |
581 | } | |
582 | ||
2690be90 | 583 | static const struct iio_chan_spec ltr501_channels[] = { |
c06cee8d | 584 | LTR501_LIGHT_CHANNEL(), |
7ac702b3 KS |
585 | LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, |
586 | ltr501_als_event_spec, | |
587 | ARRAY_SIZE(ltr501_als_event_spec)), | |
2690be90 | 588 | LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, |
844b4702 | 589 | BIT(IIO_CHAN_INFO_SCALE) | |
eea53b4a KS |
590 | BIT(IIO_CHAN_INFO_INT_TIME) | |
591 | BIT(IIO_CHAN_INFO_SAMP_FREQ), | |
7ac702b3 | 592 | NULL, 0), |
2690be90 PM |
593 | { |
594 | .type = IIO_PROXIMITY, | |
595 | .address = LTR501_PS_DATA, | |
596 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | | |
597 | BIT(IIO_CHAN_INFO_SCALE), | |
598 | .scan_index = 2, | |
599 | .scan_type = { | |
600 | .sign = 'u', | |
601 | .realbits = 11, | |
602 | .storagebits = 16, | |
603 | .endianness = IIO_CPU, | |
604 | }, | |
7ac702b3 KS |
605 | .event_spec = ltr501_pxs_event_spec, |
606 | .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec), | |
2690be90 PM |
607 | }, |
608 | IIO_CHAN_SOFT_TIMESTAMP(3), | |
609 | }; | |
610 | ||
035ebb15 | 611 | static const struct iio_chan_spec ltr301_channels[] = { |
c06cee8d | 612 | LTR501_LIGHT_CHANNEL(), |
035ebb15 DB |
613 | LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, |
614 | ltr501_als_event_spec, | |
615 | ARRAY_SIZE(ltr501_als_event_spec)), | |
616 | LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, | |
617 | BIT(IIO_CHAN_INFO_SCALE) | | |
618 | BIT(IIO_CHAN_INFO_INT_TIME) | | |
619 | BIT(IIO_CHAN_INFO_SAMP_FREQ), | |
620 | NULL, 0), | |
621 | IIO_CHAN_SOFT_TIMESTAMP(2), | |
622 | }; | |
623 | ||
2690be90 | 624 | static int ltr501_read_raw(struct iio_dev *indio_dev, |
abda2b4f DB |
625 | struct iio_chan_spec const *chan, |
626 | int *val, int *val2, long mask) | |
2690be90 PM |
627 | { |
628 | struct ltr501_data *data = iio_priv(indio_dev); | |
629 | __le16 buf[2]; | |
630 | int ret, i; | |
631 | ||
632 | switch (mask) { | |
c06cee8d KS |
633 | case IIO_CHAN_INFO_PROCESSED: |
634 | if (iio_buffer_enabled(indio_dev)) | |
635 | return -EBUSY; | |
636 | ||
637 | switch (chan->type) { | |
638 | case IIO_LIGHT: | |
639 | mutex_lock(&data->lock_als); | |
640 | ret = ltr501_read_als(data, buf); | |
641 | mutex_unlock(&data->lock_als); | |
642 | if (ret < 0) | |
643 | return ret; | |
644 | *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), | |
645 | le16_to_cpu(buf[0])); | |
646 | return IIO_VAL_INT; | |
647 | default: | |
648 | return -EINVAL; | |
649 | } | |
2690be90 PM |
650 | case IIO_CHAN_INFO_RAW: |
651 | if (iio_buffer_enabled(indio_dev)) | |
652 | return -EBUSY; | |
653 | ||
654 | switch (chan->type) { | |
655 | case IIO_INTENSITY: | |
656 | mutex_lock(&data->lock_als); | |
657 | ret = ltr501_read_als(data, buf); | |
658 | mutex_unlock(&data->lock_als); | |
659 | if (ret < 0) | |
660 | return ret; | |
661 | *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? | |
abda2b4f | 662 | buf[0] : buf[1]); |
2690be90 PM |
663 | return IIO_VAL_INT; |
664 | case IIO_PROXIMITY: | |
665 | mutex_lock(&data->lock_ps); | |
666 | ret = ltr501_read_ps(data); | |
667 | mutex_unlock(&data->lock_ps); | |
668 | if (ret < 0) | |
669 | return ret; | |
670 | *val = ret & LTR501_PS_DATA_MASK; | |
671 | return IIO_VAL_INT; | |
672 | default: | |
673 | return -EINVAL; | |
674 | } | |
675 | case IIO_CHAN_INFO_SCALE: | |
676 | switch (chan->type) { | |
677 | case IIO_INTENSITY: | |
8592a7ee DB |
678 | i = (data->als_contr & data->chip_info->als_gain_mask) |
679 | >> data->chip_info->als_gain_shift; | |
680 | *val = data->chip_info->als_gain[i].scale; | |
681 | *val2 = data->chip_info->als_gain[i].uscale; | |
682 | return IIO_VAL_INT_PLUS_MICRO; | |
2690be90 PM |
683 | case IIO_PROXIMITY: |
684 | i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >> | |
685 | LTR501_CONTR_PS_GAIN_SHIFT; | |
8592a7ee DB |
686 | *val = data->chip_info->ps_gain[i].scale; |
687 | *val2 = data->chip_info->ps_gain[i].uscale; | |
2690be90 PM |
688 | return IIO_VAL_INT_PLUS_MICRO; |
689 | default: | |
690 | return -EINVAL; | |
691 | } | |
844b4702 KS |
692 | case IIO_CHAN_INFO_INT_TIME: |
693 | switch (chan->type) { | |
694 | case IIO_INTENSITY: | |
695 | return ltr501_read_it_time(data, val, val2); | |
696 | default: | |
697 | return -EINVAL; | |
698 | } | |
eea53b4a KS |
699 | case IIO_CHAN_INFO_SAMP_FREQ: |
700 | switch (chan->type) { | |
701 | case IIO_INTENSITY: | |
702 | return ltr501_als_read_samp_freq(data, val, val2); | |
703 | case IIO_PROXIMITY: | |
704 | return ltr501_ps_read_samp_freq(data, val, val2); | |
705 | default: | |
706 | return -EINVAL; | |
707 | } | |
2690be90 PM |
708 | } |
709 | return -EINVAL; | |
710 | } | |
711 | ||
8592a7ee DB |
712 | static int ltr501_get_gain_index(struct ltr501_gain *gain, int size, |
713 | int val, int val2) | |
2690be90 PM |
714 | { |
715 | int i; | |
716 | ||
8592a7ee DB |
717 | for (i = 0; i < size; i++) |
718 | if (val == gain[i].scale && val2 == gain[i].uscale) | |
2690be90 PM |
719 | return i; |
720 | ||
721 | return -1; | |
722 | } | |
723 | ||
724 | static int ltr501_write_raw(struct iio_dev *indio_dev, | |
abda2b4f DB |
725 | struct iio_chan_spec const *chan, |
726 | int val, int val2, long mask) | |
2690be90 PM |
727 | { |
728 | struct ltr501_data *data = iio_priv(indio_dev); | |
eea53b4a | 729 | int i, ret, freq_val, freq_val2; |
8592a7ee | 730 | struct ltr501_chip_info *info = data->chip_info; |
2690be90 PM |
731 | |
732 | if (iio_buffer_enabled(indio_dev)) | |
733 | return -EBUSY; | |
734 | ||
735 | switch (mask) { | |
736 | case IIO_CHAN_INFO_SCALE: | |
737 | switch (chan->type) { | |
738 | case IIO_INTENSITY: | |
8592a7ee DB |
739 | i = ltr501_get_gain_index(info->als_gain, |
740 | info->als_gain_tbl_size, | |
741 | val, val2); | |
742 | if (i < 0) | |
2690be90 | 743 | return -EINVAL; |
2f2c9633 | 744 | |
8592a7ee DB |
745 | data->als_contr &= ~info->als_gain_mask; |
746 | data->als_contr |= i << info->als_gain_shift; | |
747 | ||
2f2c9633 KS |
748 | return regmap_write(data->regmap, LTR501_ALS_CONTR, |
749 | data->als_contr); | |
2690be90 | 750 | case IIO_PROXIMITY: |
8592a7ee DB |
751 | i = ltr501_get_gain_index(info->ps_gain, |
752 | info->ps_gain_tbl_size, | |
753 | val, val2); | |
2690be90 PM |
754 | if (i < 0) |
755 | return -EINVAL; | |
756 | data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; | |
757 | data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; | |
2f2c9633 KS |
758 | |
759 | return regmap_write(data->regmap, LTR501_PS_CONTR, | |
760 | data->ps_contr); | |
2690be90 PM |
761 | default: |
762 | return -EINVAL; | |
763 | } | |
844b4702 KS |
764 | case IIO_CHAN_INFO_INT_TIME: |
765 | switch (chan->type) { | |
766 | case IIO_INTENSITY: | |
767 | if (val != 0) | |
768 | return -EINVAL; | |
769 | mutex_lock(&data->lock_als); | |
770 | i = ltr501_set_it_time(data, val2); | |
771 | mutex_unlock(&data->lock_als); | |
772 | return i; | |
773 | default: | |
774 | return -EINVAL; | |
775 | } | |
eea53b4a KS |
776 | case IIO_CHAN_INFO_SAMP_FREQ: |
777 | switch (chan->type) { | |
778 | case IIO_INTENSITY: | |
779 | ret = ltr501_als_read_samp_freq(data, &freq_val, | |
780 | &freq_val2); | |
781 | if (ret < 0) | |
782 | return ret; | |
783 | ||
784 | ret = ltr501_als_write_samp_freq(data, val, val2); | |
785 | if (ret < 0) | |
786 | return ret; | |
787 | ||
788 | /* update persistence count when changing frequency */ | |
789 | ret = ltr501_write_intr_prst(data, chan->type, | |
790 | 0, data->als_period); | |
791 | ||
792 | if (ret < 0) | |
793 | return ltr501_als_write_samp_freq(data, | |
794 | freq_val, | |
795 | freq_val2); | |
796 | return ret; | |
797 | case IIO_PROXIMITY: | |
798 | ret = ltr501_ps_read_samp_freq(data, &freq_val, | |
799 | &freq_val2); | |
800 | if (ret < 0) | |
801 | return ret; | |
802 | ||
803 | ret = ltr501_ps_write_samp_freq(data, val, val2); | |
804 | if (ret < 0) | |
805 | return ret; | |
806 | ||
807 | /* update persistence count when changing frequency */ | |
808 | ret = ltr501_write_intr_prst(data, chan->type, | |
809 | 0, data->ps_period); | |
810 | ||
811 | if (ret < 0) | |
812 | return ltr501_ps_write_samp_freq(data, | |
813 | freq_val, | |
814 | freq_val2); | |
815 | return ret; | |
816 | default: | |
817 | return -EINVAL; | |
818 | } | |
2690be90 PM |
819 | } |
820 | return -EINVAL; | |
821 | } | |
822 | ||
7ac702b3 KS |
823 | static int ltr501_read_thresh(struct iio_dev *indio_dev, |
824 | const struct iio_chan_spec *chan, | |
825 | enum iio_event_type type, | |
826 | enum iio_event_direction dir, | |
827 | enum iio_event_info info, | |
828 | int *val, int *val2) | |
829 | { | |
830 | struct ltr501_data *data = iio_priv(indio_dev); | |
831 | int ret, thresh_data; | |
832 | ||
833 | switch (chan->type) { | |
834 | case IIO_INTENSITY: | |
835 | switch (dir) { | |
836 | case IIO_EV_DIR_RISING: | |
837 | ret = regmap_bulk_read(data->regmap, | |
838 | LTR501_ALS_THRESH_UP, | |
839 | &thresh_data, 2); | |
840 | if (ret < 0) | |
841 | return ret; | |
842 | *val = thresh_data & LTR501_ALS_THRESH_MASK; | |
843 | return IIO_VAL_INT; | |
844 | case IIO_EV_DIR_FALLING: | |
845 | ret = regmap_bulk_read(data->regmap, | |
846 | LTR501_ALS_THRESH_LOW, | |
847 | &thresh_data, 2); | |
848 | if (ret < 0) | |
849 | return ret; | |
850 | *val = thresh_data & LTR501_ALS_THRESH_MASK; | |
851 | return IIO_VAL_INT; | |
852 | default: | |
853 | return -EINVAL; | |
854 | } | |
855 | case IIO_PROXIMITY: | |
856 | switch (dir) { | |
857 | case IIO_EV_DIR_RISING: | |
858 | ret = regmap_bulk_read(data->regmap, | |
859 | LTR501_PS_THRESH_UP, | |
860 | &thresh_data, 2); | |
861 | if (ret < 0) | |
862 | return ret; | |
863 | *val = thresh_data & LTR501_PS_THRESH_MASK; | |
864 | return IIO_VAL_INT; | |
865 | case IIO_EV_DIR_FALLING: | |
866 | ret = regmap_bulk_read(data->regmap, | |
867 | LTR501_PS_THRESH_LOW, | |
868 | &thresh_data, 2); | |
869 | if (ret < 0) | |
870 | return ret; | |
871 | *val = thresh_data & LTR501_PS_THRESH_MASK; | |
872 | return IIO_VAL_INT; | |
873 | default: | |
874 | return -EINVAL; | |
875 | } | |
876 | default: | |
877 | return -EINVAL; | |
878 | } | |
879 | ||
880 | return -EINVAL; | |
881 | } | |
882 | ||
883 | static int ltr501_write_thresh(struct iio_dev *indio_dev, | |
884 | const struct iio_chan_spec *chan, | |
885 | enum iio_event_type type, | |
886 | enum iio_event_direction dir, | |
887 | enum iio_event_info info, | |
888 | int val, int val2) | |
889 | { | |
890 | struct ltr501_data *data = iio_priv(indio_dev); | |
891 | int ret; | |
892 | ||
893 | if (val < 0) | |
894 | return -EINVAL; | |
895 | ||
896 | switch (chan->type) { | |
897 | case IIO_INTENSITY: | |
898 | if (val > LTR501_ALS_THRESH_MASK) | |
899 | return -EINVAL; | |
900 | switch (dir) { | |
901 | case IIO_EV_DIR_RISING: | |
902 | mutex_lock(&data->lock_als); | |
903 | ret = regmap_bulk_write(data->regmap, | |
904 | LTR501_ALS_THRESH_UP, | |
905 | &val, 2); | |
906 | mutex_unlock(&data->lock_als); | |
907 | return ret; | |
908 | case IIO_EV_DIR_FALLING: | |
909 | mutex_lock(&data->lock_als); | |
910 | ret = regmap_bulk_write(data->regmap, | |
911 | LTR501_ALS_THRESH_LOW, | |
912 | &val, 2); | |
913 | mutex_unlock(&data->lock_als); | |
914 | return ret; | |
915 | default: | |
916 | return -EINVAL; | |
917 | } | |
918 | case IIO_PROXIMITY: | |
7ac702b3 KS |
919 | if (val > LTR501_PS_THRESH_MASK) |
920 | return -EINVAL; | |
01e537f7 | 921 | switch (dir) { |
7ac702b3 KS |
922 | case IIO_EV_DIR_RISING: |
923 | mutex_lock(&data->lock_ps); | |
924 | ret = regmap_bulk_write(data->regmap, | |
925 | LTR501_PS_THRESH_UP, | |
926 | &val, 2); | |
927 | mutex_unlock(&data->lock_ps); | |
928 | return ret; | |
929 | case IIO_EV_DIR_FALLING: | |
930 | mutex_lock(&data->lock_ps); | |
931 | ret = regmap_bulk_write(data->regmap, | |
932 | LTR501_PS_THRESH_LOW, | |
933 | &val, 2); | |
934 | mutex_unlock(&data->lock_ps); | |
935 | return ret; | |
936 | default: | |
937 | return -EINVAL; | |
938 | } | |
939 | default: | |
940 | return -EINVAL; | |
941 | } | |
942 | ||
943 | return -EINVAL; | |
944 | } | |
945 | ||
eea53b4a KS |
946 | static int ltr501_read_event(struct iio_dev *indio_dev, |
947 | const struct iio_chan_spec *chan, | |
948 | enum iio_event_type type, | |
949 | enum iio_event_direction dir, | |
950 | enum iio_event_info info, | |
951 | int *val, int *val2) | |
952 | { | |
953 | int ret; | |
954 | ||
955 | switch (info) { | |
956 | case IIO_EV_INFO_VALUE: | |
957 | return ltr501_read_thresh(indio_dev, chan, type, dir, | |
958 | info, val, val2); | |
959 | case IIO_EV_INFO_PERIOD: | |
960 | ret = ltr501_read_intr_prst(iio_priv(indio_dev), | |
961 | chan->type, val2); | |
962 | *val = *val2 / 1000000; | |
963 | *val2 = *val2 % 1000000; | |
964 | return ret; | |
965 | default: | |
966 | return -EINVAL; | |
967 | } | |
968 | ||
969 | return -EINVAL; | |
970 | } | |
971 | ||
972 | static int ltr501_write_event(struct iio_dev *indio_dev, | |
973 | const struct iio_chan_spec *chan, | |
974 | enum iio_event_type type, | |
975 | enum iio_event_direction dir, | |
976 | enum iio_event_info info, | |
977 | int val, int val2) | |
978 | { | |
979 | switch (info) { | |
980 | case IIO_EV_INFO_VALUE: | |
981 | if (val2 != 0) | |
982 | return -EINVAL; | |
983 | return ltr501_write_thresh(indio_dev, chan, type, dir, | |
984 | info, val, val2); | |
985 | case IIO_EV_INFO_PERIOD: | |
986 | return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type, | |
987 | val, val2); | |
988 | default: | |
989 | return -EINVAL; | |
990 | } | |
991 | ||
992 | return -EINVAL; | |
993 | } | |
994 | ||
7ac702b3 KS |
995 | static int ltr501_read_event_config(struct iio_dev *indio_dev, |
996 | const struct iio_chan_spec *chan, | |
997 | enum iio_event_type type, | |
998 | enum iio_event_direction dir) | |
999 | { | |
1000 | struct ltr501_data *data = iio_priv(indio_dev); | |
1001 | int ret, status; | |
1002 | ||
1003 | switch (chan->type) { | |
1004 | case IIO_INTENSITY: | |
1005 | ret = regmap_field_read(data->reg_als_intr, &status); | |
1006 | if (ret < 0) | |
1007 | return ret; | |
1008 | return status; | |
1009 | case IIO_PROXIMITY: | |
1010 | ret = regmap_field_read(data->reg_ps_intr, &status); | |
1011 | if (ret < 0) | |
1012 | return ret; | |
1013 | return status; | |
1014 | default: | |
1015 | return -EINVAL; | |
1016 | } | |
1017 | ||
1018 | return -EINVAL; | |
1019 | } | |
1020 | ||
1021 | static int ltr501_write_event_config(struct iio_dev *indio_dev, | |
1022 | const struct iio_chan_spec *chan, | |
1023 | enum iio_event_type type, | |
1024 | enum iio_event_direction dir, int state) | |
1025 | { | |
1026 | struct ltr501_data *data = iio_priv(indio_dev); | |
1027 | int ret; | |
1028 | ||
1029 | /* only 1 and 0 are valid inputs */ | |
2fdaf3f4 | 1030 | if (state != 1 && state != 0) |
7ac702b3 KS |
1031 | return -EINVAL; |
1032 | ||
1033 | switch (chan->type) { | |
1034 | case IIO_INTENSITY: | |
1035 | mutex_lock(&data->lock_als); | |
1036 | ret = regmap_field_write(data->reg_als_intr, state); | |
1037 | mutex_unlock(&data->lock_als); | |
1038 | return ret; | |
1039 | case IIO_PROXIMITY: | |
1040 | mutex_lock(&data->lock_ps); | |
1041 | ret = regmap_field_write(data->reg_ps_intr, state); | |
1042 | mutex_unlock(&data->lock_ps); | |
1043 | return ret; | |
1044 | default: | |
1045 | return -EINVAL; | |
1046 | } | |
1047 | ||
1048 | return -EINVAL; | |
1049 | } | |
1050 | ||
8592a7ee DB |
1051 | static ssize_t ltr501_show_proximity_scale_avail(struct device *dev, |
1052 | struct device_attribute *attr, | |
1053 | char *buf) | |
1054 | { | |
1055 | struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); | |
1056 | struct ltr501_chip_info *info = data->chip_info; | |
1057 | ssize_t len = 0; | |
1058 | int i; | |
1059 | ||
1060 | for (i = 0; i < info->ps_gain_tbl_size; i++) { | |
1061 | if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN) | |
1062 | continue; | |
1063 | len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", | |
1064 | info->ps_gain[i].scale, | |
1065 | info->ps_gain[i].uscale); | |
1066 | } | |
1067 | ||
1068 | buf[len - 1] = '\n'; | |
1069 | ||
1070 | return len; | |
1071 | } | |
1072 | ||
1073 | static ssize_t ltr501_show_intensity_scale_avail(struct device *dev, | |
1074 | struct device_attribute *attr, | |
1075 | char *buf) | |
1076 | { | |
1077 | struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); | |
1078 | struct ltr501_chip_info *info = data->chip_info; | |
1079 | ssize_t len = 0; | |
1080 | int i; | |
1081 | ||
1082 | for (i = 0; i < info->als_gain_tbl_size; i++) { | |
1083 | if (info->als_gain[i].scale == LTR501_RESERVED_GAIN) | |
1084 | continue; | |
1085 | len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", | |
1086 | info->als_gain[i].scale, | |
1087 | info->als_gain[i].uscale); | |
1088 | } | |
1089 | ||
1090 | buf[len - 1] = '\n'; | |
1091 | ||
1092 | return len; | |
1093 | } | |
1094 | ||
844b4702 | 1095 | static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4"); |
eea53b4a | 1096 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5"); |
2690be90 | 1097 | |
8592a7ee DB |
1098 | static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO, |
1099 | ltr501_show_proximity_scale_avail, NULL, 0); | |
1100 | static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO, | |
1101 | ltr501_show_intensity_scale_avail, NULL, 0); | |
1102 | ||
2690be90 | 1103 | static struct attribute *ltr501_attributes[] = { |
8592a7ee DB |
1104 | &iio_dev_attr_in_proximity_scale_available.dev_attr.attr, |
1105 | &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, | |
844b4702 | 1106 | &iio_const_attr_integration_time_available.dev_attr.attr, |
eea53b4a | 1107 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
2690be90 PM |
1108 | NULL |
1109 | }; | |
1110 | ||
035ebb15 DB |
1111 | static struct attribute *ltr301_attributes[] = { |
1112 | &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, | |
1113 | &iio_const_attr_integration_time_available.dev_attr.attr, | |
1114 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
1115 | NULL | |
1116 | }; | |
1117 | ||
2690be90 PM |
1118 | static const struct attribute_group ltr501_attribute_group = { |
1119 | .attrs = ltr501_attributes, | |
1120 | }; | |
1121 | ||
035ebb15 DB |
1122 | static const struct attribute_group ltr301_attribute_group = { |
1123 | .attrs = ltr301_attributes, | |
1124 | }; | |
1125 | ||
7ac702b3 KS |
1126 | static const struct iio_info ltr501_info_no_irq = { |
1127 | .read_raw = ltr501_read_raw, | |
1128 | .write_raw = ltr501_write_raw, | |
1129 | .attrs = <r501_attribute_group, | |
1130 | .driver_module = THIS_MODULE, | |
1131 | }; | |
1132 | ||
2690be90 PM |
1133 | static const struct iio_info ltr501_info = { |
1134 | .read_raw = ltr501_read_raw, | |
1135 | .write_raw = ltr501_write_raw, | |
1136 | .attrs = <r501_attribute_group, | |
eea53b4a KS |
1137 | .read_event_value = <r501_read_event, |
1138 | .write_event_value = <r501_write_event, | |
7ac702b3 KS |
1139 | .read_event_config = <r501_read_event_config, |
1140 | .write_event_config = <r501_write_event_config, | |
2690be90 PM |
1141 | .driver_module = THIS_MODULE, |
1142 | }; | |
1143 | ||
035ebb15 DB |
1144 | static const struct iio_info ltr301_info_no_irq = { |
1145 | .read_raw = ltr501_read_raw, | |
1146 | .write_raw = ltr501_write_raw, | |
1147 | .attrs = <r301_attribute_group, | |
1148 | .driver_module = THIS_MODULE, | |
1149 | }; | |
1150 | ||
1151 | static const struct iio_info ltr301_info = { | |
1152 | .read_raw = ltr501_read_raw, | |
1153 | .write_raw = ltr501_write_raw, | |
1154 | .attrs = <r301_attribute_group, | |
1155 | .read_event_value = <r501_read_event, | |
1156 | .write_event_value = <r501_write_event, | |
1157 | .read_event_config = <r501_read_event_config, | |
1158 | .write_event_config = <r501_write_event_config, | |
1159 | .driver_module = THIS_MODULE, | |
1160 | }; | |
1161 | ||
8592a7ee DB |
1162 | static struct ltr501_chip_info ltr501_chip_info_tbl[] = { |
1163 | [ltr501] = { | |
1164 | .partid = 0x08, | |
1165 | .als_gain = ltr501_als_gain_tbl, | |
1166 | .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), | |
1167 | .ps_gain = ltr501_ps_gain_tbl, | |
1168 | .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl), | |
1169 | .als_mode_active = BIT(0) | BIT(1), | |
1170 | .als_gain_mask = BIT(3), | |
1171 | .als_gain_shift = 3, | |
035ebb15 DB |
1172 | .info = <r501_info, |
1173 | .info_no_irq = <r501_info_no_irq, | |
1174 | .channels = ltr501_channels, | |
1175 | .no_channels = ARRAY_SIZE(ltr501_channels), | |
8592a7ee DB |
1176 | }, |
1177 | [ltr559] = { | |
1178 | .partid = 0x09, | |
1179 | .als_gain = ltr559_als_gain_tbl, | |
1180 | .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), | |
1181 | .ps_gain = ltr559_ps_gain_tbl, | |
1182 | .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl), | |
1183 | .als_mode_active = BIT(1), | |
1184 | .als_gain_mask = BIT(2) | BIT(3) | BIT(4), | |
1185 | .als_gain_shift = 2, | |
035ebb15 DB |
1186 | .info = <r501_info, |
1187 | .info_no_irq = <r501_info_no_irq, | |
1188 | .channels = ltr501_channels, | |
1189 | .no_channels = ARRAY_SIZE(ltr501_channels), | |
1190 | }, | |
1191 | [ltr301] = { | |
1192 | .partid = 0x08, | |
1193 | .als_gain = ltr501_als_gain_tbl, | |
1194 | .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), | |
1195 | .als_mode_active = BIT(0) | BIT(1), | |
1196 | .als_gain_mask = BIT(3), | |
1197 | .als_gain_shift = 3, | |
1198 | .info = <r301_info, | |
1199 | .info_no_irq = <r301_info_no_irq, | |
1200 | .channels = ltr301_channels, | |
1201 | .no_channels = ARRAY_SIZE(ltr301_channels), | |
8592a7ee DB |
1202 | }, |
1203 | }; | |
1204 | ||
2f2c9633 | 1205 | static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val) |
2690be90 | 1206 | { |
2f2c9633 KS |
1207 | int ret; |
1208 | ||
1209 | ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val); | |
2690be90 PM |
1210 | if (ret < 0) |
1211 | return ret; | |
1212 | ||
2f2c9633 | 1213 | return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val); |
2690be90 PM |
1214 | } |
1215 | ||
1216 | static irqreturn_t ltr501_trigger_handler(int irq, void *p) | |
1217 | { | |
1218 | struct iio_poll_func *pf = p; | |
1219 | struct iio_dev *indio_dev = pf->indio_dev; | |
1220 | struct ltr501_data *data = iio_priv(indio_dev); | |
1221 | u16 buf[8]; | |
1222 | __le16 als_buf[2]; | |
1223 | u8 mask = 0; | |
1224 | int j = 0; | |
2f2c9633 | 1225 | int ret, psdata; |
2690be90 PM |
1226 | |
1227 | memset(buf, 0, sizeof(buf)); | |
1228 | ||
1229 | /* figure out which data needs to be ready */ | |
1230 | if (test_bit(0, indio_dev->active_scan_mask) || | |
abda2b4f | 1231 | test_bit(1, indio_dev->active_scan_mask)) |
2690be90 PM |
1232 | mask |= LTR501_STATUS_ALS_RDY; |
1233 | if (test_bit(2, indio_dev->active_scan_mask)) | |
1234 | mask |= LTR501_STATUS_PS_RDY; | |
1235 | ||
1236 | ret = ltr501_drdy(data, mask); | |
1237 | if (ret < 0) | |
1238 | goto done; | |
1239 | ||
1240 | if (mask & LTR501_STATUS_ALS_RDY) { | |
2f2c9633 KS |
1241 | ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, |
1242 | (u8 *)als_buf, sizeof(als_buf)); | |
2690be90 PM |
1243 | if (ret < 0) |
1244 | return ret; | |
1245 | if (test_bit(0, indio_dev->active_scan_mask)) | |
1246 | buf[j++] = le16_to_cpu(als_buf[1]); | |
1247 | if (test_bit(1, indio_dev->active_scan_mask)) | |
1248 | buf[j++] = le16_to_cpu(als_buf[0]); | |
1249 | } | |
1250 | ||
1251 | if (mask & LTR501_STATUS_PS_RDY) { | |
2f2c9633 KS |
1252 | ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, |
1253 | &psdata, 2); | |
2690be90 PM |
1254 | if (ret < 0) |
1255 | goto done; | |
2f2c9633 | 1256 | buf[j++] = psdata & LTR501_PS_DATA_MASK; |
2690be90 PM |
1257 | } |
1258 | ||
abda2b4f | 1259 | iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_get_time_ns()); |
2690be90 PM |
1260 | |
1261 | done: | |
1262 | iio_trigger_notify_done(indio_dev->trig); | |
1263 | ||
1264 | return IRQ_HANDLED; | |
1265 | } | |
1266 | ||
7ac702b3 KS |
1267 | static irqreturn_t ltr501_interrupt_handler(int irq, void *private) |
1268 | { | |
1269 | struct iio_dev *indio_dev = private; | |
1270 | struct ltr501_data *data = iio_priv(indio_dev); | |
1271 | int ret, status; | |
1272 | ||
1273 | ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); | |
1274 | if (ret < 0) { | |
1275 | dev_err(&data->client->dev, | |
1276 | "irq read int reg failed\n"); | |
1277 | return IRQ_HANDLED; | |
1278 | } | |
1279 | ||
1280 | if (status & LTR501_STATUS_ALS_INTR) | |
1281 | iio_push_event(indio_dev, | |
1282 | IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0, | |
1283 | IIO_EV_TYPE_THRESH, | |
1284 | IIO_EV_DIR_EITHER), | |
1285 | iio_get_time_ns()); | |
1286 | ||
1287 | if (status & LTR501_STATUS_PS_INTR) | |
1288 | iio_push_event(indio_dev, | |
1289 | IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, | |
1290 | IIO_EV_TYPE_THRESH, | |
1291 | IIO_EV_DIR_EITHER), | |
1292 | iio_get_time_ns()); | |
1293 | ||
1294 | return IRQ_HANDLED; | |
1295 | } | |
1296 | ||
2690be90 PM |
1297 | static int ltr501_init(struct ltr501_data *data) |
1298 | { | |
2f2c9633 | 1299 | int ret, status; |
2690be90 | 1300 | |
2f2c9633 | 1301 | ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); |
2690be90 PM |
1302 | if (ret < 0) |
1303 | return ret; | |
2690be90 | 1304 | |
5919a083 | 1305 | data->als_contr = status | data->chip_info->als_mode_active; |
2f2c9633 KS |
1306 | |
1307 | ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status); | |
2690be90 PM |
1308 | if (ret < 0) |
1309 | return ret; | |
2690be90 | 1310 | |
2f2c9633 KS |
1311 | data->ps_contr = status | LTR501_CONTR_ACTIVE; |
1312 | ||
eea53b4a KS |
1313 | ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period); |
1314 | if (ret < 0) | |
1315 | return ret; | |
1316 | ||
1317 | ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period); | |
1318 | if (ret < 0) | |
1319 | return ret; | |
1320 | ||
2f2c9633 | 1321 | return ltr501_write_contr(data, data->als_contr, data->ps_contr); |
2690be90 PM |
1322 | } |
1323 | ||
2f2c9633 KS |
1324 | static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg) |
1325 | { | |
1326 | switch (reg) { | |
1327 | case LTR501_ALS_DATA1: | |
1328 | case LTR501_ALS_DATA0: | |
1329 | case LTR501_ALS_PS_STATUS: | |
1330 | case LTR501_PS_DATA: | |
1331 | return true; | |
1332 | default: | |
1333 | return false; | |
1334 | } | |
1335 | } | |
1336 | ||
1337 | static struct regmap_config ltr501_regmap_config = { | |
1338 | .name = LTR501_REGMAP_NAME, | |
1339 | .reg_bits = 8, | |
1340 | .val_bits = 8, | |
1341 | .max_register = LTR501_MAX_REG, | |
1342 | .cache_type = REGCACHE_RBTREE, | |
1343 | .volatile_reg = ltr501_is_volatile_reg, | |
1344 | }; | |
1345 | ||
1ca510b0 CO |
1346 | static int ltr501_powerdown(struct ltr501_data *data) |
1347 | { | |
8592a7ee DB |
1348 | return ltr501_write_contr(data, data->als_contr & |
1349 | ~data->chip_info->als_mode_active, | |
1ca510b0 CO |
1350 | data->ps_contr & ~LTR501_CONTR_ACTIVE); |
1351 | } | |
1352 | ||
8592a7ee DB |
1353 | static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx) |
1354 | { | |
1355 | const struct acpi_device_id *id; | |
1356 | ||
1357 | id = acpi_match_device(dev->driver->acpi_match_table, dev); | |
1358 | if (!id) | |
1359 | return NULL; | |
1360 | *chip_idx = id->driver_data; | |
1361 | return dev_name(dev); | |
1362 | } | |
1363 | ||
2690be90 | 1364 | static int ltr501_probe(struct i2c_client *client, |
abda2b4f | 1365 | const struct i2c_device_id *id) |
2690be90 PM |
1366 | { |
1367 | struct ltr501_data *data; | |
1368 | struct iio_dev *indio_dev; | |
2f2c9633 | 1369 | struct regmap *regmap; |
8592a7ee DB |
1370 | int ret, partid, chip_idx = 0; |
1371 | const char *name = NULL; | |
2690be90 PM |
1372 | |
1373 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
1374 | if (!indio_dev) | |
1375 | return -ENOMEM; | |
1376 | ||
2f2c9633 KS |
1377 | regmap = devm_regmap_init_i2c(client, <r501_regmap_config); |
1378 | if (IS_ERR(regmap)) { | |
1379 | dev_err(&client->dev, "Regmap initialization failed.\n"); | |
1380 | return PTR_ERR(regmap); | |
1381 | } | |
1382 | ||
2690be90 PM |
1383 | data = iio_priv(indio_dev); |
1384 | i2c_set_clientdata(client, indio_dev); | |
1385 | data->client = client; | |
2f2c9633 | 1386 | data->regmap = regmap; |
2690be90 PM |
1387 | mutex_init(&data->lock_als); |
1388 | mutex_init(&data->lock_ps); | |
1389 | ||
844b4702 KS |
1390 | data->reg_it = devm_regmap_field_alloc(&client->dev, regmap, |
1391 | reg_field_it); | |
1392 | if (IS_ERR(data->reg_it)) { | |
1393 | dev_err(&client->dev, "Integ time reg field init failed.\n"); | |
1394 | return PTR_ERR(data->reg_it); | |
1395 | } | |
1396 | ||
7ac702b3 KS |
1397 | data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap, |
1398 | reg_field_als_intr); | |
1399 | if (IS_ERR(data->reg_als_intr)) { | |
1400 | dev_err(&client->dev, "ALS intr mode reg field init failed\n"); | |
1401 | return PTR_ERR(data->reg_als_intr); | |
1402 | } | |
1403 | ||
1404 | data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap, | |
1405 | reg_field_ps_intr); | |
1406 | if (IS_ERR(data->reg_ps_intr)) { | |
1407 | dev_err(&client->dev, "PS intr mode reg field init failed.\n"); | |
1408 | return PTR_ERR(data->reg_ps_intr); | |
1409 | } | |
1410 | ||
eea53b4a KS |
1411 | data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap, |
1412 | reg_field_als_rate); | |
1413 | if (IS_ERR(data->reg_als_rate)) { | |
1414 | dev_err(&client->dev, "ALS samp rate field init failed.\n"); | |
1415 | return PTR_ERR(data->reg_als_rate); | |
1416 | } | |
1417 | ||
1418 | data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap, | |
1419 | reg_field_ps_rate); | |
1420 | if (IS_ERR(data->reg_ps_rate)) { | |
1421 | dev_err(&client->dev, "PS samp rate field init failed.\n"); | |
1422 | return PTR_ERR(data->reg_ps_rate); | |
1423 | } | |
1424 | ||
1425 | data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap, | |
1426 | reg_field_als_prst); | |
1427 | if (IS_ERR(data->reg_als_prst)) { | |
1428 | dev_err(&client->dev, "ALS prst reg field init failed\n"); | |
1429 | return PTR_ERR(data->reg_als_prst); | |
1430 | } | |
1431 | ||
1432 | data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap, | |
1433 | reg_field_ps_prst); | |
1434 | if (IS_ERR(data->reg_ps_prst)) { | |
1435 | dev_err(&client->dev, "PS prst reg field init failed.\n"); | |
1436 | return PTR_ERR(data->reg_ps_prst); | |
1437 | } | |
1438 | ||
2f2c9633 | 1439 | ret = regmap_read(data->regmap, LTR501_PART_ID, &partid); |
2690be90 PM |
1440 | if (ret < 0) |
1441 | return ret; | |
8592a7ee DB |
1442 | |
1443 | if (id) { | |
1444 | name = id->name; | |
1445 | chip_idx = id->driver_data; | |
1446 | } else if (ACPI_HANDLE(&client->dev)) { | |
1447 | name = ltr501_match_acpi_device(&client->dev, &chip_idx); | |
1448 | } else { | |
1449 | return -ENODEV; | |
1450 | } | |
1451 | ||
1452 | data->chip_info = <r501_chip_info_tbl[chip_idx]; | |
1453 | ||
1454 | if ((partid >> 4) != data->chip_info->partid) | |
2690be90 PM |
1455 | return -ENODEV; |
1456 | ||
1457 | indio_dev->dev.parent = &client->dev; | |
035ebb15 DB |
1458 | indio_dev->info = data->chip_info->info; |
1459 | indio_dev->channels = data->chip_info->channels; | |
1460 | indio_dev->num_channels = data->chip_info->no_channels; | |
8592a7ee | 1461 | indio_dev->name = name; |
2690be90 PM |
1462 | indio_dev->modes = INDIO_DIRECT_MODE; |
1463 | ||
1464 | ret = ltr501_init(data); | |
1465 | if (ret < 0) | |
1466 | return ret; | |
1467 | ||
7ac702b3 | 1468 | if (client->irq > 0) { |
7ac702b3 KS |
1469 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
1470 | NULL, ltr501_interrupt_handler, | |
1471 | IRQF_TRIGGER_FALLING | | |
1472 | IRQF_ONESHOT, | |
1473 | "ltr501_thresh_event", | |
1474 | indio_dev); | |
1475 | if (ret) { | |
1476 | dev_err(&client->dev, "request irq (%d) failed\n", | |
1477 | client->irq); | |
1478 | return ret; | |
1479 | } | |
1480 | } else { | |
035ebb15 | 1481 | indio_dev->info = data->chip_info->info_no_irq; |
7ac702b3 KS |
1482 | } |
1483 | ||
2690be90 | 1484 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
abda2b4f | 1485 | ltr501_trigger_handler, NULL); |
2690be90 | 1486 | if (ret) |
1ca510b0 | 1487 | goto powerdown_on_error; |
2690be90 PM |
1488 | |
1489 | ret = iio_device_register(indio_dev); | |
1490 | if (ret) | |
1491 | goto error_unreg_buffer; | |
1492 | ||
1493 | return 0; | |
1494 | ||
1495 | error_unreg_buffer: | |
1496 | iio_triggered_buffer_cleanup(indio_dev); | |
1ca510b0 CO |
1497 | powerdown_on_error: |
1498 | ltr501_powerdown(data); | |
2690be90 PM |
1499 | return ret; |
1500 | } | |
1501 | ||
2690be90 PM |
1502 | static int ltr501_remove(struct i2c_client *client) |
1503 | { | |
1504 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
1505 | ||
1506 | iio_device_unregister(indio_dev); | |
1507 | iio_triggered_buffer_cleanup(indio_dev); | |
1508 | ltr501_powerdown(iio_priv(indio_dev)); | |
1509 | ||
1510 | return 0; | |
1511 | } | |
1512 | ||
1513 | #ifdef CONFIG_PM_SLEEP | |
1514 | static int ltr501_suspend(struct device *dev) | |
1515 | { | |
1516 | struct ltr501_data *data = iio_priv(i2c_get_clientdata( | |
abda2b4f | 1517 | to_i2c_client(dev))); |
2690be90 PM |
1518 | return ltr501_powerdown(data); |
1519 | } | |
1520 | ||
1521 | static int ltr501_resume(struct device *dev) | |
1522 | { | |
1523 | struct ltr501_data *data = iio_priv(i2c_get_clientdata( | |
abda2b4f | 1524 | to_i2c_client(dev))); |
2690be90 | 1525 | |
2f2c9633 | 1526 | return ltr501_write_contr(data, data->als_contr, |
2690be90 PM |
1527 | data->ps_contr); |
1528 | } | |
1529 | #endif | |
1530 | ||
1531 | static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume); | |
1532 | ||
772154d0 | 1533 | static const struct acpi_device_id ltr_acpi_match[] = { |
8592a7ee DB |
1534 | {"LTER0501", ltr501}, |
1535 | {"LTER0559", ltr559}, | |
035ebb15 | 1536 | {"LTER0301", ltr301}, |
772154d0 KS |
1537 | { }, |
1538 | }; | |
1539 | MODULE_DEVICE_TABLE(acpi, ltr_acpi_match); | |
1540 | ||
2690be90 | 1541 | static const struct i2c_device_id ltr501_id[] = { |
8592a7ee DB |
1542 | { "ltr501", ltr501}, |
1543 | { "ltr559", ltr559}, | |
035ebb15 | 1544 | { "ltr301", ltr301}, |
2690be90 PM |
1545 | { } |
1546 | }; | |
1547 | MODULE_DEVICE_TABLE(i2c, ltr501_id); | |
1548 | ||
1549 | static struct i2c_driver ltr501_driver = { | |
1550 | .driver = { | |
1551 | .name = LTR501_DRV_NAME, | |
1552 | .pm = <r501_pm_ops, | |
772154d0 | 1553 | .acpi_match_table = ACPI_PTR(ltr_acpi_match), |
2690be90 PM |
1554 | }, |
1555 | .probe = ltr501_probe, | |
1556 | .remove = ltr501_remove, | |
1557 | .id_table = ltr501_id, | |
1558 | }; | |
1559 | ||
1560 | module_i2c_driver(ltr501_driver); | |
1561 | ||
1562 | MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); | |
1563 | MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver"); | |
1564 | MODULE_LICENSE("GPL"); |