IB/core cleanup: Add const on args - device->process_mad
[deliverable/linux.git] / drivers / infiniband / core / verbs.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
33b9b3ee 8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#include <linux/errno.h>
40#include <linux/err.h>
b108d976 41#include <linux/export.h>
8c65b4a6 42#include <linux/string.h>
0e0ec7e0 43#include <linux/slab.h>
1da177e4 44
a4d61e84
RD
45#include <rdma/ib_verbs.h>
46#include <rdma/ib_cache.h>
dd5f03be 47#include <rdma/ib_addr.h>
1da177e4 48
ed4c54e5 49#include "core_priv.h"
1da177e4 50
2b1b5b60
SG
51static const char * const ib_events[] = {
52 [IB_EVENT_CQ_ERR] = "CQ error",
53 [IB_EVENT_QP_FATAL] = "QP fatal error",
54 [IB_EVENT_QP_REQ_ERR] = "QP request error",
55 [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
56 [IB_EVENT_COMM_EST] = "communication established",
57 [IB_EVENT_SQ_DRAINED] = "send queue drained",
58 [IB_EVENT_PATH_MIG] = "path migration successful",
59 [IB_EVENT_PATH_MIG_ERR] = "path migration error",
60 [IB_EVENT_DEVICE_FATAL] = "device fatal error",
61 [IB_EVENT_PORT_ACTIVE] = "port active",
62 [IB_EVENT_PORT_ERR] = "port error",
63 [IB_EVENT_LID_CHANGE] = "LID change",
64 [IB_EVENT_PKEY_CHANGE] = "P_key change",
65 [IB_EVENT_SM_CHANGE] = "SM change",
66 [IB_EVENT_SRQ_ERR] = "SRQ error",
67 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
68 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
69 [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
70 [IB_EVENT_GID_CHANGE] = "GID changed",
71};
72
73const char *ib_event_msg(enum ib_event_type event)
74{
75 size_t index = event;
76
77 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
78 ib_events[index] : "unrecognized event";
79}
80EXPORT_SYMBOL(ib_event_msg);
81
82static const char * const wc_statuses[] = {
83 [IB_WC_SUCCESS] = "success",
84 [IB_WC_LOC_LEN_ERR] = "local length error",
85 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
86 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
87 [IB_WC_LOC_PROT_ERR] = "local protection error",
88 [IB_WC_WR_FLUSH_ERR] = "WR flushed",
89 [IB_WC_MW_BIND_ERR] = "memory management operation error",
90 [IB_WC_BAD_RESP_ERR] = "bad response error",
91 [IB_WC_LOC_ACCESS_ERR] = "local access error",
92 [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
93 [IB_WC_REM_ACCESS_ERR] = "remote access error",
94 [IB_WC_REM_OP_ERR] = "remote operation error",
95 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
96 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
97 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
98 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
99 [IB_WC_REM_ABORT_ERR] = "operation aborted",
100 [IB_WC_INV_EECN_ERR] = "invalid EE context number",
101 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
102 [IB_WC_FATAL_ERR] = "fatal error",
103 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
104 [IB_WC_GENERAL_ERR] = "general error",
105};
106
107const char *ib_wc_status_msg(enum ib_wc_status status)
108{
109 size_t index = status;
110
111 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
112 wc_statuses[index] : "unrecognized status";
113}
114EXPORT_SYMBOL(ib_wc_status_msg);
115
8385fd84 116__attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
bf6a9e31
JM
117{
118 switch (rate) {
119 case IB_RATE_2_5_GBPS: return 1;
120 case IB_RATE_5_GBPS: return 2;
121 case IB_RATE_10_GBPS: return 4;
122 case IB_RATE_20_GBPS: return 8;
123 case IB_RATE_30_GBPS: return 12;
124 case IB_RATE_40_GBPS: return 16;
125 case IB_RATE_60_GBPS: return 24;
126 case IB_RATE_80_GBPS: return 32;
127 case IB_RATE_120_GBPS: return 48;
128 default: return -1;
129 }
130}
131EXPORT_SYMBOL(ib_rate_to_mult);
132
8385fd84 133__attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
bf6a9e31
JM
134{
135 switch (mult) {
136 case 1: return IB_RATE_2_5_GBPS;
137 case 2: return IB_RATE_5_GBPS;
138 case 4: return IB_RATE_10_GBPS;
139 case 8: return IB_RATE_20_GBPS;
140 case 12: return IB_RATE_30_GBPS;
141 case 16: return IB_RATE_40_GBPS;
142 case 24: return IB_RATE_60_GBPS;
143 case 32: return IB_RATE_80_GBPS;
144 case 48: return IB_RATE_120_GBPS;
145 default: return IB_RATE_PORT_CURRENT;
146 }
147}
148EXPORT_SYMBOL(mult_to_ib_rate);
149
8385fd84 150__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
71eeba16
MA
151{
152 switch (rate) {
153 case IB_RATE_2_5_GBPS: return 2500;
154 case IB_RATE_5_GBPS: return 5000;
155 case IB_RATE_10_GBPS: return 10000;
156 case IB_RATE_20_GBPS: return 20000;
157 case IB_RATE_30_GBPS: return 30000;
158 case IB_RATE_40_GBPS: return 40000;
159 case IB_RATE_60_GBPS: return 60000;
160 case IB_RATE_80_GBPS: return 80000;
161 case IB_RATE_120_GBPS: return 120000;
162 case IB_RATE_14_GBPS: return 14062;
163 case IB_RATE_56_GBPS: return 56250;
164 case IB_RATE_112_GBPS: return 112500;
165 case IB_RATE_168_GBPS: return 168750;
166 case IB_RATE_25_GBPS: return 25781;
167 case IB_RATE_100_GBPS: return 103125;
168 case IB_RATE_200_GBPS: return 206250;
169 case IB_RATE_300_GBPS: return 309375;
170 default: return -1;
171 }
172}
173EXPORT_SYMBOL(ib_rate_to_mbps);
174
8385fd84 175__attribute_const__ enum rdma_transport_type
07ebafba
TT
176rdma_node_get_transport(enum rdma_node_type node_type)
177{
178 switch (node_type) {
179 case RDMA_NODE_IB_CA:
180 case RDMA_NODE_IB_SWITCH:
181 case RDMA_NODE_IB_ROUTER:
182 return RDMA_TRANSPORT_IB;
183 case RDMA_NODE_RNIC:
184 return RDMA_TRANSPORT_IWARP;
180771a3 185 case RDMA_NODE_USNIC:
5db5765e
UM
186 return RDMA_TRANSPORT_USNIC;
187 case RDMA_NODE_USNIC_UDP:
248567f7 188 return RDMA_TRANSPORT_USNIC_UDP;
07ebafba
TT
189 default:
190 BUG();
191 return 0;
192 }
193}
194EXPORT_SYMBOL(rdma_node_get_transport);
195
a3f5adaf
EC
196enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
197{
198 if (device->get_link_layer)
199 return device->get_link_layer(device, port_num);
200
201 switch (rdma_node_get_transport(device->node_type)) {
202 case RDMA_TRANSPORT_IB:
203 return IB_LINK_LAYER_INFINIBAND;
204 case RDMA_TRANSPORT_IWARP:
180771a3 205 case RDMA_TRANSPORT_USNIC:
248567f7 206 case RDMA_TRANSPORT_USNIC_UDP:
a3f5adaf
EC
207 return IB_LINK_LAYER_ETHERNET;
208 default:
209 return IB_LINK_LAYER_UNSPECIFIED;
210 }
211}
212EXPORT_SYMBOL(rdma_port_get_link_layer);
213
1da177e4
LT
214/* Protection domains */
215
216struct ib_pd *ib_alloc_pd(struct ib_device *device)
217{
218 struct ib_pd *pd;
219
b5e81bf5 220 pd = device->alloc_pd(device, NULL, NULL);
1da177e4
LT
221
222 if (!IS_ERR(pd)) {
b5e81bf5
RD
223 pd->device = device;
224 pd->uobject = NULL;
1da177e4
LT
225 atomic_set(&pd->usecnt, 0);
226 }
227
228 return pd;
229}
230EXPORT_SYMBOL(ib_alloc_pd);
231
232int ib_dealloc_pd(struct ib_pd *pd)
233{
234 if (atomic_read(&pd->usecnt))
235 return -EBUSY;
236
237 return pd->device->dealloc_pd(pd);
238}
239EXPORT_SYMBOL(ib_dealloc_pd);
240
241/* Address handles */
242
243struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
244{
245 struct ib_ah *ah;
246
247 ah = pd->device->create_ah(pd, ah_attr);
248
249 if (!IS_ERR(ah)) {
b5e81bf5
RD
250 ah->device = pd->device;
251 ah->pd = pd;
252 ah->uobject = NULL;
1da177e4
LT
253 atomic_inc(&pd->usecnt);
254 }
255
256 return ah;
257}
258EXPORT_SYMBOL(ib_create_ah);
259
4e00d694
SH
260int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, struct ib_wc *wc,
261 struct ib_grh *grh, struct ib_ah_attr *ah_attr)
513789ed 262{
513789ed
HR
263 u32 flow_class;
264 u16 gid_index;
265 int ret;
266
4e00d694 267 memset(ah_attr, 0, sizeof *ah_attr);
227128fc 268 if (rdma_cap_eth_ah(device, port_num)) {
dd5f03be
MB
269 if (!(wc->wc_flags & IB_WC_GRH))
270 return -EPROTOTYPE;
271
272 if (wc->wc_flags & IB_WC_WITH_SMAC &&
273 wc->wc_flags & IB_WC_WITH_VLAN) {
274 memcpy(ah_attr->dmac, wc->smac, ETH_ALEN);
275 ah_attr->vlan_id = wc->vlan_id;
276 } else {
277 ret = rdma_addr_find_dmac_by_grh(&grh->dgid, &grh->sgid,
278 ah_attr->dmac, &ah_attr->vlan_id);
279 if (ret)
280 return ret;
281 }
282 } else {
283 ah_attr->vlan_id = 0xffff;
284 }
285
4e00d694
SH
286 ah_attr->dlid = wc->slid;
287 ah_attr->sl = wc->sl;
288 ah_attr->src_path_bits = wc->dlid_path_bits;
289 ah_attr->port_num = port_num;
513789ed
HR
290
291 if (wc->wc_flags & IB_WC_GRH) {
4e00d694
SH
292 ah_attr->ah_flags = IB_AH_GRH;
293 ah_attr->grh.dgid = grh->sgid;
513789ed 294
4e00d694 295 ret = ib_find_cached_gid(device, &grh->dgid, &port_num,
513789ed
HR
296 &gid_index);
297 if (ret)
4e00d694 298 return ret;
513789ed 299
4e00d694 300 ah_attr->grh.sgid_index = (u8) gid_index;
497677ab 301 flow_class = be32_to_cpu(grh->version_tclass_flow);
4e00d694 302 ah_attr->grh.flow_label = flow_class & 0xFFFFF;
47645d8d 303 ah_attr->grh.hop_limit = 0xFF;
4e00d694 304 ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
513789ed 305 }
4e00d694
SH
306 return 0;
307}
308EXPORT_SYMBOL(ib_init_ah_from_wc);
309
310struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, struct ib_wc *wc,
311 struct ib_grh *grh, u8 port_num)
312{
313 struct ib_ah_attr ah_attr;
314 int ret;
315
316 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
317 if (ret)
318 return ERR_PTR(ret);
513789ed
HR
319
320 return ib_create_ah(pd, &ah_attr);
321}
322EXPORT_SYMBOL(ib_create_ah_from_wc);
323
1da177e4
LT
324int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
325{
326 return ah->device->modify_ah ?
327 ah->device->modify_ah(ah, ah_attr) :
328 -ENOSYS;
329}
330EXPORT_SYMBOL(ib_modify_ah);
331
332int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
333{
334 return ah->device->query_ah ?
335 ah->device->query_ah(ah, ah_attr) :
336 -ENOSYS;
337}
338EXPORT_SYMBOL(ib_query_ah);
339
340int ib_destroy_ah(struct ib_ah *ah)
341{
342 struct ib_pd *pd;
343 int ret;
344
345 pd = ah->pd;
346 ret = ah->device->destroy_ah(ah);
347 if (!ret)
348 atomic_dec(&pd->usecnt);
349
350 return ret;
351}
352EXPORT_SYMBOL(ib_destroy_ah);
353
d41fcc67
RD
354/* Shared receive queues */
355
356struct ib_srq *ib_create_srq(struct ib_pd *pd,
357 struct ib_srq_init_attr *srq_init_attr)
358{
359 struct ib_srq *srq;
360
361 if (!pd->device->create_srq)
362 return ERR_PTR(-ENOSYS);
363
364 srq = pd->device->create_srq(pd, srq_init_attr, NULL);
365
366 if (!IS_ERR(srq)) {
367 srq->device = pd->device;
368 srq->pd = pd;
369 srq->uobject = NULL;
370 srq->event_handler = srq_init_attr->event_handler;
371 srq->srq_context = srq_init_attr->srq_context;
96104eda 372 srq->srq_type = srq_init_attr->srq_type;
418d5130
SH
373 if (srq->srq_type == IB_SRQT_XRC) {
374 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
375 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
376 atomic_inc(&srq->ext.xrc.xrcd->usecnt);
377 atomic_inc(&srq->ext.xrc.cq->usecnt);
378 }
d41fcc67
RD
379 atomic_inc(&pd->usecnt);
380 atomic_set(&srq->usecnt, 0);
381 }
382
383 return srq;
384}
385EXPORT_SYMBOL(ib_create_srq);
386
387int ib_modify_srq(struct ib_srq *srq,
388 struct ib_srq_attr *srq_attr,
389 enum ib_srq_attr_mask srq_attr_mask)
390{
7ce5eacb
DB
391 return srq->device->modify_srq ?
392 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
393 -ENOSYS;
d41fcc67
RD
394}
395EXPORT_SYMBOL(ib_modify_srq);
396
397int ib_query_srq(struct ib_srq *srq,
398 struct ib_srq_attr *srq_attr)
399{
400 return srq->device->query_srq ?
401 srq->device->query_srq(srq, srq_attr) : -ENOSYS;
402}
403EXPORT_SYMBOL(ib_query_srq);
404
405int ib_destroy_srq(struct ib_srq *srq)
406{
407 struct ib_pd *pd;
418d5130
SH
408 enum ib_srq_type srq_type;
409 struct ib_xrcd *uninitialized_var(xrcd);
410 struct ib_cq *uninitialized_var(cq);
d41fcc67
RD
411 int ret;
412
413 if (atomic_read(&srq->usecnt))
414 return -EBUSY;
415
416 pd = srq->pd;
418d5130
SH
417 srq_type = srq->srq_type;
418 if (srq_type == IB_SRQT_XRC) {
419 xrcd = srq->ext.xrc.xrcd;
420 cq = srq->ext.xrc.cq;
421 }
d41fcc67
RD
422
423 ret = srq->device->destroy_srq(srq);
418d5130 424 if (!ret) {
d41fcc67 425 atomic_dec(&pd->usecnt);
418d5130
SH
426 if (srq_type == IB_SRQT_XRC) {
427 atomic_dec(&xrcd->usecnt);
428 atomic_dec(&cq->usecnt);
429 }
430 }
d41fcc67
RD
431
432 return ret;
433}
434EXPORT_SYMBOL(ib_destroy_srq);
435
1da177e4
LT
436/* Queue pairs */
437
0e0ec7e0
SH
438static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
439{
440 struct ib_qp *qp = context;
73c40c61 441 unsigned long flags;
0e0ec7e0 442
73c40c61 443 spin_lock_irqsave(&qp->device->event_handler_lock, flags);
0e0ec7e0 444 list_for_each_entry(event->element.qp, &qp->open_list, open_list)
eec9e29f
SP
445 if (event->element.qp->event_handler)
446 event->element.qp->event_handler(event, event->element.qp->qp_context);
73c40c61 447 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
0e0ec7e0
SH
448}
449
d3d72d90
SH
450static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
451{
452 mutex_lock(&xrcd->tgt_qp_mutex);
453 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
454 mutex_unlock(&xrcd->tgt_qp_mutex);
455}
456
0e0ec7e0
SH
457static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
458 void (*event_handler)(struct ib_event *, void *),
459 void *qp_context)
d3d72d90 460{
0e0ec7e0
SH
461 struct ib_qp *qp;
462 unsigned long flags;
463
464 qp = kzalloc(sizeof *qp, GFP_KERNEL);
465 if (!qp)
466 return ERR_PTR(-ENOMEM);
467
468 qp->real_qp = real_qp;
469 atomic_inc(&real_qp->usecnt);
470 qp->device = real_qp->device;
471 qp->event_handler = event_handler;
472 qp->qp_context = qp_context;
473 qp->qp_num = real_qp->qp_num;
474 qp->qp_type = real_qp->qp_type;
475
476 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
477 list_add(&qp->open_list, &real_qp->open_list);
478 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
479
480 return qp;
481}
482
483struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
484 struct ib_qp_open_attr *qp_open_attr)
485{
486 struct ib_qp *qp, *real_qp;
487
488 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
489 return ERR_PTR(-EINVAL);
490
491 qp = ERR_PTR(-EINVAL);
d3d72d90 492 mutex_lock(&xrcd->tgt_qp_mutex);
0e0ec7e0
SH
493 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
494 if (real_qp->qp_num == qp_open_attr->qp_num) {
495 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
496 qp_open_attr->qp_context);
497 break;
498 }
499 }
d3d72d90 500 mutex_unlock(&xrcd->tgt_qp_mutex);
0e0ec7e0 501 return qp;
d3d72d90 502}
0e0ec7e0 503EXPORT_SYMBOL(ib_open_qp);
d3d72d90 504
1da177e4
LT
505struct ib_qp *ib_create_qp(struct ib_pd *pd,
506 struct ib_qp_init_attr *qp_init_attr)
507{
0e0ec7e0 508 struct ib_qp *qp, *real_qp;
b42b63cf 509 struct ib_device *device;
1da177e4 510
b42b63cf
SH
511 device = pd ? pd->device : qp_init_attr->xrcd->device;
512 qp = device->create_qp(pd, qp_init_attr, NULL);
1da177e4
LT
513
514 if (!IS_ERR(qp)) {
0e0ec7e0
SH
515 qp->device = device;
516 qp->real_qp = qp;
517 qp->uobject = NULL;
518 qp->qp_type = qp_init_attr->qp_type;
b42b63cf 519
e47e321a 520 atomic_set(&qp->usecnt, 0);
b42b63cf 521 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) {
0e0ec7e0
SH
522 qp->event_handler = __ib_shared_qp_event_handler;
523 qp->qp_context = qp;
b42b63cf
SH
524 qp->pd = NULL;
525 qp->send_cq = qp->recv_cq = NULL;
526 qp->srq = NULL;
527 qp->xrcd = qp_init_attr->xrcd;
528 atomic_inc(&qp_init_attr->xrcd->usecnt);
0e0ec7e0 529 INIT_LIST_HEAD(&qp->open_list);
0e0ec7e0
SH
530
531 real_qp = qp;
532 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
533 qp_init_attr->qp_context);
534 if (!IS_ERR(qp))
535 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
536 else
537 real_qp->device->destroy_qp(real_qp);
b42b63cf 538 } else {
0e0ec7e0
SH
539 qp->event_handler = qp_init_attr->event_handler;
540 qp->qp_context = qp_init_attr->qp_context;
b42b63cf
SH
541 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
542 qp->recv_cq = NULL;
543 qp->srq = NULL;
544 } else {
545 qp->recv_cq = qp_init_attr->recv_cq;
546 atomic_inc(&qp_init_attr->recv_cq->usecnt);
547 qp->srq = qp_init_attr->srq;
548 if (qp->srq)
549 atomic_inc(&qp_init_attr->srq->usecnt);
550 }
551
552 qp->pd = pd;
553 qp->send_cq = qp_init_attr->send_cq;
554 qp->xrcd = NULL;
555
556 atomic_inc(&pd->usecnt);
557 atomic_inc(&qp_init_attr->send_cq->usecnt);
558 }
1da177e4
LT
559 }
560
561 return qp;
562}
563EXPORT_SYMBOL(ib_create_qp);
564
8a51866f
RD
565static const struct {
566 int valid;
b42b63cf 567 enum ib_qp_attr_mask req_param[IB_QPT_MAX];
dd5f03be 568 enum ib_qp_attr_mask req_param_add_eth[IB_QPT_MAX];
b42b63cf 569 enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
dd5f03be 570 enum ib_qp_attr_mask opt_param_add_eth[IB_QPT_MAX];
8a51866f
RD
571} qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
572 [IB_QPS_RESET] = {
573 [IB_QPS_RESET] = { .valid = 1 },
8a51866f
RD
574 [IB_QPS_INIT] = {
575 .valid = 1,
576 .req_param = {
577 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
578 IB_QP_PORT |
579 IB_QP_QKEY),
c938a616 580 [IB_QPT_RAW_PACKET] = IB_QP_PORT,
8a51866f
RD
581 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
582 IB_QP_PORT |
583 IB_QP_ACCESS_FLAGS),
584 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
585 IB_QP_PORT |
586 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
587 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
588 IB_QP_PORT |
589 IB_QP_ACCESS_FLAGS),
590 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
591 IB_QP_PORT |
592 IB_QP_ACCESS_FLAGS),
8a51866f
RD
593 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
594 IB_QP_QKEY),
595 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
596 IB_QP_QKEY),
597 }
598 },
599 },
600 [IB_QPS_INIT] = {
601 [IB_QPS_RESET] = { .valid = 1 },
602 [IB_QPS_ERR] = { .valid = 1 },
603 [IB_QPS_INIT] = {
604 .valid = 1,
605 .opt_param = {
606 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
607 IB_QP_PORT |
608 IB_QP_QKEY),
609 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
610 IB_QP_PORT |
611 IB_QP_ACCESS_FLAGS),
612 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
613 IB_QP_PORT |
614 IB_QP_ACCESS_FLAGS),
b42b63cf
SH
615 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
616 IB_QP_PORT |
617 IB_QP_ACCESS_FLAGS),
618 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
619 IB_QP_PORT |
620 IB_QP_ACCESS_FLAGS),
8a51866f
RD
621 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
622 IB_QP_QKEY),
623 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
624 IB_QP_QKEY),
625 }
626 },
627 [IB_QPS_RTR] = {
628 .valid = 1,
629 .req_param = {
630 [IB_QPT_UC] = (IB_QP_AV |
631 IB_QP_PATH_MTU |
632 IB_QP_DEST_QPN |
633 IB_QP_RQ_PSN),
634 [IB_QPT_RC] = (IB_QP_AV |
635 IB_QP_PATH_MTU |
636 IB_QP_DEST_QPN |
637 IB_QP_RQ_PSN |
638 IB_QP_MAX_DEST_RD_ATOMIC |
639 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
640 [IB_QPT_XRC_INI] = (IB_QP_AV |
641 IB_QP_PATH_MTU |
642 IB_QP_DEST_QPN |
643 IB_QP_RQ_PSN),
644 [IB_QPT_XRC_TGT] = (IB_QP_AV |
645 IB_QP_PATH_MTU |
646 IB_QP_DEST_QPN |
647 IB_QP_RQ_PSN |
648 IB_QP_MAX_DEST_RD_ATOMIC |
649 IB_QP_MIN_RNR_TIMER),
8a51866f 650 },
dd5f03be
MB
651 .req_param_add_eth = {
652 [IB_QPT_RC] = (IB_QP_SMAC),
653 [IB_QPT_UC] = (IB_QP_SMAC),
654 [IB_QPT_XRC_INI] = (IB_QP_SMAC),
655 [IB_QPT_XRC_TGT] = (IB_QP_SMAC)
656 },
8a51866f
RD
657 .opt_param = {
658 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
659 IB_QP_QKEY),
660 [IB_QPT_UC] = (IB_QP_ALT_PATH |
661 IB_QP_ACCESS_FLAGS |
662 IB_QP_PKEY_INDEX),
663 [IB_QPT_RC] = (IB_QP_ALT_PATH |
664 IB_QP_ACCESS_FLAGS |
665 IB_QP_PKEY_INDEX),
b42b63cf
SH
666 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
667 IB_QP_ACCESS_FLAGS |
668 IB_QP_PKEY_INDEX),
669 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
670 IB_QP_ACCESS_FLAGS |
671 IB_QP_PKEY_INDEX),
8a51866f
RD
672 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
673 IB_QP_QKEY),
674 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
675 IB_QP_QKEY),
dd5f03be
MB
676 },
677 .opt_param_add_eth = {
678 [IB_QPT_RC] = (IB_QP_ALT_SMAC |
679 IB_QP_VID |
680 IB_QP_ALT_VID),
681 [IB_QPT_UC] = (IB_QP_ALT_SMAC |
682 IB_QP_VID |
683 IB_QP_ALT_VID),
684 [IB_QPT_XRC_INI] = (IB_QP_ALT_SMAC |
685 IB_QP_VID |
686 IB_QP_ALT_VID),
687 [IB_QPT_XRC_TGT] = (IB_QP_ALT_SMAC |
688 IB_QP_VID |
689 IB_QP_ALT_VID)
690 }
8a51866f
RD
691 }
692 },
693 [IB_QPS_RTR] = {
694 [IB_QPS_RESET] = { .valid = 1 },
695 [IB_QPS_ERR] = { .valid = 1 },
696 [IB_QPS_RTS] = {
697 .valid = 1,
698 .req_param = {
699 [IB_QPT_UD] = IB_QP_SQ_PSN,
700 [IB_QPT_UC] = IB_QP_SQ_PSN,
701 [IB_QPT_RC] = (IB_QP_TIMEOUT |
702 IB_QP_RETRY_CNT |
703 IB_QP_RNR_RETRY |
704 IB_QP_SQ_PSN |
705 IB_QP_MAX_QP_RD_ATOMIC),
b42b63cf
SH
706 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
707 IB_QP_RETRY_CNT |
708 IB_QP_RNR_RETRY |
709 IB_QP_SQ_PSN |
710 IB_QP_MAX_QP_RD_ATOMIC),
711 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
712 IB_QP_SQ_PSN),
8a51866f
RD
713 [IB_QPT_SMI] = IB_QP_SQ_PSN,
714 [IB_QPT_GSI] = IB_QP_SQ_PSN,
715 },
716 .opt_param = {
717 [IB_QPT_UD] = (IB_QP_CUR_STATE |
718 IB_QP_QKEY),
719 [IB_QPT_UC] = (IB_QP_CUR_STATE |
720 IB_QP_ALT_PATH |
721 IB_QP_ACCESS_FLAGS |
722 IB_QP_PATH_MIG_STATE),
723 [IB_QPT_RC] = (IB_QP_CUR_STATE |
724 IB_QP_ALT_PATH |
725 IB_QP_ACCESS_FLAGS |
726 IB_QP_MIN_RNR_TIMER |
727 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
728 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
729 IB_QP_ALT_PATH |
730 IB_QP_ACCESS_FLAGS |
731 IB_QP_PATH_MIG_STATE),
732 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
733 IB_QP_ALT_PATH |
734 IB_QP_ACCESS_FLAGS |
735 IB_QP_MIN_RNR_TIMER |
736 IB_QP_PATH_MIG_STATE),
8a51866f
RD
737 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
738 IB_QP_QKEY),
739 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
740 IB_QP_QKEY),
741 }
742 }
743 },
744 [IB_QPS_RTS] = {
745 [IB_QPS_RESET] = { .valid = 1 },
746 [IB_QPS_ERR] = { .valid = 1 },
747 [IB_QPS_RTS] = {
748 .valid = 1,
749 .opt_param = {
750 [IB_QPT_UD] = (IB_QP_CUR_STATE |
751 IB_QP_QKEY),
4546d31d
DB
752 [IB_QPT_UC] = (IB_QP_CUR_STATE |
753 IB_QP_ACCESS_FLAGS |
8a51866f
RD
754 IB_QP_ALT_PATH |
755 IB_QP_PATH_MIG_STATE),
4546d31d
DB
756 [IB_QPT_RC] = (IB_QP_CUR_STATE |
757 IB_QP_ACCESS_FLAGS |
8a51866f
RD
758 IB_QP_ALT_PATH |
759 IB_QP_PATH_MIG_STATE |
760 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH
761 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
762 IB_QP_ACCESS_FLAGS |
763 IB_QP_ALT_PATH |
764 IB_QP_PATH_MIG_STATE),
765 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
766 IB_QP_ACCESS_FLAGS |
767 IB_QP_ALT_PATH |
768 IB_QP_PATH_MIG_STATE |
769 IB_QP_MIN_RNR_TIMER),
8a51866f
RD
770 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
771 IB_QP_QKEY),
772 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
773 IB_QP_QKEY),
774 }
775 },
776 [IB_QPS_SQD] = {
777 .valid = 1,
778 .opt_param = {
779 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
780 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
781 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
b42b63cf
SH
782 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
783 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
8a51866f
RD
784 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
785 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
786 }
787 },
788 },
789 [IB_QPS_SQD] = {
790 [IB_QPS_RESET] = { .valid = 1 },
791 [IB_QPS_ERR] = { .valid = 1 },
792 [IB_QPS_RTS] = {
793 .valid = 1,
794 .opt_param = {
795 [IB_QPT_UD] = (IB_QP_CUR_STATE |
796 IB_QP_QKEY),
797 [IB_QPT_UC] = (IB_QP_CUR_STATE |
798 IB_QP_ALT_PATH |
799 IB_QP_ACCESS_FLAGS |
800 IB_QP_PATH_MIG_STATE),
801 [IB_QPT_RC] = (IB_QP_CUR_STATE |
802 IB_QP_ALT_PATH |
803 IB_QP_ACCESS_FLAGS |
804 IB_QP_MIN_RNR_TIMER |
805 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
806 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
807 IB_QP_ALT_PATH |
808 IB_QP_ACCESS_FLAGS |
809 IB_QP_PATH_MIG_STATE),
810 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
811 IB_QP_ALT_PATH |
812 IB_QP_ACCESS_FLAGS |
813 IB_QP_MIN_RNR_TIMER |
814 IB_QP_PATH_MIG_STATE),
8a51866f
RD
815 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
816 IB_QP_QKEY),
817 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
818 IB_QP_QKEY),
819 }
820 },
821 [IB_QPS_SQD] = {
822 .valid = 1,
823 .opt_param = {
824 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
825 IB_QP_QKEY),
826 [IB_QPT_UC] = (IB_QP_AV |
8a51866f
RD
827 IB_QP_ALT_PATH |
828 IB_QP_ACCESS_FLAGS |
829 IB_QP_PKEY_INDEX |
830 IB_QP_PATH_MIG_STATE),
831 [IB_QPT_RC] = (IB_QP_PORT |
832 IB_QP_AV |
833 IB_QP_TIMEOUT |
834 IB_QP_RETRY_CNT |
835 IB_QP_RNR_RETRY |
836 IB_QP_MAX_QP_RD_ATOMIC |
837 IB_QP_MAX_DEST_RD_ATOMIC |
8a51866f
RD
838 IB_QP_ALT_PATH |
839 IB_QP_ACCESS_FLAGS |
840 IB_QP_PKEY_INDEX |
841 IB_QP_MIN_RNR_TIMER |
842 IB_QP_PATH_MIG_STATE),
b42b63cf
SH
843 [IB_QPT_XRC_INI] = (IB_QP_PORT |
844 IB_QP_AV |
845 IB_QP_TIMEOUT |
846 IB_QP_RETRY_CNT |
847 IB_QP_RNR_RETRY |
848 IB_QP_MAX_QP_RD_ATOMIC |
849 IB_QP_ALT_PATH |
850 IB_QP_ACCESS_FLAGS |
851 IB_QP_PKEY_INDEX |
852 IB_QP_PATH_MIG_STATE),
853 [IB_QPT_XRC_TGT] = (IB_QP_PORT |
854 IB_QP_AV |
855 IB_QP_TIMEOUT |
856 IB_QP_MAX_DEST_RD_ATOMIC |
857 IB_QP_ALT_PATH |
858 IB_QP_ACCESS_FLAGS |
859 IB_QP_PKEY_INDEX |
860 IB_QP_MIN_RNR_TIMER |
861 IB_QP_PATH_MIG_STATE),
8a51866f
RD
862 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
863 IB_QP_QKEY),
864 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
865 IB_QP_QKEY),
866 }
867 }
868 },
869 [IB_QPS_SQE] = {
870 [IB_QPS_RESET] = { .valid = 1 },
871 [IB_QPS_ERR] = { .valid = 1 },
872 [IB_QPS_RTS] = {
873 .valid = 1,
874 .opt_param = {
875 [IB_QPT_UD] = (IB_QP_CUR_STATE |
876 IB_QP_QKEY),
877 [IB_QPT_UC] = (IB_QP_CUR_STATE |
878 IB_QP_ACCESS_FLAGS),
879 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
880 IB_QP_QKEY),
881 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
882 IB_QP_QKEY),
883 }
884 }
885 },
886 [IB_QPS_ERR] = {
887 [IB_QPS_RESET] = { .valid = 1 },
888 [IB_QPS_ERR] = { .valid = 1 }
889 }
890};
891
892int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
893 enum ib_qp_type type, enum ib_qp_attr_mask mask,
894 enum rdma_link_layer ll)
8a51866f
RD
895{
896 enum ib_qp_attr_mask req_param, opt_param;
897
898 if (cur_state < 0 || cur_state > IB_QPS_ERR ||
899 next_state < 0 || next_state > IB_QPS_ERR)
900 return 0;
901
902 if (mask & IB_QP_CUR_STATE &&
903 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
904 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
905 return 0;
906
907 if (!qp_state_table[cur_state][next_state].valid)
908 return 0;
909
910 req_param = qp_state_table[cur_state][next_state].req_param[type];
911 opt_param = qp_state_table[cur_state][next_state].opt_param[type];
912
dd5f03be
MB
913 if (ll == IB_LINK_LAYER_ETHERNET) {
914 req_param |= qp_state_table[cur_state][next_state].
915 req_param_add_eth[type];
916 opt_param |= qp_state_table[cur_state][next_state].
917 opt_param_add_eth[type];
918 }
919
8a51866f
RD
920 if ((mask & req_param) != req_param)
921 return 0;
922
923 if (mask & ~(req_param | opt_param | IB_QP_STATE))
924 return 0;
925
926 return 1;
927}
928EXPORT_SYMBOL(ib_modify_qp_is_ok);
929
ed4c54e5
OG
930int ib_resolve_eth_l2_attrs(struct ib_qp *qp,
931 struct ib_qp_attr *qp_attr, int *qp_attr_mask)
932{
933 int ret = 0;
934 union ib_gid sgid;
935
936 if ((*qp_attr_mask & IB_QP_AV) &&
227128fc 937 (rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))) {
ed4c54e5
OG
938 ret = ib_query_gid(qp->device, qp_attr->ah_attr.port_num,
939 qp_attr->ah_attr.grh.sgid_index, &sgid);
940 if (ret)
941 goto out;
942 if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
943 rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw, qp_attr->ah_attr.dmac);
944 rdma_get_ll_mac((struct in6_addr *)sgid.raw, qp_attr->smac);
c1bd6cde
MS
945 if (!(*qp_attr_mask & IB_QP_VID))
946 qp_attr->vlan_id = rdma_get_vlan_id(&sgid);
ed4c54e5
OG
947 } else {
948 ret = rdma_addr_find_dmac_by_grh(&sgid, &qp_attr->ah_attr.grh.dgid,
949 qp_attr->ah_attr.dmac, &qp_attr->vlan_id);
950 if (ret)
951 goto out;
952 ret = rdma_addr_find_smac_by_sgid(&sgid, qp_attr->smac, NULL);
953 if (ret)
954 goto out;
955 }
956 *qp_attr_mask |= IB_QP_SMAC;
957 if (qp_attr->vlan_id < 0xFFFF)
958 *qp_attr_mask |= IB_QP_VID;
959 }
960out:
961 return ret;
962}
963EXPORT_SYMBOL(ib_resolve_eth_l2_attrs);
964
965
1da177e4
LT
966int ib_modify_qp(struct ib_qp *qp,
967 struct ib_qp_attr *qp_attr,
968 int qp_attr_mask)
969{
ed4c54e5
OG
970 int ret;
971
972 ret = ib_resolve_eth_l2_attrs(qp, qp_attr, &qp_attr_mask);
973 if (ret)
974 return ret;
975
0e0ec7e0 976 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1da177e4
LT
977}
978EXPORT_SYMBOL(ib_modify_qp);
979
980int ib_query_qp(struct ib_qp *qp,
981 struct ib_qp_attr *qp_attr,
982 int qp_attr_mask,
983 struct ib_qp_init_attr *qp_init_attr)
984{
985 return qp->device->query_qp ?
0e0ec7e0 986 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1da177e4
LT
987 -ENOSYS;
988}
989EXPORT_SYMBOL(ib_query_qp);
990
0e0ec7e0
SH
991int ib_close_qp(struct ib_qp *qp)
992{
993 struct ib_qp *real_qp;
994 unsigned long flags;
995
996 real_qp = qp->real_qp;
997 if (real_qp == qp)
998 return -EINVAL;
999
1000 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1001 list_del(&qp->open_list);
1002 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1003
1004 atomic_dec(&real_qp->usecnt);
1005 kfree(qp);
1006
1007 return 0;
1008}
1009EXPORT_SYMBOL(ib_close_qp);
1010
1011static int __ib_destroy_shared_qp(struct ib_qp *qp)
1012{
1013 struct ib_xrcd *xrcd;
1014 struct ib_qp *real_qp;
1015 int ret;
1016
1017 real_qp = qp->real_qp;
1018 xrcd = real_qp->xrcd;
1019
1020 mutex_lock(&xrcd->tgt_qp_mutex);
1021 ib_close_qp(qp);
1022 if (atomic_read(&real_qp->usecnt) == 0)
1023 list_del(&real_qp->xrcd_list);
1024 else
1025 real_qp = NULL;
1026 mutex_unlock(&xrcd->tgt_qp_mutex);
1027
1028 if (real_qp) {
1029 ret = ib_destroy_qp(real_qp);
1030 if (!ret)
1031 atomic_dec(&xrcd->usecnt);
1032 else
1033 __ib_insert_xrcd_qp(xrcd, real_qp);
1034 }
1035
1036 return 0;
1037}
1038
1da177e4
LT
1039int ib_destroy_qp(struct ib_qp *qp)
1040{
1041 struct ib_pd *pd;
1042 struct ib_cq *scq, *rcq;
1043 struct ib_srq *srq;
1044 int ret;
1045
0e0ec7e0
SH
1046 if (atomic_read(&qp->usecnt))
1047 return -EBUSY;
1048
1049 if (qp->real_qp != qp)
1050 return __ib_destroy_shared_qp(qp);
1051
b42b63cf
SH
1052 pd = qp->pd;
1053 scq = qp->send_cq;
1054 rcq = qp->recv_cq;
1055 srq = qp->srq;
1da177e4
LT
1056
1057 ret = qp->device->destroy_qp(qp);
1058 if (!ret) {
b42b63cf
SH
1059 if (pd)
1060 atomic_dec(&pd->usecnt);
1061 if (scq)
1062 atomic_dec(&scq->usecnt);
1063 if (rcq)
1064 atomic_dec(&rcq->usecnt);
1da177e4
LT
1065 if (srq)
1066 atomic_dec(&srq->usecnt);
1067 }
1068
1069 return ret;
1070}
1071EXPORT_SYMBOL(ib_destroy_qp);
1072
1073/* Completion queues */
1074
1075struct ib_cq *ib_create_cq(struct ib_device *device,
1076 ib_comp_handler comp_handler,
1077 void (*event_handler)(struct ib_event *, void *),
f4fd0b22 1078 void *cq_context, int cqe, int comp_vector)
1da177e4
LT
1079{
1080 struct ib_cq *cq;
1081
f4fd0b22 1082 cq = device->create_cq(device, cqe, comp_vector, NULL, NULL);
1da177e4
LT
1083
1084 if (!IS_ERR(cq)) {
1085 cq->device = device;
b5e81bf5 1086 cq->uobject = NULL;
1da177e4
LT
1087 cq->comp_handler = comp_handler;
1088 cq->event_handler = event_handler;
1089 cq->cq_context = cq_context;
1090 atomic_set(&cq->usecnt, 0);
1091 }
1092
1093 return cq;
1094}
1095EXPORT_SYMBOL(ib_create_cq);
1096
2dd57162
EC
1097int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1098{
1099 return cq->device->modify_cq ?
1100 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1101}
1102EXPORT_SYMBOL(ib_modify_cq);
1103
1da177e4
LT
1104int ib_destroy_cq(struct ib_cq *cq)
1105{
1106 if (atomic_read(&cq->usecnt))
1107 return -EBUSY;
1108
1109 return cq->device->destroy_cq(cq);
1110}
1111EXPORT_SYMBOL(ib_destroy_cq);
1112
a74cd4af 1113int ib_resize_cq(struct ib_cq *cq, int cqe)
1da177e4 1114{
40de2e54 1115 return cq->device->resize_cq ?
33b9b3ee 1116 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1da177e4
LT
1117}
1118EXPORT_SYMBOL(ib_resize_cq);
1119
1120/* Memory regions */
1121
1122struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
1123{
1124 struct ib_mr *mr;
1c636f80
EC
1125 int err;
1126
1127 err = ib_check_mr_access(mr_access_flags);
1128 if (err)
1129 return ERR_PTR(err);
1da177e4
LT
1130
1131 mr = pd->device->get_dma_mr(pd, mr_access_flags);
1132
1133 if (!IS_ERR(mr)) {
b5e81bf5
RD
1134 mr->device = pd->device;
1135 mr->pd = pd;
1136 mr->uobject = NULL;
1da177e4
LT
1137 atomic_inc(&pd->usecnt);
1138 atomic_set(&mr->usecnt, 0);
1139 }
1140
1141 return mr;
1142}
1143EXPORT_SYMBOL(ib_get_dma_mr);
1144
1145struct ib_mr *ib_reg_phys_mr(struct ib_pd *pd,
1146 struct ib_phys_buf *phys_buf_array,
1147 int num_phys_buf,
1148 int mr_access_flags,
1149 u64 *iova_start)
1150{
1151 struct ib_mr *mr;
1c636f80
EC
1152 int err;
1153
1154 err = ib_check_mr_access(mr_access_flags);
1155 if (err)
1156 return ERR_PTR(err);
1da177e4 1157
7ce5eacb
DB
1158 if (!pd->device->reg_phys_mr)
1159 return ERR_PTR(-ENOSYS);
1160
1da177e4
LT
1161 mr = pd->device->reg_phys_mr(pd, phys_buf_array, num_phys_buf,
1162 mr_access_flags, iova_start);
1163
1164 if (!IS_ERR(mr)) {
b5e81bf5
RD
1165 mr->device = pd->device;
1166 mr->pd = pd;
1167 mr->uobject = NULL;
1da177e4
LT
1168 atomic_inc(&pd->usecnt);
1169 atomic_set(&mr->usecnt, 0);
1170 }
1171
1172 return mr;
1173}
1174EXPORT_SYMBOL(ib_reg_phys_mr);
1175
1176int ib_rereg_phys_mr(struct ib_mr *mr,
1177 int mr_rereg_mask,
1178 struct ib_pd *pd,
1179 struct ib_phys_buf *phys_buf_array,
1180 int num_phys_buf,
1181 int mr_access_flags,
1182 u64 *iova_start)
1183{
1184 struct ib_pd *old_pd;
1185 int ret;
1186
1c636f80
EC
1187 ret = ib_check_mr_access(mr_access_flags);
1188 if (ret)
1189 return ret;
1190
1da177e4
LT
1191 if (!mr->device->rereg_phys_mr)
1192 return -ENOSYS;
1193
1194 if (atomic_read(&mr->usecnt))
1195 return -EBUSY;
1196
1197 old_pd = mr->pd;
1198
1199 ret = mr->device->rereg_phys_mr(mr, mr_rereg_mask, pd,
1200 phys_buf_array, num_phys_buf,
1201 mr_access_flags, iova_start);
1202
1203 if (!ret && (mr_rereg_mask & IB_MR_REREG_PD)) {
1204 atomic_dec(&old_pd->usecnt);
1205 atomic_inc(&pd->usecnt);
1206 }
1207
1208 return ret;
1209}
1210EXPORT_SYMBOL(ib_rereg_phys_mr);
1211
1212int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
1213{
1214 return mr->device->query_mr ?
1215 mr->device->query_mr(mr, mr_attr) : -ENOSYS;
1216}
1217EXPORT_SYMBOL(ib_query_mr);
1218
1219int ib_dereg_mr(struct ib_mr *mr)
1220{
1221 struct ib_pd *pd;
1222 int ret;
1223
1224 if (atomic_read(&mr->usecnt))
1225 return -EBUSY;
1226
1227 pd = mr->pd;
1228 ret = mr->device->dereg_mr(mr);
1229 if (!ret)
1230 atomic_dec(&pd->usecnt);
1231
1232 return ret;
1233}
1234EXPORT_SYMBOL(ib_dereg_mr);
1235
17cd3a2d
SG
1236struct ib_mr *ib_create_mr(struct ib_pd *pd,
1237 struct ib_mr_init_attr *mr_init_attr)
1238{
1239 struct ib_mr *mr;
1240
1241 if (!pd->device->create_mr)
1242 return ERR_PTR(-ENOSYS);
1243
1244 mr = pd->device->create_mr(pd, mr_init_attr);
1245
1246 if (!IS_ERR(mr)) {
1247 mr->device = pd->device;
1248 mr->pd = pd;
1249 mr->uobject = NULL;
1250 atomic_inc(&pd->usecnt);
1251 atomic_set(&mr->usecnt, 0);
1252 }
1253
1254 return mr;
1255}
1256EXPORT_SYMBOL(ib_create_mr);
1257
1258int ib_destroy_mr(struct ib_mr *mr)
1259{
1260 struct ib_pd *pd;
1261 int ret;
1262
1263 if (atomic_read(&mr->usecnt))
1264 return -EBUSY;
1265
1266 pd = mr->pd;
1267 ret = mr->device->destroy_mr(mr);
1268 if (!ret)
1269 atomic_dec(&pd->usecnt);
1270
1271 return ret;
1272}
1273EXPORT_SYMBOL(ib_destroy_mr);
1274
00f7ec36
SW
1275struct ib_mr *ib_alloc_fast_reg_mr(struct ib_pd *pd, int max_page_list_len)
1276{
1277 struct ib_mr *mr;
1278
1279 if (!pd->device->alloc_fast_reg_mr)
1280 return ERR_PTR(-ENOSYS);
1281
1282 mr = pd->device->alloc_fast_reg_mr(pd, max_page_list_len);
1283
1284 if (!IS_ERR(mr)) {
1285 mr->device = pd->device;
1286 mr->pd = pd;
1287 mr->uobject = NULL;
1288 atomic_inc(&pd->usecnt);
1289 atomic_set(&mr->usecnt, 0);
1290 }
1291
1292 return mr;
1293}
1294EXPORT_SYMBOL(ib_alloc_fast_reg_mr);
1295
1296struct ib_fast_reg_page_list *ib_alloc_fast_reg_page_list(struct ib_device *device,
1297 int max_page_list_len)
1298{
1299 struct ib_fast_reg_page_list *page_list;
1300
1301 if (!device->alloc_fast_reg_page_list)
1302 return ERR_PTR(-ENOSYS);
1303
1304 page_list = device->alloc_fast_reg_page_list(device, max_page_list_len);
1305
1306 if (!IS_ERR(page_list)) {
1307 page_list->device = device;
1308 page_list->max_page_list_len = max_page_list_len;
1309 }
1310
1311 return page_list;
1312}
1313EXPORT_SYMBOL(ib_alloc_fast_reg_page_list);
1314
1315void ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
1316{
1317 page_list->device->free_fast_reg_page_list(page_list);
1318}
1319EXPORT_SYMBOL(ib_free_fast_reg_page_list);
1320
1da177e4
LT
1321/* Memory windows */
1322
7083e42e 1323struct ib_mw *ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
1da177e4
LT
1324{
1325 struct ib_mw *mw;
1326
1327 if (!pd->device->alloc_mw)
1328 return ERR_PTR(-ENOSYS);
1329
7083e42e 1330 mw = pd->device->alloc_mw(pd, type);
1da177e4 1331 if (!IS_ERR(mw)) {
b5e81bf5
RD
1332 mw->device = pd->device;
1333 mw->pd = pd;
1334 mw->uobject = NULL;
7083e42e 1335 mw->type = type;
1da177e4
LT
1336 atomic_inc(&pd->usecnt);
1337 }
1338
1339 return mw;
1340}
1341EXPORT_SYMBOL(ib_alloc_mw);
1342
1343int ib_dealloc_mw(struct ib_mw *mw)
1344{
1345 struct ib_pd *pd;
1346 int ret;
1347
1348 pd = mw->pd;
1349 ret = mw->device->dealloc_mw(mw);
1350 if (!ret)
1351 atomic_dec(&pd->usecnt);
1352
1353 return ret;
1354}
1355EXPORT_SYMBOL(ib_dealloc_mw);
1356
1357/* "Fast" memory regions */
1358
1359struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1360 int mr_access_flags,
1361 struct ib_fmr_attr *fmr_attr)
1362{
1363 struct ib_fmr *fmr;
1364
1365 if (!pd->device->alloc_fmr)
1366 return ERR_PTR(-ENOSYS);
1367
1368 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1369 if (!IS_ERR(fmr)) {
1370 fmr->device = pd->device;
1371 fmr->pd = pd;
1372 atomic_inc(&pd->usecnt);
1373 }
1374
1375 return fmr;
1376}
1377EXPORT_SYMBOL(ib_alloc_fmr);
1378
1379int ib_unmap_fmr(struct list_head *fmr_list)
1380{
1381 struct ib_fmr *fmr;
1382
1383 if (list_empty(fmr_list))
1384 return 0;
1385
1386 fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1387 return fmr->device->unmap_fmr(fmr_list);
1388}
1389EXPORT_SYMBOL(ib_unmap_fmr);
1390
1391int ib_dealloc_fmr(struct ib_fmr *fmr)
1392{
1393 struct ib_pd *pd;
1394 int ret;
1395
1396 pd = fmr->pd;
1397 ret = fmr->device->dealloc_fmr(fmr);
1398 if (!ret)
1399 atomic_dec(&pd->usecnt);
1400
1401 return ret;
1402}
1403EXPORT_SYMBOL(ib_dealloc_fmr);
1404
1405/* Multicast groups */
1406
1407int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1408{
c3bccbfb
OG
1409 int ret;
1410
0c33aeed
JM
1411 if (!qp->device->attach_mcast)
1412 return -ENOSYS;
1413 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1414 return -EINVAL;
1415
c3bccbfb
OG
1416 ret = qp->device->attach_mcast(qp, gid, lid);
1417 if (!ret)
1418 atomic_inc(&qp->usecnt);
1419 return ret;
1da177e4
LT
1420}
1421EXPORT_SYMBOL(ib_attach_mcast);
1422
1423int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1424{
c3bccbfb
OG
1425 int ret;
1426
0c33aeed
JM
1427 if (!qp->device->detach_mcast)
1428 return -ENOSYS;
1429 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1430 return -EINVAL;
1431
c3bccbfb
OG
1432 ret = qp->device->detach_mcast(qp, gid, lid);
1433 if (!ret)
1434 atomic_dec(&qp->usecnt);
1435 return ret;
1da177e4
LT
1436}
1437EXPORT_SYMBOL(ib_detach_mcast);
59991f94
SH
1438
1439struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1440{
1441 struct ib_xrcd *xrcd;
1442
1443 if (!device->alloc_xrcd)
1444 return ERR_PTR(-ENOSYS);
1445
1446 xrcd = device->alloc_xrcd(device, NULL, NULL);
1447 if (!IS_ERR(xrcd)) {
1448 xrcd->device = device;
53d0bd1e 1449 xrcd->inode = NULL;
59991f94 1450 atomic_set(&xrcd->usecnt, 0);
d3d72d90
SH
1451 mutex_init(&xrcd->tgt_qp_mutex);
1452 INIT_LIST_HEAD(&xrcd->tgt_qp_list);
59991f94
SH
1453 }
1454
1455 return xrcd;
1456}
1457EXPORT_SYMBOL(ib_alloc_xrcd);
1458
1459int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1460{
d3d72d90
SH
1461 struct ib_qp *qp;
1462 int ret;
1463
59991f94
SH
1464 if (atomic_read(&xrcd->usecnt))
1465 return -EBUSY;
1466
d3d72d90
SH
1467 while (!list_empty(&xrcd->tgt_qp_list)) {
1468 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1469 ret = ib_destroy_qp(qp);
1470 if (ret)
1471 return ret;
1472 }
1473
59991f94
SH
1474 return xrcd->device->dealloc_xrcd(xrcd);
1475}
1476EXPORT_SYMBOL(ib_dealloc_xrcd);
319a441d
HHZ
1477
1478struct ib_flow *ib_create_flow(struct ib_qp *qp,
1479 struct ib_flow_attr *flow_attr,
1480 int domain)
1481{
1482 struct ib_flow *flow_id;
1483 if (!qp->device->create_flow)
1484 return ERR_PTR(-ENOSYS);
1485
1486 flow_id = qp->device->create_flow(qp, flow_attr, domain);
1487 if (!IS_ERR(flow_id))
1488 atomic_inc(&qp->usecnt);
1489 return flow_id;
1490}
1491EXPORT_SYMBOL(ib_create_flow);
1492
1493int ib_destroy_flow(struct ib_flow *flow_id)
1494{
1495 int err;
1496 struct ib_qp *qp = flow_id->qp;
1497
1498 err = qp->device->destroy_flow(flow_id);
1499 if (!err)
1500 atomic_dec(&qp->usecnt);
1501 return err;
1502}
1503EXPORT_SYMBOL(ib_destroy_flow);
1b01d335
SG
1504
1505int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1506 struct ib_mr_status *mr_status)
1507{
1508 return mr->device->check_mr_status ?
1509 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1510}
1511EXPORT_SYMBOL(ib_check_mr_status);
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