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IB/srpt: convert to the generic RDMA READ/WRITE API
[deliverable/linux.git] / drivers / infiniband / core / verbs.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
33b9b3ee 8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
1da177e4
LT		 9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT		 37 */
38
39#include <linux/errno.h>
40#include <linux/err.h>
b108d976 41#include <linux/export.h>
8c65b4a6 42#include <linux/string.h>
0e0ec7e0 43#include <linux/slab.h>
dbf727de
MB		 44#include <linux/in.h>
45#include <linux/in6.h>
46#include <net/addrconf.h>
1da177e4 47
a4d61e84
RD		 48#include <rdma/ib_verbs.h>
49#include <rdma/ib_cache.h>
dd5f03be 50#include <rdma/ib_addr.h>
a060b562 51#include <rdma/rw.h>
1da177e4 52
ed4c54e5 53#include "core_priv.h"
1da177e4 54
2b1b5b60
SG		 55static const char * const ib_events[] = {
56 [IB_EVENT_CQ_ERR] = "CQ error",
57 [IB_EVENT_QP_FATAL] = "QP fatal error",
58 [IB_EVENT_QP_REQ_ERR] = "QP request error",
59 [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
60 [IB_EVENT_COMM_EST] = "communication established",
61 [IB_EVENT_SQ_DRAINED] = "send queue drained",
62 [IB_EVENT_PATH_MIG] = "path migration successful",
63 [IB_EVENT_PATH_MIG_ERR] = "path migration error",
64 [IB_EVENT_DEVICE_FATAL] = "device fatal error",
65 [IB_EVENT_PORT_ACTIVE] = "port active",
66 [IB_EVENT_PORT_ERR] = "port error",
67 [IB_EVENT_LID_CHANGE] = "LID change",
68 [IB_EVENT_PKEY_CHANGE] = "P_key change",
69 [IB_EVENT_SM_CHANGE] = "SM change",
70 [IB_EVENT_SRQ_ERR] = "SRQ error",
71 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
72 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
73 [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
74 [IB_EVENT_GID_CHANGE] = "GID changed",
75};
76
db7489e0 77const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
2b1b5b60
SG		 78{
79 size_t index = event;
80
81 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
82 ib_events[index] : "unrecognized event";
83}
84EXPORT_SYMBOL(ib_event_msg);
85
86static const char * const wc_statuses[] = {
87 [IB_WC_SUCCESS] = "success",
88 [IB_WC_LOC_LEN_ERR] = "local length error",
89 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
90 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
91 [IB_WC_LOC_PROT_ERR] = "local protection error",
92 [IB_WC_WR_FLUSH_ERR] = "WR flushed",
93 [IB_WC_MW_BIND_ERR] = "memory management operation error",
94 [IB_WC_BAD_RESP_ERR] = "bad response error",
95 [IB_WC_LOC_ACCESS_ERR] = "local access error",
96 [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
97 [IB_WC_REM_ACCESS_ERR] = "remote access error",
98 [IB_WC_REM_OP_ERR] = "remote operation error",
99 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
100 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
101 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
102 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
103 [IB_WC_REM_ABORT_ERR] = "operation aborted",
104 [IB_WC_INV_EECN_ERR] = "invalid EE context number",
105 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
106 [IB_WC_FATAL_ERR] = "fatal error",
107 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
108 [IB_WC_GENERAL_ERR] = "general error",
109};
110
db7489e0 111const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
2b1b5b60
SG		 112{
113 size_t index = status;
114
115 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
116 wc_statuses[index] : "unrecognized status";
117}
118EXPORT_SYMBOL(ib_wc_status_msg);
119
8385fd84 120__attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
bf6a9e31
JM		 121{
122 switch (rate) {
123 case IB_RATE_2_5_GBPS: return 1;
124 case IB_RATE_5_GBPS: return 2;
125 case IB_RATE_10_GBPS: return 4;
126 case IB_RATE_20_GBPS: return 8;
127 case IB_RATE_30_GBPS: return 12;
128 case IB_RATE_40_GBPS: return 16;
129 case IB_RATE_60_GBPS: return 24;
130 case IB_RATE_80_GBPS: return 32;
131 case IB_RATE_120_GBPS: return 48;
132 default: return -1;
133 }
134}
135EXPORT_SYMBOL(ib_rate_to_mult);
136
8385fd84 137__attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
bf6a9e31
JM		 138{
139 switch (mult) {
140 case 1: return IB_RATE_2_5_GBPS;
141 case 2: return IB_RATE_5_GBPS;
142 case 4: return IB_RATE_10_GBPS;
143 case 8: return IB_RATE_20_GBPS;
144 case 12: return IB_RATE_30_GBPS;
145 case 16: return IB_RATE_40_GBPS;
146 case 24: return IB_RATE_60_GBPS;
147 case 32: return IB_RATE_80_GBPS;
148 case 48: return IB_RATE_120_GBPS;
149 default: return IB_RATE_PORT_CURRENT;
150 }
151}
152EXPORT_SYMBOL(mult_to_ib_rate);
153
8385fd84 154__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
71eeba16
MA		 155{
156 switch (rate) {
157 case IB_RATE_2_5_GBPS: return 2500;
158 case IB_RATE_5_GBPS: return 5000;
159 case IB_RATE_10_GBPS: return 10000;
160 case IB_RATE_20_GBPS: return 20000;
161 case IB_RATE_30_GBPS: return 30000;
162 case IB_RATE_40_GBPS: return 40000;
163 case IB_RATE_60_GBPS: return 60000;
164 case IB_RATE_80_GBPS: return 80000;
165 case IB_RATE_120_GBPS: return 120000;
166 case IB_RATE_14_GBPS: return 14062;
167 case IB_RATE_56_GBPS: return 56250;
168 case IB_RATE_112_GBPS: return 112500;
169 case IB_RATE_168_GBPS: return 168750;
170 case IB_RATE_25_GBPS: return 25781;
171 case IB_RATE_100_GBPS: return 103125;
172 case IB_RATE_200_GBPS: return 206250;
173 case IB_RATE_300_GBPS: return 309375;
174 default: return -1;
175 }
176}
177EXPORT_SYMBOL(ib_rate_to_mbps);
178
8385fd84 179__attribute_const__ enum rdma_transport_type
07ebafba
TT		 180rdma_node_get_transport(enum rdma_node_type node_type)
181{
182 switch (node_type) {
183 case RDMA_NODE_IB_CA:
184 case RDMA_NODE_IB_SWITCH:
185 case RDMA_NODE_IB_ROUTER:
186 return RDMA_TRANSPORT_IB;
187 case RDMA_NODE_RNIC:
188 return RDMA_TRANSPORT_IWARP;
180771a3 189 case RDMA_NODE_USNIC:
5db5765e
UM		 190 return RDMA_TRANSPORT_USNIC;
191 case RDMA_NODE_USNIC_UDP:
248567f7 192 return RDMA_TRANSPORT_USNIC_UDP;
07ebafba
TT		 193 default:
194 BUG();
195 return 0;
196 }
197}
198EXPORT_SYMBOL(rdma_node_get_transport);
199
a3f5adaf
EC		 200enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
201{
202 if (device->get_link_layer)
203 return device->get_link_layer(device, port_num);
204
205 switch (rdma_node_get_transport(device->node_type)) {
206 case RDMA_TRANSPORT_IB:
207 return IB_LINK_LAYER_INFINIBAND;
208 case RDMA_TRANSPORT_IWARP:
180771a3 209 case RDMA_TRANSPORT_USNIC:
248567f7 210 case RDMA_TRANSPORT_USNIC_UDP:
a3f5adaf
EC		 211 return IB_LINK_LAYER_ETHERNET;
212 default:
213 return IB_LINK_LAYER_UNSPECIFIED;
214 }
215}
216EXPORT_SYMBOL(rdma_port_get_link_layer);
217
1da177e4
LT		 218/* Protection domains */
219
96249d70
JG		 220/**
221 * ib_alloc_pd - Allocates an unused protection domain.
222 * @device: The device on which to allocate the protection domain.
223 *
224 * A protection domain object provides an association between QPs, shared
225 * receive queues, address handles, memory regions, and memory windows.
226 *
227 * Every PD has a local_dma_lkey which can be used as the lkey value for local
228 * memory operations.
229 */
1da177e4
LT		 230struct ib_pd *ib_alloc_pd(struct ib_device *device)
231{
232 struct ib_pd *pd;
233
b5e81bf5 234 pd = device->alloc_pd(device, NULL, NULL);
96249d70
JG		 235 if (IS_ERR(pd))
236 return pd;
1da177e4 237
96249d70
JG		 238 pd->device = device;
239 pd->uobject = NULL;
240 pd->local_mr = NULL;
241 atomic_set(&pd->usecnt, 0);
1da177e4 242
86bee4c9 243 if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
96249d70
JG		 244 pd->local_dma_lkey = device->local_dma_lkey;
245 else {
246 struct ib_mr *mr;
247
248 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
249 if (IS_ERR(mr)) {
250 ib_dealloc_pd(pd);
251 return (struct ib_pd *)mr;
252 }
1da177e4 253
96249d70
JG		 254 pd->local_mr = mr;
255 pd->local_dma_lkey = pd->local_mr->lkey;
1da177e4 256 }
1da177e4
LT		 257 return pd;
258}
259EXPORT_SYMBOL(ib_alloc_pd);
260
7dd78647
JG		 261/**
262 * ib_dealloc_pd - Deallocates a protection domain.
263 * @pd: The protection domain to deallocate.
264 *
265 * It is an error to call this function while any resources in the pd still
266 * exist. The caller is responsible to synchronously destroy them and
267 * guarantee no new allocations will happen.
268 */
269void ib_dealloc_pd(struct ib_pd *pd)
1da177e4 270{
7dd78647
JG		 271 int ret;
272
96249d70 273 if (pd->local_mr) {
7dd78647
JG		 274 ret = ib_dereg_mr(pd->local_mr);
275 WARN_ON(ret);
96249d70
JG		 276 pd->local_mr = NULL;
277 }
1da177e4 278
7dd78647
JG		 279 /* uverbs manipulates usecnt with proper locking, while the kabi
280 requires the caller to guarantee we can't race here. */
281 WARN_ON(atomic_read(&pd->usecnt));
1da177e4 282
7dd78647
JG		 283 /* Making delalloc_pd a void return is a WIP, no driver should return
284 an error here. */
285 ret = pd->device->dealloc_pd(pd);
286 WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
1da177e4
LT		 287}
288EXPORT_SYMBOL(ib_dealloc_pd);
289
290/* Address handles */
291
292struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
293{
294 struct ib_ah *ah;
295
296 ah = pd->device->create_ah(pd, ah_attr);
297
298 if (!IS_ERR(ah)) {
b5e81bf5
RD		 299 ah->device = pd->device;
300 ah->pd = pd;
301 ah->uobject = NULL;
1da177e4
LT		 302 atomic_inc(&pd->usecnt);
303 }
304
305 return ah;
306}
307EXPORT_SYMBOL(ib_create_ah);
308
c865f246
SK		 309static int ib_get_header_version(const union rdma_network_hdr *hdr)
310{
311 const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh;
312 struct iphdr ip4h_checked;
313 const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh;
314
315 /* If it's IPv6, the version must be 6, otherwise, the first
316 * 20 bytes (before the IPv4 header) are garbled.
317 */
318 if (ip6h->version != 6)
319 return (ip4h->version == 4) ? 4 : 0;
320 /* version may be 6 or 4 because the first 20 bytes could be garbled */
321
322 /* RoCE v2 requires no options, thus header length
323 * must be 5 words
324 */
325 if (ip4h->ihl != 5)
326 return 6;
327
328 /* Verify checksum.
329 * We can't write on scattered buffers so we need to copy to
330 * temp buffer.
331 */
332 memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
333 ip4h_checked.check = 0;
334 ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5);
335 /* if IPv4 header checksum is OK, believe it */
336 if (ip4h->check == ip4h_checked.check)
337 return 4;
338 return 6;
339}
340
341static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
342 u8 port_num,
343 const struct ib_grh *grh)
344{
345 int grh_version;
346
347 if (rdma_protocol_ib(device, port_num))
348 return RDMA_NETWORK_IB;
349
350 grh_version = ib_get_header_version((union rdma_network_hdr *)grh);
351
352 if (grh_version == 4)
353 return RDMA_NETWORK_IPV4;
354
355 if (grh->next_hdr == IPPROTO_UDP)
356 return RDMA_NETWORK_IPV6;
357
358 return RDMA_NETWORK_ROCE_V1;
359}
360
dbf727de
MB		 361struct find_gid_index_context {
362 u16 vlan_id;
c865f246 363 enum ib_gid_type gid_type;
dbf727de
MB		 364};
365
366static bool find_gid_index(const union ib_gid *gid,
367 const struct ib_gid_attr *gid_attr,
368 void *context)
369{
370 struct find_gid_index_context *ctx =
371 (struct find_gid_index_context *)context;
372
c865f246
SK		 373 if (ctx->gid_type != gid_attr->gid_type)
374 return false;
375
dbf727de
MB		 376 if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
377 (is_vlan_dev(gid_attr->ndev) &&
378 vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
379 return false;
380
381 return true;
382}
383
384static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
385 u16 vlan_id, const union ib_gid *sgid,
c865f246 386 enum ib_gid_type gid_type,
dbf727de
MB		 387 u16 *gid_index)
388{
c865f246
SK		 389 struct find_gid_index_context context = {.vlan_id = vlan_id,
390 .gid_type = gid_type};
dbf727de
MB		 391
392 return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
393 &context, gid_index);
394}
395
c865f246
SK		 396static int get_gids_from_rdma_hdr(union rdma_network_hdr *hdr,
397 enum rdma_network_type net_type,
398 union ib_gid *sgid, union ib_gid *dgid)
399{
400 struct sockaddr_in src_in;
401 struct sockaddr_in dst_in;
402 __be32 src_saddr, dst_saddr;
403
404 if (!sgid || !dgid)
405 return -EINVAL;
406
407 if (net_type == RDMA_NETWORK_IPV4) {
408 memcpy(&src_in.sin_addr.s_addr,
409 &hdr->roce4grh.saddr, 4);
410 memcpy(&dst_in.sin_addr.s_addr,
411 &hdr->roce4grh.daddr, 4);
412 src_saddr = src_in.sin_addr.s_addr;
413 dst_saddr = dst_in.sin_addr.s_addr;
414 ipv6_addr_set_v4mapped(src_saddr,
415 (struct in6_addr *)sgid);
416 ipv6_addr_set_v4mapped(dst_saddr,
417 (struct in6_addr *)dgid);
418 return 0;
419 } else if (net_type == RDMA_NETWORK_IPV6 ||
420 net_type == RDMA_NETWORK_IB) {
421 *dgid = hdr->ibgrh.dgid;
422 *sgid = hdr->ibgrh.sgid;
423 return 0;
424 } else {
425 return -EINVAL;
426 }
427}
428
73cdaaee
IW		 429int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
430 const struct ib_wc *wc, const struct ib_grh *grh,
431 struct ib_ah_attr *ah_attr)
513789ed 432{
513789ed
HR		 433 u32 flow_class;
434 u16 gid_index;
435 int ret;
c865f246
SK		 436 enum rdma_network_type net_type = RDMA_NETWORK_IB;
437 enum ib_gid_type gid_type = IB_GID_TYPE_IB;
c3efe750 438 int hoplimit = 0xff;
c865f246
SK		 439 union ib_gid dgid;
440 union ib_gid sgid;
513789ed 441
4e00d694 442 memset(ah_attr, 0, sizeof *ah_attr);
227128fc 443 if (rdma_cap_eth_ah(device, port_num)) {
c865f246
SK		 444 if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
445 net_type = wc->network_hdr_type;
446 else
447 net_type = ib_get_net_type_by_grh(device, port_num, grh);
448 gid_type = ib_network_to_gid_type(net_type);
449 }
450 ret = get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
451 &sgid, &dgid);
452 if (ret)
453 return ret;
454
455 if (rdma_protocol_roce(device, port_num)) {
20029832 456 int if_index = 0;
dbf727de
MB		 457 u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
458 wc->vlan_id : 0xffff;
20029832
MB		 459 struct net_device *idev;
460 struct net_device *resolved_dev;
dbf727de 461
dd5f03be
MB		 462 if (!(wc->wc_flags & IB_WC_GRH))
463 return -EPROTOTYPE;
464
20029832
MB		 465 if (!device->get_netdev)
466 return -EOPNOTSUPP;
467
468 idev = device->get_netdev(device, port_num);
469 if (!idev)
470 return -ENODEV;
471
f7f4b23e
MB		 472 ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
473 ah_attr->dmac,
474 wc->wc_flags & IB_WC_WITH_VLAN ?
475 NULL : &vlan_id,
c3efe750 476 &if_index, &hoplimit);
20029832
MB		 477 if (ret) {
478 dev_put(idev);
479 return ret;
dd5f03be 480 }
dbf727de 481
20029832
MB		 482 resolved_dev = dev_get_by_index(&init_net, if_index);
483 if (resolved_dev->flags & IFF_LOOPBACK) {
484 dev_put(resolved_dev);
485 resolved_dev = idev;
486 dev_hold(resolved_dev);
487 }
488 rcu_read_lock();
489 if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
490 resolved_dev))
491 ret = -EHOSTUNREACH;
492 rcu_read_unlock();
493 dev_put(idev);
494 dev_put(resolved_dev);
495 if (ret)
496 return ret;
497
dbf727de 498 ret = get_sgid_index_from_eth(device, port_num, vlan_id,
c865f246 499 &dgid, gid_type, &gid_index);
dbf727de
MB		 500 if (ret)
501 return ret;
dd5f03be
MB		 502 }
503
4e00d694
SH		 504 ah_attr->dlid = wc->slid;
505 ah_attr->sl = wc->sl;
506 ah_attr->src_path_bits = wc->dlid_path_bits;
507 ah_attr->port_num = port_num;
513789ed
HR		 508
509 if (wc->wc_flags & IB_WC_GRH) {
4e00d694 510 ah_attr->ah_flags = IB_AH_GRH;
c865f246 511 ah_attr->grh.dgid = sgid;
513789ed 512
dbf727de 513 if (!rdma_cap_eth_ah(device, port_num)) {
c865f246 514 ret = ib_find_cached_gid_by_port(device, &dgid,
b39ffa1d 515 IB_GID_TYPE_IB,
dbf727de
MB		 516 port_num, NULL,
517 &gid_index);
518 if (ret)
519 return ret;
520 }
513789ed 521
4e00d694 522 ah_attr->grh.sgid_index = (u8) gid_index;
497677ab 523 flow_class = be32_to_cpu(grh->version_tclass_flow);
4e00d694 524 ah_attr->grh.flow_label = flow_class & 0xFFFFF;
c3efe750 525 ah_attr->grh.hop_limit = hoplimit;
4e00d694 526 ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
513789ed 527 }
4e00d694
SH		 528 return 0;
529}
530EXPORT_SYMBOL(ib_init_ah_from_wc);
531
73cdaaee
IW		 532struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
533 const struct ib_grh *grh, u8 port_num)
4e00d694
SH		 534{
535 struct ib_ah_attr ah_attr;
536 int ret;
537
538 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
539 if (ret)
540 return ERR_PTR(ret);
513789ed
HR		 541
542 return ib_create_ah(pd, &ah_attr);
543}
544EXPORT_SYMBOL(ib_create_ah_from_wc);
545
1da177e4
LT		 546int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
547{
548 return ah->device->modify_ah ?
549 ah->device->modify_ah(ah, ah_attr) :
550 -ENOSYS;
551}
552EXPORT_SYMBOL(ib_modify_ah);
553
554int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
555{
556 return ah->device->query_ah ?
557 ah->device->query_ah(ah, ah_attr) :
558 -ENOSYS;
559}
560EXPORT_SYMBOL(ib_query_ah);
561
562int ib_destroy_ah(struct ib_ah *ah)
563{
564 struct ib_pd *pd;
565 int ret;
566
567 pd = ah->pd;
568 ret = ah->device->destroy_ah(ah);
569 if (!ret)
570 atomic_dec(&pd->usecnt);
571
572 return ret;
573}
574EXPORT_SYMBOL(ib_destroy_ah);
575
d41fcc67
RD		 576/* Shared receive queues */
577
578struct ib_srq *ib_create_srq(struct ib_pd *pd,
579 struct ib_srq_init_attr *srq_init_attr)
580{
581 struct ib_srq *srq;
582
583 if (!pd->device->create_srq)
584 return ERR_PTR(-ENOSYS);
585
586 srq = pd->device->create_srq(pd, srq_init_attr, NULL);
587
588 if (!IS_ERR(srq)) {
589 srq->device = pd->device;
590 srq->pd = pd;
591 srq->uobject = NULL;
592 srq->event_handler = srq_init_attr->event_handler;
593 srq->srq_context = srq_init_attr->srq_context;
96104eda 594 srq->srq_type = srq_init_attr->srq_type;
418d5130
SH		 595 if (srq->srq_type == IB_SRQT_XRC) {
596 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
597 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
598 atomic_inc(&srq->ext.xrc.xrcd->usecnt);
599 atomic_inc(&srq->ext.xrc.cq->usecnt);
600 }
d41fcc67
RD		 601 atomic_inc(&pd->usecnt);
602 atomic_set(&srq->usecnt, 0);
603 }
604
605 return srq;
606}
607EXPORT_SYMBOL(ib_create_srq);
608
609int ib_modify_srq(struct ib_srq *srq,
610 struct ib_srq_attr *srq_attr,
611 enum ib_srq_attr_mask srq_attr_mask)
612{
7ce5eacb
DB		 613 return srq->device->modify_srq ?
614 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
615 -ENOSYS;
d41fcc67
RD		 616}
617EXPORT_SYMBOL(ib_modify_srq);
618
619int ib_query_srq(struct ib_srq *srq,
620 struct ib_srq_attr *srq_attr)
621{
622 return srq->device->query_srq ?
623 srq->device->query_srq(srq, srq_attr) : -ENOSYS;
624}
625EXPORT_SYMBOL(ib_query_srq);
626
627int ib_destroy_srq(struct ib_srq *srq)
628{
629 struct ib_pd *pd;
418d5130
SH		 630 enum ib_srq_type srq_type;
631 struct ib_xrcd *uninitialized_var(xrcd);
632 struct ib_cq *uninitialized_var(cq);
d41fcc67
RD		 633 int ret;
634
635 if (atomic_read(&srq->usecnt))
636 return -EBUSY;
637
638 pd = srq->pd;
418d5130
SH		 639 srq_type = srq->srq_type;
640 if (srq_type == IB_SRQT_XRC) {
641 xrcd = srq->ext.xrc.xrcd;
642 cq = srq->ext.xrc.cq;
643 }
d41fcc67
RD		 644
645 ret = srq->device->destroy_srq(srq);
418d5130 646 if (!ret) {
d41fcc67 647 atomic_dec(&pd->usecnt);
418d5130
SH		 648 if (srq_type == IB_SRQT_XRC) {
649 atomic_dec(&xrcd->usecnt);
650 atomic_dec(&cq->usecnt);
651 }
652 }
d41fcc67
RD		 653
654 return ret;
655}
656EXPORT_SYMBOL(ib_destroy_srq);
657
1da177e4
LT		 658/* Queue pairs */
659
0e0ec7e0
SH		 660static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
661{
662 struct ib_qp *qp = context;
73c40c61 663 unsigned long flags;
0e0ec7e0 664
73c40c61 665 spin_lock_irqsave(&qp->device->event_handler_lock, flags);
0e0ec7e0 666 list_for_each_entry(event->element.qp, &qp->open_list, open_list)
eec9e29f
SP		 667 if (event->element.qp->event_handler)
668 event->element.qp->event_handler(event, event->element.qp->qp_context);
73c40c61 669 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
0e0ec7e0
SH		 670}
671
d3d72d90
SH		 672static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
673{
674 mutex_lock(&xrcd->tgt_qp_mutex);
675 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
676 mutex_unlock(&xrcd->tgt_qp_mutex);
677}
678
0e0ec7e0
SH		 679static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
680 void (*event_handler)(struct ib_event *, void *),
681 void *qp_context)
d3d72d90 682{
0e0ec7e0
SH		 683 struct ib_qp *qp;
684 unsigned long flags;
685
686 qp = kzalloc(sizeof *qp, GFP_KERNEL);
687 if (!qp)
688 return ERR_PTR(-ENOMEM);
689
690 qp->real_qp = real_qp;
691 atomic_inc(&real_qp->usecnt);
692 qp->device = real_qp->device;
693 qp->event_handler = event_handler;
694 qp->qp_context = qp_context;
695 qp->qp_num = real_qp->qp_num;
696 qp->qp_type = real_qp->qp_type;
697
698 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
699 list_add(&qp->open_list, &real_qp->open_list);
700 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
701
702 return qp;
703}
704
705struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
706 struct ib_qp_open_attr *qp_open_attr)
707{
708 struct ib_qp *qp, *real_qp;
709
710 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
711 return ERR_PTR(-EINVAL);
712
713 qp = ERR_PTR(-EINVAL);
d3d72d90 714 mutex_lock(&xrcd->tgt_qp_mutex);
0e0ec7e0
SH		 715 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
716 if (real_qp->qp_num == qp_open_attr->qp_num) {
717 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
718 qp_open_attr->qp_context);
719 break;
720 }
721 }
d3d72d90 722 mutex_unlock(&xrcd->tgt_qp_mutex);
0e0ec7e0 723 return qp;
d3d72d90 724}
0e0ec7e0 725EXPORT_SYMBOL(ib_open_qp);
d3d72d90 726
04c41bf3
CH		 727static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
728 struct ib_qp_init_attr *qp_init_attr)
729{
730 struct ib_qp *real_qp = qp;
731
732 qp->event_handler = __ib_shared_qp_event_handler;
733 qp->qp_context = qp;
734 qp->pd = NULL;
735 qp->send_cq = qp->recv_cq = NULL;
736 qp->srq = NULL;
737 qp->xrcd = qp_init_attr->xrcd;
738 atomic_inc(&qp_init_attr->xrcd->usecnt);
739 INIT_LIST_HEAD(&qp->open_list);
740
741 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
742 qp_init_attr->qp_context);
743 if (!IS_ERR(qp))
744 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
745 else
746 real_qp->device->destroy_qp(real_qp);
747 return qp;
748}
749
1da177e4
LT		 750struct ib_qp *ib_create_qp(struct ib_pd *pd,
751 struct ib_qp_init_attr *qp_init_attr)
752{
04c41bf3
CH		 753 struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
754 struct ib_qp *qp;
a060b562
CH		 755 int ret;
756
757 /*
758 * If the callers is using the RDMA API calculate the resources
759 * needed for the RDMA READ/WRITE operations.
760 *
761 * Note that these callers need to pass in a port number.
762 */
763 if (qp_init_attr->cap.max_rdma_ctxs)
764 rdma_rw_init_qp(device, qp_init_attr);
1da177e4 765
b42b63cf 766 qp = device->create_qp(pd, qp_init_attr, NULL);
04c41bf3
CH		 767 if (IS_ERR(qp))
768 return qp;
769
770 qp->device = device;
771 qp->real_qp = qp;
772 qp->uobject = NULL;
773 qp->qp_type = qp_init_attr->qp_type;
774
775 atomic_set(&qp->usecnt, 0);
fffb0383
CH		 776 qp->mrs_used = 0;
777 spin_lock_init(&qp->mr_lock);
a060b562 778 INIT_LIST_HEAD(&qp->rdma_mrs);
fffb0383 779
04c41bf3
CH		 780 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
781 return ib_create_xrc_qp(qp, qp_init_attr);
782
783 qp->event_handler = qp_init_attr->event_handler;
784 qp->qp_context = qp_init_attr->qp_context;
785 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
786 qp->recv_cq = NULL;
787 qp->srq = NULL;
788 } else {
789 qp->recv_cq = qp_init_attr->recv_cq;
790 atomic_inc(&qp_init_attr->recv_cq->usecnt);
791 qp->srq = qp_init_attr->srq;
792 if (qp->srq)
793 atomic_inc(&qp_init_attr->srq->usecnt);
1da177e4
LT		 794 }
795
04c41bf3
CH		 796 qp->pd = pd;
797 qp->send_cq = qp_init_attr->send_cq;
798 qp->xrcd = NULL;
799
800 atomic_inc(&pd->usecnt);
801 atomic_inc(&qp_init_attr->send_cq->usecnt);
a060b562
CH		 802
803 if (qp_init_attr->cap.max_rdma_ctxs) {
804 ret = rdma_rw_init_mrs(qp, qp_init_attr);
805 if (ret) {
806 pr_err("failed to init MR pool ret= %d\n", ret);
807 ib_destroy_qp(qp);
808 qp = ERR_PTR(ret);
809 }
810 }
811
1da177e4
LT		 812 return qp;
813}
814EXPORT_SYMBOL(ib_create_qp);
815
8a51866f
RD		 816static const struct {
817 int valid;
b42b63cf
SH		 818 enum ib_qp_attr_mask req_param[IB_QPT_MAX];
819 enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
8a51866f
RD		 820} qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
821 [IB_QPS_RESET] = {
822 [IB_QPS_RESET] = { .valid = 1 },
8a51866f
RD		 823 [IB_QPS_INIT] = {
824 .valid = 1,
825 .req_param = {
826 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
827 IB_QP_PORT |
828 IB_QP_QKEY),
c938a616 829 [IB_QPT_RAW_PACKET] = IB_QP_PORT,
8a51866f
RD		 830 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
831 IB_QP_PORT |
832 IB_QP_ACCESS_FLAGS),
833 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
834 IB_QP_PORT |
835 IB_QP_ACCESS_FLAGS),
b42b63cf
SH		 836 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
837 IB_QP_PORT |
838 IB_QP_ACCESS_FLAGS),
839 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
840 IB_QP_PORT |
841 IB_QP_ACCESS_FLAGS),
8a51866f
RD		 842 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
843 IB_QP_QKEY),
844 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
845 IB_QP_QKEY),
846 }
847 },
848 },
849 [IB_QPS_INIT] = {
850 [IB_QPS_RESET] = { .valid = 1 },
851 [IB_QPS_ERR] = { .valid = 1 },
852 [IB_QPS_INIT] = {
853 .valid = 1,
854 .opt_param = {
855 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
856 IB_QP_PORT |
857 IB_QP_QKEY),
858 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
859 IB_QP_PORT |
860 IB_QP_ACCESS_FLAGS),
861 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
862 IB_QP_PORT |
863 IB_QP_ACCESS_FLAGS),
b42b63cf
SH		 864 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
865 IB_QP_PORT |
866 IB_QP_ACCESS_FLAGS),
867 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
868 IB_QP_PORT |
869 IB_QP_ACCESS_FLAGS),
8a51866f
RD		 870 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
871 IB_QP_QKEY),
872 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
873 IB_QP_QKEY),
874 }
875 },
876 [IB_QPS_RTR] = {
877 .valid = 1,
878 .req_param = {
879 [IB_QPT_UC] = (IB_QP_AV |
880 IB_QP_PATH_MTU |
881 IB_QP_DEST_QPN |
882 IB_QP_RQ_PSN),
883 [IB_QPT_RC] = (IB_QP_AV |
884 IB_QP_PATH_MTU |
885 IB_QP_DEST_QPN |
886 IB_QP_RQ_PSN |
887 IB_QP_MAX_DEST_RD_ATOMIC |
888 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH		 889 [IB_QPT_XRC_INI] = (IB_QP_AV |
890 IB_QP_PATH_MTU |
891 IB_QP_DEST_QPN |
892 IB_QP_RQ_PSN),
893 [IB_QPT_XRC_TGT] = (IB_QP_AV |
894 IB_QP_PATH_MTU |
895 IB_QP_DEST_QPN |
896 IB_QP_RQ_PSN |
897 IB_QP_MAX_DEST_RD_ATOMIC |
898 IB_QP_MIN_RNR_TIMER),
8a51866f
RD		 899 },
900 .opt_param = {
901 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
902 IB_QP_QKEY),
903 [IB_QPT_UC] = (IB_QP_ALT_PATH |
904 IB_QP_ACCESS_FLAGS |
905 IB_QP_PKEY_INDEX),
906 [IB_QPT_RC] = (IB_QP_ALT_PATH |
907 IB_QP_ACCESS_FLAGS |
908 IB_QP_PKEY_INDEX),
b42b63cf
SH		 909 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
910 IB_QP_ACCESS_FLAGS |
911 IB_QP_PKEY_INDEX),
912 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
913 IB_QP_ACCESS_FLAGS |
914 IB_QP_PKEY_INDEX),
8a51866f
RD		 915 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
916 IB_QP_QKEY),
917 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
918 IB_QP_QKEY),
dd5f03be 919 },
dbf727de 920 },
8a51866f
RD		 921 },
922 [IB_QPS_RTR] = {
923 [IB_QPS_RESET] = { .valid = 1 },
924 [IB_QPS_ERR] = { .valid = 1 },
925 [IB_QPS_RTS] = {
926 .valid = 1,
927 .req_param = {
928 [IB_QPT_UD] = IB_QP_SQ_PSN,
929 [IB_QPT_UC] = IB_QP_SQ_PSN,
930 [IB_QPT_RC] = (IB_QP_TIMEOUT |
931 IB_QP_RETRY_CNT |
932 IB_QP_RNR_RETRY |
933 IB_QP_SQ_PSN |
934 IB_QP_MAX_QP_RD_ATOMIC),
b42b63cf
SH		 935 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
936 IB_QP_RETRY_CNT |
937 IB_QP_RNR_RETRY |
938 IB_QP_SQ_PSN |
939 IB_QP_MAX_QP_RD_ATOMIC),
940 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
941 IB_QP_SQ_PSN),
8a51866f
RD		 942 [IB_QPT_SMI] = IB_QP_SQ_PSN,
943 [IB_QPT_GSI] = IB_QP_SQ_PSN,
944 },
945 .opt_param = {
946 [IB_QPT_UD] = (IB_QP_CUR_STATE |
947 IB_QP_QKEY),
948 [IB_QPT_UC] = (IB_QP_CUR_STATE |
949 IB_QP_ALT_PATH |
950 IB_QP_ACCESS_FLAGS |
951 IB_QP_PATH_MIG_STATE),
952 [IB_QPT_RC] = (IB_QP_CUR_STATE |
953 IB_QP_ALT_PATH |
954 IB_QP_ACCESS_FLAGS |
955 IB_QP_MIN_RNR_TIMER |
956 IB_QP_PATH_MIG_STATE),
b42b63cf
SH		 957 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
958 IB_QP_ALT_PATH |
959 IB_QP_ACCESS_FLAGS |
960 IB_QP_PATH_MIG_STATE),
961 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
962 IB_QP_ALT_PATH |
963 IB_QP_ACCESS_FLAGS |
964 IB_QP_MIN_RNR_TIMER |
965 IB_QP_PATH_MIG_STATE),
8a51866f
RD		 966 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
967 IB_QP_QKEY),
968 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
969 IB_QP_QKEY),
970 }
971 }
972 },
973 [IB_QPS_RTS] = {
974 [IB_QPS_RESET] = { .valid = 1 },
975 [IB_QPS_ERR] = { .valid = 1 },
976 [IB_QPS_RTS] = {
977 .valid = 1,
978 .opt_param = {
979 [IB_QPT_UD] = (IB_QP_CUR_STATE |
980 IB_QP_QKEY),
4546d31d
DB		 981 [IB_QPT_UC] = (IB_QP_CUR_STATE |
982 IB_QP_ACCESS_FLAGS |
8a51866f
RD		 983 IB_QP_ALT_PATH |
984 IB_QP_PATH_MIG_STATE),
4546d31d
DB		 985 [IB_QPT_RC] = (IB_QP_CUR_STATE |
986 IB_QP_ACCESS_FLAGS |
8a51866f
RD		 987 IB_QP_ALT_PATH |
988 IB_QP_PATH_MIG_STATE |
989 IB_QP_MIN_RNR_TIMER),
b42b63cf
SH		 990 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
991 IB_QP_ACCESS_FLAGS |
992 IB_QP_ALT_PATH |
993 IB_QP_PATH_MIG_STATE),
994 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
995 IB_QP_ACCESS_FLAGS |
996 IB_QP_ALT_PATH |
997 IB_QP_PATH_MIG_STATE |
998 IB_QP_MIN_RNR_TIMER),
8a51866f
RD		 999 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1000 IB_QP_QKEY),
1001 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1002 IB_QP_QKEY),
1003 }
1004 },
1005 [IB_QPS_SQD] = {
1006 .valid = 1,
1007 .opt_param = {
1008 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1009 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1010 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
b42b63cf
SH		 1011 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1012 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
8a51866f
RD		 1013 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1014 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
1015 }
1016 },
1017 },
1018 [IB_QPS_SQD] = {
1019 [IB_QPS_RESET] = { .valid = 1 },
1020 [IB_QPS_ERR] = { .valid = 1 },
1021 [IB_QPS_RTS] = {
1022 .valid = 1,
1023 .opt_param = {
1024 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1025 IB_QP_QKEY),
1026 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1027 IB_QP_ALT_PATH |
1028 IB_QP_ACCESS_FLAGS |
1029 IB_QP_PATH_MIG_STATE),
1030 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1031 IB_QP_ALT_PATH |
1032 IB_QP_ACCESS_FLAGS |
1033 IB_QP_MIN_RNR_TIMER |
1034 IB_QP_PATH_MIG_STATE),
b42b63cf
SH		 1035 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1036 IB_QP_ALT_PATH |
1037 IB_QP_ACCESS_FLAGS |
1038 IB_QP_PATH_MIG_STATE),
1039 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1040 IB_QP_ALT_PATH |
1041 IB_QP_ACCESS_FLAGS |
1042 IB_QP_MIN_RNR_TIMER |
1043 IB_QP_PATH_MIG_STATE),
8a51866f
RD		 1044 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1045 IB_QP_QKEY),
1046 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1047 IB_QP_QKEY),
1048 }
1049 },
1050 [IB_QPS_SQD] = {
1051 .valid = 1,
1052 .opt_param = {
1053 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
1054 IB_QP_QKEY),
1055 [IB_QPT_UC] = (IB_QP_AV |
8a51866f
RD		 1056 IB_QP_ALT_PATH |
1057 IB_QP_ACCESS_FLAGS |
1058 IB_QP_PKEY_INDEX |
1059 IB_QP_PATH_MIG_STATE),
1060 [IB_QPT_RC] = (IB_QP_PORT |
1061 IB_QP_AV |
1062 IB_QP_TIMEOUT |
1063 IB_QP_RETRY_CNT |
1064 IB_QP_RNR_RETRY |
1065 IB_QP_MAX_QP_RD_ATOMIC |
1066 IB_QP_MAX_DEST_RD_ATOMIC |
8a51866f
RD		 1067 IB_QP_ALT_PATH |
1068 IB_QP_ACCESS_FLAGS |
1069 IB_QP_PKEY_INDEX |
1070 IB_QP_MIN_RNR_TIMER |
1071 IB_QP_PATH_MIG_STATE),
b42b63cf
SH		 1072 [IB_QPT_XRC_INI] = (IB_QP_PORT |
1073 IB_QP_AV |
1074 IB_QP_TIMEOUT |
1075 IB_QP_RETRY_CNT |
1076 IB_QP_RNR_RETRY |
1077 IB_QP_MAX_QP_RD_ATOMIC |
1078 IB_QP_ALT_PATH |
1079 IB_QP_ACCESS_FLAGS |
1080 IB_QP_PKEY_INDEX |
1081 IB_QP_PATH_MIG_STATE),
1082 [IB_QPT_XRC_TGT] = (IB_QP_PORT |
1083 IB_QP_AV |
1084 IB_QP_TIMEOUT |
1085 IB_QP_MAX_DEST_RD_ATOMIC |
1086 IB_QP_ALT_PATH |
1087 IB_QP_ACCESS_FLAGS |
1088 IB_QP_PKEY_INDEX |
1089 IB_QP_MIN_RNR_TIMER |
1090 IB_QP_PATH_MIG_STATE),
8a51866f
RD		 1091 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
1092 IB_QP_QKEY),
1093 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
1094 IB_QP_QKEY),
1095 }
1096 }
1097 },
1098 [IB_QPS_SQE] = {
1099 [IB_QPS_RESET] = { .valid = 1 },
1100 [IB_QPS_ERR] = { .valid = 1 },
1101 [IB_QPS_RTS] = {
1102 .valid = 1,
1103 .opt_param = {
1104 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1105 IB_QP_QKEY),
1106 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1107 IB_QP_ACCESS_FLAGS),
1108 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1109 IB_QP_QKEY),
1110 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1111 IB_QP_QKEY),
1112 }
1113 }
1114 },
1115 [IB_QPS_ERR] = {
1116 [IB_QPS_RESET] = { .valid = 1 },
1117 [IB_QPS_ERR] = { .valid = 1 }
1118 }
1119};
1120
1121int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB		 1122 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1123 enum rdma_link_layer ll)
8a51866f
RD		 1124{
1125 enum ib_qp_attr_mask req_param, opt_param;
1126
1127 if (cur_state < 0 || cur_state > IB_QPS_ERR ||
1128 next_state < 0 || next_state > IB_QPS_ERR)
1129 return 0;
1130
1131 if (mask & IB_QP_CUR_STATE &&
1132 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
1133 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
1134 return 0;
1135
1136 if (!qp_state_table[cur_state][next_state].valid)
1137 return 0;
1138
1139 req_param = qp_state_table[cur_state][next_state].req_param[type];
1140 opt_param = qp_state_table[cur_state][next_state].opt_param[type];
1141
1142 if ((mask & req_param) != req_param)
1143 return 0;
1144
1145 if (mask & ~(req_param | opt_param | IB_QP_STATE))
1146 return 0;
1147
1148 return 1;
1149}
1150EXPORT_SYMBOL(ib_modify_qp_is_ok);
1151
dbf727de
MB		 1152int ib_resolve_eth_dmac(struct ib_qp *qp,
1153 struct ib_qp_attr *qp_attr, int *qp_attr_mask)
ed4c54e5
OG		 1154{
1155 int ret = 0;
ed4c54e5 1156
dbf727de
MB		 1157 if (*qp_attr_mask & IB_QP_AV) {
1158 if (qp_attr->ah_attr.port_num < rdma_start_port(qp->device) ||
1159 qp_attr->ah_attr.port_num > rdma_end_port(qp->device))
1160 return -EINVAL;
1161
1162 if (!rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))
1163 return 0;
1164
ed4c54e5 1165 if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
dbf727de
MB		 1166 rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw,
1167 qp_attr->ah_attr.dmac);
ed4c54e5 1168 } else {
dbf727de
MB		 1169 union ib_gid sgid;
1170 struct ib_gid_attr sgid_attr;
1171 int ifindex;
c3efe750 1172 int hop_limit;
dbf727de
MB		 1173
1174 ret = ib_query_gid(qp->device,
1175 qp_attr->ah_attr.port_num,
1176 qp_attr->ah_attr.grh.sgid_index,
1177 &sgid, &sgid_attr);
1178
1179 if (ret || !sgid_attr.ndev) {
1180 if (!ret)
1181 ret = -ENXIO;
ed4c54e5 1182 goto out;
dbf727de
MB		 1183 }
1184
1185 ifindex = sgid_attr.ndev->ifindex;
1186
f7f4b23e
MB		 1187 ret = rdma_addr_find_l2_eth_by_grh(&sgid,
1188 &qp_attr->ah_attr.grh.dgid,
1189 qp_attr->ah_attr.dmac,
c3efe750 1190 NULL, &ifindex, &hop_limit);
dbf727de
MB		 1191
1192 dev_put(sgid_attr.ndev);
c3efe750
MB		 1193
1194 qp_attr->ah_attr.grh.hop_limit = hop_limit;
ed4c54e5 1195 }
ed4c54e5
OG		 1196 }
1197out:
1198 return ret;
1199}
dbf727de 1200EXPORT_SYMBOL(ib_resolve_eth_dmac);
ed4c54e5
OG		 1201
1202
1da177e4
LT		 1203int ib_modify_qp(struct ib_qp *qp,
1204 struct ib_qp_attr *qp_attr,
1205 int qp_attr_mask)
1206{
ed4c54e5
OG		 1207 int ret;
1208
dbf727de 1209 ret = ib_resolve_eth_dmac(qp, qp_attr, &qp_attr_mask);
ed4c54e5
OG		 1210 if (ret)
1211 return ret;
1212
0e0ec7e0 1213 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1da177e4
LT		 1214}
1215EXPORT_SYMBOL(ib_modify_qp);
1216
1217int ib_query_qp(struct ib_qp *qp,
1218 struct ib_qp_attr *qp_attr,
1219 int qp_attr_mask,
1220 struct ib_qp_init_attr *qp_init_attr)
1221{
1222 return qp->device->query_qp ?
0e0ec7e0 1223 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1da177e4
LT		 1224 -ENOSYS;
1225}
1226EXPORT_SYMBOL(ib_query_qp);
1227
0e0ec7e0
SH		 1228int ib_close_qp(struct ib_qp *qp)
1229{
1230 struct ib_qp *real_qp;
1231 unsigned long flags;
1232
1233 real_qp = qp->real_qp;
1234 if (real_qp == qp)
1235 return -EINVAL;
1236
1237 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1238 list_del(&qp->open_list);
1239 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1240
1241 atomic_dec(&real_qp->usecnt);
1242 kfree(qp);
1243
1244 return 0;
1245}
1246EXPORT_SYMBOL(ib_close_qp);
1247
1248static int __ib_destroy_shared_qp(struct ib_qp *qp)
1249{
1250 struct ib_xrcd *xrcd;
1251 struct ib_qp *real_qp;
1252 int ret;
1253
1254 real_qp = qp->real_qp;
1255 xrcd = real_qp->xrcd;
1256
1257 mutex_lock(&xrcd->tgt_qp_mutex);
1258 ib_close_qp(qp);
1259 if (atomic_read(&real_qp->usecnt) == 0)
1260 list_del(&real_qp->xrcd_list);
1261 else
1262 real_qp = NULL;
1263 mutex_unlock(&xrcd->tgt_qp_mutex);
1264
1265 if (real_qp) {
1266 ret = ib_destroy_qp(real_qp);
1267 if (!ret)
1268 atomic_dec(&xrcd->usecnt);
1269 else
1270 __ib_insert_xrcd_qp(xrcd, real_qp);
1271 }
1272
1273 return 0;
1274}
1275
1da177e4
LT		 1276int ib_destroy_qp(struct ib_qp *qp)
1277{
1278 struct ib_pd *pd;
1279 struct ib_cq *scq, *rcq;
1280 struct ib_srq *srq;
1281 int ret;
1282
fffb0383
CH		 1283 WARN_ON_ONCE(qp->mrs_used > 0);
1284
0e0ec7e0
SH		 1285 if (atomic_read(&qp->usecnt))
1286 return -EBUSY;
1287
1288 if (qp->real_qp != qp)
1289 return __ib_destroy_shared_qp(qp);
1290
b42b63cf
SH		 1291 pd = qp->pd;
1292 scq = qp->send_cq;
1293 rcq = qp->recv_cq;
1294 srq = qp->srq;
1da177e4 1295
a060b562
CH		 1296 if (!qp->uobject)
1297 rdma_rw_cleanup_mrs(qp);
1298
1da177e4
LT		 1299 ret = qp->device->destroy_qp(qp);
1300 if (!ret) {
b42b63cf
SH		 1301 if (pd)
1302 atomic_dec(&pd->usecnt);
1303 if (scq)
1304 atomic_dec(&scq->usecnt);
1305 if (rcq)
1306 atomic_dec(&rcq->usecnt);
1da177e4
LT		 1307 if (srq)
1308 atomic_dec(&srq->usecnt);
1309 }
1310
1311 return ret;
1312}
1313EXPORT_SYMBOL(ib_destroy_qp);
1314
1315/* Completion queues */
1316
1317struct ib_cq *ib_create_cq(struct ib_device *device,
1318 ib_comp_handler comp_handler,
1319 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB		 1320 void *cq_context,
1321 const struct ib_cq_init_attr *cq_attr)
1da177e4
LT		 1322{
1323 struct ib_cq *cq;
1324
8e37210b 1325 cq = device->create_cq(device, cq_attr, NULL, NULL);
1da177e4
LT		 1326
1327 if (!IS_ERR(cq)) {
1328 cq->device = device;
b5e81bf5 1329 cq->uobject = NULL;
1da177e4
LT		 1330 cq->comp_handler = comp_handler;
1331 cq->event_handler = event_handler;
1332 cq->cq_context = cq_context;
1333 atomic_set(&cq->usecnt, 0);
1334 }
1335
1336 return cq;
1337}
1338EXPORT_SYMBOL(ib_create_cq);
1339
2dd57162
EC		 1340int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1341{
1342 return cq->device->modify_cq ?
1343 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1344}
1345EXPORT_SYMBOL(ib_modify_cq);
1346
1da177e4
LT		 1347int ib_destroy_cq(struct ib_cq *cq)
1348{
1349 if (atomic_read(&cq->usecnt))
1350 return -EBUSY;
1351
1352 return cq->device->destroy_cq(cq);
1353}
1354EXPORT_SYMBOL(ib_destroy_cq);
1355
a74cd4af 1356int ib_resize_cq(struct ib_cq *cq, int cqe)
1da177e4 1357{
40de2e54 1358 return cq->device->resize_cq ?
33b9b3ee 1359 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1da177e4
LT		 1360}
1361EXPORT_SYMBOL(ib_resize_cq);
1362
1363/* Memory regions */
1364
1365struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
1366{
1367 struct ib_mr *mr;
1c636f80
EC		 1368 int err;
1369
1370 err = ib_check_mr_access(mr_access_flags);
1371 if (err)
1372 return ERR_PTR(err);
1da177e4
LT		 1373
1374 mr = pd->device->get_dma_mr(pd, mr_access_flags);
1375
1376 if (!IS_ERR(mr)) {
b5e81bf5
RD		 1377 mr->device = pd->device;
1378 mr->pd = pd;
1379 mr->uobject = NULL;
1da177e4 1380 atomic_inc(&pd->usecnt);
d4a85c30 1381 mr->need_inval = false;
1da177e4
LT		 1382 }
1383
1384 return mr;
1385}
1386EXPORT_SYMBOL(ib_get_dma_mr);
1387
1da177e4
LT		 1388int ib_dereg_mr(struct ib_mr *mr)
1389{
ab67ed8d 1390 struct ib_pd *pd = mr->pd;
1da177e4
LT		 1391 int ret;
1392
1da177e4
LT		 1393 ret = mr->device->dereg_mr(mr);
1394 if (!ret)
1395 atomic_dec(&pd->usecnt);
1396
1397 return ret;
1398}
1399EXPORT_SYMBOL(ib_dereg_mr);
1400
9bee178b
SG		 1401/**
1402 * ib_alloc_mr() - Allocates a memory region
1403 * @pd: protection domain associated with the region
1404 * @mr_type: memory region type
1405 * @max_num_sg: maximum sg entries available for registration.
1406 *
1407 * Notes:
1408 * Memory registeration page/sg lists must not exceed max_num_sg.
1409 * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
1410 * max_num_sg * used_page_size.
1411 *
1412 */
1413struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
1414 enum ib_mr_type mr_type,
1415 u32 max_num_sg)
00f7ec36
SW		 1416{
1417 struct ib_mr *mr;
1418
d9f272c5 1419 if (!pd->device->alloc_mr)
00f7ec36
SW		 1420 return ERR_PTR(-ENOSYS);
1421
d9f272c5 1422 mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
00f7ec36
SW		 1423 if (!IS_ERR(mr)) {
1424 mr->device = pd->device;
1425 mr->pd = pd;
1426 mr->uobject = NULL;
1427 atomic_inc(&pd->usecnt);
d4a85c30 1428 mr->need_inval = false;
00f7ec36
SW		 1429 }
1430
1431 return mr;
1432}
d9f272c5 1433EXPORT_SYMBOL(ib_alloc_mr);
00f7ec36 1434
1da177e4
LT		 1435/* "Fast" memory regions */
1436
1437struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1438 int mr_access_flags,
1439 struct ib_fmr_attr *fmr_attr)
1440{
1441 struct ib_fmr *fmr;
1442
1443 if (!pd->device->alloc_fmr)
1444 return ERR_PTR(-ENOSYS);
1445
1446 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1447 if (!IS_ERR(fmr)) {
1448 fmr->device = pd->device;
1449 fmr->pd = pd;
1450 atomic_inc(&pd->usecnt);
1451 }
1452
1453 return fmr;
1454}
1455EXPORT_SYMBOL(ib_alloc_fmr);
1456
1457int ib_unmap_fmr(struct list_head *fmr_list)
1458{
1459 struct ib_fmr *fmr;
1460
1461 if (list_empty(fmr_list))
1462 return 0;
1463
1464 fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1465 return fmr->device->unmap_fmr(fmr_list);
1466}
1467EXPORT_SYMBOL(ib_unmap_fmr);
1468
1469int ib_dealloc_fmr(struct ib_fmr *fmr)
1470{
1471 struct ib_pd *pd;
1472 int ret;
1473
1474 pd = fmr->pd;
1475 ret = fmr->device->dealloc_fmr(fmr);
1476 if (!ret)
1477 atomic_dec(&pd->usecnt);
1478
1479 return ret;
1480}
1481EXPORT_SYMBOL(ib_dealloc_fmr);
1482
1483/* Multicast groups */
1484
1485int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1486{
c3bccbfb
OG		 1487 int ret;
1488
0c33aeed
JM		 1489 if (!qp->device->attach_mcast)
1490 return -ENOSYS;
1491 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1492 return -EINVAL;
1493
c3bccbfb
OG		 1494 ret = qp->device->attach_mcast(qp, gid, lid);
1495 if (!ret)
1496 atomic_inc(&qp->usecnt);
1497 return ret;
1da177e4
LT		 1498}
1499EXPORT_SYMBOL(ib_attach_mcast);
1500
1501int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1502{
c3bccbfb
OG		 1503 int ret;
1504
0c33aeed
JM		 1505 if (!qp->device->detach_mcast)
1506 return -ENOSYS;
1507 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1508 return -EINVAL;
1509
c3bccbfb
OG		 1510 ret = qp->device->detach_mcast(qp, gid, lid);
1511 if (!ret)
1512 atomic_dec(&qp->usecnt);
1513 return ret;
1da177e4
LT		 1514}
1515EXPORT_SYMBOL(ib_detach_mcast);
59991f94
SH		 1516
1517struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1518{
1519 struct ib_xrcd *xrcd;
1520
1521 if (!device->alloc_xrcd)
1522 return ERR_PTR(-ENOSYS);
1523
1524 xrcd = device->alloc_xrcd(device, NULL, NULL);
1525 if (!IS_ERR(xrcd)) {
1526 xrcd->device = device;
53d0bd1e 1527 xrcd->inode = NULL;
59991f94 1528 atomic_set(&xrcd->usecnt, 0);
d3d72d90
SH		 1529 mutex_init(&xrcd->tgt_qp_mutex);
1530 INIT_LIST_HEAD(&xrcd->tgt_qp_list);
59991f94
SH		 1531 }
1532
1533 return xrcd;
1534}
1535EXPORT_SYMBOL(ib_alloc_xrcd);
1536
1537int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1538{
d3d72d90
SH		 1539 struct ib_qp *qp;
1540 int ret;
1541
59991f94
SH		 1542 if (atomic_read(&xrcd->usecnt))
1543 return -EBUSY;
1544
d3d72d90
SH		 1545 while (!list_empty(&xrcd->tgt_qp_list)) {
1546 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1547 ret = ib_destroy_qp(qp);
1548 if (ret)
1549 return ret;
1550 }
1551
59991f94
SH		 1552 return xrcd->device->dealloc_xrcd(xrcd);
1553}
1554EXPORT_SYMBOL(ib_dealloc_xrcd);
319a441d
HHZ		 1555
1556struct ib_flow *ib_create_flow(struct ib_qp *qp,
1557 struct ib_flow_attr *flow_attr,
1558 int domain)
1559{
1560 struct ib_flow *flow_id;
1561 if (!qp->device->create_flow)
1562 return ERR_PTR(-ENOSYS);
1563
1564 flow_id = qp->device->create_flow(qp, flow_attr, domain);
1565 if (!IS_ERR(flow_id))
1566 atomic_inc(&qp->usecnt);
1567 return flow_id;
1568}
1569EXPORT_SYMBOL(ib_create_flow);
1570
1571int ib_destroy_flow(struct ib_flow *flow_id)
1572{
1573 int err;
1574 struct ib_qp *qp = flow_id->qp;
1575
1576 err = qp->device->destroy_flow(flow_id);
1577 if (!err)
1578 atomic_dec(&qp->usecnt);
1579 return err;
1580}
1581EXPORT_SYMBOL(ib_destroy_flow);
1b01d335
SG		 1582
1583int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1584 struct ib_mr_status *mr_status)
1585{
1586 return mr->device->check_mr_status ?
1587 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1588}
1589EXPORT_SYMBOL(ib_check_mr_status);
4c67e2bf 1590
50174a7f
EC		 1591int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
1592 int state)
1593{
1594 if (!device->set_vf_link_state)
1595 return -ENOSYS;
1596
1597 return device->set_vf_link_state(device, vf, port, state);
1598}
1599EXPORT_SYMBOL(ib_set_vf_link_state);
1600
1601int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
1602 struct ifla_vf_info *info)
1603{
1604 if (!device->get_vf_config)
1605 return -ENOSYS;
1606
1607 return device->get_vf_config(device, vf, port, info);
1608}
1609EXPORT_SYMBOL(ib_get_vf_config);
1610
1611int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
1612 struct ifla_vf_stats *stats)
1613{
1614 if (!device->get_vf_stats)
1615 return -ENOSYS;
1616
1617 return device->get_vf_stats(device, vf, port, stats);
1618}
1619EXPORT_SYMBOL(ib_get_vf_stats);
1620
1621int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
1622 int type)
1623{
1624 if (!device->set_vf_guid)
1625 return -ENOSYS;
1626
1627 return device->set_vf_guid(device, vf, port, guid, type);
1628}
1629EXPORT_SYMBOL(ib_set_vf_guid);
1630
4c67e2bf
SG		 1631/**
1632 * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
1633 * and set it the memory region.
1634 * @mr: memory region
1635 * @sg: dma mapped scatterlist
1636 * @sg_nents: number of entries in sg
ff2ba993 1637 * @sg_offset: offset in bytes into sg
4c67e2bf
SG		 1638 * @page_size: page vector desired page size
1639 *
1640 * Constraints:
1641 * - The first sg element is allowed to have an offset.
1642 * - Each sg element must be aligned to page_size (or physically
1643 * contiguous to the previous element). In case an sg element has a
1644 * non contiguous offset, the mapping prefix will not include it.
1645 * - The last sg element is allowed to have length less than page_size.
1646 * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
1647 * then only max_num_sg entries will be mapped.
f5aa9159
SG		 1648 * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS_REG, non of these
1649 * constraints holds and the page_size argument is ignored.
4c67e2bf
SG		 1650 *
1651 * Returns the number of sg elements that were mapped to the memory region.
1652 *
1653 * After this completes successfully, the memory region
1654 * is ready for registration.
1655 */
ff2ba993
CH		 1656int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
1657 unsigned int sg_offset, unsigned int page_size)
4c67e2bf
SG		 1658{
1659 if (unlikely(!mr->device->map_mr_sg))
1660 return -ENOSYS;
1661
1662 mr->page_size = page_size;
1663
ff2ba993 1664 return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
4c67e2bf
SG		 1665}
1666EXPORT_SYMBOL(ib_map_mr_sg);
1667
1668/**
1669 * ib_sg_to_pages() - Convert the largest prefix of a sg list
1670 * to a page vector
1671 * @mr: memory region
1672 * @sgl: dma mapped scatterlist
1673 * @sg_nents: number of entries in sg
ff2ba993 1674 * @sg_offset: offset in bytes into sg
4c67e2bf
SG		 1675 * @set_page: driver page assignment function pointer
1676 *
8f5ba10e 1677 * Core service helper for drivers to convert the largest
4c67e2bf
SG		 1678 * prefix of given sg list to a page vector. The sg list
1679 * prefix converted is the prefix that meet the requirements
1680 * of ib_map_mr_sg.
1681 *
1682 * Returns the number of sg elements that were assigned to
1683 * a page vector.
1684 */
ff2ba993
CH		 1685int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
1686 unsigned int sg_offset, int (*set_page)(struct ib_mr *, u64))
4c67e2bf
SG		 1687{
1688 struct scatterlist *sg;
b6aeb980 1689 u64 last_end_dma_addr = 0;
4c67e2bf
SG		 1690 unsigned int last_page_off = 0;
1691 u64 page_mask = ~((u64)mr->page_size - 1);
8f5ba10e 1692 int i, ret;
4c67e2bf 1693
ff2ba993 1694 mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
4c67e2bf
SG		 1695 mr->length = 0;
1696
1697 for_each_sg(sgl, sg, sg_nents, i) {
ff2ba993
CH		 1698 u64 dma_addr = sg_dma_address(sg) + sg_offset;
1699 unsigned int dma_len = sg_dma_len(sg) - sg_offset;
4c67e2bf
SG		 1700 u64 end_dma_addr = dma_addr + dma_len;
1701 u64 page_addr = dma_addr & page_mask;
1702
8f5ba10e
BVA		 1703 /*
1704 * For the second and later elements, check whether either the
1705 * end of element i-1 or the start of element i is not aligned
1706 * on a page boundary.
1707 */
1708 if (i && (last_page_off != 0 || page_addr != dma_addr)) {
1709 /* Stop mapping if there is a gap. */
1710 if (last_end_dma_addr != dma_addr)
1711 break;
1712
1713 /*
1714 * Coalesce this element with the last. If it is small
1715 * enough just update mr->length. Otherwise start
1716 * mapping from the next page.
1717 */
1718 goto next_page;
4c67e2bf
SG		 1719 }
1720
1721 do {
8f5ba10e
BVA		 1722 ret = set_page(mr, page_addr);
1723 if (unlikely(ret < 0))
1724 return i ? : ret;
1725next_page:
4c67e2bf
SG		 1726 page_addr += mr->page_size;
1727 } while (page_addr < end_dma_addr);
1728
1729 mr->length += dma_len;
1730 last_end_dma_addr = end_dma_addr;
4c67e2bf 1731 last_page_off = end_dma_addr & ~page_mask;
ff2ba993
CH		 1732
1733 sg_offset = 0;
4c67e2bf
SG		 1734 }
1735
4c67e2bf
SG		 1736 return i;
1737}
1738EXPORT_SYMBOL(ib_sg_to_pages);
765d6774
SW		 1739
1740struct ib_drain_cqe {
1741 struct ib_cqe cqe;
1742 struct completion done;
1743};
1744
1745static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
1746{
1747 struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
1748 cqe);
1749
1750 complete(&cqe->done);
1751}
1752
1753/*
1754 * Post a WR and block until its completion is reaped for the SQ.
1755 */
1756static void __ib_drain_sq(struct ib_qp *qp)
1757{
1758 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1759 struct ib_drain_cqe sdrain;
1760 struct ib_send_wr swr = {}, *bad_swr;
1761 int ret;
1762
1763 if (qp->send_cq->poll_ctx == IB_POLL_DIRECT) {
1764 WARN_ONCE(qp->send_cq->poll_ctx == IB_POLL_DIRECT,
1765 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1766 return;
1767 }
1768
1769 swr.wr_cqe = &sdrain.cqe;
1770 sdrain.cqe.done = ib_drain_qp_done;
1771 init_completion(&sdrain.done);
1772
1773 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1774 if (ret) {
1775 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1776 return;
1777 }
1778
1779 ret = ib_post_send(qp, &swr, &bad_swr);
1780 if (ret) {
1781 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1782 return;
1783 }
1784
1785 wait_for_completion(&sdrain.done);
1786}
1787
1788/*
1789 * Post a WR and block until its completion is reaped for the RQ.
1790 */
1791static void __ib_drain_rq(struct ib_qp *qp)
1792{
1793 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1794 struct ib_drain_cqe rdrain;
1795 struct ib_recv_wr rwr = {}, *bad_rwr;
1796 int ret;
1797
1798 if (qp->recv_cq->poll_ctx == IB_POLL_DIRECT) {
1799 WARN_ONCE(qp->recv_cq->poll_ctx == IB_POLL_DIRECT,
1800 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1801 return;
1802 }
1803
1804 rwr.wr_cqe = &rdrain.cqe;
1805 rdrain.cqe.done = ib_drain_qp_done;
1806 init_completion(&rdrain.done);
1807
1808 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1809 if (ret) {
1810 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1811 return;
1812 }
1813
1814 ret = ib_post_recv(qp, &rwr, &bad_rwr);
1815 if (ret) {
1816 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
1817 return;
1818 }
1819
1820 wait_for_completion(&rdrain.done);
1821}
1822
1823/**
1824 * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
1825 * application.
1826 * @qp: queue pair to drain
1827 *
1828 * If the device has a provider-specific drain function, then
1829 * call that. Otherwise call the generic drain function
1830 * __ib_drain_sq().
1831 *
1832 * The caller must:
1833 *
1834 * ensure there is room in the CQ and SQ for the drain work request and
1835 * completion.
1836 *
1837 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
1838 * IB_POLL_DIRECT.
1839 *
1840 * ensure that there are no other contexts that are posting WRs concurrently.
1841 * Otherwise the drain is not guaranteed.
1842 */
1843void ib_drain_sq(struct ib_qp *qp)
1844{
1845 if (qp->device->drain_sq)
1846 qp->device->drain_sq(qp);
1847 else
1848 __ib_drain_sq(qp);
1849}
1850EXPORT_SYMBOL(ib_drain_sq);
1851
1852/**
1853 * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
1854 * application.
1855 * @qp: queue pair to drain
1856 *
1857 * If the device has a provider-specific drain function, then
1858 * call that. Otherwise call the generic drain function
1859 * __ib_drain_rq().
1860 *
1861 * The caller must:
1862 *
1863 * ensure there is room in the CQ and RQ for the drain work request and
1864 * completion.
1865 *
1866 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
1867 * IB_POLL_DIRECT.
1868 *
1869 * ensure that there are no other contexts that are posting WRs concurrently.
1870 * Otherwise the drain is not guaranteed.
1871 */
1872void ib_drain_rq(struct ib_qp *qp)
1873{
1874 if (qp->device->drain_rq)
1875 qp->device->drain_rq(qp);
1876 else
1877 __ib_drain_rq(qp);
1878}
1879EXPORT_SYMBOL(ib_drain_rq);
1880
1881/**
1882 * ib_drain_qp() - Block until all CQEs have been consumed by the
1883 * application on both the RQ and SQ.
1884 * @qp: queue pair to drain
1885 *
1886 * The caller must:
1887 *
1888 * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
1889 * and completions.
1890 *
1891 * allocate the CQs using ib_alloc_cq() and the CQ poll context cannot be
1892 * IB_POLL_DIRECT.
1893 *
1894 * ensure that there are no other contexts that are posting WRs concurrently.
1895 * Otherwise the drain is not guaranteed.
1896 */
1897void ib_drain_qp(struct ib_qp *qp)
1898{
1899 ib_drain_sq(qp);
42235f80
SG		 1900 if (!qp->srq)
1901 ib_drain_rq(qp);
765d6774
SW		 1902}
1903EXPORT_SYMBOL(ib_drain_qp);
Linux kernel - Deliverables
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