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RDMA/cxgb4: Fix LE hash collision bug for passive open connection
[deliverable/linux.git] / drivers / infiniband / hw / cxgb4 / device.c
CommitLineData
cfdda9d7
SW		 1/*
2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/debugfs.h>
e572568f 35#include <linux/vmalloc.h>
cfdda9d7
SW		 36
37#include <rdma/ib_verbs.h>
38
39#include "iw_cxgb4.h"
40
41#define DRV_VERSION "0.1"
42
43MODULE_AUTHOR("Steve Wise");
44MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
45MODULE_LICENSE("Dual BSD/GPL");
46MODULE_VERSION(DRV_VERSION);
47
2c974781
VP		 48struct uld_ctx {
49 struct list_head entry;
50 struct cxgb4_lld_info lldi;
51 struct c4iw_dev *dev;
52};
53
2f25e9a5 54static LIST_HEAD(uld_ctx_list);
cfdda9d7
SW		 55static DEFINE_MUTEX(dev_mutex);
56
57static struct dentry *c4iw_debugfs_root;
58
9e8d1fa3 59struct c4iw_debugfs_data {
cfdda9d7
SW		 60 struct c4iw_dev *devp;
61 char *buf;
62 int bufsize;
63 int pos;
64};
65
9e8d1fa3 66static int count_idrs(int id, void *p, void *data)
cfdda9d7 67{
cfdda9d7
SW		 68 int *countp = data;
69
cfdda9d7
SW		 70 *countp = *countp + 1;
71 return 0;
72}
73
9e8d1fa3
SW		 74static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
75 loff_t *ppos)
76{
77 struct c4iw_debugfs_data *d = file->private_data;
9e8d1fa3 78
3160977a 79 return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
9e8d1fa3
SW		 80}
81
82static int dump_qp(int id, void *p, void *data)
cfdda9d7
SW		 83{
84 struct c4iw_qp *qp = p;
9e8d1fa3 85 struct c4iw_debugfs_data *qpd = data;
cfdda9d7
SW		 86 int space;
87 int cc;
88
89 if (id != qp->wq.sq.qid)
90 return 0;
91
92 space = qpd->bufsize - qpd->pos - 1;
93 if (space == 0)
94 return 1;
95
96 if (qp->ep)
db5d040d
SW		 97 cc = snprintf(qpd->buf + qpd->pos, space,
98 "qp sq id %u rq id %u state %u onchip %u "
cfdda9d7 99 "ep tid %u state %u %pI4:%u->%pI4:%u\n",
db5d040d
SW		 100 qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state,
101 qp->wq.sq.flags & T4_SQ_ONCHIP,
cfdda9d7
SW		 102 qp->ep->hwtid, (int)qp->ep->com.state,
103 &qp->ep->com.local_addr.sin_addr.s_addr,
104 ntohs(qp->ep->com.local_addr.sin_port),
105 &qp->ep->com.remote_addr.sin_addr.s_addr,
106 ntohs(qp->ep->com.remote_addr.sin_port));
107 else
db5d040d
SW		 108 cc = snprintf(qpd->buf + qpd->pos, space,
109 "qp sq id %u rq id %u state %u onchip %u\n",
110 qp->wq.sq.qid, qp->wq.rq.qid,
111 (int)qp->attr.state,
112 qp->wq.sq.flags & T4_SQ_ONCHIP);
cfdda9d7
SW		 113 if (cc < space)
114 qpd->pos += cc;
115 return 0;
116}
117
118static int qp_release(struct inode *inode, struct file *file)
119{
9e8d1fa3 120 struct c4iw_debugfs_data *qpd = file->private_data;
cfdda9d7
SW		 121 if (!qpd) {
122 printk(KERN_INFO "%s null qpd?\n", __func__);
123 return 0;
124 }
d716a2a0 125 vfree(qpd->buf);
cfdda9d7
SW		 126 kfree(qpd);
127 return 0;
128}
129
130static int qp_open(struct inode *inode, struct file *file)
131{
9e8d1fa3 132 struct c4iw_debugfs_data *qpd;
cfdda9d7
SW		 133 int ret = 0;
134 int count = 1;
135
136 qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
137 if (!qpd) {
138 ret = -ENOMEM;
139 goto out;
140 }
141 qpd->devp = inode->i_private;
142 qpd->pos = 0;
143
144 spin_lock_irq(&qpd->devp->lock);
9e8d1fa3 145 idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
cfdda9d7
SW		 146 spin_unlock_irq(&qpd->devp->lock);
147
148 qpd->bufsize = count * 128;
d716a2a0 149 qpd->buf = vmalloc(qpd->bufsize);
cfdda9d7
SW		 150 if (!qpd->buf) {
151 ret = -ENOMEM;
152 goto err1;
153 }
154
155 spin_lock_irq(&qpd->devp->lock);
9e8d1fa3 156 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
cfdda9d7
SW		 157 spin_unlock_irq(&qpd->devp->lock);
158
159 qpd->buf[qpd->pos++] = 0;
160 file->private_data = qpd;
161 goto out;
162err1:
163 kfree(qpd);
164out:
165 return ret;
166}
167
9e8d1fa3
SW		 168static const struct file_operations qp_debugfs_fops = {
169 .owner = THIS_MODULE,
170 .open = qp_open,
171 .release = qp_release,
172 .read = debugfs_read,
8bbac892 173 .llseek = default_llseek,
9e8d1fa3
SW		 174};
175
176static int dump_stag(int id, void *p, void *data)
cfdda9d7 177{
9e8d1fa3
SW		 178 struct c4iw_debugfs_data *stagd = data;
179 int space;
180 int cc;
cfdda9d7 181
9e8d1fa3
SW		 182 space = stagd->bufsize - stagd->pos - 1;
183 if (space == 0)
184 return 1;
185
186 cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
187 if (cc < space)
188 stagd->pos += cc;
189 return 0;
190}
191
192static int stag_release(struct inode *inode, struct file *file)
193{
194 struct c4iw_debugfs_data *stagd = file->private_data;
195 if (!stagd) {
196 printk(KERN_INFO "%s null stagd?\n", __func__);
cfdda9d7 197 return 0;
9e8d1fa3
SW		 198 }
199 kfree(stagd->buf);
200 kfree(stagd);
201 return 0;
202}
cfdda9d7 203
9e8d1fa3
SW		 204static int stag_open(struct inode *inode, struct file *file)
205{
206 struct c4iw_debugfs_data *stagd;
207 int ret = 0;
208 int count = 1;
cfdda9d7 209
9e8d1fa3
SW		 210 stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
211 if (!stagd) {
212 ret = -ENOMEM;
213 goto out;
214 }
215 stagd->devp = inode->i_private;
216 stagd->pos = 0;
cfdda9d7 217
9e8d1fa3
SW		 218 spin_lock_irq(&stagd->devp->lock);
219 idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
220 spin_unlock_irq(&stagd->devp->lock);
221
222 stagd->bufsize = count * sizeof("0x12345678\n");
223 stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
224 if (!stagd->buf) {
225 ret = -ENOMEM;
226 goto err1;
cfdda9d7 227 }
9e8d1fa3
SW		 228
229 spin_lock_irq(&stagd->devp->lock);
230 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
231 spin_unlock_irq(&stagd->devp->lock);
232
233 stagd->buf[stagd->pos++] = 0;
234 file->private_data = stagd;
235 goto out;
236err1:
237 kfree(stagd);
238out:
239 return ret;
cfdda9d7
SW		 240}
241
9e8d1fa3 242static const struct file_operations stag_debugfs_fops = {
cfdda9d7 243 .owner = THIS_MODULE,
9e8d1fa3
SW		 244 .open = stag_open,
245 .release = stag_release,
246 .read = debugfs_read,
8bbac892 247 .llseek = default_llseek,
cfdda9d7
SW		 248};
249
422eea0a
VP		 250static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY"};
251
8d81ef34
VP		 252static int stats_show(struct seq_file *seq, void *v)
253{
254 struct c4iw_dev *dev = seq->private;
255
ec3eead2
VP		 256 seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
257 "Max", "Fail");
258 seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
8d81ef34 259 dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
ec3eead2
VP		 260 dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
261 seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
8d81ef34 262 dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
ec3eead2
VP		 263 dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
264 seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
8d81ef34 265 dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
ec3eead2
VP		 266 dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
267 seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
8d81ef34 268 dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
ec3eead2
VP		 269 dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
270 seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
8d81ef34 271 dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
ec3eead2
VP		 272 dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
273 seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
8d81ef34 274 dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
ec3eead2 275 dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
2c974781
VP		 276 seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
277 seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
278 seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
422eea0a
VP		 279 seq_printf(seq, " DB State: %s Transitions %llu\n",
280 db_state_str[dev->db_state],
281 dev->rdev.stats.db_state_transitions);
1cab775c 282 seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
8d81ef34
VP		 283 return 0;
284}
285
286static int stats_open(struct inode *inode, struct file *file)
287{
288 return single_open(file, stats_show, inode->i_private);
289}
290
291static ssize_t stats_clear(struct file *file, const char __user *buf,
292 size_t count, loff_t *pos)
293{
294 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
295
296 mutex_lock(&dev->rdev.stats.lock);
297 dev->rdev.stats.pd.max = 0;
ec3eead2 298 dev->rdev.stats.pd.fail = 0;
8d81ef34 299 dev->rdev.stats.qid.max = 0;
ec3eead2 300 dev->rdev.stats.qid.fail = 0;
8d81ef34 301 dev->rdev.stats.stag.max = 0;
ec3eead2 302 dev->rdev.stats.stag.fail = 0;
8d81ef34 303 dev->rdev.stats.pbl.max = 0;
ec3eead2 304 dev->rdev.stats.pbl.fail = 0;
8d81ef34 305 dev->rdev.stats.rqt.max = 0;
ec3eead2 306 dev->rdev.stats.rqt.fail = 0;
8d81ef34 307 dev->rdev.stats.ocqp.max = 0;
ec3eead2 308 dev->rdev.stats.ocqp.fail = 0;
2c974781
VP		 309 dev->rdev.stats.db_full = 0;
310 dev->rdev.stats.db_empty = 0;
311 dev->rdev.stats.db_drop = 0;
422eea0a 312 dev->rdev.stats.db_state_transitions = 0;
8d81ef34
VP		 313 mutex_unlock(&dev->rdev.stats.lock);
314 return count;
315}
316
317static const struct file_operations stats_debugfs_fops = {
318 .owner = THIS_MODULE,
319 .open = stats_open,
320 .release = single_release,
321 .read = seq_read,
322 .llseek = seq_lseek,
323 .write = stats_clear,
324};
325
cfdda9d7
SW		 326static int setup_debugfs(struct c4iw_dev *devp)
327{
328 struct dentry *de;
329
330 if (!devp->debugfs_root)
331 return -1;
332
333 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
334 (void *)devp, &qp_debugfs_fops);
335 if (de && de->d_inode)
336 de->d_inode->i_size = 4096;
9e8d1fa3
SW		 337
338 de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
339 (void *)devp, &stag_debugfs_fops);
340 if (de && de->d_inode)
341 de->d_inode->i_size = 4096;
8d81ef34
VP		 342
343 de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root,
344 (void *)devp, &stats_debugfs_fops);
345 if (de && de->d_inode)
346 de->d_inode->i_size = 4096;
347
cfdda9d7
SW		 348 return 0;
349}
350
351void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
352 struct c4iw_dev_ucontext *uctx)
353{
354 struct list_head *pos, *nxt;
355 struct c4iw_qid_list *entry;
356
357 mutex_lock(&uctx->lock);
358 list_for_each_safe(pos, nxt, &uctx->qpids) {
359 entry = list_entry(pos, struct c4iw_qid_list, entry);
360 list_del_init(&entry->entry);
8d81ef34 361 if (!(entry->qid & rdev->qpmask)) {
ec3eead2
VP		 362 c4iw_put_resource(&rdev->resource.qid_table,
363 entry->qid);
8d81ef34
VP		 364 mutex_lock(&rdev->stats.lock);
365 rdev->stats.qid.cur -= rdev->qpmask + 1;
366 mutex_unlock(&rdev->stats.lock);
367 }
cfdda9d7
SW		 368 kfree(entry);
369 }
370
371 list_for_each_safe(pos, nxt, &uctx->qpids) {
372 entry = list_entry(pos, struct c4iw_qid_list, entry);
373 list_del_init(&entry->entry);
374 kfree(entry);
375 }
376 mutex_unlock(&uctx->lock);
377}
378
379void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
380 struct c4iw_dev_ucontext *uctx)
381{
382 INIT_LIST_HEAD(&uctx->qpids);
383 INIT_LIST_HEAD(&uctx->cqids);
384 mutex_init(&uctx->lock);
385}
386
387/* Caller takes care of locking if needed */
388static int c4iw_rdev_open(struct c4iw_rdev *rdev)
389{
390 int err;
391
392 c4iw_init_dev_ucontext(rdev, &rdev->uctx);
393
394 /*
395 * qpshift is the number of bits to shift the qpid left in order
396 * to get the correct address of the doorbell for that qp.
397 */
398 rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
399 rdev->qpmask = rdev->lldi.udb_density - 1;
400 rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
401 rdev->cqmask = rdev->lldi.ucq_density - 1;
402 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
93fb72e4
SW		 403 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
404 "qp qid start %u size %u cq qid start %u size %u\n",
cfdda9d7
SW		 405 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
406 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
407 rdev->lldi.vr->pbl.start,
408 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
93fb72e4
SW		 409 rdev->lldi.vr->rq.size,
410 rdev->lldi.vr->qp.start,
411 rdev->lldi.vr->qp.size,
412 rdev->lldi.vr->cq.start,
413 rdev->lldi.vr->cq.size);
cfdda9d7
SW		 414 PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
415 "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
416 (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
417 (void *)pci_resource_start(rdev->lldi.pdev, 2),
418 rdev->lldi.db_reg,
419 rdev->lldi.gts_reg,
420 rdev->qpshift, rdev->qpmask,
421 rdev->cqshift, rdev->cqmask);
422
423 if (c4iw_num_stags(rdev) == 0) {
424 err = -EINVAL;
425 goto err1;
426 }
427
8d81ef34
VP		 428 rdev->stats.pd.total = T4_MAX_NUM_PD;
429 rdev->stats.stag.total = rdev->lldi.vr->stag.size;
430 rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
431 rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
432 rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
433 rdev->stats.qid.total = rdev->lldi.vr->qp.size;
434
cfdda9d7
SW		 435 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
436 if (err) {
437 printk(KERN_ERR MOD "error %d initializing resources\n", err);
438 goto err1;
439 }
440 err = c4iw_pblpool_create(rdev);
441 if (err) {
442 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
443 goto err2;
444 }
445 err = c4iw_rqtpool_create(rdev);
446 if (err) {
447 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
448 goto err3;
449 }
c6d7b267
SW		 450 err = c4iw_ocqp_pool_create(rdev);
451 if (err) {
452 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
453 goto err4;
454 }
cfdda9d7 455 return 0;
c6d7b267
SW		 456err4:
457 c4iw_rqtpool_destroy(rdev);
cfdda9d7
SW		 458err3:
459 c4iw_pblpool_destroy(rdev);
460err2:
461 c4iw_destroy_resource(&rdev->resource);
462err1:
463 return err;
464}
465
466static void c4iw_rdev_close(struct c4iw_rdev *rdev)
467{
468 c4iw_pblpool_destroy(rdev);
469 c4iw_rqtpool_destroy(rdev);
470 c4iw_destroy_resource(&rdev->resource);
471}
472
9efe10a1 473static void c4iw_dealloc(struct uld_ctx *ctx)
cfdda9d7 474{
2f25e9a5
SW		 475 c4iw_rdev_close(&ctx->dev->rdev);
476 idr_destroy(&ctx->dev->cqidr);
477 idr_destroy(&ctx->dev->qpidr);
478 idr_destroy(&ctx->dev->mmidr);
479 iounmap(ctx->dev->rdev.oc_mw_kva);
480 ib_dealloc_device(&ctx->dev->ibdev);
481 ctx->dev = NULL;
cfdda9d7
SW		 482}
483
9efe10a1
SW		 484static void c4iw_remove(struct uld_ctx *ctx)
485{
486 PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
487 c4iw_unregister_device(ctx->dev);
488 c4iw_dealloc(ctx);
489}
490
491static int rdma_supported(const struct cxgb4_lld_info *infop)
492{
493 return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
494 infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
495 infop->vr->cq.size > 0 && infop->vr->ocq.size > 0;
496}
497
cfdda9d7
SW		 498static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
499{
500 struct c4iw_dev *devp;
501 int ret;
502
9efe10a1
SW		 503 if (!rdma_supported(infop)) {
504 printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
505 pci_name(infop->pdev));
506 return ERR_PTR(-ENOSYS);
507 }
cfdda9d7
SW		 508 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
509 if (!devp) {
510 printk(KERN_ERR MOD "Cannot allocate ib device\n");
bbe9a0a2 511 return ERR_PTR(-ENOMEM);
cfdda9d7
SW		 512 }
513 devp->rdev.lldi = *infop;
514
c6d7b267
SW		 515 devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
516 (pci_resource_len(devp->rdev.lldi.pdev, 2) -
517 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
518 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
519 devp->rdev.lldi.vr->ocq.size);
520
2f25e9a5 521 PDBG(KERN_INFO MOD "ocq memory: "
c6d7b267
SW		 522 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
523 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
524 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
525
cfdda9d7
SW		 526 ret = c4iw_rdev_open(&devp->rdev);
527 if (ret) {
cfdda9d7
SW		 528 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
529 ib_dealloc_device(&devp->ibdev);
bbe9a0a2 530 return ERR_PTR(ret);
cfdda9d7
SW		 531 }
532
533 idr_init(&devp->cqidr);
534 idr_init(&devp->qpidr);
535 idr_init(&devp->mmidr);
536 spin_lock_init(&devp->lock);
8d81ef34 537 mutex_init(&devp->rdev.stats.lock);
2c974781 538 mutex_init(&devp->db_mutex);
cfdda9d7 539
cfdda9d7
SW		 540 if (c4iw_debugfs_root) {
541 devp->debugfs_root = debugfs_create_dir(
542 pci_name(devp->rdev.lldi.pdev),
543 c4iw_debugfs_root);
544 setup_debugfs(devp);
545 }
546 return devp;
547}
548
549static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
550{
2f25e9a5 551 struct uld_ctx *ctx;
cfdda9d7
SW		 552 static int vers_printed;
553 int i;
554
555 if (!vers_printed++)
556 printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
557 DRV_VERSION);
558
2f25e9a5
SW		 559 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
560 if (!ctx) {
561 ctx = ERR_PTR(-ENOMEM);
cfdda9d7 562 goto out;
2f25e9a5
SW		 563 }
564 ctx->lldi = *infop;
cfdda9d7
SW		 565
566 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
2f25e9a5
SW		 567 __func__, pci_name(ctx->lldi.pdev),
568 ctx->lldi.nchan, ctx->lldi.nrxq,
569 ctx->lldi.ntxq, ctx->lldi.nports);
570
571 mutex_lock(&dev_mutex);
572 list_add_tail(&ctx->entry, &uld_ctx_list);
573 mutex_unlock(&dev_mutex);
cfdda9d7 574
2f25e9a5
SW		 575 for (i = 0; i < ctx->lldi.nrxq; i++)
576 PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
cfdda9d7 577out:
2f25e9a5 578 return ctx;
cfdda9d7
SW		 579}
580
1cab775c
VP		 581static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
582 const __be64 *rsp,
583 u32 pktshift)
584{
585 struct sk_buff *skb;
586
587 /*
588 * Allocate space for cpl_pass_accept_req which will be synthesized by
589 * driver. Once the driver synthesizes the request the skb will go
590 * through the regular cpl_pass_accept_req processing.
591 * The math here assumes sizeof cpl_pass_accept_req >= sizeof
592 * cpl_rx_pkt.
593 */
594 skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
595 sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
596 if (unlikely(!skb))
597 return NULL;
598
599 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
600 sizeof(struct rss_header) - pktshift);
601
602 /*
603 * This skb will contain:
604 * rss_header from the rspq descriptor (1 flit)
605 * cpl_rx_pkt struct from the rspq descriptor (2 flits)
606 * space for the difference between the size of an
607 * rx_pkt and pass_accept_req cpl (1 flit)
608 * the packet data from the gl
609 */
610 skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
611 sizeof(struct rss_header));
612 skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
613 sizeof(struct cpl_pass_accept_req),
614 gl->va + pktshift,
615 gl->tot_len - pktshift);
616 return skb;
617}
618
619static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
620 const __be64 *rsp)
621{
622 unsigned int opcode = *(u8 *)rsp;
623 struct sk_buff *skb;
624
625 if (opcode != CPL_RX_PKT)
626 goto out;
627
628 skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
629 if (skb == NULL)
630 goto out;
631
632 if (c4iw_handlers[opcode] == NULL) {
633 pr_info("%s no handler opcode 0x%x...\n", __func__,
634 opcode);
635 kfree_skb(skb);
636 goto out;
637 }
638 c4iw_handlers[opcode](dev, skb);
639 return 1;
640out:
641 return 0;
642}
643
cfdda9d7
SW		 644static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
645 const struct pkt_gl *gl)
646{
2f25e9a5
SW		 647 struct uld_ctx *ctx = handle;
648 struct c4iw_dev *dev = ctx->dev;
cfdda9d7 649 struct sk_buff *skb;
1cab775c 650 u8 opcode;
cfdda9d7
SW		 651
652 if (gl == NULL) {
653 /* omit RSS and rsp_ctrl at end of descriptor */
654 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
655
656 skb = alloc_skb(256, GFP_ATOMIC);
657 if (!skb)
658 goto nomem;
659 __skb_put(skb, len);
660 skb_copy_to_linear_data(skb, &rsp[1], len);
661 } else if (gl == CXGB4_MSG_AN) {
662 const struct rsp_ctrl *rc = (void *)rsp;
663
664 u32 qid = be32_to_cpu(rc->pldbuflen_qid);
665 c4iw_ev_handler(dev, qid);
1cab775c
VP		 666 return 0;
667 } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
668 if (recv_rx_pkt(dev, gl, rsp))
669 return 0;
670
671 pr_info("%s: unexpected FL contents at %p, " \
672 "RSS %#llx, FL %#llx, len %u\n",
673 pci_name(ctx->lldi.pdev), gl->va,
674 (unsigned long long)be64_to_cpu(*rsp),
675 (unsigned long long)be64_to_cpu(*(u64 *)gl->va),
676 gl->tot_len);
677
cfdda9d7
SW		 678 return 0;
679 } else {
da411ba1 680 skb = cxgb4_pktgl_to_skb(gl, 128, 128);
cfdda9d7
SW		 681 if (unlikely(!skb))
682 goto nomem;
683 }
684
1cab775c 685 opcode = *(u8 *)rsp;
cfdda9d7
SW		 686 if (c4iw_handlers[opcode])
687 c4iw_handlers[opcode](dev, skb);
688 else
1cab775c 689 pr_info("%s no handler opcode 0x%x...\n", __func__,
cfdda9d7
SW		 690 opcode);
691
692 return 0;
693nomem:
694 return -1;
695}
696
697static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
698{
2f25e9a5 699 struct uld_ctx *ctx = handle;
1c01c538 700
cfdda9d7 701 PDBG("%s new_state %u\n", __func__, new_state);
1c01c538
SW		 702 switch (new_state) {
703 case CXGB4_STATE_UP:
2f25e9a5
SW		 704 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
705 if (!ctx->dev) {
9efe10a1 706 int ret;
2f25e9a5
SW		 707
708 ctx->dev = c4iw_alloc(&ctx->lldi);
9efe10a1
SW		 709 if (IS_ERR(ctx->dev)) {
710 printk(KERN_ERR MOD
711 "%s: initialization failed: %ld\n",
712 pci_name(ctx->lldi.pdev),
713 PTR_ERR(ctx->dev));
714 ctx->dev = NULL;
715 break;
716 }
717 ret = c4iw_register_device(ctx->dev);
718 if (ret) {
1c01c538
SW		 719 printk(KERN_ERR MOD
720 "%s: RDMA registration failed: %d\n",
2f25e9a5 721 pci_name(ctx->lldi.pdev), ret);
9efe10a1
SW		 722 c4iw_dealloc(ctx);
723 }
1c01c538
SW		 724 }
725 break;
726 case CXGB4_STATE_DOWN:
727 printk(KERN_INFO MOD "%s: Down\n",
2f25e9a5
SW		 728 pci_name(ctx->lldi.pdev));
729 if (ctx->dev)
730 c4iw_remove(ctx);
1c01c538
SW		 731 break;
732 case CXGB4_STATE_START_RECOVERY:
733 printk(KERN_INFO MOD "%s: Fatal Error\n",
2f25e9a5
SW		 734 pci_name(ctx->lldi.pdev));
735 if (ctx->dev) {
767fbe81
SW		 736 struct ib_event event;
737
2f25e9a5 738 ctx->dev->rdev.flags |= T4_FATAL_ERROR;
767fbe81
SW		 739 memset(&event, 0, sizeof event);
740 event.event = IB_EVENT_DEVICE_FATAL;
2f25e9a5 741 event.device = &ctx->dev->ibdev;
767fbe81 742 ib_dispatch_event(&event);
2f25e9a5 743 c4iw_remove(ctx);
767fbe81 744 }
1c01c538
SW		 745 break;
746 case CXGB4_STATE_DETACH:
747 printk(KERN_INFO MOD "%s: Detach\n",
2f25e9a5
SW		 748 pci_name(ctx->lldi.pdev));
749 if (ctx->dev)
750 c4iw_remove(ctx);
1c01c538
SW		 751 break;
752 }
cfdda9d7
SW		 753 return 0;
754}
755
2c974781
VP		 756static int disable_qp_db(int id, void *p, void *data)
757{
758 struct c4iw_qp *qp = p;
759
760 t4_disable_wq_db(&qp->wq);
761 return 0;
762}
763
764static void stop_queues(struct uld_ctx *ctx)
765{
766 spin_lock_irq(&ctx->dev->lock);
422eea0a
VP		 767 if (ctx->dev->db_state == NORMAL) {
768 ctx->dev->rdev.stats.db_state_transitions++;
769 ctx->dev->db_state = FLOW_CONTROL;
770 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
771 }
2c974781
VP		 772 spin_unlock_irq(&ctx->dev->lock);
773}
774
775static int enable_qp_db(int id, void *p, void *data)
776{
777 struct c4iw_qp *qp = p;
778
779 t4_enable_wq_db(&qp->wq);
780 return 0;
781}
782
783static void resume_queues(struct uld_ctx *ctx)
784{
785 spin_lock_irq(&ctx->dev->lock);
422eea0a
VP		 786 if (ctx->dev->qpcnt <= db_fc_threshold &&
787 ctx->dev->db_state == FLOW_CONTROL) {
788 ctx->dev->db_state = NORMAL;
789 ctx->dev->rdev.stats.db_state_transitions++;
790 idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
791 }
792 spin_unlock_irq(&ctx->dev->lock);
793}
794
795struct qp_list {
796 unsigned idx;
797 struct c4iw_qp **qps;
798};
799
800static int add_and_ref_qp(int id, void *p, void *data)
801{
802 struct qp_list *qp_listp = data;
803 struct c4iw_qp *qp = p;
804
805 c4iw_qp_add_ref(&qp->ibqp);
806 qp_listp->qps[qp_listp->idx++] = qp;
807 return 0;
808}
809
810static int count_qps(int id, void *p, void *data)
811{
812 unsigned *countp = data;
813 (*countp)++;
814 return 0;
815}
816
817static void deref_qps(struct qp_list qp_list)
818{
819 int idx;
820
821 for (idx = 0; idx < qp_list.idx; idx++)
822 c4iw_qp_rem_ref(&qp_list.qps[idx]->ibqp);
823}
824
825static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
826{
827 int idx;
828 int ret;
829
830 for (idx = 0; idx < qp_list->idx; idx++) {
831 struct c4iw_qp *qp = qp_list->qps[idx];
832
833 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
834 qp->wq.sq.qid,
835 t4_sq_host_wq_pidx(&qp->wq),
836 t4_sq_wq_size(&qp->wq));
837 if (ret) {
838 printk(KERN_ERR MOD "%s: Fatal error - "
839 "DB overflow recovery failed - "
840 "error syncing SQ qid %u\n",
841 pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
842 return;
843 }
844
845 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
846 qp->wq.rq.qid,
847 t4_rq_host_wq_pidx(&qp->wq),
848 t4_rq_wq_size(&qp->wq));
849
850 if (ret) {
851 printk(KERN_ERR MOD "%s: Fatal error - "
852 "DB overflow recovery failed - "
853 "error syncing RQ qid %u\n",
854 pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
855 return;
856 }
857
858 /* Wait for the dbfifo to drain */
859 while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
860 set_current_state(TASK_UNINTERRUPTIBLE);
861 schedule_timeout(usecs_to_jiffies(10));
862 }
863 }
864}
865
866static void recover_queues(struct uld_ctx *ctx)
867{
868 int count = 0;
869 struct qp_list qp_list;
870 int ret;
871
872 /* lock out kernel db ringers */
873 mutex_lock(&ctx->dev->db_mutex);
874
875 /* put all queues in to recovery mode */
876 spin_lock_irq(&ctx->dev->lock);
877 ctx->dev->db_state = RECOVERY;
878 ctx->dev->rdev.stats.db_state_transitions++;
879 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
880 spin_unlock_irq(&ctx->dev->lock);
881
882 /* slow everybody down */
883 set_current_state(TASK_UNINTERRUPTIBLE);
884 schedule_timeout(usecs_to_jiffies(1000));
885
886 /* Wait for the dbfifo to completely drain. */
887 while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
888 set_current_state(TASK_UNINTERRUPTIBLE);
889 schedule_timeout(usecs_to_jiffies(10));
890 }
891
892 /* flush the SGE contexts */
893 ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
894 if (ret) {
895 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
896 pci_name(ctx->lldi.pdev));
897 goto out;
898 }
899
900 /* Count active queues so we can build a list of queues to recover */
901 spin_lock_irq(&ctx->dev->lock);
902 idr_for_each(&ctx->dev->qpidr, count_qps, &count);
903
904 qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
905 if (!qp_list.qps) {
906 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
907 pci_name(ctx->lldi.pdev));
908 spin_unlock_irq(&ctx->dev->lock);
909 goto out;
910 }
911 qp_list.idx = 0;
912
913 /* add and ref each qp so it doesn't get freed */
914 idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
915
2c974781 916 spin_unlock_irq(&ctx->dev->lock);
422eea0a
VP		 917
918 /* now traverse the list in a safe context to recover the db state*/
919 recover_lost_dbs(ctx, &qp_list);
920
921 /* we're almost done! deref the qps and clean up */
922 deref_qps(qp_list);
923 kfree(qp_list.qps);
924
925 /* Wait for the dbfifo to completely drain again */
926 while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
927 set_current_state(TASK_UNINTERRUPTIBLE);
928 schedule_timeout(usecs_to_jiffies(10));
929 }
930
931 /* resume the queues */
932 spin_lock_irq(&ctx->dev->lock);
933 if (ctx->dev->qpcnt > db_fc_threshold)
934 ctx->dev->db_state = FLOW_CONTROL;
935 else {
936 ctx->dev->db_state = NORMAL;
937 idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
938 }
939 ctx->dev->rdev.stats.db_state_transitions++;
940 spin_unlock_irq(&ctx->dev->lock);
941
942out:
943 /* start up kernel db ringers again */
944 mutex_unlock(&ctx->dev->db_mutex);
2c974781
VP		 945}
946
947static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
948{
949 struct uld_ctx *ctx = handle;
950
951 switch (control) {
952 case CXGB4_CONTROL_DB_FULL:
953 stop_queues(ctx);
954 mutex_lock(&ctx->dev->rdev.stats.lock);
955 ctx->dev->rdev.stats.db_full++;
956 mutex_unlock(&ctx->dev->rdev.stats.lock);
957 break;
958 case CXGB4_CONTROL_DB_EMPTY:
959 resume_queues(ctx);
960 mutex_lock(&ctx->dev->rdev.stats.lock);
961 ctx->dev->rdev.stats.db_empty++;
962 mutex_unlock(&ctx->dev->rdev.stats.lock);
963 break;
964 case CXGB4_CONTROL_DB_DROP:
422eea0a 965 recover_queues(ctx);
2c974781
VP		 966 mutex_lock(&ctx->dev->rdev.stats.lock);
967 ctx->dev->rdev.stats.db_drop++;
968 mutex_unlock(&ctx->dev->rdev.stats.lock);
969 break;
970 default:
971 printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
972 pci_name(ctx->lldi.pdev), control);
973 break;
974 }
975 return 0;
976}
977
cfdda9d7
SW		 978static struct cxgb4_uld_info c4iw_uld_info = {
979 .name = DRV_NAME,
980 .add = c4iw_uld_add,
981 .rx_handler = c4iw_uld_rx_handler,
982 .state_change = c4iw_uld_state_change,
2c974781 983 .control = c4iw_uld_control,
cfdda9d7
SW		 984};
985
986static int __init c4iw_init_module(void)
987{
988 int err;
989
990 err = c4iw_cm_init();
991 if (err)
992 return err;
993
994 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
995 if (!c4iw_debugfs_root)
996 printk(KERN_WARNING MOD
997 "could not create debugfs entry, continuing\n");
998
999 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
1000
1001 return 0;
1002}
1003
1004static void __exit c4iw_exit_module(void)
1005{
2f25e9a5 1006 struct uld_ctx *ctx, *tmp;
cfdda9d7 1007
cfdda9d7 1008 mutex_lock(&dev_mutex);
2f25e9a5
SW		 1009 list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
1010 if (ctx->dev)
1011 c4iw_remove(ctx);
1012 kfree(ctx);
cfdda9d7
SW		 1013 }
1014 mutex_unlock(&dev_mutex);
fd388ce6 1015 cxgb4_unregister_uld(CXGB4_ULD_RDMA);
cfdda9d7
SW		 1016 c4iw_cm_term();
1017 debugfs_remove_recursive(c4iw_debugfs_root);
1018}
1019
1020module_init(c4iw_init_module);
1021module_exit(c4iw_exit_module);
Linux kernel - Deliverables
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