[deliverable/linux.git] / drivers / infiniband / hw / cxgb4 / device.c

/*
 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *	  copyright notice, this list of conditions and the following
 *	  disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *	  copyright notice, this list of conditions and the following
 *	  disclaimer in the documentation and/or other materials
 *	  provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/debugfs.h>

#include <rdma/ib_verbs.h>

#include "iw_cxgb4.h"

#define DRV_VERSION "0.1"

MODULE_AUTHOR("Steve Wise");
MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
MODULE_LICENSE("Dual BSD/GPL");
MODULE_VERSION(DRV_VERSION);

static LIST_HEAD(uld_ctx_list);
static DEFINE_MUTEX(dev_mutex);

static struct dentry *c4iw_debugfs_root;

struct c4iw_debugfs_data {
	struct c4iw_dev *devp;
	char *buf;
	int bufsize;
	int pos;
};

static int count_idrs(int id, void *p, void *data)
{
	int *countp = data;

	*countp = *countp + 1;
	return 0;
}

static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
			    loff_t *ppos)
{
	struct c4iw_debugfs_data *d = file->private_data;

	return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
}

static int dump_qp(int id, void *p, void *data)
{
	struct c4iw_qp *qp = p;
	struct c4iw_debugfs_data *qpd = data;
	int space;
	int cc;

	if (id != qp->wq.sq.qid)
		return 0;

	space = qpd->bufsize - qpd->pos - 1;
	if (space == 0)
		return 1;

	if (qp->ep)
		cc = snprintf(qpd->buf + qpd->pos, space,
			     "qp sq id %u rq id %u state %u onchip %u "
			     "ep tid %u state %u %pI4:%u->%pI4:%u\n",
			     qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state,
			     qp->wq.sq.flags & T4_SQ_ONCHIP,
			     qp->ep->hwtid, (int)qp->ep->com.state,
			     &qp->ep->com.local_addr.sin_addr.s_addr,
			     ntohs(qp->ep->com.local_addr.sin_port),
			     &qp->ep->com.remote_addr.sin_addr.s_addr,
			     ntohs(qp->ep->com.remote_addr.sin_port));
	else
		cc = snprintf(qpd->buf + qpd->pos, space,
			     "qp sq id %u rq id %u state %u onchip %u\n",
			      qp->wq.sq.qid, qp->wq.rq.qid,
			      (int)qp->attr.state,
			      qp->wq.sq.flags & T4_SQ_ONCHIP);
	if (cc < space)
		qpd->pos += cc;
	return 0;
}

static int qp_release(struct inode *inode, struct file *file)
{
	struct c4iw_debugfs_data *qpd = file->private_data;
	if (!qpd) {
		printk(KERN_INFO "%s null qpd?\n", __func__);
		return 0;
	}
	kfree(qpd->buf);
	kfree(qpd);
	return 0;
}

static int qp_open(struct inode *inode, struct file *file)
{
	struct c4iw_debugfs_data *qpd;
	int ret = 0;
	int count = 1;

	qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
	if (!qpd) {
		ret = -ENOMEM;
		goto out;
	}
	qpd->devp = inode->i_private;
	qpd->pos = 0;

	spin_lock_irq(&qpd->devp->lock);
	idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
	spin_unlock_irq(&qpd->devp->lock);

	qpd->bufsize = count * 128;
	qpd->buf = kmalloc(qpd->bufsize, GFP_KERNEL);
	if (!qpd->buf) {
		ret = -ENOMEM;
		goto err1;
	}

	spin_lock_irq(&qpd->devp->lock);
	idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
	spin_unlock_irq(&qpd->devp->lock);

	qpd->buf[qpd->pos++] = 0;
	file->private_data = qpd;
	goto out;
err1:
	kfree(qpd);
out:
	return ret;
}

static const struct file_operations qp_debugfs_fops = {
	.owner   = THIS_MODULE,
	.open    = qp_open,
	.release = qp_release,
	.read    = debugfs_read,
	.llseek  = default_llseek,
};

static int dump_stag(int id, void *p, void *data)
{
	struct c4iw_debugfs_data *stagd = data;
	int space;
	int cc;

	space = stagd->bufsize - stagd->pos - 1;
	if (space == 0)
		return 1;

	cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
	if (cc < space)
		stagd->pos += cc;
	return 0;
}

static int stag_release(struct inode *inode, struct file *file)
{
	struct c4iw_debugfs_data *stagd = file->private_data;
	if (!stagd) {
		printk(KERN_INFO "%s null stagd?\n", __func__);
		return 0;
	}
	kfree(stagd->buf);
	kfree(stagd);
	return 0;
}

static int stag_open(struct inode *inode, struct file *file)
{
	struct c4iw_debugfs_data *stagd;
	int ret = 0;
	int count = 1;

	stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
	if (!stagd) {
		ret = -ENOMEM;
		goto out;
	}
	stagd->devp = inode->i_private;
	stagd->pos = 0;

	spin_lock_irq(&stagd->devp->lock);
	idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
	spin_unlock_irq(&stagd->devp->lock);

	stagd->bufsize = count * sizeof("0x12345678\n");
	stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
	if (!stagd->buf) {
		ret = -ENOMEM;
		goto err1;
	}

	spin_lock_irq(&stagd->devp->lock);
	idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
	spin_unlock_irq(&stagd->devp->lock);

	stagd->buf[stagd->pos++] = 0;
	file->private_data = stagd;
	goto out;
err1:
	kfree(stagd);
out:
	return ret;
}

static const struct file_operations stag_debugfs_fops = {
	.owner   = THIS_MODULE,
	.open    = stag_open,
	.release = stag_release,
	.read    = debugfs_read,
	.llseek  = default_llseek,
};

static int setup_debugfs(struct c4iw_dev *devp)
{
	struct dentry *de;

	if (!devp->debugfs_root)
		return -1;

	de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
				 (void *)devp, &qp_debugfs_fops);
	if (de && de->d_inode)
		de->d_inode->i_size = 4096;

	de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
				 (void *)devp, &stag_debugfs_fops);
	if (de && de->d_inode)
		de->d_inode->i_size = 4096;
	return 0;
}

void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
			       struct c4iw_dev_ucontext *uctx)
{
	struct list_head *pos, *nxt;
	struct c4iw_qid_list *entry;

	mutex_lock(&uctx->lock);
	list_for_each_safe(pos, nxt, &uctx->qpids) {
		entry = list_entry(pos, struct c4iw_qid_list, entry);
		list_del_init(&entry->entry);
		if (!(entry->qid & rdev->qpmask))
			c4iw_put_resource(&rdev->resource.qid_fifo, entry->qid,
					  &rdev->resource.qid_fifo_lock);
		kfree(entry);
	}

	list_for_each_safe(pos, nxt, &uctx->qpids) {
		entry = list_entry(pos, struct c4iw_qid_list, entry);
		list_del_init(&entry->entry);
		kfree(entry);
	}
	mutex_unlock(&uctx->lock);
}

void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
			    struct c4iw_dev_ucontext *uctx)
{
	INIT_LIST_HEAD(&uctx->qpids);
	INIT_LIST_HEAD(&uctx->cqids);
	mutex_init(&uctx->lock);
}

/* Caller takes care of locking if needed */
static int c4iw_rdev_open(struct c4iw_rdev *rdev)
{
	int err;

	c4iw_init_dev_ucontext(rdev, &rdev->uctx);

	/*
	 * qpshift is the number of bits to shift the qpid left in order
	 * to get the correct address of the doorbell for that qp.
	 */
	rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
	rdev->qpmask = rdev->lldi.udb_density - 1;
	rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
	rdev->cqmask = rdev->lldi.ucq_density - 1;
	PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
	     "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
	     "qp qid start %u size %u cq qid start %u size %u\n",
	     __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
	     rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
	     rdev->lldi.vr->pbl.start,
	     rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
	     rdev->lldi.vr->rq.size,
	     rdev->lldi.vr->qp.start,
	     rdev->lldi.vr->qp.size,
	     rdev->lldi.vr->cq.start,
	     rdev->lldi.vr->cq.size);
	PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
	     "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
	     (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
	     (void *)pci_resource_start(rdev->lldi.pdev, 2),
	     rdev->lldi.db_reg,
	     rdev->lldi.gts_reg,
	     rdev->qpshift, rdev->qpmask,
	     rdev->cqshift, rdev->cqmask);

	if (c4iw_num_stags(rdev) == 0) {
		err = -EINVAL;
		goto err1;
	}

	err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
	if (err) {
		printk(KERN_ERR MOD "error %d initializing resources\n", err);
		goto err1;
	}
	err = c4iw_pblpool_create(rdev);
	if (err) {
		printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
		goto err2;
	}
	err = c4iw_rqtpool_create(rdev);
	if (err) {
		printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
		goto err3;
	}
	err = c4iw_ocqp_pool_create(rdev);
	if (err) {
		printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
		goto err4;
	}
	return 0;
err4:
	c4iw_rqtpool_destroy(rdev);
err3:
	c4iw_pblpool_destroy(rdev);
err2:
	c4iw_destroy_resource(&rdev->resource);
err1:
	return err;
}

static void c4iw_rdev_close(struct c4iw_rdev *rdev)
{
	c4iw_pblpool_destroy(rdev);
	c4iw_rqtpool_destroy(rdev);
	c4iw_destroy_resource(&rdev->resource);
}

struct uld_ctx {
	struct list_head entry;
	struct cxgb4_lld_info lldi;
	struct c4iw_dev *dev;
};

static void c4iw_dealloc(struct uld_ctx *ctx)
{
	c4iw_rdev_close(&ctx->dev->rdev);
	idr_destroy(&ctx->dev->cqidr);
	idr_destroy(&ctx->dev->qpidr);
	idr_destroy(&ctx->dev->mmidr);
	iounmap(ctx->dev->rdev.oc_mw_kva);
	ib_dealloc_device(&ctx->dev->ibdev);
	ctx->dev = NULL;
}

static void c4iw_remove(struct uld_ctx *ctx)
{
	PDBG("%s c4iw_dev %p\n", __func__,  ctx->dev);
	c4iw_unregister_device(ctx->dev);
	c4iw_dealloc(ctx);
}

static int rdma_supported(const struct cxgb4_lld_info *infop)
{
	return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
	       infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
	       infop->vr->cq.size > 0 && infop->vr->ocq.size > 0;
}

static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
{
	struct c4iw_dev *devp;
	int ret;

	if (!rdma_supported(infop)) {
		printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
		       pci_name(infop->pdev));
		return ERR_PTR(-ENOSYS);
	}
	devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
	if (!devp) {
		printk(KERN_ERR MOD "Cannot allocate ib device\n");
		return ERR_PTR(-ENOMEM);
	}
	devp->rdev.lldi = *infop;

	devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
		(pci_resource_len(devp->rdev.lldi.pdev, 2) -
		 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
	devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
					       devp->rdev.lldi.vr->ocq.size);

	PDBG(KERN_INFO MOD "ocq memory: "
	       "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
	       devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
	       devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);

	ret = c4iw_rdev_open(&devp->rdev);
	if (ret) {
		printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
		ib_dealloc_device(&devp->ibdev);
		return ERR_PTR(ret);
	}

	idr_init(&devp->cqidr);
	idr_init(&devp->qpidr);
	idr_init(&devp->mmidr);
	spin_lock_init(&devp->lock);

	if (c4iw_debugfs_root) {
		devp->debugfs_root = debugfs_create_dir(
					pci_name(devp->rdev.lldi.pdev),
					c4iw_debugfs_root);
		setup_debugfs(devp);
	}
	return devp;
}

static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
{
	struct uld_ctx *ctx;
	static int vers_printed;
	int i;

	if (!vers_printed++)
		printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
		       DRV_VERSION);

	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
	if (!ctx) {
		ctx = ERR_PTR(-ENOMEM);
		goto out;
	}
	ctx->lldi = *infop;

	PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
	     __func__, pci_name(ctx->lldi.pdev),
	     ctx->lldi.nchan, ctx->lldi.nrxq,
	     ctx->lldi.ntxq, ctx->lldi.nports);

	mutex_lock(&dev_mutex);
	list_add_tail(&ctx->entry, &uld_ctx_list);
	mutex_unlock(&dev_mutex);

	for (i = 0; i < ctx->lldi.nrxq; i++)
		PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
out:
	return ctx;
}

static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
			const struct pkt_gl *gl)
{
	struct uld_ctx *ctx = handle;
	struct c4iw_dev *dev = ctx->dev;
	struct sk_buff *skb;
	const struct cpl_act_establish *rpl;
	unsigned int opcode;

	if (gl == NULL) {
		/* omit RSS and rsp_ctrl at end of descriptor */
		unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;

		skb = alloc_skb(256, GFP_ATOMIC);
		if (!skb)
			goto nomem;
		__skb_put(skb, len);
		skb_copy_to_linear_data(skb, &rsp[1], len);
	} else if (gl == CXGB4_MSG_AN) {
		const struct rsp_ctrl *rc = (void *)rsp;

		u32 qid = be32_to_cpu(rc->pldbuflen_qid);
		c4iw_ev_handler(dev, qid);
		return 0;
	} else {
		skb = cxgb4_pktgl_to_skb(gl, 128, 128);
		if (unlikely(!skb))
			goto nomem;
	}

	rpl = cplhdr(skb);
	opcode = rpl->ot.opcode;

	if (c4iw_handlers[opcode])
		c4iw_handlers[opcode](dev, skb);
	else
		printk(KERN_INFO "%s no handler opcode 0x%x...\n", __func__,
		       opcode);

	return 0;
nomem:
	return -1;
}

static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
{
	struct uld_ctx *ctx = handle;

	PDBG("%s new_state %u\n", __func__, new_state);
	switch (new_state) {
	case CXGB4_STATE_UP:
		printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
		if (!ctx->dev) {
			int ret;

			ctx->dev = c4iw_alloc(&ctx->lldi);
			if (IS_ERR(ctx->dev)) {
				printk(KERN_ERR MOD
				       "%s: initialization failed: %ld\n",
				       pci_name(ctx->lldi.pdev),
				       PTR_ERR(ctx->dev));
				ctx->dev = NULL;
				break;
			}
			ret = c4iw_register_device(ctx->dev);
			if (ret) {
				printk(KERN_ERR MOD
				       "%s: RDMA registration failed: %d\n",
				       pci_name(ctx->lldi.pdev), ret);
				c4iw_dealloc(ctx);
			}
		}
		break;
	case CXGB4_STATE_DOWN:
		printk(KERN_INFO MOD "%s: Down\n",
		       pci_name(ctx->lldi.pdev));
		if (ctx->dev)
			c4iw_remove(ctx);
		break;
	case CXGB4_STATE_START_RECOVERY:
		printk(KERN_INFO MOD "%s: Fatal Error\n",
		       pci_name(ctx->lldi.pdev));
		if (ctx->dev) {
			struct ib_event event;

			ctx->dev->rdev.flags |= T4_FATAL_ERROR;
			memset(&event, 0, sizeof event);
			event.event  = IB_EVENT_DEVICE_FATAL;
			event.device = &ctx->dev->ibdev;
			ib_dispatch_event(&event);
			c4iw_remove(ctx);
		}
		break;
	case CXGB4_STATE_DETACH:
		printk(KERN_INFO MOD "%s: Detach\n",
		       pci_name(ctx->lldi.pdev));
		if (ctx->dev)
			c4iw_remove(ctx);
		break;
	}
	return 0;
}

static struct cxgb4_uld_info c4iw_uld_info = {
	.name = DRV_NAME,
	.add = c4iw_uld_add,
	.rx_handler = c4iw_uld_rx_handler,
	.state_change = c4iw_uld_state_change,
};

static int __init c4iw_init_module(void)
{
	int err;

	err = c4iw_cm_init();
	if (err)
		return err;

	c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
	if (!c4iw_debugfs_root)
		printk(KERN_WARNING MOD
		       "could not create debugfs entry, continuing\n");

	cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);

	return 0;
}

static void __exit c4iw_exit_module(void)
{
	struct uld_ctx *ctx, *tmp;

	mutex_lock(&dev_mutex);
	list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
		if (ctx->dev)
			c4iw_remove(ctx);
		kfree(ctx);
	}
	mutex_unlock(&dev_mutex);
	cxgb4_unregister_uld(CXGB4_ULD_RDMA);
	c4iw_cm_term();
	debugfs_remove_recursive(c4iw_debugfs_root);
}

module_init(c4iw_init_module);
module_exit(c4iw_exit_module);
Commit	Line	Data
cfdda9d7 SW	1	/*
	2	* Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32	#include <linux/module.h>
	33	#include <linux/moduleparam.h>
	34	#include <linux/debugfs.h>
	35
	36	#include <rdma/ib_verbs.h>
	37
	38	#include "iw_cxgb4.h"
	39
	40	#define DRV_VERSION "0.1"
	41
	42	MODULE_AUTHOR("Steve Wise");
	43	MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
	44	MODULE_LICENSE("Dual BSD/GPL");
	45	MODULE_VERSION(DRV_VERSION);
	46
2f25e9a5	47	static LIST_HEAD(uld_ctx_list);
cfdda9d7 SW	48	static DEFINE_MUTEX(dev_mutex);
	49
	50	static struct dentry *c4iw_debugfs_root;
	51
9e8d1fa3	52	struct c4iw_debugfs_data {
cfdda9d7 SW	53	struct c4iw_dev *devp;
	54	char *buf;
	55	int bufsize;
	56	int pos;
	57	};
	58
9e8d1fa3	59	static int count_idrs(int id, void p, void data)
cfdda9d7	60	{
cfdda9d7 SW	61	int *countp = data;
cfdda9d7 SW	62
cfdda9d7 SW	63	countp = countp + 1;
	64	return 0;
	65	}
	66
9e8d1fa3 SW	67	static ssize_t debugfs_read(struct file file, char __user buf, size_t count,
	68	loff_t *ppos)
	69	{
	70	struct c4iw_debugfs_data *d = file->private_data;
9e8d1fa3	71
3160977a	72	return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
9e8d1fa3 SW	73	}
	74
	75	static int dump_qp(int id, void p, void data)
cfdda9d7 SW	76	{
cfdda9d7 SW	77	struct c4iw_qp *qp = p;
9e8d1fa3	78	struct c4iw_debugfs_data *qpd = data;
cfdda9d7 SW	79	int space;
	80	int cc;
	81
	82	if (id != qp->wq.sq.qid)
	83	return 0;
	84
	85	space = qpd->bufsize - qpd->pos - 1;
	86	if (space == 0)
	87	return 1;
	88
	89	if (qp->ep)
db5d040d SW	90	cc = snprintf(qpd->buf + qpd->pos, space,
db5d040d SW	91	"qp sq id %u rq id %u state %u onchip %u "
cfdda9d7	92	"ep tid %u state %u %pI4:%u->%pI4:%u\n",
db5d040d SW	93	qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state,
db5d040d SW	94	qp->wq.sq.flags & T4_SQ_ONCHIP,
cfdda9d7 SW	95	qp->ep->hwtid, (int)qp->ep->com.state,
	96	&qp->ep->com.local_addr.sin_addr.s_addr,
	97	ntohs(qp->ep->com.local_addr.sin_port),
	98	&qp->ep->com.remote_addr.sin_addr.s_addr,
	99	ntohs(qp->ep->com.remote_addr.sin_port));
	100	else
db5d040d SW	101	cc = snprintf(qpd->buf + qpd->pos, space,
	102	"qp sq id %u rq id %u state %u onchip %u\n",
	103	qp->wq.sq.qid, qp->wq.rq.qid,
	104	(int)qp->attr.state,
	105	qp->wq.sq.flags & T4_SQ_ONCHIP);
cfdda9d7 SW	106	if (cc < space)
	107	qpd->pos += cc;
	108	return 0;
	109	}
	110
	111	static int qp_release(struct inode inode, struct file file)
	112	{
9e8d1fa3	113	struct c4iw_debugfs_data *qpd = file->private_data;
cfdda9d7 SW	114	if (!qpd) {
	115	printk(KERN_INFO "%s null qpd?\n", __func__);
	116	return 0;
	117	}
	118	kfree(qpd->buf);
	119	kfree(qpd);
	120	return 0;
	121	}
	122
	123	static int qp_open(struct inode inode, struct file file)
	124	{
9e8d1fa3	125	struct c4iw_debugfs_data *qpd;
cfdda9d7 SW	126	int ret = 0;
	127	int count = 1;
	128
	129	qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
	130	if (!qpd) {
	131	ret = -ENOMEM;
	132	goto out;
	133	}
	134	qpd->devp = inode->i_private;
	135	qpd->pos = 0;
	136
	137	spin_lock_irq(&qpd->devp->lock);
9e8d1fa3	138	idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
cfdda9d7 SW	139	spin_unlock_irq(&qpd->devp->lock);
	140
	141	qpd->bufsize = count * 128;
	142	qpd->buf = kmalloc(qpd->bufsize, GFP_KERNEL);
	143	if (!qpd->buf) {
	144	ret = -ENOMEM;
	145	goto err1;
	146	}
	147
	148	spin_lock_irq(&qpd->devp->lock);
9e8d1fa3	149	idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
cfdda9d7 SW	150	spin_unlock_irq(&qpd->devp->lock);
	151
	152	qpd->buf[qpd->pos++] = 0;
	153	file->private_data = qpd;
	154	goto out;
	155	err1:
	156	kfree(qpd);
	157	out:
	158	return ret;
	159	}
	160
9e8d1fa3 SW	161	static const struct file_operations qp_debugfs_fops = {
	162	.owner = THIS_MODULE,
	163	.open = qp_open,
	164	.release = qp_release,
	165	.read = debugfs_read,
8bbac892	166	.llseek = default_llseek,
9e8d1fa3 SW	167	};
	168
	169	static int dump_stag(int id, void p, void data)
cfdda9d7	170	{
9e8d1fa3 SW	171	struct c4iw_debugfs_data *stagd = data;
	172	int space;
	173	int cc;
cfdda9d7	174
9e8d1fa3 SW	175	space = stagd->bufsize - stagd->pos - 1;
	176	if (space == 0)
	177	return 1;
	178
	179	cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
	180	if (cc < space)
	181	stagd->pos += cc;
	182	return 0;
	183	}
	184
	185	static int stag_release(struct inode inode, struct file file)
	186	{
	187	struct c4iw_debugfs_data *stagd = file->private_data;
	188	if (!stagd) {
	189	printk(KERN_INFO "%s null stagd?\n", __func__);
cfdda9d7	190	return 0;
9e8d1fa3 SW	191	}
	192	kfree(stagd->buf);
	193	kfree(stagd);
	194	return 0;
	195	}
cfdda9d7	196
9e8d1fa3 SW	197	static int stag_open(struct inode inode, struct file file)
	198	{
	199	struct c4iw_debugfs_data *stagd;
	200	int ret = 0;
	201	int count = 1;
cfdda9d7	202
9e8d1fa3 SW	203	stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
	204	if (!stagd) {
	205	ret = -ENOMEM;
	206	goto out;
	207	}
	208	stagd->devp = inode->i_private;
	209	stagd->pos = 0;
cfdda9d7	210
9e8d1fa3 SW	211	spin_lock_irq(&stagd->devp->lock);
	212	idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
	213	spin_unlock_irq(&stagd->devp->lock);
	214
	215	stagd->bufsize = count * sizeof("0x12345678\n");
	216	stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
	217	if (!stagd->buf) {
	218	ret = -ENOMEM;
	219	goto err1;
cfdda9d7	220	}
9e8d1fa3 SW	221
	222	spin_lock_irq(&stagd->devp->lock);
	223	idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
	224	spin_unlock_irq(&stagd->devp->lock);
	225
	226	stagd->buf[stagd->pos++] = 0;
	227	file->private_data = stagd;
	228	goto out;
	229	err1:
	230	kfree(stagd);
	231	out:
	232	return ret;
cfdda9d7 SW	233	}
cfdda9d7 SW	234
9e8d1fa3	235	static const struct file_operations stag_debugfs_fops = {
cfdda9d7	236	.owner = THIS_MODULE,
9e8d1fa3 SW	237	.open = stag_open,
	238	.release = stag_release,
	239	.read = debugfs_read,
8bbac892	240	.llseek = default_llseek,
cfdda9d7 SW	241	};
	242
	243	static int setup_debugfs(struct c4iw_dev *devp)
	244	{
	245	struct dentry *de;
	246
	247	if (!devp->debugfs_root)
	248	return -1;
	249
	250	de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
	251	(void *)devp, &qp_debugfs_fops);
	252	if (de && de->d_inode)
	253	de->d_inode->i_size = 4096;
9e8d1fa3 SW	254
	255	de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
	256	(void *)devp, &stag_debugfs_fops);
	257	if (de && de->d_inode)
	258	de->d_inode->i_size = 4096;
cfdda9d7 SW	259	return 0;
	260	}
	261
	262	void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
	263	struct c4iw_dev_ucontext *uctx)
	264	{
	265	struct list_head pos, nxt;
	266	struct c4iw_qid_list *entry;
	267
	268	mutex_lock(&uctx->lock);
	269	list_for_each_safe(pos, nxt, &uctx->qpids) {
	270	entry = list_entry(pos, struct c4iw_qid_list, entry);
	271	list_del_init(&entry->entry);
	272	if (!(entry->qid & rdev->qpmask))
	273	c4iw_put_resource(&rdev->resource.qid_fifo, entry->qid,
	274	&rdev->resource.qid_fifo_lock);
	275	kfree(entry);
	276	}
	277
	278	list_for_each_safe(pos, nxt, &uctx->qpids) {
	279	entry = list_entry(pos, struct c4iw_qid_list, entry);
	280	list_del_init(&entry->entry);
	281	kfree(entry);
	282	}
	283	mutex_unlock(&uctx->lock);
	284	}
	285
	286	void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
	287	struct c4iw_dev_ucontext *uctx)
	288	{
	289	INIT_LIST_HEAD(&uctx->qpids);
	290	INIT_LIST_HEAD(&uctx->cqids);
	291	mutex_init(&uctx->lock);
	292	}
	293
	294	/* Caller takes care of locking if needed */
	295	static int c4iw_rdev_open(struct c4iw_rdev *rdev)
	296	{
	297	int err;
	298
	299	c4iw_init_dev_ucontext(rdev, &rdev->uctx);
	300
	301	/*
	302	* qpshift is the number of bits to shift the qpid left in order
	303	* to get the correct address of the doorbell for that qp.
	304	*/
	305	rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
	306	rdev->qpmask = rdev->lldi.udb_density - 1;
	307	rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
	308	rdev->cqmask = rdev->lldi.ucq_density - 1;
	309	PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
93fb72e4 SW	310	"pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
93fb72e4 SW	311	"qp qid start %u size %u cq qid start %u size %u\n",
cfdda9d7 SW	312	__func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
	313	rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
	314	rdev->lldi.vr->pbl.start,
	315	rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
93fb72e4 SW	316	rdev->lldi.vr->rq.size,
	317	rdev->lldi.vr->qp.start,
	318	rdev->lldi.vr->qp.size,
	319	rdev->lldi.vr->cq.start,
	320	rdev->lldi.vr->cq.size);
cfdda9d7 SW	321	PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
	322	"qpmask 0x%x cqshift %lu cqmask 0x%x\n",
	323	(unsigned)pci_resource_len(rdev->lldi.pdev, 2),
	324	(void *)pci_resource_start(rdev->lldi.pdev, 2),
	325	rdev->lldi.db_reg,
	326	rdev->lldi.gts_reg,
	327	rdev->qpshift, rdev->qpmask,
	328	rdev->cqshift, rdev->cqmask);
	329
	330	if (c4iw_num_stags(rdev) == 0) {
	331	err = -EINVAL;
	332	goto err1;
	333	}
	334
	335	err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
	336	if (err) {
	337	printk(KERN_ERR MOD "error %d initializing resources\n", err);
	338	goto err1;
	339	}
	340	err = c4iw_pblpool_create(rdev);
	341	if (err) {
	342	printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
	343	goto err2;
	344	}
	345	err = c4iw_rqtpool_create(rdev);
	346	if (err) {
	347	printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
	348	goto err3;
	349	}
c6d7b267 SW	350	err = c4iw_ocqp_pool_create(rdev);
	351	if (err) {
	352	printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
	353	goto err4;
	354	}
cfdda9d7	355	return 0;
c6d7b267 SW	356	err4:
c6d7b267 SW	357	c4iw_rqtpool_destroy(rdev);
cfdda9d7 SW	358	err3:
	359	c4iw_pblpool_destroy(rdev);
	360	err2:
	361	c4iw_destroy_resource(&rdev->resource);
	362	err1:
	363	return err;
	364	}
	365
	366	static void c4iw_rdev_close(struct c4iw_rdev *rdev)
	367	{
	368	c4iw_pblpool_destroy(rdev);
	369	c4iw_rqtpool_destroy(rdev);
	370	c4iw_destroy_resource(&rdev->resource);
	371	}
	372
2f25e9a5 SW	373	struct uld_ctx {
	374	struct list_head entry;
	375	struct cxgb4_lld_info lldi;
	376	struct c4iw_dev *dev;
	377	};
	378
9efe10a1	379	static void c4iw_dealloc(struct uld_ctx *ctx)
cfdda9d7	380	{
2f25e9a5 SW	381	c4iw_rdev_close(&ctx->dev->rdev);
	382	idr_destroy(&ctx->dev->cqidr);
	383	idr_destroy(&ctx->dev->qpidr);
	384	idr_destroy(&ctx->dev->mmidr);
	385	iounmap(ctx->dev->rdev.oc_mw_kva);
	386	ib_dealloc_device(&ctx->dev->ibdev);
	387	ctx->dev = NULL;
cfdda9d7 SW	388	}
cfdda9d7 SW	389
9efe10a1 SW	390	static void c4iw_remove(struct uld_ctx *ctx)
	391	{
	392	PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
	393	c4iw_unregister_device(ctx->dev);
	394	c4iw_dealloc(ctx);
	395	}
	396
	397	static int rdma_supported(const struct cxgb4_lld_info *infop)
	398	{
	399	return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
	400	infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
	401	infop->vr->cq.size > 0 && infop->vr->ocq.size > 0;
	402	}
	403
cfdda9d7 SW	404	static struct c4iw_dev c4iw_alloc(const struct cxgb4_lld_info infop)
	405	{
	406	struct c4iw_dev *devp;
	407	int ret;
	408
9efe10a1 SW	409	if (!rdma_supported(infop)) {
	410	printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
	411	pci_name(infop->pdev));
	412	return ERR_PTR(-ENOSYS);
	413	}
cfdda9d7 SW	414	devp = (struct c4iw_dev )ib_alloc_device(sizeof(devp));
	415	if (!devp) {
	416	printk(KERN_ERR MOD "Cannot allocate ib device\n");
bbe9a0a2	417	return ERR_PTR(-ENOMEM);
cfdda9d7 SW	418	}
	419	devp->rdev.lldi = *infop;
	420
c6d7b267 SW	421	devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
	422	(pci_resource_len(devp->rdev.lldi.pdev, 2) -
	423	roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
	424	devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
	425	devp->rdev.lldi.vr->ocq.size);
	426
2f25e9a5	427	PDBG(KERN_INFO MOD "ocq memory: "
c6d7b267 SW	428	"hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
	429	devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
	430	devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
	431
cfdda9d7 SW	432	ret = c4iw_rdev_open(&devp->rdev);
cfdda9d7 SW	433	if (ret) {
cfdda9d7 SW	434	printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
cfdda9d7 SW	435	ib_dealloc_device(&devp->ibdev);
bbe9a0a2	436	return ERR_PTR(ret);
cfdda9d7 SW	437	}
	438
	439	idr_init(&devp->cqidr);
	440	idr_init(&devp->qpidr);
	441	idr_init(&devp->mmidr);
	442	spin_lock_init(&devp->lock);
cfdda9d7	443
cfdda9d7 SW	444	if (c4iw_debugfs_root) {
	445	devp->debugfs_root = debugfs_create_dir(
	446	pci_name(devp->rdev.lldi.pdev),
	447	c4iw_debugfs_root);
	448	setup_debugfs(devp);
	449	}
	450	return devp;
	451	}
	452
	453	static void c4iw_uld_add(const struct cxgb4_lld_info infop)
	454	{
2f25e9a5	455	struct uld_ctx *ctx;
cfdda9d7 SW	456	static int vers_printed;
	457	int i;
	458
	459	if (!vers_printed++)
	460	printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
	461	DRV_VERSION);
	462
2f25e9a5 SW	463	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
	464	if (!ctx) {
	465	ctx = ERR_PTR(-ENOMEM);
cfdda9d7	466	goto out;
2f25e9a5 SW	467	}
2f25e9a5 SW	468	ctx->lldi = *infop;
cfdda9d7 SW	469
cfdda9d7 SW	470	PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
2f25e9a5 SW	471	__func__, pci_name(ctx->lldi.pdev),
	472	ctx->lldi.nchan, ctx->lldi.nrxq,
	473	ctx->lldi.ntxq, ctx->lldi.nports);
	474
	475	mutex_lock(&dev_mutex);
	476	list_add_tail(&ctx->entry, &uld_ctx_list);
	477	mutex_unlock(&dev_mutex);
cfdda9d7	478
2f25e9a5 SW	479	for (i = 0; i < ctx->lldi.nrxq; i++)
2f25e9a5 SW	480	PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
cfdda9d7	481	out:
2f25e9a5	482	return ctx;
cfdda9d7 SW	483	}
cfdda9d7 SW	484
cfdda9d7 SW	485	static int c4iw_uld_rx_handler(void handle, const __be64 rsp,
	486	const struct pkt_gl *gl)
	487	{
2f25e9a5 SW	488	struct uld_ctx *ctx = handle;
2f25e9a5 SW	489	struct c4iw_dev *dev = ctx->dev;
cfdda9d7 SW	490	struct sk_buff *skb;
	491	const struct cpl_act_establish *rpl;
	492	unsigned int opcode;
	493
	494	if (gl == NULL) {
	495	/* omit RSS and rsp_ctrl at end of descriptor */
	496	unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
	497
	498	skb = alloc_skb(256, GFP_ATOMIC);
	499	if (!skb)
	500	goto nomem;
	501	__skb_put(skb, len);
	502	skb_copy_to_linear_data(skb, &rsp[1], len);
	503	} else if (gl == CXGB4_MSG_AN) {
	504	const struct rsp_ctrl rc = (void )rsp;
	505
	506	u32 qid = be32_to_cpu(rc->pldbuflen_qid);
	507	c4iw_ev_handler(dev, qid);
	508	return 0;
	509	} else {
da411ba1	510	skb = cxgb4_pktgl_to_skb(gl, 128, 128);
cfdda9d7 SW	511	if (unlikely(!skb))
	512	goto nomem;
	513	}
	514
	515	rpl = cplhdr(skb);
	516	opcode = rpl->ot.opcode;
	517
	518	if (c4iw_handlers[opcode])
	519	c4iw_handlers[opcode](dev, skb);
	520	else
	521	printk(KERN_INFO "%s no handler opcode 0x%x...\n", __func__,
	522	opcode);
	523
	524	return 0;
	525	nomem:
	526	return -1;
	527	}
	528
	529	static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
	530	{
2f25e9a5	531	struct uld_ctx *ctx = handle;
1c01c538	532
cfdda9d7	533	PDBG("%s new_state %u\n", __func__, new_state);
1c01c538 SW	534	switch (new_state) {
1c01c538 SW	535	case CXGB4_STATE_UP:
2f25e9a5 SW	536	printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
2f25e9a5 SW	537	if (!ctx->dev) {
9efe10a1	538	int ret;
2f25e9a5 SW	539
2f25e9a5 SW	540	ctx->dev = c4iw_alloc(&ctx->lldi);
9efe10a1 SW	541	if (IS_ERR(ctx->dev)) {
	542	printk(KERN_ERR MOD
	543	"%s: initialization failed: %ld\n",
	544	pci_name(ctx->lldi.pdev),
	545	PTR_ERR(ctx->dev));
	546	ctx->dev = NULL;
	547	break;
	548	}
	549	ret = c4iw_register_device(ctx->dev);
	550	if (ret) {
1c01c538 SW	551	printk(KERN_ERR MOD
1c01c538 SW	552	"%s: RDMA registration failed: %d\n",
2f25e9a5	553	pci_name(ctx->lldi.pdev), ret);
9efe10a1 SW	554	c4iw_dealloc(ctx);
9efe10a1 SW	555	}
1c01c538 SW	556	}
	557	break;
	558	case CXGB4_STATE_DOWN:
	559	printk(KERN_INFO MOD "%s: Down\n",
2f25e9a5 SW	560	pci_name(ctx->lldi.pdev));
	561	if (ctx->dev)
	562	c4iw_remove(ctx);
1c01c538 SW	563	break;
	564	case CXGB4_STATE_START_RECOVERY:
	565	printk(KERN_INFO MOD "%s: Fatal Error\n",
2f25e9a5 SW	566	pci_name(ctx->lldi.pdev));
2f25e9a5 SW	567	if (ctx->dev) {
767fbe81 SW	568	struct ib_event event;
767fbe81 SW	569
2f25e9a5	570	ctx->dev->rdev.flags \|= T4_FATAL_ERROR;
767fbe81 SW	571	memset(&event, 0, sizeof event);
767fbe81 SW	572	event.event = IB_EVENT_DEVICE_FATAL;
2f25e9a5	573	event.device = &ctx->dev->ibdev;
767fbe81	574	ib_dispatch_event(&event);
2f25e9a5	575	c4iw_remove(ctx);
767fbe81	576	}
1c01c538 SW	577	break;
	578	case CXGB4_STATE_DETACH:
	579	printk(KERN_INFO MOD "%s: Detach\n",
2f25e9a5 SW	580	pci_name(ctx->lldi.pdev));
	581	if (ctx->dev)
	582	c4iw_remove(ctx);
1c01c538 SW	583	break;
1c01c538 SW	584	}
cfdda9d7 SW	585	return 0;
	586	}
	587
	588	static struct cxgb4_uld_info c4iw_uld_info = {
	589	.name = DRV_NAME,
	590	.add = c4iw_uld_add,
	591	.rx_handler = c4iw_uld_rx_handler,
	592	.state_change = c4iw_uld_state_change,
	593	};
	594
	595	static int __init c4iw_init_module(void)
	596	{
	597	int err;
	598
	599	err = c4iw_cm_init();
	600	if (err)
	601	return err;
	602
	603	c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
	604	if (!c4iw_debugfs_root)
	605	printk(KERN_WARNING MOD
	606	"could not create debugfs entry, continuing\n");
	607
	608	cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
	609
	610	return 0;
	611	}
	612
	613	static void __exit c4iw_exit_module(void)
	614	{
2f25e9a5	615	struct uld_ctx ctx, tmp;
cfdda9d7	616
cfdda9d7	617	mutex_lock(&dev_mutex);
2f25e9a5 SW	618	list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
	619	if (ctx->dev)
	620	c4iw_remove(ctx);
	621	kfree(ctx);
cfdda9d7 SW	622	}
cfdda9d7 SW	623	mutex_unlock(&dev_mutex);
fd388ce6	624	cxgb4_unregister_uld(CXGB4_ULD_RDMA);
cfdda9d7 SW	625	c4iw_cm_term();
	626	debugfs_remove_recursive(c4iw_debugfs_root);
	627	}
	628
	629	module_init(c4iw_init_module);
	630	module_exit(c4iw_exit_module);