RDMA/cxgb4: Fastreg NSMR fixes
[deliverable/linux.git] / drivers / infiniband / hw / cxgb4 / device.c
CommitLineData
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1/*
2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/debugfs.h>
35
36#include <rdma/ib_verbs.h>
37
38#include "iw_cxgb4.h"
39
40#define DRV_VERSION "0.1"
41
42MODULE_AUTHOR("Steve Wise");
43MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
44MODULE_LICENSE("Dual BSD/GPL");
45MODULE_VERSION(DRV_VERSION);
46
47static LIST_HEAD(dev_list);
48static DEFINE_MUTEX(dev_mutex);
49
50static struct dentry *c4iw_debugfs_root;
51
9e8d1fa3 52struct c4iw_debugfs_data {
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53 struct c4iw_dev *devp;
54 char *buf;
55 int bufsize;
56 int pos;
57};
58
9e8d1fa3 59static int count_idrs(int id, void *p, void *data)
cfdda9d7 60{
cfdda9d7
SW
61 int *countp = data;
62
cfdda9d7
SW
63 *countp = *countp + 1;
64 return 0;
65}
66
9e8d1fa3
SW
67static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
68 loff_t *ppos)
69{
70 struct c4iw_debugfs_data *d = file->private_data;
71 loff_t pos = *ppos;
72 loff_t avail = d->pos;
73
74 if (pos < 0)
75 return -EINVAL;
76 if (pos >= avail)
77 return 0;
78 if (count > avail - pos)
79 count = avail - pos;
80
81 while (count) {
82 size_t len = 0;
83
84 len = min((int)count, (int)d->pos - (int)pos);
85 if (copy_to_user(buf, d->buf + pos, len))
86 return -EFAULT;
87 if (len == 0)
88 return -EINVAL;
89
90 buf += len;
91 pos += len;
92 count -= len;
93 }
94 count = pos - *ppos;
95 *ppos = pos;
96 return count;
97}
98
99static int dump_qp(int id, void *p, void *data)
cfdda9d7
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100{
101 struct c4iw_qp *qp = p;
9e8d1fa3 102 struct c4iw_debugfs_data *qpd = data;
cfdda9d7
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103 int space;
104 int cc;
105
106 if (id != qp->wq.sq.qid)
107 return 0;
108
109 space = qpd->bufsize - qpd->pos - 1;
110 if (space == 0)
111 return 1;
112
113 if (qp->ep)
114 cc = snprintf(qpd->buf + qpd->pos, space, "qp id %u state %u "
115 "ep tid %u state %u %pI4:%u->%pI4:%u\n",
116 qp->wq.sq.qid, (int)qp->attr.state,
117 qp->ep->hwtid, (int)qp->ep->com.state,
118 &qp->ep->com.local_addr.sin_addr.s_addr,
119 ntohs(qp->ep->com.local_addr.sin_port),
120 &qp->ep->com.remote_addr.sin_addr.s_addr,
121 ntohs(qp->ep->com.remote_addr.sin_port));
122 else
123 cc = snprintf(qpd->buf + qpd->pos, space, "qp id %u state %u\n",
124 qp->wq.sq.qid, (int)qp->attr.state);
125 if (cc < space)
126 qpd->pos += cc;
127 return 0;
128}
129
130static int qp_release(struct inode *inode, struct file *file)
131{
9e8d1fa3 132 struct c4iw_debugfs_data *qpd = file->private_data;
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133 if (!qpd) {
134 printk(KERN_INFO "%s null qpd?\n", __func__);
135 return 0;
136 }
137 kfree(qpd->buf);
138 kfree(qpd);
139 return 0;
140}
141
142static int qp_open(struct inode *inode, struct file *file)
143{
9e8d1fa3 144 struct c4iw_debugfs_data *qpd;
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145 int ret = 0;
146 int count = 1;
147
148 qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
149 if (!qpd) {
150 ret = -ENOMEM;
151 goto out;
152 }
153 qpd->devp = inode->i_private;
154 qpd->pos = 0;
155
156 spin_lock_irq(&qpd->devp->lock);
9e8d1fa3 157 idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
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158 spin_unlock_irq(&qpd->devp->lock);
159
160 qpd->bufsize = count * 128;
161 qpd->buf = kmalloc(qpd->bufsize, GFP_KERNEL);
162 if (!qpd->buf) {
163 ret = -ENOMEM;
164 goto err1;
165 }
166
167 spin_lock_irq(&qpd->devp->lock);
9e8d1fa3 168 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
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169 spin_unlock_irq(&qpd->devp->lock);
170
171 qpd->buf[qpd->pos++] = 0;
172 file->private_data = qpd;
173 goto out;
174err1:
175 kfree(qpd);
176out:
177 return ret;
178}
179
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180static const struct file_operations qp_debugfs_fops = {
181 .owner = THIS_MODULE,
182 .open = qp_open,
183 .release = qp_release,
184 .read = debugfs_read,
185};
186
187static int dump_stag(int id, void *p, void *data)
cfdda9d7 188{
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189 struct c4iw_debugfs_data *stagd = data;
190 int space;
191 int cc;
cfdda9d7 192
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193 space = stagd->bufsize - stagd->pos - 1;
194 if (space == 0)
195 return 1;
196
197 cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
198 if (cc < space)
199 stagd->pos += cc;
200 return 0;
201}
202
203static int stag_release(struct inode *inode, struct file *file)
204{
205 struct c4iw_debugfs_data *stagd = file->private_data;
206 if (!stagd) {
207 printk(KERN_INFO "%s null stagd?\n", __func__);
cfdda9d7 208 return 0;
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209 }
210 kfree(stagd->buf);
211 kfree(stagd);
212 return 0;
213}
cfdda9d7 214
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215static int stag_open(struct inode *inode, struct file *file)
216{
217 struct c4iw_debugfs_data *stagd;
218 int ret = 0;
219 int count = 1;
cfdda9d7 220
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221 stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
222 if (!stagd) {
223 ret = -ENOMEM;
224 goto out;
225 }
226 stagd->devp = inode->i_private;
227 stagd->pos = 0;
cfdda9d7 228
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229 spin_lock_irq(&stagd->devp->lock);
230 idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
231 spin_unlock_irq(&stagd->devp->lock);
232
233 stagd->bufsize = count * sizeof("0x12345678\n");
234 stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
235 if (!stagd->buf) {
236 ret = -ENOMEM;
237 goto err1;
cfdda9d7 238 }
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239
240 spin_lock_irq(&stagd->devp->lock);
241 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
242 spin_unlock_irq(&stagd->devp->lock);
243
244 stagd->buf[stagd->pos++] = 0;
245 file->private_data = stagd;
246 goto out;
247err1:
248 kfree(stagd);
249out:
250 return ret;
cfdda9d7
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251}
252
9e8d1fa3 253static const struct file_operations stag_debugfs_fops = {
cfdda9d7 254 .owner = THIS_MODULE,
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255 .open = stag_open,
256 .release = stag_release,
257 .read = debugfs_read,
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258};
259
260static int setup_debugfs(struct c4iw_dev *devp)
261{
262 struct dentry *de;
263
264 if (!devp->debugfs_root)
265 return -1;
266
267 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
268 (void *)devp, &qp_debugfs_fops);
269 if (de && de->d_inode)
270 de->d_inode->i_size = 4096;
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271
272 de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
273 (void *)devp, &stag_debugfs_fops);
274 if (de && de->d_inode)
275 de->d_inode->i_size = 4096;
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276 return 0;
277}
278
279void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
280 struct c4iw_dev_ucontext *uctx)
281{
282 struct list_head *pos, *nxt;
283 struct c4iw_qid_list *entry;
284
285 mutex_lock(&uctx->lock);
286 list_for_each_safe(pos, nxt, &uctx->qpids) {
287 entry = list_entry(pos, struct c4iw_qid_list, entry);
288 list_del_init(&entry->entry);
289 if (!(entry->qid & rdev->qpmask))
290 c4iw_put_resource(&rdev->resource.qid_fifo, entry->qid,
291 &rdev->resource.qid_fifo_lock);
292 kfree(entry);
293 }
294
295 list_for_each_safe(pos, nxt, &uctx->qpids) {
296 entry = list_entry(pos, struct c4iw_qid_list, entry);
297 list_del_init(&entry->entry);
298 kfree(entry);
299 }
300 mutex_unlock(&uctx->lock);
301}
302
303void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
304 struct c4iw_dev_ucontext *uctx)
305{
306 INIT_LIST_HEAD(&uctx->qpids);
307 INIT_LIST_HEAD(&uctx->cqids);
308 mutex_init(&uctx->lock);
309}
310
311/* Caller takes care of locking if needed */
312static int c4iw_rdev_open(struct c4iw_rdev *rdev)
313{
314 int err;
315
316 c4iw_init_dev_ucontext(rdev, &rdev->uctx);
317
318 /*
319 * qpshift is the number of bits to shift the qpid left in order
320 * to get the correct address of the doorbell for that qp.
321 */
322 rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
323 rdev->qpmask = rdev->lldi.udb_density - 1;
324 rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
325 rdev->cqmask = rdev->lldi.ucq_density - 1;
326 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
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327 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
328 "qp qid start %u size %u cq qid start %u size %u\n",
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329 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
330 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
331 rdev->lldi.vr->pbl.start,
332 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
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333 rdev->lldi.vr->rq.size,
334 rdev->lldi.vr->qp.start,
335 rdev->lldi.vr->qp.size,
336 rdev->lldi.vr->cq.start,
337 rdev->lldi.vr->cq.size);
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338 PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
339 "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
340 (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
341 (void *)pci_resource_start(rdev->lldi.pdev, 2),
342 rdev->lldi.db_reg,
343 rdev->lldi.gts_reg,
344 rdev->qpshift, rdev->qpmask,
345 rdev->cqshift, rdev->cqmask);
346
347 if (c4iw_num_stags(rdev) == 0) {
348 err = -EINVAL;
349 goto err1;
350 }
351
352 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
353 if (err) {
354 printk(KERN_ERR MOD "error %d initializing resources\n", err);
355 goto err1;
356 }
357 err = c4iw_pblpool_create(rdev);
358 if (err) {
359 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
360 goto err2;
361 }
362 err = c4iw_rqtpool_create(rdev);
363 if (err) {
364 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
365 goto err3;
366 }
c6d7b267
SW
367 err = c4iw_ocqp_pool_create(rdev);
368 if (err) {
369 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
370 goto err4;
371 }
cfdda9d7 372 return 0;
c6d7b267
SW
373err4:
374 c4iw_rqtpool_destroy(rdev);
cfdda9d7
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375err3:
376 c4iw_pblpool_destroy(rdev);
377err2:
378 c4iw_destroy_resource(&rdev->resource);
379err1:
380 return err;
381}
382
383static void c4iw_rdev_close(struct c4iw_rdev *rdev)
384{
385 c4iw_pblpool_destroy(rdev);
386 c4iw_rqtpool_destroy(rdev);
387 c4iw_destroy_resource(&rdev->resource);
388}
389
390static void c4iw_remove(struct c4iw_dev *dev)
391{
392 PDBG("%s c4iw_dev %p\n", __func__, dev);
393 cancel_delayed_work_sync(&dev->db_drop_task);
394 list_del(&dev->entry);
1c01c538
SW
395 if (dev->registered)
396 c4iw_unregister_device(dev);
cfdda9d7
SW
397 c4iw_rdev_close(&dev->rdev);
398 idr_destroy(&dev->cqidr);
399 idr_destroy(&dev->qpidr);
400 idr_destroy(&dev->mmidr);
c6d7b267 401 iounmap(dev->rdev.oc_mw_kva);
cfdda9d7
SW
402 ib_dealloc_device(&dev->ibdev);
403}
404
405static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
406{
407 struct c4iw_dev *devp;
408 int ret;
409
410 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
411 if (!devp) {
412 printk(KERN_ERR MOD "Cannot allocate ib device\n");
413 return NULL;
414 }
415 devp->rdev.lldi = *infop;
416
c6d7b267
SW
417 devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
418 (pci_resource_len(devp->rdev.lldi.pdev, 2) -
419 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
420 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
421 devp->rdev.lldi.vr->ocq.size);
422
423 printk(KERN_INFO MOD "ocq memory: "
424 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
425 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
426 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
427
cfdda9d7
SW
428 mutex_lock(&dev_mutex);
429
430 ret = c4iw_rdev_open(&devp->rdev);
431 if (ret) {
432 mutex_unlock(&dev_mutex);
433 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
434 ib_dealloc_device(&devp->ibdev);
435 return NULL;
436 }
437
438 idr_init(&devp->cqidr);
439 idr_init(&devp->qpidr);
440 idr_init(&devp->mmidr);
441 spin_lock_init(&devp->lock);
442 list_add_tail(&devp->entry, &dev_list);
443 mutex_unlock(&dev_mutex);
444
cfdda9d7
SW
445 if (c4iw_debugfs_root) {
446 devp->debugfs_root = debugfs_create_dir(
447 pci_name(devp->rdev.lldi.pdev),
448 c4iw_debugfs_root);
449 setup_debugfs(devp);
450 }
451 return devp;
452}
453
454static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
455{
456 struct c4iw_dev *dev;
457 static int vers_printed;
458 int i;
459
460 if (!vers_printed++)
461 printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
462 DRV_VERSION);
463
464 dev = c4iw_alloc(infop);
465 if (!dev)
466 goto out;
467
468 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
469 __func__, pci_name(dev->rdev.lldi.pdev),
470 dev->rdev.lldi.nchan, dev->rdev.lldi.nrxq,
471 dev->rdev.lldi.ntxq, dev->rdev.lldi.nports);
472
473 for (i = 0; i < dev->rdev.lldi.nrxq; i++)
474 PDBG("rxqid[%u] %u\n", i, dev->rdev.lldi.rxq_ids[i]);
cfdda9d7
SW
475out:
476 return dev;
477}
478
479static struct sk_buff *t4_pktgl_to_skb(const struct pkt_gl *gl,
480 unsigned int skb_len,
481 unsigned int pull_len)
482{
483 struct sk_buff *skb;
484 struct skb_shared_info *ssi;
485
486 if (gl->tot_len <= 512) {
487 skb = alloc_skb(gl->tot_len, GFP_ATOMIC);
488 if (unlikely(!skb))
489 goto out;
490 __skb_put(skb, gl->tot_len);
491 skb_copy_to_linear_data(skb, gl->va, gl->tot_len);
492 } else {
493 skb = alloc_skb(skb_len, GFP_ATOMIC);
494 if (unlikely(!skb))
495 goto out;
496 __skb_put(skb, pull_len);
497 skb_copy_to_linear_data(skb, gl->va, pull_len);
498
499 ssi = skb_shinfo(skb);
500 ssi->frags[0].page = gl->frags[0].page;
501 ssi->frags[0].page_offset = gl->frags[0].page_offset + pull_len;
502 ssi->frags[0].size = gl->frags[0].size - pull_len;
503 if (gl->nfrags > 1)
504 memcpy(&ssi->frags[1], &gl->frags[1],
505 (gl->nfrags - 1) * sizeof(skb_frag_t));
506 ssi->nr_frags = gl->nfrags;
507
508 skb->len = gl->tot_len;
509 skb->data_len = skb->len - pull_len;
510 skb->truesize += skb->data_len;
511
512 /* Get a reference for the last page, we don't own it */
513 get_page(gl->frags[gl->nfrags - 1].page);
514 }
515out:
516 return skb;
517}
518
519static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
520 const struct pkt_gl *gl)
521{
522 struct c4iw_dev *dev = handle;
523 struct sk_buff *skb;
524 const struct cpl_act_establish *rpl;
525 unsigned int opcode;
526
527 if (gl == NULL) {
528 /* omit RSS and rsp_ctrl at end of descriptor */
529 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
530
531 skb = alloc_skb(256, GFP_ATOMIC);
532 if (!skb)
533 goto nomem;
534 __skb_put(skb, len);
535 skb_copy_to_linear_data(skb, &rsp[1], len);
536 } else if (gl == CXGB4_MSG_AN) {
537 const struct rsp_ctrl *rc = (void *)rsp;
538
539 u32 qid = be32_to_cpu(rc->pldbuflen_qid);
540 c4iw_ev_handler(dev, qid);
541 return 0;
542 } else {
543 skb = t4_pktgl_to_skb(gl, 128, 128);
544 if (unlikely(!skb))
545 goto nomem;
546 }
547
548 rpl = cplhdr(skb);
549 opcode = rpl->ot.opcode;
550
551 if (c4iw_handlers[opcode])
552 c4iw_handlers[opcode](dev, skb);
553 else
554 printk(KERN_INFO "%s no handler opcode 0x%x...\n", __func__,
555 opcode);
556
557 return 0;
558nomem:
559 return -1;
560}
561
562static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
563{
1c01c538
SW
564 struct c4iw_dev *dev = handle;
565
cfdda9d7 566 PDBG("%s new_state %u\n", __func__, new_state);
1c01c538
SW
567 switch (new_state) {
568 case CXGB4_STATE_UP:
569 printk(KERN_INFO MOD "%s: Up\n", pci_name(dev->rdev.lldi.pdev));
570 if (!dev->registered) {
571 int ret;
572 ret = c4iw_register_device(dev);
573 if (ret)
574 printk(KERN_ERR MOD
575 "%s: RDMA registration failed: %d\n",
576 pci_name(dev->rdev.lldi.pdev), ret);
577 }
578 break;
579 case CXGB4_STATE_DOWN:
580 printk(KERN_INFO MOD "%s: Down\n",
581 pci_name(dev->rdev.lldi.pdev));
582 if (dev->registered)
583 c4iw_unregister_device(dev);
584 break;
585 case CXGB4_STATE_START_RECOVERY:
586 printk(KERN_INFO MOD "%s: Fatal Error\n",
587 pci_name(dev->rdev.lldi.pdev));
588 if (dev->registered)
589 c4iw_unregister_device(dev);
590 break;
591 case CXGB4_STATE_DETACH:
592 printk(KERN_INFO MOD "%s: Detach\n",
593 pci_name(dev->rdev.lldi.pdev));
594 mutex_lock(&dev_mutex);
595 c4iw_remove(dev);
596 mutex_unlock(&dev_mutex);
597 break;
598 }
cfdda9d7
SW
599 return 0;
600}
601
602static struct cxgb4_uld_info c4iw_uld_info = {
603 .name = DRV_NAME,
604 .add = c4iw_uld_add,
605 .rx_handler = c4iw_uld_rx_handler,
606 .state_change = c4iw_uld_state_change,
607};
608
609static int __init c4iw_init_module(void)
610{
611 int err;
612
613 err = c4iw_cm_init();
614 if (err)
615 return err;
616
617 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
618 if (!c4iw_debugfs_root)
619 printk(KERN_WARNING MOD
620 "could not create debugfs entry, continuing\n");
621
622 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
623
624 return 0;
625}
626
627static void __exit c4iw_exit_module(void)
628{
629 struct c4iw_dev *dev, *tmp;
630
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631 mutex_lock(&dev_mutex);
632 list_for_each_entry_safe(dev, tmp, &dev_list, entry) {
633 c4iw_remove(dev);
634 }
635 mutex_unlock(&dev_mutex);
fd388ce6 636 cxgb4_unregister_uld(CXGB4_ULD_RDMA);
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637 c4iw_cm_term();
638 debugfs_remove_recursive(c4iw_debugfs_root);
639}
640
641module_init(c4iw_init_module);
642module_exit(c4iw_exit_module);
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