Commit | Line | Data |
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cfdda9d7 SW |
1 | /* |
2 | * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | #include <linux/module.h> | |
33 | #include <linux/moduleparam.h> | |
34 | #include <linux/debugfs.h> | |
35 | ||
36 | #include <rdma/ib_verbs.h> | |
37 | ||
38 | #include "iw_cxgb4.h" | |
39 | ||
40 | #define DRV_VERSION "0.1" | |
41 | ||
42 | MODULE_AUTHOR("Steve Wise"); | |
43 | MODULE_DESCRIPTION("Chelsio T4 RDMA Driver"); | |
44 | MODULE_LICENSE("Dual BSD/GPL"); | |
45 | MODULE_VERSION(DRV_VERSION); | |
46 | ||
2f25e9a5 | 47 | static LIST_HEAD(uld_ctx_list); |
cfdda9d7 SW |
48 | static DEFINE_MUTEX(dev_mutex); |
49 | ||
50 | static struct dentry *c4iw_debugfs_root; | |
51 | ||
9e8d1fa3 | 52 | struct c4iw_debugfs_data { |
cfdda9d7 SW |
53 | struct c4iw_dev *devp; |
54 | char *buf; | |
55 | int bufsize; | |
56 | int pos; | |
57 | }; | |
58 | ||
9e8d1fa3 | 59 | static int count_idrs(int id, void *p, void *data) |
cfdda9d7 | 60 | { |
cfdda9d7 SW |
61 | int *countp = data; |
62 | ||
cfdda9d7 SW |
63 | *countp = *countp + 1; |
64 | return 0; | |
65 | } | |
66 | ||
9e8d1fa3 SW |
67 | static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count, |
68 | loff_t *ppos) | |
69 | { | |
70 | struct c4iw_debugfs_data *d = file->private_data; | |
9e8d1fa3 | 71 | |
3160977a | 72 | return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos); |
9e8d1fa3 SW |
73 | } |
74 | ||
75 | static int dump_qp(int id, void *p, void *data) | |
cfdda9d7 SW |
76 | { |
77 | struct c4iw_qp *qp = p; | |
9e8d1fa3 | 78 | struct c4iw_debugfs_data *qpd = data; |
cfdda9d7 SW |
79 | int space; |
80 | int cc; | |
81 | ||
82 | if (id != qp->wq.sq.qid) | |
83 | return 0; | |
84 | ||
85 | space = qpd->bufsize - qpd->pos - 1; | |
86 | if (space == 0) | |
87 | return 1; | |
88 | ||
89 | if (qp->ep) | |
db5d040d SW |
90 | cc = snprintf(qpd->buf + qpd->pos, space, |
91 | "qp sq id %u rq id %u state %u onchip %u " | |
cfdda9d7 | 92 | "ep tid %u state %u %pI4:%u->%pI4:%u\n", |
db5d040d SW |
93 | qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state, |
94 | qp->wq.sq.flags & T4_SQ_ONCHIP, | |
cfdda9d7 SW |
95 | qp->ep->hwtid, (int)qp->ep->com.state, |
96 | &qp->ep->com.local_addr.sin_addr.s_addr, | |
97 | ntohs(qp->ep->com.local_addr.sin_port), | |
98 | &qp->ep->com.remote_addr.sin_addr.s_addr, | |
99 | ntohs(qp->ep->com.remote_addr.sin_port)); | |
100 | else | |
db5d040d SW |
101 | cc = snprintf(qpd->buf + qpd->pos, space, |
102 | "qp sq id %u rq id %u state %u onchip %u\n", | |
103 | qp->wq.sq.qid, qp->wq.rq.qid, | |
104 | (int)qp->attr.state, | |
105 | qp->wq.sq.flags & T4_SQ_ONCHIP); | |
cfdda9d7 SW |
106 | if (cc < space) |
107 | qpd->pos += cc; | |
108 | return 0; | |
109 | } | |
110 | ||
111 | static int qp_release(struct inode *inode, struct file *file) | |
112 | { | |
9e8d1fa3 | 113 | struct c4iw_debugfs_data *qpd = file->private_data; |
cfdda9d7 SW |
114 | if (!qpd) { |
115 | printk(KERN_INFO "%s null qpd?\n", __func__); | |
116 | return 0; | |
117 | } | |
118 | kfree(qpd->buf); | |
119 | kfree(qpd); | |
120 | return 0; | |
121 | } | |
122 | ||
123 | static int qp_open(struct inode *inode, struct file *file) | |
124 | { | |
9e8d1fa3 | 125 | struct c4iw_debugfs_data *qpd; |
cfdda9d7 SW |
126 | int ret = 0; |
127 | int count = 1; | |
128 | ||
129 | qpd = kmalloc(sizeof *qpd, GFP_KERNEL); | |
130 | if (!qpd) { | |
131 | ret = -ENOMEM; | |
132 | goto out; | |
133 | } | |
134 | qpd->devp = inode->i_private; | |
135 | qpd->pos = 0; | |
136 | ||
137 | spin_lock_irq(&qpd->devp->lock); | |
9e8d1fa3 | 138 | idr_for_each(&qpd->devp->qpidr, count_idrs, &count); |
cfdda9d7 SW |
139 | spin_unlock_irq(&qpd->devp->lock); |
140 | ||
141 | qpd->bufsize = count * 128; | |
142 | qpd->buf = kmalloc(qpd->bufsize, GFP_KERNEL); | |
143 | if (!qpd->buf) { | |
144 | ret = -ENOMEM; | |
145 | goto err1; | |
146 | } | |
147 | ||
148 | spin_lock_irq(&qpd->devp->lock); | |
9e8d1fa3 | 149 | idr_for_each(&qpd->devp->qpidr, dump_qp, qpd); |
cfdda9d7 SW |
150 | spin_unlock_irq(&qpd->devp->lock); |
151 | ||
152 | qpd->buf[qpd->pos++] = 0; | |
153 | file->private_data = qpd; | |
154 | goto out; | |
155 | err1: | |
156 | kfree(qpd); | |
157 | out: | |
158 | return ret; | |
159 | } | |
160 | ||
9e8d1fa3 SW |
161 | static const struct file_operations qp_debugfs_fops = { |
162 | .owner = THIS_MODULE, | |
163 | .open = qp_open, | |
164 | .release = qp_release, | |
165 | .read = debugfs_read, | |
8bbac892 | 166 | .llseek = default_llseek, |
9e8d1fa3 SW |
167 | }; |
168 | ||
169 | static int dump_stag(int id, void *p, void *data) | |
cfdda9d7 | 170 | { |
9e8d1fa3 SW |
171 | struct c4iw_debugfs_data *stagd = data; |
172 | int space; | |
173 | int cc; | |
cfdda9d7 | 174 | |
9e8d1fa3 SW |
175 | space = stagd->bufsize - stagd->pos - 1; |
176 | if (space == 0) | |
177 | return 1; | |
178 | ||
179 | cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8); | |
180 | if (cc < space) | |
181 | stagd->pos += cc; | |
182 | return 0; | |
183 | } | |
184 | ||
185 | static int stag_release(struct inode *inode, struct file *file) | |
186 | { | |
187 | struct c4iw_debugfs_data *stagd = file->private_data; | |
188 | if (!stagd) { | |
189 | printk(KERN_INFO "%s null stagd?\n", __func__); | |
cfdda9d7 | 190 | return 0; |
9e8d1fa3 SW |
191 | } |
192 | kfree(stagd->buf); | |
193 | kfree(stagd); | |
194 | return 0; | |
195 | } | |
cfdda9d7 | 196 | |
9e8d1fa3 SW |
197 | static int stag_open(struct inode *inode, struct file *file) |
198 | { | |
199 | struct c4iw_debugfs_data *stagd; | |
200 | int ret = 0; | |
201 | int count = 1; | |
cfdda9d7 | 202 | |
9e8d1fa3 SW |
203 | stagd = kmalloc(sizeof *stagd, GFP_KERNEL); |
204 | if (!stagd) { | |
205 | ret = -ENOMEM; | |
206 | goto out; | |
207 | } | |
208 | stagd->devp = inode->i_private; | |
209 | stagd->pos = 0; | |
cfdda9d7 | 210 | |
9e8d1fa3 SW |
211 | spin_lock_irq(&stagd->devp->lock); |
212 | idr_for_each(&stagd->devp->mmidr, count_idrs, &count); | |
213 | spin_unlock_irq(&stagd->devp->lock); | |
214 | ||
215 | stagd->bufsize = count * sizeof("0x12345678\n"); | |
216 | stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL); | |
217 | if (!stagd->buf) { | |
218 | ret = -ENOMEM; | |
219 | goto err1; | |
cfdda9d7 | 220 | } |
9e8d1fa3 SW |
221 | |
222 | spin_lock_irq(&stagd->devp->lock); | |
223 | idr_for_each(&stagd->devp->mmidr, dump_stag, stagd); | |
224 | spin_unlock_irq(&stagd->devp->lock); | |
225 | ||
226 | stagd->buf[stagd->pos++] = 0; | |
227 | file->private_data = stagd; | |
228 | goto out; | |
229 | err1: | |
230 | kfree(stagd); | |
231 | out: | |
232 | return ret; | |
cfdda9d7 SW |
233 | } |
234 | ||
9e8d1fa3 | 235 | static const struct file_operations stag_debugfs_fops = { |
cfdda9d7 | 236 | .owner = THIS_MODULE, |
9e8d1fa3 SW |
237 | .open = stag_open, |
238 | .release = stag_release, | |
239 | .read = debugfs_read, | |
8bbac892 | 240 | .llseek = default_llseek, |
cfdda9d7 SW |
241 | }; |
242 | ||
8d81ef34 VP |
243 | static int stats_show(struct seq_file *seq, void *v) |
244 | { | |
245 | struct c4iw_dev *dev = seq->private; | |
246 | ||
247 | seq_printf(seq, " Object: %10s %10s %10s\n", "Total", "Current", "Max"); | |
248 | seq_printf(seq, " PDID: %10llu %10llu %10llu\n", | |
249 | dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur, | |
250 | dev->rdev.stats.pd.max); | |
251 | seq_printf(seq, " QID: %10llu %10llu %10llu\n", | |
252 | dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur, | |
253 | dev->rdev.stats.qid.max); | |
254 | seq_printf(seq, " TPTMEM: %10llu %10llu %10llu\n", | |
255 | dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur, | |
256 | dev->rdev.stats.stag.max); | |
257 | seq_printf(seq, " PBLMEM: %10llu %10llu %10llu\n", | |
258 | dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur, | |
259 | dev->rdev.stats.pbl.max); | |
260 | seq_printf(seq, " RQTMEM: %10llu %10llu %10llu\n", | |
261 | dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur, | |
262 | dev->rdev.stats.rqt.max); | |
263 | seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu\n", | |
264 | dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur, | |
265 | dev->rdev.stats.ocqp.max); | |
266 | return 0; | |
267 | } | |
268 | ||
269 | static int stats_open(struct inode *inode, struct file *file) | |
270 | { | |
271 | return single_open(file, stats_show, inode->i_private); | |
272 | } | |
273 | ||
274 | static ssize_t stats_clear(struct file *file, const char __user *buf, | |
275 | size_t count, loff_t *pos) | |
276 | { | |
277 | struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private; | |
278 | ||
279 | mutex_lock(&dev->rdev.stats.lock); | |
280 | dev->rdev.stats.pd.max = 0; | |
281 | dev->rdev.stats.qid.max = 0; | |
282 | dev->rdev.stats.stag.max = 0; | |
283 | dev->rdev.stats.pbl.max = 0; | |
284 | dev->rdev.stats.rqt.max = 0; | |
285 | dev->rdev.stats.ocqp.max = 0; | |
286 | mutex_unlock(&dev->rdev.stats.lock); | |
287 | return count; | |
288 | } | |
289 | ||
290 | static const struct file_operations stats_debugfs_fops = { | |
291 | .owner = THIS_MODULE, | |
292 | .open = stats_open, | |
293 | .release = single_release, | |
294 | .read = seq_read, | |
295 | .llseek = seq_lseek, | |
296 | .write = stats_clear, | |
297 | }; | |
298 | ||
cfdda9d7 SW |
299 | static int setup_debugfs(struct c4iw_dev *devp) |
300 | { | |
301 | struct dentry *de; | |
302 | ||
303 | if (!devp->debugfs_root) | |
304 | return -1; | |
305 | ||
306 | de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root, | |
307 | (void *)devp, &qp_debugfs_fops); | |
308 | if (de && de->d_inode) | |
309 | de->d_inode->i_size = 4096; | |
9e8d1fa3 SW |
310 | |
311 | de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root, | |
312 | (void *)devp, &stag_debugfs_fops); | |
313 | if (de && de->d_inode) | |
314 | de->d_inode->i_size = 4096; | |
8d81ef34 VP |
315 | |
316 | de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root, | |
317 | (void *)devp, &stats_debugfs_fops); | |
318 | if (de && de->d_inode) | |
319 | de->d_inode->i_size = 4096; | |
320 | ||
cfdda9d7 SW |
321 | return 0; |
322 | } | |
323 | ||
324 | void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev, | |
325 | struct c4iw_dev_ucontext *uctx) | |
326 | { | |
327 | struct list_head *pos, *nxt; | |
328 | struct c4iw_qid_list *entry; | |
329 | ||
330 | mutex_lock(&uctx->lock); | |
331 | list_for_each_safe(pos, nxt, &uctx->qpids) { | |
332 | entry = list_entry(pos, struct c4iw_qid_list, entry); | |
333 | list_del_init(&entry->entry); | |
8d81ef34 | 334 | if (!(entry->qid & rdev->qpmask)) { |
cfdda9d7 | 335 | c4iw_put_resource(&rdev->resource.qid_fifo, entry->qid, |
8d81ef34 VP |
336 | &rdev->resource.qid_fifo_lock); |
337 | mutex_lock(&rdev->stats.lock); | |
338 | rdev->stats.qid.cur -= rdev->qpmask + 1; | |
339 | mutex_unlock(&rdev->stats.lock); | |
340 | } | |
cfdda9d7 SW |
341 | kfree(entry); |
342 | } | |
343 | ||
344 | list_for_each_safe(pos, nxt, &uctx->qpids) { | |
345 | entry = list_entry(pos, struct c4iw_qid_list, entry); | |
346 | list_del_init(&entry->entry); | |
347 | kfree(entry); | |
348 | } | |
349 | mutex_unlock(&uctx->lock); | |
350 | } | |
351 | ||
352 | void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev, | |
353 | struct c4iw_dev_ucontext *uctx) | |
354 | { | |
355 | INIT_LIST_HEAD(&uctx->qpids); | |
356 | INIT_LIST_HEAD(&uctx->cqids); | |
357 | mutex_init(&uctx->lock); | |
358 | } | |
359 | ||
360 | /* Caller takes care of locking if needed */ | |
361 | static int c4iw_rdev_open(struct c4iw_rdev *rdev) | |
362 | { | |
363 | int err; | |
364 | ||
365 | c4iw_init_dev_ucontext(rdev, &rdev->uctx); | |
366 | ||
367 | /* | |
368 | * qpshift is the number of bits to shift the qpid left in order | |
369 | * to get the correct address of the doorbell for that qp. | |
370 | */ | |
371 | rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density); | |
372 | rdev->qpmask = rdev->lldi.udb_density - 1; | |
373 | rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density); | |
374 | rdev->cqmask = rdev->lldi.ucq_density - 1; | |
375 | PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d " | |
93fb72e4 SW |
376 | "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x " |
377 | "qp qid start %u size %u cq qid start %u size %u\n", | |
cfdda9d7 SW |
378 | __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start, |
379 | rdev->lldi.vr->stag.size, c4iw_num_stags(rdev), | |
380 | rdev->lldi.vr->pbl.start, | |
381 | rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start, | |
93fb72e4 SW |
382 | rdev->lldi.vr->rq.size, |
383 | rdev->lldi.vr->qp.start, | |
384 | rdev->lldi.vr->qp.size, | |
385 | rdev->lldi.vr->cq.start, | |
386 | rdev->lldi.vr->cq.size); | |
cfdda9d7 SW |
387 | PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu " |
388 | "qpmask 0x%x cqshift %lu cqmask 0x%x\n", | |
389 | (unsigned)pci_resource_len(rdev->lldi.pdev, 2), | |
390 | (void *)pci_resource_start(rdev->lldi.pdev, 2), | |
391 | rdev->lldi.db_reg, | |
392 | rdev->lldi.gts_reg, | |
393 | rdev->qpshift, rdev->qpmask, | |
394 | rdev->cqshift, rdev->cqmask); | |
395 | ||
396 | if (c4iw_num_stags(rdev) == 0) { | |
397 | err = -EINVAL; | |
398 | goto err1; | |
399 | } | |
400 | ||
8d81ef34 VP |
401 | rdev->stats.pd.total = T4_MAX_NUM_PD; |
402 | rdev->stats.stag.total = rdev->lldi.vr->stag.size; | |
403 | rdev->stats.pbl.total = rdev->lldi.vr->pbl.size; | |
404 | rdev->stats.rqt.total = rdev->lldi.vr->rq.size; | |
405 | rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size; | |
406 | rdev->stats.qid.total = rdev->lldi.vr->qp.size; | |
407 | ||
cfdda9d7 SW |
408 | err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD); |
409 | if (err) { | |
410 | printk(KERN_ERR MOD "error %d initializing resources\n", err); | |
411 | goto err1; | |
412 | } | |
413 | err = c4iw_pblpool_create(rdev); | |
414 | if (err) { | |
415 | printk(KERN_ERR MOD "error %d initializing pbl pool\n", err); | |
416 | goto err2; | |
417 | } | |
418 | err = c4iw_rqtpool_create(rdev); | |
419 | if (err) { | |
420 | printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); | |
421 | goto err3; | |
422 | } | |
c6d7b267 SW |
423 | err = c4iw_ocqp_pool_create(rdev); |
424 | if (err) { | |
425 | printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err); | |
426 | goto err4; | |
427 | } | |
cfdda9d7 | 428 | return 0; |
c6d7b267 SW |
429 | err4: |
430 | c4iw_rqtpool_destroy(rdev); | |
cfdda9d7 SW |
431 | err3: |
432 | c4iw_pblpool_destroy(rdev); | |
433 | err2: | |
434 | c4iw_destroy_resource(&rdev->resource); | |
435 | err1: | |
436 | return err; | |
437 | } | |
438 | ||
439 | static void c4iw_rdev_close(struct c4iw_rdev *rdev) | |
440 | { | |
441 | c4iw_pblpool_destroy(rdev); | |
442 | c4iw_rqtpool_destroy(rdev); | |
443 | c4iw_destroy_resource(&rdev->resource); | |
444 | } | |
445 | ||
2f25e9a5 SW |
446 | struct uld_ctx { |
447 | struct list_head entry; | |
448 | struct cxgb4_lld_info lldi; | |
449 | struct c4iw_dev *dev; | |
450 | }; | |
451 | ||
9efe10a1 | 452 | static void c4iw_dealloc(struct uld_ctx *ctx) |
cfdda9d7 | 453 | { |
2f25e9a5 SW |
454 | c4iw_rdev_close(&ctx->dev->rdev); |
455 | idr_destroy(&ctx->dev->cqidr); | |
456 | idr_destroy(&ctx->dev->qpidr); | |
457 | idr_destroy(&ctx->dev->mmidr); | |
458 | iounmap(ctx->dev->rdev.oc_mw_kva); | |
459 | ib_dealloc_device(&ctx->dev->ibdev); | |
460 | ctx->dev = NULL; | |
cfdda9d7 SW |
461 | } |
462 | ||
9efe10a1 SW |
463 | static void c4iw_remove(struct uld_ctx *ctx) |
464 | { | |
465 | PDBG("%s c4iw_dev %p\n", __func__, ctx->dev); | |
466 | c4iw_unregister_device(ctx->dev); | |
467 | c4iw_dealloc(ctx); | |
468 | } | |
469 | ||
470 | static int rdma_supported(const struct cxgb4_lld_info *infop) | |
471 | { | |
472 | return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 && | |
473 | infop->vr->rq.size > 0 && infop->vr->qp.size > 0 && | |
474 | infop->vr->cq.size > 0 && infop->vr->ocq.size > 0; | |
475 | } | |
476 | ||
cfdda9d7 SW |
477 | static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) |
478 | { | |
479 | struct c4iw_dev *devp; | |
480 | int ret; | |
481 | ||
9efe10a1 SW |
482 | if (!rdma_supported(infop)) { |
483 | printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n", | |
484 | pci_name(infop->pdev)); | |
485 | return ERR_PTR(-ENOSYS); | |
486 | } | |
cfdda9d7 SW |
487 | devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp)); |
488 | if (!devp) { | |
489 | printk(KERN_ERR MOD "Cannot allocate ib device\n"); | |
bbe9a0a2 | 490 | return ERR_PTR(-ENOMEM); |
cfdda9d7 SW |
491 | } |
492 | devp->rdev.lldi = *infop; | |
493 | ||
c6d7b267 SW |
494 | devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) + |
495 | (pci_resource_len(devp->rdev.lldi.pdev, 2) - | |
496 | roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size)); | |
497 | devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, | |
498 | devp->rdev.lldi.vr->ocq.size); | |
499 | ||
2f25e9a5 | 500 | PDBG(KERN_INFO MOD "ocq memory: " |
c6d7b267 SW |
501 | "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", |
502 | devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, | |
503 | devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); | |
504 | ||
cfdda9d7 SW |
505 | ret = c4iw_rdev_open(&devp->rdev); |
506 | if (ret) { | |
cfdda9d7 SW |
507 | printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret); |
508 | ib_dealloc_device(&devp->ibdev); | |
bbe9a0a2 | 509 | return ERR_PTR(ret); |
cfdda9d7 SW |
510 | } |
511 | ||
512 | idr_init(&devp->cqidr); | |
513 | idr_init(&devp->qpidr); | |
514 | idr_init(&devp->mmidr); | |
515 | spin_lock_init(&devp->lock); | |
8d81ef34 | 516 | mutex_init(&devp->rdev.stats.lock); |
cfdda9d7 | 517 | |
cfdda9d7 SW |
518 | if (c4iw_debugfs_root) { |
519 | devp->debugfs_root = debugfs_create_dir( | |
520 | pci_name(devp->rdev.lldi.pdev), | |
521 | c4iw_debugfs_root); | |
522 | setup_debugfs(devp); | |
523 | } | |
524 | return devp; | |
525 | } | |
526 | ||
527 | static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) | |
528 | { | |
2f25e9a5 | 529 | struct uld_ctx *ctx; |
cfdda9d7 SW |
530 | static int vers_printed; |
531 | int i; | |
532 | ||
533 | if (!vers_printed++) | |
534 | printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n", | |
535 | DRV_VERSION); | |
536 | ||
2f25e9a5 SW |
537 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); |
538 | if (!ctx) { | |
539 | ctx = ERR_PTR(-ENOMEM); | |
cfdda9d7 | 540 | goto out; |
2f25e9a5 SW |
541 | } |
542 | ctx->lldi = *infop; | |
cfdda9d7 SW |
543 | |
544 | PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n", | |
2f25e9a5 SW |
545 | __func__, pci_name(ctx->lldi.pdev), |
546 | ctx->lldi.nchan, ctx->lldi.nrxq, | |
547 | ctx->lldi.ntxq, ctx->lldi.nports); | |
548 | ||
549 | mutex_lock(&dev_mutex); | |
550 | list_add_tail(&ctx->entry, &uld_ctx_list); | |
551 | mutex_unlock(&dev_mutex); | |
cfdda9d7 | 552 | |
2f25e9a5 SW |
553 | for (i = 0; i < ctx->lldi.nrxq; i++) |
554 | PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]); | |
cfdda9d7 | 555 | out: |
2f25e9a5 | 556 | return ctx; |
cfdda9d7 SW |
557 | } |
558 | ||
cfdda9d7 SW |
559 | static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, |
560 | const struct pkt_gl *gl) | |
561 | { | |
2f25e9a5 SW |
562 | struct uld_ctx *ctx = handle; |
563 | struct c4iw_dev *dev = ctx->dev; | |
cfdda9d7 SW |
564 | struct sk_buff *skb; |
565 | const struct cpl_act_establish *rpl; | |
566 | unsigned int opcode; | |
567 | ||
568 | if (gl == NULL) { | |
569 | /* omit RSS and rsp_ctrl at end of descriptor */ | |
570 | unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8; | |
571 | ||
572 | skb = alloc_skb(256, GFP_ATOMIC); | |
573 | if (!skb) | |
574 | goto nomem; | |
575 | __skb_put(skb, len); | |
576 | skb_copy_to_linear_data(skb, &rsp[1], len); | |
577 | } else if (gl == CXGB4_MSG_AN) { | |
578 | const struct rsp_ctrl *rc = (void *)rsp; | |
579 | ||
580 | u32 qid = be32_to_cpu(rc->pldbuflen_qid); | |
581 | c4iw_ev_handler(dev, qid); | |
582 | return 0; | |
583 | } else { | |
da411ba1 | 584 | skb = cxgb4_pktgl_to_skb(gl, 128, 128); |
cfdda9d7 SW |
585 | if (unlikely(!skb)) |
586 | goto nomem; | |
587 | } | |
588 | ||
589 | rpl = cplhdr(skb); | |
590 | opcode = rpl->ot.opcode; | |
591 | ||
592 | if (c4iw_handlers[opcode]) | |
593 | c4iw_handlers[opcode](dev, skb); | |
594 | else | |
595 | printk(KERN_INFO "%s no handler opcode 0x%x...\n", __func__, | |
596 | opcode); | |
597 | ||
598 | return 0; | |
599 | nomem: | |
600 | return -1; | |
601 | } | |
602 | ||
603 | static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) | |
604 | { | |
2f25e9a5 | 605 | struct uld_ctx *ctx = handle; |
1c01c538 | 606 | |
cfdda9d7 | 607 | PDBG("%s new_state %u\n", __func__, new_state); |
1c01c538 SW |
608 | switch (new_state) { |
609 | case CXGB4_STATE_UP: | |
2f25e9a5 SW |
610 | printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev)); |
611 | if (!ctx->dev) { | |
9efe10a1 | 612 | int ret; |
2f25e9a5 SW |
613 | |
614 | ctx->dev = c4iw_alloc(&ctx->lldi); | |
9efe10a1 SW |
615 | if (IS_ERR(ctx->dev)) { |
616 | printk(KERN_ERR MOD | |
617 | "%s: initialization failed: %ld\n", | |
618 | pci_name(ctx->lldi.pdev), | |
619 | PTR_ERR(ctx->dev)); | |
620 | ctx->dev = NULL; | |
621 | break; | |
622 | } | |
623 | ret = c4iw_register_device(ctx->dev); | |
624 | if (ret) { | |
1c01c538 SW |
625 | printk(KERN_ERR MOD |
626 | "%s: RDMA registration failed: %d\n", | |
2f25e9a5 | 627 | pci_name(ctx->lldi.pdev), ret); |
9efe10a1 SW |
628 | c4iw_dealloc(ctx); |
629 | } | |
1c01c538 SW |
630 | } |
631 | break; | |
632 | case CXGB4_STATE_DOWN: | |
633 | printk(KERN_INFO MOD "%s: Down\n", | |
2f25e9a5 SW |
634 | pci_name(ctx->lldi.pdev)); |
635 | if (ctx->dev) | |
636 | c4iw_remove(ctx); | |
1c01c538 SW |
637 | break; |
638 | case CXGB4_STATE_START_RECOVERY: | |
639 | printk(KERN_INFO MOD "%s: Fatal Error\n", | |
2f25e9a5 SW |
640 | pci_name(ctx->lldi.pdev)); |
641 | if (ctx->dev) { | |
767fbe81 SW |
642 | struct ib_event event; |
643 | ||
2f25e9a5 | 644 | ctx->dev->rdev.flags |= T4_FATAL_ERROR; |
767fbe81 SW |
645 | memset(&event, 0, sizeof event); |
646 | event.event = IB_EVENT_DEVICE_FATAL; | |
2f25e9a5 | 647 | event.device = &ctx->dev->ibdev; |
767fbe81 | 648 | ib_dispatch_event(&event); |
2f25e9a5 | 649 | c4iw_remove(ctx); |
767fbe81 | 650 | } |
1c01c538 SW |
651 | break; |
652 | case CXGB4_STATE_DETACH: | |
653 | printk(KERN_INFO MOD "%s: Detach\n", | |
2f25e9a5 SW |
654 | pci_name(ctx->lldi.pdev)); |
655 | if (ctx->dev) | |
656 | c4iw_remove(ctx); | |
1c01c538 SW |
657 | break; |
658 | } | |
cfdda9d7 SW |
659 | return 0; |
660 | } | |
661 | ||
662 | static struct cxgb4_uld_info c4iw_uld_info = { | |
663 | .name = DRV_NAME, | |
664 | .add = c4iw_uld_add, | |
665 | .rx_handler = c4iw_uld_rx_handler, | |
666 | .state_change = c4iw_uld_state_change, | |
667 | }; | |
668 | ||
669 | static int __init c4iw_init_module(void) | |
670 | { | |
671 | int err; | |
672 | ||
673 | err = c4iw_cm_init(); | |
674 | if (err) | |
675 | return err; | |
676 | ||
677 | c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL); | |
678 | if (!c4iw_debugfs_root) | |
679 | printk(KERN_WARNING MOD | |
680 | "could not create debugfs entry, continuing\n"); | |
681 | ||
682 | cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info); | |
683 | ||
684 | return 0; | |
685 | } | |
686 | ||
687 | static void __exit c4iw_exit_module(void) | |
688 | { | |
2f25e9a5 | 689 | struct uld_ctx *ctx, *tmp; |
cfdda9d7 | 690 | |
cfdda9d7 | 691 | mutex_lock(&dev_mutex); |
2f25e9a5 SW |
692 | list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) { |
693 | if (ctx->dev) | |
694 | c4iw_remove(ctx); | |
695 | kfree(ctx); | |
cfdda9d7 SW |
696 | } |
697 | mutex_unlock(&dev_mutex); | |
fd388ce6 | 698 | cxgb4_unregister_uld(CXGB4_ULD_RDMA); |
cfdda9d7 SW |
699 | c4iw_cm_term(); |
700 | debugfs_remove_recursive(c4iw_debugfs_root); | |
701 | } | |
702 | ||
703 | module_init(c4iw_init_module); | |
704 | module_exit(c4iw_exit_module); |