[deliverable/linux.git] / drivers / infiniband / hw / ehca / ehca_classes.h

/*
 *  IBM eServer eHCA Infiniband device driver for Linux on POWER
 *
 *  Struct definition for eHCA internal structures
 *
 *  Authors: Heiko J Schick <schickhj@de.ibm.com>
 *           Christoph Raisch <raisch@de.ibm.com>
 *
 *  Copyright (c) 2005 IBM Corporation
 *
 *  All rights reserved.
 *
 *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
 *  BSD.
 *
 * OpenIB BSD License
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials
 * provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __EHCA_CLASSES_H__
#define __EHCA_CLASSES_H__


struct ehca_module;
struct ehca_qp;
struct ehca_cq;
struct ehca_eq;
struct ehca_mr;
struct ehca_mw;
struct ehca_pd;
struct ehca_av;

#include <linux/wait.h>

#include <rdma/ib_verbs.h>
#include <rdma/ib_user_verbs.h>

#ifdef CONFIG_PPC64
#include "ehca_classes_pSeries.h"
#endif
#include "ipz_pt_fn.h"
#include "ehca_qes.h"
#include "ehca_irq.h"

#define EHCA_EQE_CACHE_SIZE 20

struct ehca_eqe_cache_entry {
	struct ehca_eqe *eqe;
	struct ehca_cq *cq;
};

struct ehca_eq {
	u32 length;
	struct ipz_queue ipz_queue;
	struct ipz_eq_handle ipz_eq_handle;
	struct work_struct work;
	struct h_galpas galpas;
	int is_initialized;
	struct ehca_pfeq pf;
	spinlock_t spinlock;
	struct tasklet_struct interrupt_task;
	u32 ist;
	spinlock_t irq_spinlock;
	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
};

struct ehca_sport {
	struct ib_cq *ibcq_aqp1;
	struct ib_qp *ibqp_aqp1;
	enum ib_rate  rate;
	enum ib_port_state port_state;
};

struct ehca_shca {
	struct ib_device ib_device;
	struct ibmebus_dev *ibmebus_dev;
	u8 num_ports;
	int hw_level;
	struct list_head shca_list;
	struct ipz_adapter_handle ipz_hca_handle;
	struct ehca_sport sport[2];
	struct ehca_eq eq;
	struct ehca_eq neq;
	struct ehca_mr *maxmr;
	struct ehca_pd *pd;
	struct h_galpas galpas;
	struct mutex modify_mutex;
};

struct ehca_pd {
	struct ib_pd ib_pd;
	struct ipz_pd fw_pd;
	u32 ownpid;
};

struct ehca_qp {
	struct ib_qp ib_qp;
	u32 qp_type;
	struct ipz_queue ipz_squeue;
	struct ipz_queue ipz_rqueue;
	struct h_galpas galpas;
	u32 qkey;
	u32 real_qp_num;
	u32 token;
	spinlock_t spinlock_s;
	spinlock_t spinlock_r;
	u32 sq_max_inline_data_size;
	struct ipz_qp_handle ipz_qp_handle;
	struct ehca_pfqp pf;
	struct ib_qp_init_attr init_attr;
	struct ehca_cq *send_cq;
	struct ehca_cq *recv_cq;
	unsigned int sqerr_purgeflag;
	struct hlist_node list_entries;
	/* mmap counter for resources mapped into user space */
	u32 mm_count_squeue;
	u32 mm_count_rqueue;
	u32 mm_count_galpa;
};

/* must be power of 2 */
#define QP_HASHTAB_LEN 8

struct ehca_cq {
	struct ib_cq ib_cq;
	struct ipz_queue ipz_queue;
	struct h_galpas galpas;
	spinlock_t spinlock;
	u32 cq_number;
	u32 token;
	u32 nr_of_entries;
	struct ipz_cq_handle ipz_cq_handle;
	struct ehca_pfcq pf;
	spinlock_t cb_lock;
	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
	struct list_head entry;
	u32 nr_callbacks; /* #events assigned to cpu by scaling code */
	u32 nr_events;    /* #events seen */
	wait_queue_head_t wait_completion;
	spinlock_t task_lock;
	u32 ownpid;
	/* mmap counter for resources mapped into user space */
	u32 mm_count_queue;
	u32 mm_count_galpa;
};

enum ehca_mr_flag {
	EHCA_MR_FLAG_FMR = 0x80000000,	 /* FMR, created with ehca_alloc_fmr */
	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR                           */
};

struct ehca_mr {
	union {
		struct ib_mr ib_mr;	/* must always be first in ehca_mr */
		struct ib_fmr ib_fmr;	/* must always be first in ehca_mr */
	} ib;
	struct ib_umem *umem;
	spinlock_t mrlock;

	enum ehca_mr_flag flags;
	u32 num_pages;		/* number of MR pages */
	u32 num_4k;		/* number of 4k "page" portions to form MR */
	int acl;		/* ACL (stored here for usage in reregister) */
	u64 *start;		/* virtual start address (stored here for */
	                        /* usage in reregister) */
	u64 size;		/* size (stored here for usage in reregister) */
	u32 fmr_page_size;	/* page size for FMR */
	u32 fmr_max_pages;	/* max pages for FMR */
	u32 fmr_max_maps;	/* max outstanding maps for FMR */
	u32 fmr_map_cnt;	/* map counter for FMR */
	/* fw specific data */
	struct ipz_mrmw_handle ipz_mr_handle;	/* MR handle for h-calls */
	struct h_galpas galpas;
	/* data for userspace bridge */
	u32 nr_of_pages;
	void *pagearray;
};

struct ehca_mw {
	struct ib_mw ib_mw;	/* gen2 mw, must always be first in ehca_mw */
	spinlock_t mwlock;

	u8 never_bound;		/* indication MW was never bound */
	struct ipz_mrmw_handle ipz_mw_handle;	/* MW handle for h-calls */
	struct h_galpas galpas;
};

enum ehca_mr_pgi_type {
	EHCA_MR_PGI_PHYS   = 1,  /* type of ehca_reg_phys_mr,
				  * ehca_rereg_phys_mr,
				  * ehca_reg_internal_maxmr */
	EHCA_MR_PGI_USER   = 2,  /* type of ehca_reg_user_mr */
	EHCA_MR_PGI_FMR    = 3   /* type of ehca_map_phys_fmr */
};

struct ehca_mr_pginfo {
	enum ehca_mr_pgi_type type;
	u64 num_pages;
	u64 page_cnt;
	u64 num_4k;       /* number of 4k "page" portions */
	u64 page_4k_cnt;  /* counter for 4k "page" portions */
	u64 next_4k;      /* next 4k "page" portion in buffer/chunk/listelem */

	/* type EHCA_MR_PGI_PHYS section */
	int num_phys_buf;
	struct ib_phys_buf *phys_buf_array;
	u64 next_buf;

	/* type EHCA_MR_PGI_USER section */
	struct ib_umem *region;
	struct ib_umem_chunk *next_chunk;
	u64 next_nmap;

	/* type EHCA_MR_PGI_FMR section */
	u64 *page_list;
	u64 next_listelem;
	/* next_4k also used within EHCA_MR_PGI_FMR */
};

/* output parameters for MR/FMR hipz calls */
struct ehca_mr_hipzout_parms {
	struct ipz_mrmw_handle handle;
	u32 lkey;
	u32 rkey;
	u64 len;
	u64 vaddr;
	u32 acl;
};

/* output parameters for MW hipz calls */
struct ehca_mw_hipzout_parms {
	struct ipz_mrmw_handle handle;
	u32 rkey;
};

struct ehca_av {
	struct ib_ah ib_ah;
	struct ehca_ud_av av;
};

struct ehca_ucontext {
	struct ib_ucontext ib_ucontext;
};

int ehca_init_pd_cache(void);
void ehca_cleanup_pd_cache(void);
int ehca_init_cq_cache(void);
void ehca_cleanup_cq_cache(void);
int ehca_init_qp_cache(void);
void ehca_cleanup_qp_cache(void);
int ehca_init_av_cache(void);
void ehca_cleanup_av_cache(void);
int ehca_init_mrmw_cache(void);
void ehca_cleanup_mrmw_cache(void);

extern spinlock_t ehca_qp_idr_lock;
extern spinlock_t ehca_cq_idr_lock;
extern struct idr ehca_qp_idr;
extern struct idr ehca_cq_idr;

extern int ehca_static_rate;
extern int ehca_port_act_time;
extern int ehca_use_hp_mr;
extern int ehca_scaling_code;

struct ipzu_queue_resp {
	u32 qe_size;      /* queue entry size */
	u32 act_nr_of_sg;
	u32 queue_length; /* queue length allocated in bytes */
	u32 pagesize;
	u32 toggle_state;
	u32 dummy; /* padding for 8 byte alignment */
};

struct ehca_create_cq_resp {
	u32 cq_number;
	u32 token;
	struct ipzu_queue_resp ipz_queue;
};

struct ehca_create_qp_resp {
	u32 qp_num;
	u32 token;
	u32 qp_type;
	u32 qkey;
	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
	u32 real_qp_num;
	u32 dummy; /* padding for 8 byte alignment */
	struct ipzu_queue_resp ipz_squeue;
	struct ipzu_queue_resp ipz_rqueue;
};

struct ehca_alloc_cq_parms {
	u32 nr_cqe;
	u32 act_nr_of_entries;
	u32 act_pages;
	struct ipz_eq_handle eq_handle;
};

struct ehca_alloc_qp_parms {
	int servicetype;
	int sigtype;
	int daqp_ctrl;
	int max_send_sge;
	int max_recv_sge;
	int ud_av_l_key_ctl;

	u16 act_nr_send_wqes;
	u16 act_nr_recv_wqes;
	u8  act_nr_recv_sges;
	u8  act_nr_send_sges;

	u32 nr_rq_pages;
	u32 nr_sq_pages;

	struct ipz_eq_handle ipz_eq_handle;
	struct ipz_pd pd;
};

int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);

#endif
Commit	Line	Data
fab97220 HS	1	/*
	2	* IBM eServer eHCA Infiniband device driver for Linux on POWER
	3	*
	4	* Struct definition for eHCA internal structures
	5	*
	6	* Authors: Heiko J Schick <schickhj@de.ibm.com>
	7	* Christoph Raisch <raisch@de.ibm.com>
	8	*
	9	* Copyright (c) 2005 IBM Corporation
	10	*
	11	* All rights reserved.
	12	*
	13	* This source code is distributed under a dual license of GPL v2.0 and OpenIB
	14	* BSD.
	15	*
	16	* OpenIB BSD License
	17	*
	18	* Redistribution and use in source and binary forms, with or without
	19	* modification, are permitted provided that the following conditions are met:
	20	*
	21	* Redistributions of source code must retain the above copyright notice, this
	22	* list of conditions and the following disclaimer.
	23	*
	24	* Redistributions in binary form must reproduce the above copyright notice,
	25	* this list of conditions and the following disclaimer in the documentation
	26	* and/or other materials
	27	* provided with the distribution.
	28	*
	29	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	30	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	31	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	32	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	33	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	34	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	35	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
	36	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
	37	* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	38	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	39	* POSSIBILITY OF SUCH DAMAGE.
	40	*/
	41
	42	#ifndef __EHCA_CLASSES_H__
	43	#define __EHCA_CLASSES_H__
	44
fab97220 HS	45
	46	struct ehca_module;
	47	struct ehca_qp;
	48	struct ehca_cq;
	49	struct ehca_eq;
	50	struct ehca_mr;
	51	struct ehca_mw;
	52	struct ehca_pd;
	53	struct ehca_av;
	54
31726798 HNN	55	#include <linux/wait.h>
31726798 HNN	56
78d8d5f9 HNN	57	#include <rdma/ib_verbs.h>
	58	#include <rdma/ib_user_verbs.h>
	59
fab97220 HS	60	#ifdef CONFIG_PPC64
	61	#include "ehca_classes_pSeries.h"
	62	#endif
78d8d5f9 HNN	63	#include "ipz_pt_fn.h"
	64	#include "ehca_qes.h"
	65	#include "ehca_irq.h"
fab97220	66
78d8d5f9	67	#define EHCA_EQE_CACHE_SIZE 20
fab97220	68
78d8d5f9 HNN	69	struct ehca_eqe_cache_entry {
	70	struct ehca_eqe *eqe;
	71	struct ehca_cq *cq;
	72	};
fab97220 HS	73
	74	struct ehca_eq {
	75	u32 length;
	76	struct ipz_queue ipz_queue;
	77	struct ipz_eq_handle ipz_eq_handle;
	78	struct work_struct work;
	79	struct h_galpas galpas;
	80	int is_initialized;
	81	struct ehca_pfeq pf;
	82	spinlock_t spinlock;
	83	struct tasklet_struct interrupt_task;
	84	u32 ist;
78d8d5f9 HNN	85	spinlock_t irq_spinlock;
78d8d5f9 HNN	86	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
fab97220 HS	87	};
	88
	89	struct ehca_sport {
	90	struct ib_cq *ibcq_aqp1;
	91	struct ib_qp *ibqp_aqp1;
	92	enum ib_rate rate;
	93	enum ib_port_state port_state;
	94	};
	95
	96	struct ehca_shca {
	97	struct ib_device ib_device;
	98	struct ibmebus_dev *ibmebus_dev;
	99	u8 num_ports;
	100	int hw_level;
	101	struct list_head shca_list;
	102	struct ipz_adapter_handle ipz_hca_handle;
	103	struct ehca_sport sport[2];
	104	struct ehca_eq eq;
	105	struct ehca_eq neq;
	106	struct ehca_mr *maxmr;
	107	struct ehca_pd *pd;
	108	struct h_galpas galpas;
c4ed790d	109	struct mutex modify_mutex;
fab97220 HS	110	};
	111
	112	struct ehca_pd {
	113	struct ib_pd ib_pd;
	114	struct ipz_pd fw_pd;
	115	u32 ownpid;
	116	};
	117
	118	struct ehca_qp {
	119	struct ib_qp ib_qp;
	120	u32 qp_type;
	121	struct ipz_queue ipz_squeue;
	122	struct ipz_queue ipz_rqueue;
	123	struct h_galpas galpas;
	124	u32 qkey;
	125	u32 real_qp_num;
	126	u32 token;
	127	spinlock_t spinlock_s;
	128	spinlock_t spinlock_r;
	129	u32 sq_max_inline_data_size;
	130	struct ipz_qp_handle ipz_qp_handle;
	131	struct ehca_pfqp pf;
	132	struct ib_qp_init_attr init_attr;
fab97220 HS	133	struct ehca_cq *send_cq;
	134	struct ehca_cq *recv_cq;
	135	unsigned int sqerr_purgeflag;
	136	struct hlist_node list_entries;
4c34bdf5 HNN	137	/* mmap counter for resources mapped into user space */
	138	u32 mm_count_squeue;
	139	u32 mm_count_rqueue;
	140	u32 mm_count_galpa;
fab97220 HS	141	};
	142
	143	/* must be power of 2 */
	144	#define QP_HASHTAB_LEN 8
	145
	146	struct ehca_cq {
	147	struct ib_cq ib_cq;
	148	struct ipz_queue ipz_queue;
	149	struct h_galpas galpas;
	150	spinlock_t spinlock;
	151	u32 cq_number;
	152	u32 token;
	153	u32 nr_of_entries;
	154	struct ipz_cq_handle ipz_cq_handle;
	155	struct ehca_pfcq pf;
	156	spinlock_t cb_lock;
fab97220 HS	157	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
fab97220 HS	158	struct list_head entry;
31726798 HNN	159	u32 nr_callbacks; /* #events assigned to cpu by scaling code */
	160	u32 nr_events; /* #events seen */
	161	wait_queue_head_t wait_completion;
fab97220 HS	162	spinlock_t task_lock;
fab97220 HS	163	u32 ownpid;
4c34bdf5 HNN	164	/* mmap counter for resources mapped into user space */
	165	u32 mm_count_queue;
	166	u32 mm_count_galpa;
fab97220 HS	167	};
	168
	169	enum ehca_mr_flag {
	170	EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
	171	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
	172	};
	173
	174	struct ehca_mr {
	175	union {
	176	struct ib_mr ib_mr; /* must always be first in ehca_mr */
	177	struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
	178	} ib;
f7c6a7b5	179	struct ib_umem *umem;
fab97220 HS	180	spinlock_t mrlock;
	181
	182	enum ehca_mr_flag flags;
	183	u32 num_pages; /* number of MR pages */
	184	u32 num_4k; /* number of 4k "page" portions to form MR */
	185	int acl; /* ACL (stored here for usage in reregister) */
	186	u64 start; / virtual start address (stored here for */
	187	/* usage in reregister) */
	188	u64 size; /* size (stored here for usage in reregister) */
	189	u32 fmr_page_size; /* page size for FMR */
	190	u32 fmr_max_pages; /* max pages for FMR */
	191	u32 fmr_max_maps; /* max outstanding maps for FMR */
	192	u32 fmr_map_cnt; /* map counter for FMR */
	193	/* fw specific data */
	194	struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
	195	struct h_galpas galpas;
	196	/* data for userspace bridge */
	197	u32 nr_of_pages;
	198	void *pagearray;
	199	};
	200
	201	struct ehca_mw {
	202	struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
	203	spinlock_t mwlock;
	204
	205	u8 never_bound; /* indication MW was never bound */
	206	struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
	207	struct h_galpas galpas;
	208	};
	209
	210	enum ehca_mr_pgi_type {
	211	EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
	212	* ehca_rereg_phys_mr,
	213	* ehca_reg_internal_maxmr */
	214	EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
	215	EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
	216	};
	217
	218	struct ehca_mr_pginfo {
	219	enum ehca_mr_pgi_type type;
	220	u64 num_pages;
	221	u64 page_cnt;
	222	u64 num_4k; /* number of 4k "page" portions */
	223	u64 page_4k_cnt; /* counter for 4k "page" portions */
	224	u64 next_4k; /* next 4k "page" portion in buffer/chunk/listelem */
	225
	226	/* type EHCA_MR_PGI_PHYS section */
	227	int num_phys_buf;
	228	struct ib_phys_buf *phys_buf_array;
	229	u64 next_buf;
	230
	231	/* type EHCA_MR_PGI_USER section */
	232	struct ib_umem *region;
	233	struct ib_umem_chunk *next_chunk;
	234	u64 next_nmap;
	235
	236	/* type EHCA_MR_PGI_FMR section */
	237	u64 *page_list;
	238	u64 next_listelem;
	239	/* next_4k also used within EHCA_MR_PGI_FMR */
	240	};
	241
	242	/* output parameters for MR/FMR hipz calls */
	243	struct ehca_mr_hipzout_parms {
244	struct ipz_mrmw_handle handle;
245	u32 lkey;
246	u32 rkey;
247	u64 len;
248	u64 vaddr;
249	u32 acl;
250	};
251
252	/* output parameters for MW hipz calls */
253	struct ehca_mw_hipzout_parms {
254	struct ipz_mrmw_handle handle;
255	u32 rkey;
256	};
257
258	struct ehca_av {
259	struct ib_ah ib_ah;
260	struct ehca_ud_av av;
261	};
262
263	struct ehca_ucontext {
264	struct ib_ucontext ib_ucontext;
265	};
266
fab97220 HS	267	int ehca_init_pd_cache(void);
	268	void ehca_cleanup_pd_cache(void);
	269	int ehca_init_cq_cache(void);
	270	void ehca_cleanup_cq_cache(void);
	271	int ehca_init_qp_cache(void);
	272	void ehca_cleanup_qp_cache(void);
	273	int ehca_init_av_cache(void);
	274	void ehca_cleanup_av_cache(void);
	275	int ehca_init_mrmw_cache(void);
	276	void ehca_cleanup_mrmw_cache(void);
	277
	278	extern spinlock_t ehca_qp_idr_lock;
	279	extern spinlock_t ehca_cq_idr_lock;
	280	extern struct idr ehca_qp_idr;
	281	extern struct idr ehca_cq_idr;
	282
	283	extern int ehca_static_rate;
	284	extern int ehca_port_act_time;
	285	extern int ehca_use_hp_mr;
4fd30060	286	extern int ehca_scaling_code;
fab97220 HS	287
fab97220 HS	288	struct ipzu_queue_resp {
fab97220 HS	289	u32 qe_size; /* queue entry size */
	290	u32 act_nr_of_sg;
	291	u32 queue_length; /* queue length allocated in bytes */
	292	u32 pagesize;
	293	u32 toggle_state;
	294	u32 dummy; /* padding for 8 byte alignment */
	295	};
	296
	297	struct ehca_create_cq_resp {
	298	u32 cq_number;
	299	u32 token;
	300	struct ipzu_queue_resp ipz_queue;
fab97220 HS	301	};
	302
	303	struct ehca_create_qp_resp {
	304	u32 qp_num;
	305	u32 token;
	306	u32 qp_type;
	307	u32 qkey;
	308	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
	309	u32 real_qp_num;
	310	u32 dummy; /* padding for 8 byte alignment */
	311	struct ipzu_queue_resp ipz_squeue;
	312	struct ipzu_queue_resp ipz_rqueue;
fab97220 HS	313	};
	314
	315	struct ehca_alloc_cq_parms {
	316	u32 nr_cqe;
	317	u32 act_nr_of_entries;
	318	u32 act_pages;
	319	struct ipz_eq_handle eq_handle;
	320	};
	321
	322	struct ehca_alloc_qp_parms {
	323	int servicetype;
	324	int sigtype;
	325	int daqp_ctrl;
	326	int max_send_sge;
	327	int max_recv_sge;
	328	int ud_av_l_key_ctl;
	329
	330	u16 act_nr_send_wqes;
	331	u16 act_nr_recv_wqes;
	332	u8 act_nr_recv_sges;
	333	u8 act_nr_send_sges;
	334
	335	u32 nr_rq_pages;
	336	u32 nr_sq_pages;
	337
	338	struct ipz_eq_handle ipz_eq_handle;
	339	struct ipz_pd pd;
	340	};
	341
	342	int ehca_cq_assign_qp(struct ehca_cq cq, struct ehca_qp qp);
	343	int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
	344	struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
	345
	346	#endif