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RDMA/i40iw: Initialize max enabled vfs variable
[deliverable/linux.git] / drivers / infiniband / hw / i40iw / i40iw_main.c
CommitLineData
8e06af71
FL		 1/*******************************************************************************
2*
3* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4*
5* This software is available to you under a choice of one of two
6* licenses. You may choose to be licensed under the terms of the GNU
7* General Public License (GPL) Version 2, available from the file
8* COPYING in the main directory of this source tree, or the
9* OpenFabrics.org BSD license below:
10*
11* Redistribution and use in source and binary forms, with or
12* without modification, are permitted provided that the following
13* conditions are met:
14*
15* - Redistributions of source code must retain the above
16* copyright notice, this list of conditions and the following
17* disclaimer.
18*
19* - Redistributions in binary form must reproduce the above
20* copyright notice, this list of conditions and the following
21* disclaimer in the documentation and/or other materials
22* provided with the distribution.
23*
24* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31* SOFTWARE.
32*
33*******************************************************************************/
34
35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/if_vlan.h>
42#include <net/addrconf.h>
43
44#include "i40iw.h"
45#include "i40iw_register.h"
46#include <net/netevent.h>
47#define CLIENT_IW_INTERFACE_VERSION_MAJOR 0
48#define CLIENT_IW_INTERFACE_VERSION_MINOR 01
49#define CLIENT_IW_INTERFACE_VERSION_BUILD 00
50
51#define DRV_VERSION_MAJOR 0
52#define DRV_VERSION_MINOR 5
53#define DRV_VERSION_BUILD 123
54#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
55 __stringify(DRV_VERSION_MINOR) "." __stringify(DRV_VERSION_BUILD)
56
57static int push_mode;
58module_param(push_mode, int, 0644);
59MODULE_PARM_DESC(push_mode, "Low latency mode: 0=disabled (default), 1=enabled)");
60
61static int debug;
62module_param(debug, int, 0644);
63MODULE_PARM_DESC(debug, "debug flags: 0=disabled (default), 0x7fffffff=all");
64
65static int resource_profile;
66module_param(resource_profile, int, 0644);
67MODULE_PARM_DESC(resource_profile,
68 "Resource Profile: 0=no VF RDMA support (default), 1=Weighted VF, 2=Even Distribution");
69
70static int max_rdma_vfs = 32;
71module_param(max_rdma_vfs, int, 0644);
72MODULE_PARM_DESC(max_rdma_vfs, "Maximum VF count: 0-32 32=default");
73static int mpa_version = 2;
74module_param(mpa_version, int, 0644);
75MODULE_PARM_DESC(mpa_version, "MPA version to be used in MPA Req/Resp 1 or 2");
76
77MODULE_AUTHOR("Intel Corporation, <e1000-rdma@lists.sourceforge.net>");
78MODULE_DESCRIPTION("Intel(R) Ethernet Connection X722 iWARP RDMA Driver");
79MODULE_LICENSE("Dual BSD/GPL");
80MODULE_VERSION(DRV_VERSION);
81
82static struct i40e_client i40iw_client;
83static char i40iw_client_name[I40E_CLIENT_STR_LENGTH] = "i40iw";
84
85static LIST_HEAD(i40iw_handlers);
86static spinlock_t i40iw_handler_lock;
87
88static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
89 u32 vf_id, u8 *msg, u16 len);
90
91static struct notifier_block i40iw_inetaddr_notifier = {
92 .notifier_call = i40iw_inetaddr_event
93};
94
95static struct notifier_block i40iw_inetaddr6_notifier = {
96 .notifier_call = i40iw_inet6addr_event
97};
98
99static struct notifier_block i40iw_net_notifier = {
100 .notifier_call = i40iw_net_event
101};
102
103static int i40iw_notifiers_registered;
104
8e06af71
FL		 105/**
106 * i40iw_find_i40e_handler - find a handler given a client info
107 * @ldev: pointer to a client info
108 */
109static struct i40iw_handler *i40iw_find_i40e_handler(struct i40e_info *ldev)
110{
111 struct i40iw_handler *hdl;
112 unsigned long flags;
113
114 spin_lock_irqsave(&i40iw_handler_lock, flags);
115 list_for_each_entry(hdl, &i40iw_handlers, list) {
116 if (hdl->ldev.netdev == ldev->netdev) {
117 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
118 return hdl;
119 }
120 }
121 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
122 return NULL;
123}
124
125/**
126 * i40iw_find_netdev - find a handler given a netdev
127 * @netdev: pointer to net_device
128 */
129struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev)
130{
131 struct i40iw_handler *hdl;
132 unsigned long flags;
133
134 spin_lock_irqsave(&i40iw_handler_lock, flags);
135 list_for_each_entry(hdl, &i40iw_handlers, list) {
136 if (hdl->ldev.netdev == netdev) {
137 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
138 return hdl;
139 }
140 }
141 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
142 return NULL;
143}
144
145/**
146 * i40iw_add_handler - add a handler to the list
147 * @hdl: handler to be added to the handler list
148 */
149static void i40iw_add_handler(struct i40iw_handler *hdl)
150{
151 unsigned long flags;
152
153 spin_lock_irqsave(&i40iw_handler_lock, flags);
154 list_add(&hdl->list, &i40iw_handlers);
155 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
156}
157
158/**
159 * i40iw_del_handler - delete a handler from the list
160 * @hdl: handler to be deleted from the handler list
161 */
162static int i40iw_del_handler(struct i40iw_handler *hdl)
163{
164 unsigned long flags;
165
166 spin_lock_irqsave(&i40iw_handler_lock, flags);
167 list_del(&hdl->list);
168 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
169 return 0;
170}
171
172/**
173 * i40iw_enable_intr - set up device interrupts
174 * @dev: hardware control device structure
175 * @msix_id: id of the interrupt to be enabled
176 */
177static void i40iw_enable_intr(struct i40iw_sc_dev *dev, u32 msix_id)
178{
179 u32 val;
180
181 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
182 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
183 (3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
184 if (dev->is_pf)
185 i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_id - 1), val);
186 else
187 i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_id - 1), val);
188}
189
190/**
191 * i40iw_dpc - tasklet for aeq and ceq 0
192 * @data: iwarp device
193 */
194static void i40iw_dpc(unsigned long data)
195{
196 struct i40iw_device *iwdev = (struct i40iw_device *)data;
197
198 if (iwdev->msix_shared)
199 i40iw_process_ceq(iwdev, iwdev->ceqlist);
200 i40iw_process_aeq(iwdev);
201 i40iw_enable_intr(&iwdev->sc_dev, iwdev->iw_msixtbl[0].idx);
202}
203
204/**
205 * i40iw_ceq_dpc - dpc handler for CEQ
206 * @data: data points to CEQ
207 */
208static void i40iw_ceq_dpc(unsigned long data)
209{
210 struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
211 struct i40iw_device *iwdev = iwceq->iwdev;
212
213 i40iw_process_ceq(iwdev, iwceq);
214 i40iw_enable_intr(&iwdev->sc_dev, iwceq->msix_idx);
215}
216
217/**
218 * i40iw_irq_handler - interrupt handler for aeq and ceq0
219 * @irq: Interrupt request number
220 * @data: iwarp device
221 */
222static irqreturn_t i40iw_irq_handler(int irq, void *data)
223{
224 struct i40iw_device *iwdev = (struct i40iw_device *)data;
225
226 tasklet_schedule(&iwdev->dpc_tasklet);
227 return IRQ_HANDLED;
228}
229
230/**
231 * i40iw_destroy_cqp - destroy control qp
232 * @iwdev: iwarp device
233 * @create_done: 1 if cqp create poll was success
234 *
235 * Issue destroy cqp request and
236 * free the resources associated with the cqp
237 */
238static void i40iw_destroy_cqp(struct i40iw_device *iwdev, bool free_hwcqp)
239{
240 enum i40iw_status_code status = 0;
241 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
242 struct i40iw_cqp *cqp = &iwdev->cqp;
243
244 if (free_hwcqp && dev->cqp_ops->cqp_destroy)
245 status = dev->cqp_ops->cqp_destroy(dev->cqp);
246 if (status)
247 i40iw_pr_err("destroy cqp failed");
248
249 i40iw_free_dma_mem(dev->hw, &cqp->sq);
250 kfree(cqp->scratch_array);
251 iwdev->cqp.scratch_array = NULL;
252
253 kfree(cqp->cqp_requests);
254 cqp->cqp_requests = NULL;
255}
256
257/**
258 * i40iw_disable_irqs - disable device interrupts
259 * @dev: hardware control device structure
260 * @msic_vec: msix vector to disable irq
261 * @dev_id: parameter to pass to free_irq (used during irq setup)
262 *
263 * The function is called when destroying aeq/ceq
264 */
265static void i40iw_disable_irq(struct i40iw_sc_dev *dev,
266 struct i40iw_msix_vector *msix_vec,
267 void *dev_id)
268{
269 if (dev->is_pf)
270 i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_vec->idx - 1), 0);
271 else
272 i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_vec->idx - 1), 0);
273 synchronize_irq(msix_vec->irq);
274 free_irq(msix_vec->irq, dev_id);
275}
276
277/**
278 * i40iw_destroy_aeq - destroy aeq
279 * @iwdev: iwarp device
280 * @reset: true if called before reset
281 *
282 * Issue a destroy aeq request and
283 * free the resources associated with the aeq
284 * The function is called during driver unload
285 */
286static void i40iw_destroy_aeq(struct i40iw_device *iwdev, bool reset)
287{
288 enum i40iw_status_code status = I40IW_ERR_NOT_READY;
289 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
290 struct i40iw_aeq *aeq = &iwdev->aeq;
291
292 if (!iwdev->msix_shared)
293 i40iw_disable_irq(dev, iwdev->iw_msixtbl, (void *)iwdev);
294 if (reset)
295 goto exit;
296
297 if (!dev->aeq_ops->aeq_destroy(&aeq->sc_aeq, 0, 1))
298 status = dev->aeq_ops->aeq_destroy_done(&aeq->sc_aeq);
299 if (status)
300 i40iw_pr_err("destroy aeq failed %d\n", status);
301
302exit:
303 i40iw_free_dma_mem(dev->hw, &aeq->mem);
304}
305
306/**
307 * i40iw_destroy_ceq - destroy ceq
308 * @iwdev: iwarp device
309 * @iwceq: ceq to be destroyed
310 * @reset: true if called before reset
311 *
312 * Issue a destroy ceq request and
313 * free the resources associated with the ceq
314 */
315static void i40iw_destroy_ceq(struct i40iw_device *iwdev,
316 struct i40iw_ceq *iwceq,
317 bool reset)
318{
319 enum i40iw_status_code status;
320 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
321
322 if (reset)
323 goto exit;
324
325 status = dev->ceq_ops->ceq_destroy(&iwceq->sc_ceq, 0, 1);
326 if (status) {
327 i40iw_pr_err("ceq destroy command failed %d\n", status);
328 goto exit;
329 }
330
331 status = dev->ceq_ops->cceq_destroy_done(&iwceq->sc_ceq);
332 if (status)
333 i40iw_pr_err("ceq destroy completion failed %d\n", status);
334exit:
335 i40iw_free_dma_mem(dev->hw, &iwceq->mem);
336}
337
338/**
339 * i40iw_dele_ceqs - destroy all ceq's
340 * @iwdev: iwarp device
341 * @reset: true if called before reset
342 *
343 * Go through all of the device ceq's and for each ceq
344 * disable the ceq interrupt and destroy the ceq
345 */
346static void i40iw_dele_ceqs(struct i40iw_device *iwdev, bool reset)
347{
348 u32 i = 0;
349 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
350 struct i40iw_ceq *iwceq = iwdev->ceqlist;
351 struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
352
353 if (iwdev->msix_shared) {
354 i40iw_disable_irq(dev, msix_vec, (void *)iwdev);
355 i40iw_destroy_ceq(iwdev, iwceq, reset);
356 iwceq++;
357 i++;
358 }
359
360 for (msix_vec++; i < iwdev->ceqs_count; i++, msix_vec++, iwceq++) {
361 i40iw_disable_irq(dev, msix_vec, (void *)iwceq);
362 i40iw_destroy_ceq(iwdev, iwceq, reset);
363 }
364}
365
366/**
367 * i40iw_destroy_ccq - destroy control cq
368 * @iwdev: iwarp device
369 * @reset: true if called before reset
370 *
371 * Issue destroy ccq request and
372 * free the resources associated with the ccq
373 */
374static void i40iw_destroy_ccq(struct i40iw_device *iwdev, bool reset)
375{
376 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
377 struct i40iw_ccq *ccq = &iwdev->ccq;
378 enum i40iw_status_code status = 0;
379
380 if (!reset)
381 status = dev->ccq_ops->ccq_destroy(dev->ccq, 0, true);
382 if (status)
383 i40iw_pr_err("ccq destroy failed %d\n", status);
384 i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
385}
386
387/* types of hmc objects */
388static enum i40iw_hmc_rsrc_type iw_hmc_obj_types[] = {
389 I40IW_HMC_IW_QP,
390 I40IW_HMC_IW_CQ,
391 I40IW_HMC_IW_HTE,
392 I40IW_HMC_IW_ARP,
393 I40IW_HMC_IW_APBVT_ENTRY,
394 I40IW_HMC_IW_MR,
395 I40IW_HMC_IW_XF,
396 I40IW_HMC_IW_XFFL,
397 I40IW_HMC_IW_Q1,
398 I40IW_HMC_IW_Q1FL,
399 I40IW_HMC_IW_TIMER,
400};
401
402/**
403 * i40iw_close_hmc_objects_type - delete hmc objects of a given type
404 * @iwdev: iwarp device
405 * @obj_type: the hmc object type to be deleted
406 * @is_pf: true if the function is PF otherwise false
407 * @reset: true if called before reset
408 */
409static void i40iw_close_hmc_objects_type(struct i40iw_sc_dev *dev,
410 enum i40iw_hmc_rsrc_type obj_type,
411 struct i40iw_hmc_info *hmc_info,
412 bool is_pf,
413 bool reset)
414{
415 struct i40iw_hmc_del_obj_info info;
416
417 memset(&info, 0, sizeof(info));
418 info.hmc_info = hmc_info;
419 info.rsrc_type = obj_type;
420 info.count = hmc_info->hmc_obj[obj_type].cnt;
421 info.is_pf = is_pf;
422 if (dev->hmc_ops->del_hmc_object(dev, &info, reset))
423 i40iw_pr_err("del obj of type %d failed\n", obj_type);
424}
425
426/**
427 * i40iw_del_hmc_objects - remove all device hmc objects
428 * @dev: iwarp device
429 * @hmc_info: hmc_info to free
430 * @is_pf: true if hmc_info belongs to PF, not vf nor allocated
431 * by PF on behalf of VF
432 * @reset: true if called before reset
433 */
434static void i40iw_del_hmc_objects(struct i40iw_sc_dev *dev,
435 struct i40iw_hmc_info *hmc_info,
436 bool is_pf,
437 bool reset)
438{
439 unsigned int i;
440
441 for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++)
442 i40iw_close_hmc_objects_type(dev, iw_hmc_obj_types[i], hmc_info, is_pf, reset);
443}
444
445/**
446 * i40iw_ceq_handler - interrupt handler for ceq
447 * @data: ceq pointer
448 */
449static irqreturn_t i40iw_ceq_handler(int irq, void *data)
450{
451 struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
452
453 if (iwceq->irq != irq)
454 i40iw_pr_err("expected irq = %d received irq = %d\n", iwceq->irq, irq);
455 tasklet_schedule(&iwceq->dpc_tasklet);
456 return IRQ_HANDLED;
457}
458
459/**
460 * i40iw_create_hmc_obj_type - create hmc object of a given type
461 * @dev: hardware control device structure
462 * @info: information for the hmc object to create
463 */
464static enum i40iw_status_code i40iw_create_hmc_obj_type(struct i40iw_sc_dev *dev,
465 struct i40iw_hmc_create_obj_info *info)
466{
467 return dev->hmc_ops->create_hmc_object(dev, info);
468}
469
470/**
471 * i40iw_create_hmc_objs - create all hmc objects for the device
472 * @iwdev: iwarp device
473 * @is_pf: true if the function is PF otherwise false
474 *
475 * Create the device hmc objects and allocate hmc pages
476 * Return 0 if successful, otherwise clean up and return error
477 */
478static enum i40iw_status_code i40iw_create_hmc_objs(struct i40iw_device *iwdev,
479 bool is_pf)
480{
481 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
482 struct i40iw_hmc_create_obj_info info;
483 enum i40iw_status_code status;
484 int i;
485
486 memset(&info, 0, sizeof(info));
487 info.hmc_info = dev->hmc_info;
488 info.is_pf = is_pf;
489 info.entry_type = iwdev->sd_type;
490 for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
491 info.rsrc_type = iw_hmc_obj_types[i];
492 info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
493 status = i40iw_create_hmc_obj_type(dev, &info);
494 if (status) {
495 i40iw_pr_err("create obj type %d status = %d\n",
496 iw_hmc_obj_types[i], status);
497 break;
498 }
499 }
500 if (!status)
501 return (dev->cqp_misc_ops->static_hmc_pages_allocated(dev->cqp, 0,
502 dev->hmc_fn_id,
503 true, true));
504
505 while (i) {
506 i--;
507 /* destroy the hmc objects of a given type */
508 i40iw_close_hmc_objects_type(dev,
509 iw_hmc_obj_types[i],
510 dev->hmc_info,
511 is_pf,
512 false);
513 }
514 return status;
515}
516
517/**
518 * i40iw_obj_aligned_mem - get aligned memory from device allocated memory
519 * @iwdev: iwarp device
520 * @memptr: points to the memory addresses
521 * @size: size of memory needed
522 * @mask: mask for the aligned memory
523 *
524 * Get aligned memory of the requested size and
525 * update the memptr to point to the new aligned memory
526 * Return 0 if successful, otherwise return no memory error
527 */
528enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
529 struct i40iw_dma_mem *memptr,
530 u32 size,
531 u32 mask)
532{
533 unsigned long va, newva;
534 unsigned long extra;
535
536 va = (unsigned long)iwdev->obj_next.va;
537 newva = va;
538 if (mask)
539 newva = ALIGN(va, (mask + 1));
540 extra = newva - va;
541 memptr->va = (u8 *)va + extra;
542 memptr->pa = iwdev->obj_next.pa + extra;
543 memptr->size = size;
544 if ((memptr->va + size) > (iwdev->obj_mem.va + iwdev->obj_mem.size))
545 return I40IW_ERR_NO_MEMORY;
546
547 iwdev->obj_next.va = memptr->va + size;
548 iwdev->obj_next.pa = memptr->pa + size;
549 return 0;
550}
551
552/**
553 * i40iw_create_cqp - create control qp
554 * @iwdev: iwarp device
555 *
556 * Return 0, if the cqp and all the resources associated with it
557 * are successfully created, otherwise return error
558 */
559static enum i40iw_status_code i40iw_create_cqp(struct i40iw_device *iwdev)
560{
561 enum i40iw_status_code status;
562 u32 sqsize = I40IW_CQP_SW_SQSIZE_2048;
563 struct i40iw_dma_mem mem;
564 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
565 struct i40iw_cqp_init_info cqp_init_info;
566 struct i40iw_cqp *cqp = &iwdev->cqp;
567 u16 maj_err, min_err;
568 int i;
569
570 cqp->cqp_requests = kcalloc(sqsize, sizeof(*cqp->cqp_requests), GFP_KERNEL);
571 if (!cqp->cqp_requests)
572 return I40IW_ERR_NO_MEMORY;
573 cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
574 if (!cqp->scratch_array) {
575 kfree(cqp->cqp_requests);
576 return I40IW_ERR_NO_MEMORY;
577 }
578 dev->cqp = &cqp->sc_cqp;
579 dev->cqp->dev = dev;
580 memset(&cqp_init_info, 0, sizeof(cqp_init_info));
581 status = i40iw_allocate_dma_mem(dev->hw, &cqp->sq,
582 (sizeof(struct i40iw_cqp_sq_wqe) * sqsize),
583 I40IW_CQP_ALIGNMENT);
584 if (status)
585 goto exit;
586 status = i40iw_obj_aligned_mem(iwdev, &mem, sizeof(struct i40iw_cqp_ctx),
587 I40IW_HOST_CTX_ALIGNMENT_MASK);
588 if (status)
589 goto exit;
590 dev->cqp->host_ctx_pa = mem.pa;
591 dev->cqp->host_ctx = mem.va;
592 /* populate the cqp init info */
593 cqp_init_info.dev = dev;
594 cqp_init_info.sq_size = sqsize;
595 cqp_init_info.sq = cqp->sq.va;
596 cqp_init_info.sq_pa = cqp->sq.pa;
597 cqp_init_info.host_ctx_pa = mem.pa;
598 cqp_init_info.host_ctx = mem.va;
599 cqp_init_info.hmc_profile = iwdev->resource_profile;
600 cqp_init_info.enabled_vf_count = iwdev->max_rdma_vfs;
601 cqp_init_info.scratch_array = cqp->scratch_array;
602 status = dev->cqp_ops->cqp_init(dev->cqp, &cqp_init_info);
603 if (status) {
604 i40iw_pr_err("cqp init status %d maj_err %d min_err %d\n",
605 status, maj_err, min_err);
606 goto exit;
607 }
608 status = dev->cqp_ops->cqp_create(dev->cqp, true, &maj_err, &min_err);
609 if (status) {
610 i40iw_pr_err("cqp create status %d maj_err %d min_err %d\n",
611 status, maj_err, min_err);
612 goto exit;
613 }
614 spin_lock_init(&cqp->req_lock);
615 INIT_LIST_HEAD(&cqp->cqp_avail_reqs);
616 INIT_LIST_HEAD(&cqp->cqp_pending_reqs);
617 /* init the waitq of the cqp_requests and add them to the list */
618 for (i = 0; i < I40IW_CQP_SW_SQSIZE_2048; i++) {
619 init_waitqueue_head(&cqp->cqp_requests[i].waitq);
620 list_add_tail(&cqp->cqp_requests[i].list, &cqp->cqp_avail_reqs);
621 }
622 return 0;
623exit:
624 /* clean up the created resources */
625 i40iw_destroy_cqp(iwdev, false);
626 return status;
627}
628
629/**
630 * i40iw_create_ccq - create control cq
631 * @iwdev: iwarp device
632 *
633 * Return 0, if the ccq and the resources associated with it
634 * are successfully created, otherwise return error
635 */
636static enum i40iw_status_code i40iw_create_ccq(struct i40iw_device *iwdev)
637{
638 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
639 struct i40iw_dma_mem mem;
640 enum i40iw_status_code status;
641 struct i40iw_ccq_init_info info;
642 struct i40iw_ccq *ccq = &iwdev->ccq;
643
644 memset(&info, 0, sizeof(info));
645 dev->ccq = &ccq->sc_cq;
646 dev->ccq->dev = dev;
647 info.dev = dev;
648 ccq->shadow_area.size = sizeof(struct i40iw_cq_shadow_area);
649 ccq->mem_cq.size = sizeof(struct i40iw_cqe) * IW_CCQ_SIZE;
650 status = i40iw_allocate_dma_mem(dev->hw, &ccq->mem_cq,
651 ccq->mem_cq.size, I40IW_CQ0_ALIGNMENT);
652 if (status)
653 goto exit;
654 status = i40iw_obj_aligned_mem(iwdev, &mem, ccq->shadow_area.size,
655 I40IW_SHADOWAREA_MASK);
656 if (status)
657 goto exit;
658 ccq->sc_cq.back_cq = (void *)ccq;
659 /* populate the ccq init info */
660 info.cq_base = ccq->mem_cq.va;
661 info.cq_pa = ccq->mem_cq.pa;
662 info.num_elem = IW_CCQ_SIZE;
663 info.shadow_area = mem.va;
664 info.shadow_area_pa = mem.pa;
665 info.ceqe_mask = false;
666 info.ceq_id_valid = true;
667 info.shadow_read_threshold = 16;
668 status = dev->ccq_ops->ccq_init(dev->ccq, &info);
669 if (!status)
670 status = dev->ccq_ops->ccq_create(dev->ccq, 0, true, true);
671exit:
672 if (status)
673 i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
674 return status;
675}
676
677/**
678 * i40iw_configure_ceq_vector - set up the msix interrupt vector for ceq
679 * @iwdev: iwarp device
680 * @msix_vec: interrupt vector information
681 * @iwceq: ceq associated with the vector
682 * @ceq_id: the id number of the iwceq
683 *
684 * Allocate interrupt resources and enable irq handling
685 * Return 0 if successful, otherwise return error
686 */
687static enum i40iw_status_code i40iw_configure_ceq_vector(struct i40iw_device *iwdev,
688 struct i40iw_ceq *iwceq,
689 u32 ceq_id,
690 struct i40iw_msix_vector *msix_vec)
691{
692 enum i40iw_status_code status;
693
694 if (iwdev->msix_shared && !ceq_id) {
695 tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
696 status = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "AEQCEQ", iwdev);
697 } else {
698 tasklet_init(&iwceq->dpc_tasklet, i40iw_ceq_dpc, (unsigned long)iwceq);
699 status = request_irq(msix_vec->irq, i40iw_ceq_handler, 0, "CEQ", iwceq);
700 }
701
702 if (status) {
703 i40iw_pr_err("ceq irq config fail\n");
704 return I40IW_ERR_CONFIG;
705 }
706 msix_vec->ceq_id = ceq_id;
707 msix_vec->cpu_affinity = 0;
708
709 return 0;
710}
711
712/**
713 * i40iw_create_ceq - create completion event queue
714 * @iwdev: iwarp device
715 * @iwceq: pointer to the ceq resources to be created
716 * @ceq_id: the id number of the iwceq
717 *
718 * Return 0, if the ceq and the resources associated with it
719 * are successfully created, otherwise return error
720 */
721static enum i40iw_status_code i40iw_create_ceq(struct i40iw_device *iwdev,
722 struct i40iw_ceq *iwceq,
723 u32 ceq_id)
724{
725 enum i40iw_status_code status;
726 struct i40iw_ceq_init_info info;
727 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
728 u64 scratch;
729
730 memset(&info, 0, sizeof(info));
731 info.ceq_id = ceq_id;
732 iwceq->iwdev = iwdev;
733 iwceq->mem.size = sizeof(struct i40iw_ceqe) *
734 iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
735 status = i40iw_allocate_dma_mem(dev->hw, &iwceq->mem, iwceq->mem.size,
736 I40IW_CEQ_ALIGNMENT);
737 if (status)
738 goto exit;
739 info.ceq_id = ceq_id;
740 info.ceqe_base = iwceq->mem.va;
741 info.ceqe_pa = iwceq->mem.pa;
742
743 info.elem_cnt = iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
744 iwceq->sc_ceq.ceq_id = ceq_id;
745 info.dev = dev;
746 scratch = (uintptr_t)&iwdev->cqp.sc_cqp;
747 status = dev->ceq_ops->ceq_init(&iwceq->sc_ceq, &info);
748 if (!status)
749 status = dev->ceq_ops->cceq_create(&iwceq->sc_ceq, scratch);
750
751exit:
752 if (status)
753 i40iw_free_dma_mem(dev->hw, &iwceq->mem);
754 return status;
755}
756
757void i40iw_request_reset(struct i40iw_device *iwdev)
758{
759 struct i40e_info *ldev = iwdev->ldev;
760
761 ldev->ops->request_reset(ldev, iwdev->client, 1);
762}
763
764/**
765 * i40iw_setup_ceqs - manage the device ceq's and their interrupt resources
766 * @iwdev: iwarp device
767 * @ldev: i40e lan device
768 *
769 * Allocate a list for all device completion event queues
770 * Create the ceq's and configure their msix interrupt vectors
771 * Return 0, if at least one ceq is successfully set up, otherwise return error
772 */
773static enum i40iw_status_code i40iw_setup_ceqs(struct i40iw_device *iwdev,
774 struct i40e_info *ldev)
775{
776 u32 i;
777 u32 ceq_id;
778 struct i40iw_ceq *iwceq;
779 struct i40iw_msix_vector *msix_vec;
780 enum i40iw_status_code status = 0;
781 u32 num_ceqs;
782
783 if (ldev && ldev->ops && ldev->ops->setup_qvlist) {
784 status = ldev->ops->setup_qvlist(ldev, &i40iw_client,
785 iwdev->iw_qvlist);
786 if (status)
787 goto exit;
788 } else {
789 status = I40IW_ERR_BAD_PTR;
790 goto exit;
791 }
792
793 num_ceqs = min(iwdev->msix_count, iwdev->sc_dev.hmc_fpm_misc.max_ceqs);
794 iwdev->ceqlist = kcalloc(num_ceqs, sizeof(*iwdev->ceqlist), GFP_KERNEL);
795 if (!iwdev->ceqlist) {
796 status = I40IW_ERR_NO_MEMORY;
797 goto exit;
798 }
799 i = (iwdev->msix_shared) ? 0 : 1;
800 for (ceq_id = 0; i < num_ceqs; i++, ceq_id++) {
801 iwceq = &iwdev->ceqlist[ceq_id];
802 status = i40iw_create_ceq(iwdev, iwceq, ceq_id);
803 if (status) {
804 i40iw_pr_err("create ceq status = %d\n", status);
805 break;
806 }
807
808 msix_vec = &iwdev->iw_msixtbl[i];
809 iwceq->irq = msix_vec->irq;
810 iwceq->msix_idx = msix_vec->idx;
811 status = i40iw_configure_ceq_vector(iwdev, iwceq, ceq_id, msix_vec);
812 if (status) {
813 i40iw_destroy_ceq(iwdev, iwceq, false);
814 break;
815 }
816 i40iw_enable_intr(&iwdev->sc_dev, msix_vec->idx);
817 iwdev->ceqs_count++;
818 }
819
820exit:
821 if (status) {
822 if (!iwdev->ceqs_count) {
823 kfree(iwdev->ceqlist);
824 iwdev->ceqlist = NULL;
825 } else {
826 status = 0;
827 }
828 }
829 return status;
830}
831
832/**
833 * i40iw_configure_aeq_vector - set up the msix vector for aeq
834 * @iwdev: iwarp device
835 *
836 * Allocate interrupt resources and enable irq handling
837 * Return 0 if successful, otherwise return error
838 */
839static enum i40iw_status_code i40iw_configure_aeq_vector(struct i40iw_device *iwdev)
840{
841 struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
842 u32 ret = 0;
843
844 if (!iwdev->msix_shared) {
845 tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
846 ret = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "i40iw", iwdev);
847 }
848 if (ret) {
849 i40iw_pr_err("aeq irq config fail\n");
850 return I40IW_ERR_CONFIG;
851 }
852
853 return 0;
854}
855
856/**
857 * i40iw_create_aeq - create async event queue
858 * @iwdev: iwarp device
859 *
860 * Return 0, if the aeq and the resources associated with it
861 * are successfully created, otherwise return error
862 */
863static enum i40iw_status_code i40iw_create_aeq(struct i40iw_device *iwdev)
864{
865 enum i40iw_status_code status;
866 struct i40iw_aeq_init_info info;
867 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
868 struct i40iw_aeq *aeq = &iwdev->aeq;
869 u64 scratch = 0;
870 u32 aeq_size;
871
872 aeq_size = 2 * iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_QP].cnt +
873 iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
874 memset(&info, 0, sizeof(info));
875 aeq->mem.size = sizeof(struct i40iw_sc_aeqe) * aeq_size;
876 status = i40iw_allocate_dma_mem(dev->hw, &aeq->mem, aeq->mem.size,
877 I40IW_AEQ_ALIGNMENT);
878 if (status)
879 goto exit;
880
881 info.aeqe_base = aeq->mem.va;
882 info.aeq_elem_pa = aeq->mem.pa;
883 info.elem_cnt = aeq_size;
884 info.dev = dev;
885 status = dev->aeq_ops->aeq_init(&aeq->sc_aeq, &info);
886 if (status)
887 goto exit;
888 status = dev->aeq_ops->aeq_create(&aeq->sc_aeq, scratch, 1);
889 if (!status)
890 status = dev->aeq_ops->aeq_create_done(&aeq->sc_aeq);
891exit:
892 if (status)
893 i40iw_free_dma_mem(dev->hw, &aeq->mem);
894 return status;
895}
896
897/**
898 * i40iw_setup_aeq - set up the device aeq
899 * @iwdev: iwarp device
900 *
901 * Create the aeq and configure its msix interrupt vector
902 * Return 0 if successful, otherwise return error
903 */
904static enum i40iw_status_code i40iw_setup_aeq(struct i40iw_device *iwdev)
905{
906 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
907 enum i40iw_status_code status;
908
909 status = i40iw_create_aeq(iwdev);
910 if (status)
911 return status;
912
913 status = i40iw_configure_aeq_vector(iwdev);
914 if (status) {
915 i40iw_destroy_aeq(iwdev, false);
916 return status;
917 }
918
919 if (!iwdev->msix_shared)
920 i40iw_enable_intr(dev, iwdev->iw_msixtbl[0].idx);
921 return 0;
922}
923
924/**
925 * i40iw_initialize_ilq - create iwarp local queue for cm
926 * @iwdev: iwarp device
927 *
928 * Return 0 if successful, otherwise return error
929 */
930static enum i40iw_status_code i40iw_initialize_ilq(struct i40iw_device *iwdev)
931{
932 struct i40iw_puda_rsrc_info info;
933 enum i40iw_status_code status;
934
935 info.type = I40IW_PUDA_RSRC_TYPE_ILQ;
936 info.cq_id = 1;
937 info.qp_id = 0;
938 info.count = 1;
939 info.pd_id = 1;
940 info.sq_size = 8192;
941 info.rq_size = 8192;
942 info.buf_size = 1024;
943 info.tx_buf_cnt = 16384;
944 info.mss = iwdev->mss;
945 info.receive = i40iw_receive_ilq;
946 info.xmit_complete = i40iw_free_sqbuf;
947 status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
948 if (status)
949 i40iw_pr_err("ilq create fail\n");
950 return status;
951}
952
953/**
954 * i40iw_initialize_ieq - create iwarp exception queue
955 * @iwdev: iwarp device
956 *
957 * Return 0 if successful, otherwise return error
958 */
959static enum i40iw_status_code i40iw_initialize_ieq(struct i40iw_device *iwdev)
960{
961 struct i40iw_puda_rsrc_info info;
962 enum i40iw_status_code status;
963
964 info.type = I40IW_PUDA_RSRC_TYPE_IEQ;
965 info.cq_id = 2;
966 info.qp_id = iwdev->sc_dev.exception_lan_queue;
967 info.count = 1;
968 info.pd_id = 2;
969 info.sq_size = 8192;
970 info.rq_size = 8192;
971 info.buf_size = 2048;
972 info.mss = iwdev->mss;
973 info.tx_buf_cnt = 16384;
974 status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
975 if (status)
976 i40iw_pr_err("ieq create fail\n");
977 return status;
978}
979
980/**
981 * i40iw_hmc_setup - create hmc objects for the device
982 * @iwdev: iwarp device
983 *
984 * Set up the device private memory space for the number and size of
985 * the hmc objects and create the objects
986 * Return 0 if successful, otherwise return error
987 */
988static enum i40iw_status_code i40iw_hmc_setup(struct i40iw_device *iwdev)
989{
990 enum i40iw_status_code status;
991
992 iwdev->sd_type = I40IW_SD_TYPE_DIRECT;
993 status = i40iw_config_fpm_values(&iwdev->sc_dev, IW_CFG_FPM_QP_COUNT);
994 if (status)
995 goto exit;
996 status = i40iw_create_hmc_objs(iwdev, true);
997 if (status)
998 goto exit;
999 iwdev->init_state = HMC_OBJS_CREATED;
1000exit:
1001 return status;
1002}
1003
1004/**
1005 * i40iw_del_init_mem - deallocate memory resources
1006 * @iwdev: iwarp device
1007 */
1008static void i40iw_del_init_mem(struct i40iw_device *iwdev)
1009{
1010 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1011
1012 i40iw_free_dma_mem(&iwdev->hw, &iwdev->obj_mem);
1013 kfree(dev->hmc_info->sd_table.sd_entry);
1014 dev->hmc_info->sd_table.sd_entry = NULL;
1015 kfree(iwdev->mem_resources);
1016 iwdev->mem_resources = NULL;
1017 kfree(iwdev->ceqlist);
1018 iwdev->ceqlist = NULL;
1019 kfree(iwdev->iw_msixtbl);
1020 iwdev->iw_msixtbl = NULL;
1021 kfree(iwdev->hmc_info_mem);
1022 iwdev->hmc_info_mem = NULL;
1023}
1024
1025/**
1026 * i40iw_del_macip_entry - remove a mac ip address entry from the hw table
1027 * @iwdev: iwarp device
1028 * @idx: the index of the mac ip address to delete
1029 */
1030static void i40iw_del_macip_entry(struct i40iw_device *iwdev, u8 idx)
1031{
1032 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1033 struct i40iw_cqp_request *cqp_request;
1034 struct cqp_commands_info *cqp_info;
1035 enum i40iw_status_code status = 0;
1036
1037 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1038 if (!cqp_request) {
1039 i40iw_pr_err("cqp_request memory failed\n");
1040 return;
1041 }
1042 cqp_info = &cqp_request->info;
1043 cqp_info->cqp_cmd = OP_DELETE_LOCAL_MAC_IPADDR_ENTRY;
1044 cqp_info->post_sq = 1;
1045 cqp_info->in.u.del_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1046 cqp_info->in.u.del_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1047 cqp_info->in.u.del_local_mac_ipaddr_entry.entry_idx = idx;
1048 cqp_info->in.u.del_local_mac_ipaddr_entry.ignore_ref_count = 0;
1049 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1050 if (status)
1051 i40iw_pr_err("CQP-OP Del MAC Ip entry fail");
1052}
1053
1054/**
1055 * i40iw_add_mac_ipaddr_entry - add a mac ip address entry to the hw table
1056 * @iwdev: iwarp device
1057 * @mac_addr: pointer to mac address
1058 * @idx: the index of the mac ip address to add
1059 */
1060static enum i40iw_status_code i40iw_add_mac_ipaddr_entry(struct i40iw_device *iwdev,
1061 u8 *mac_addr,
1062 u8 idx)
1063{
1064 struct i40iw_local_mac_ipaddr_entry_info *info;
1065 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1066 struct i40iw_cqp_request *cqp_request;
1067 struct cqp_commands_info *cqp_info;
1068 enum i40iw_status_code status = 0;
1069
1070 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1071 if (!cqp_request) {
1072 i40iw_pr_err("cqp_request memory failed\n");
1073 return I40IW_ERR_NO_MEMORY;
1074 }
1075
1076 cqp_info = &cqp_request->info;
1077
1078 cqp_info->post_sq = 1;
1079 info = &cqp_info->in.u.add_local_mac_ipaddr_entry.info;
1080 ether_addr_copy(info->mac_addr, mac_addr);
1081 info->entry_idx = idx;
1082 cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1083 cqp_info->cqp_cmd = OP_ADD_LOCAL_MAC_IPADDR_ENTRY;
1084 cqp_info->in.u.add_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1085 cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1086 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1087 if (status)
1088 i40iw_pr_err("CQP-OP Add MAC Ip entry fail");
1089 return status;
1090}
1091
1092/**
1093 * i40iw_alloc_local_mac_ipaddr_entry - allocate a mac ip address entry
1094 * @iwdev: iwarp device
1095 * @mac_ip_tbl_idx: the index of the new mac ip address
1096 *
1097 * Allocate a mac ip address entry and update the mac_ip_tbl_idx
1098 * to hold the index of the newly created mac ip address
1099 * Return 0 if successful, otherwise return error
1100 */
1101static enum i40iw_status_code i40iw_alloc_local_mac_ipaddr_entry(struct i40iw_device *iwdev,
1102 u16 *mac_ip_tbl_idx)
1103{
1104 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1105 struct i40iw_cqp_request *cqp_request;
1106 struct cqp_commands_info *cqp_info;
1107 enum i40iw_status_code status = 0;
1108
1109 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1110 if (!cqp_request) {
1111 i40iw_pr_err("cqp_request memory failed\n");
1112 return I40IW_ERR_NO_MEMORY;
1113 }
1114
1115 /* increment refcount, because we need the cqp request ret value */
1116 atomic_inc(&cqp_request->refcount);
1117
1118 cqp_info = &cqp_request->info;
1119 cqp_info->cqp_cmd = OP_ALLOC_LOCAL_MAC_IPADDR_ENTRY;
1120 cqp_info->post_sq = 1;
1121 cqp_info->in.u.alloc_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1122 cqp_info->in.u.alloc_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1123 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1124 if (!status)
1125 *mac_ip_tbl_idx = cqp_request->compl_info.op_ret_val;
1126 else
1127 i40iw_pr_err("CQP-OP Alloc MAC Ip entry fail");
1128 /* decrement refcount and free the cqp request, if no longer used */
1129 i40iw_put_cqp_request(iwcqp, cqp_request);
1130 return status;
1131}
1132
1133/**
1134 * i40iw_alloc_set_mac_ipaddr - set up a mac ip address table entry
1135 * @iwdev: iwarp device
1136 * @macaddr: pointer to mac address
1137 *
1138 * Allocate a mac ip address entry and add it to the hw table
1139 * Return 0 if successful, otherwise return error
1140 */
1141static enum i40iw_status_code i40iw_alloc_set_mac_ipaddr(struct i40iw_device *iwdev,
1142 u8 *macaddr)
1143{
1144 enum i40iw_status_code status;
1145
1146 status = i40iw_alloc_local_mac_ipaddr_entry(iwdev, &iwdev->mac_ip_table_idx);
1147 if (!status) {
1148 status = i40iw_add_mac_ipaddr_entry(iwdev, macaddr,
1149 (u8)iwdev->mac_ip_table_idx);
f606d893 1150 if (status)
8e06af71
FL		 1151 i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
1152 }
1153 return status;
1154}
1155
1156/**
1157 * i40iw_add_ipv6_addr - add ipv6 address to the hw arp table
1158 * @iwdev: iwarp device
1159 */
1160static void i40iw_add_ipv6_addr(struct i40iw_device *iwdev)
1161{
1162 struct net_device *ip_dev;
1163 struct inet6_dev *idev;
1164 struct inet6_ifaddr *ifp;
1165 __be32 local_ipaddr6[4];
1166
1167 rcu_read_lock();
1168 for_each_netdev_rcu(&init_net, ip_dev) {
1169 if ((((rdma_vlan_dev_vlan_id(ip_dev) < 0xFFFF) &&
1170 (rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) ||
1171 (ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) {
1172 idev = __in6_dev_get(ip_dev);
1173 if (!idev) {
1174 i40iw_pr_err("ipv6 inet device not found\n");
1175 break;
1176 }
1177 list_for_each_entry(ifp, &idev->addr_list, if_list) {
1178 i40iw_pr_info("IP=%pI6, vlan_id=%d, MAC=%pM\n", &ifp->addr,
1179 rdma_vlan_dev_vlan_id(ip_dev), ip_dev->dev_addr);
1180 i40iw_copy_ip_ntohl(local_ipaddr6,
1181 ifp->addr.in6_u.u6_addr32);
1182 i40iw_manage_arp_cache(iwdev,
1183 ip_dev->dev_addr,
1184 local_ipaddr6,
1185 false,
1186 I40IW_ARP_ADD);
1187 }
1188 }
1189 }
1190 rcu_read_unlock();
1191}
1192
1193/**
1194 * i40iw_add_ipv4_addr - add ipv4 address to the hw arp table
1195 * @iwdev: iwarp device
1196 */
1197static void i40iw_add_ipv4_addr(struct i40iw_device *iwdev)
1198{
1199 struct net_device *dev;
1200 struct in_device *idev;
1201 bool got_lock = true;
1202 u32 ip_addr;
1203
1204 if (!rtnl_trylock())
1205 got_lock = false;
1206
1207 for_each_netdev(&init_net, dev) {
1208 if ((((rdma_vlan_dev_vlan_id(dev) < 0xFFFF) &&
1209 (rdma_vlan_dev_real_dev(dev) == iwdev->netdev)) ||
1210 (dev == iwdev->netdev)) && (dev->flags & IFF_UP)) {
1211 idev = in_dev_get(dev);
1212 for_ifa(idev) {
1213 i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_CM,
1214 "IP=%pI4, vlan_id=%d, MAC=%pM\n", &ifa->ifa_address,
1215 rdma_vlan_dev_vlan_id(dev), dev->dev_addr);
1216
1217 ip_addr = ntohl(ifa->ifa_address);
1218 i40iw_manage_arp_cache(iwdev,
1219 dev->dev_addr,
1220 &ip_addr,
1221 true,
1222 I40IW_ARP_ADD);
1223 }
1224 endfor_ifa(idev);
1225 in_dev_put(idev);
1226 }
1227 }
1228 if (got_lock)
1229 rtnl_unlock();
1230}
1231
1232/**
1233 * i40iw_add_mac_ip - add mac and ip addresses
1234 * @iwdev: iwarp device
1235 *
1236 * Create and add a mac ip address entry to the hw table and
1237 * ipv4/ipv6 addresses to the arp cache
1238 * Return 0 if successful, otherwise return error
1239 */
1240static enum i40iw_status_code i40iw_add_mac_ip(struct i40iw_device *iwdev)
1241{
1242 struct net_device *netdev = iwdev->netdev;
1243 enum i40iw_status_code status;
1244
1245 status = i40iw_alloc_set_mac_ipaddr(iwdev, (u8 *)netdev->dev_addr);
1246 if (status)
1247 return status;
1248 i40iw_add_ipv4_addr(iwdev);
1249 i40iw_add_ipv6_addr(iwdev);
1250 return 0;
1251}
1252
1253/**
1254 * i40iw_wait_pe_ready - Check if firmware is ready
1255 * @hw: provides access to registers
1256 */
1257static void i40iw_wait_pe_ready(struct i40iw_hw *hw)
1258{
1259 u32 statusfw;
1260 u32 statuscpu0;
1261 u32 statuscpu1;
1262 u32 statuscpu2;
1263 u32 retrycount = 0;
1264
1265 do {
1266 statusfw = i40iw_rd32(hw, I40E_GLPE_FWLDSTATUS);
1267 i40iw_pr_info("[%04d] fm load status[x%04X]\n", __LINE__, statusfw);
1268 statuscpu0 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS0);
1269 i40iw_pr_info("[%04d] CSR_CQP status[x%04X]\n", __LINE__, statuscpu0);
1270 statuscpu1 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS1);
1271 i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS1 status[x%04X]\n",
1272 __LINE__, statuscpu1);
1273 statuscpu2 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS2);
1274 i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS2 status[x%04X]\n",
1275 __LINE__, statuscpu2);
1276 if ((statuscpu0 == 0x80) && (statuscpu1 == 0x80) && (statuscpu2 == 0x80))
1277 break; /* SUCCESS */
1278 mdelay(1000);
1279 retrycount++;
1280 } while (retrycount < 14);
1281 i40iw_wr32(hw, 0xb4040, 0x4C104C5);
1282}
1283
1284/**
1285 * i40iw_initialize_dev - initialize device
1286 * @iwdev: iwarp device
1287 * @ldev: lan device information
1288 *
1289 * Allocate memory for the hmc objects and initialize iwdev
1290 * Return 0 if successful, otherwise clean up the resources
1291 * and return error
1292 */
1293static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev,
1294 struct i40e_info *ldev)
1295{
1296 enum i40iw_status_code status;
1297 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1298 struct i40iw_device_init_info info;
1299 struct i40iw_dma_mem mem;
1300 u32 size;
1301
1302 memset(&info, 0, sizeof(info));
1303 size = sizeof(struct i40iw_hmc_pble_rsrc) + sizeof(struct i40iw_hmc_info) +
1304 (sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX);
1305 iwdev->hmc_info_mem = kzalloc(size, GFP_KERNEL);
1306 if (!iwdev->hmc_info_mem) {
1307 i40iw_pr_err("memory alloc fail\n");
1308 return I40IW_ERR_NO_MEMORY;
1309 }
1310 iwdev->pble_rsrc = (struct i40iw_hmc_pble_rsrc *)iwdev->hmc_info_mem;
1311 dev->hmc_info = &iwdev->hw.hmc;
1312 dev->hmc_info->hmc_obj = (struct i40iw_hmc_obj_info *)(iwdev->pble_rsrc + 1);
1313 status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_QUERY_FPM_BUF_SIZE,
1314 I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
1315 if (status)
1316 goto exit;
1317 info.fpm_query_buf_pa = mem.pa;
1318 info.fpm_query_buf = mem.va;
1319 status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_COMMIT_FPM_BUF_SIZE,
1320 I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK);
1321 if (status)
1322 goto exit;
1323 info.fpm_commit_buf_pa = mem.pa;
1324 info.fpm_commit_buf = mem.va;
1325 info.hmc_fn_id = ldev->fid;
1326 info.is_pf = (ldev->ftype) ? false : true;
1327 info.bar0 = ldev->hw_addr;
1328 info.hw = &iwdev->hw;
1329 info.debug_mask = debug;
1330 info.qs_handle = ldev->params.qos.prio_qos[0].qs_handle;
1331 info.exception_lan_queue = 1;
1332 info.vchnl_send = i40iw_virtchnl_send;
1333 status = i40iw_device_init(&iwdev->sc_dev, &info);
1334exit:
1335 if (status) {
1336 kfree(iwdev->hmc_info_mem);
1337 iwdev->hmc_info_mem = NULL;
1338 }
1339 return status;
1340}
1341
1342/**
1343 * i40iw_register_notifiers - register tcp ip notifiers
1344 */
1345static void i40iw_register_notifiers(void)
1346{
1347 if (!i40iw_notifiers_registered) {
1348 register_inetaddr_notifier(&i40iw_inetaddr_notifier);
1349 register_inet6addr_notifier(&i40iw_inetaddr6_notifier);
1350 register_netevent_notifier(&i40iw_net_notifier);
1351 }
1352 i40iw_notifiers_registered++;
1353}
1354
1355/**
1356 * i40iw_save_msix_info - copy msix vector information to iwarp device
1357 * @iwdev: iwarp device
1358 * @ldev: lan device information
1359 *
1360 * Allocate iwdev msix table and copy the ldev msix info to the table
1361 * Return 0 if successful, otherwise return error
1362 */
1363static enum i40iw_status_code i40iw_save_msix_info(struct i40iw_device *iwdev,
1364 struct i40e_info *ldev)
1365{
1366 struct i40e_qvlist_info *iw_qvlist;
1367 struct i40e_qv_info *iw_qvinfo;
1368 u32 ceq_idx;
1369 u32 i;
1370 u32 size;
1371
1372 iwdev->msix_count = ldev->msix_count;
1373
1374 size = sizeof(struct i40iw_msix_vector) * iwdev->msix_count;
1375 size += sizeof(struct i40e_qvlist_info);
1376 size += sizeof(struct i40e_qv_info) * iwdev->msix_count - 1;
1377 iwdev->iw_msixtbl = kzalloc(size, GFP_KERNEL);
1378
1379 if (!iwdev->iw_msixtbl)
1380 return I40IW_ERR_NO_MEMORY;
1381 iwdev->iw_qvlist = (struct i40e_qvlist_info *)(&iwdev->iw_msixtbl[iwdev->msix_count]);
1382 iw_qvlist = iwdev->iw_qvlist;
1383 iw_qvinfo = iw_qvlist->qv_info;
1384 iw_qvlist->num_vectors = iwdev->msix_count;
1385 if (iwdev->msix_count <= num_online_cpus())
1386 iwdev->msix_shared = true;
1387 for (i = 0, ceq_idx = 0; i < iwdev->msix_count; i++, iw_qvinfo++) {
1388 iwdev->iw_msixtbl[i].idx = ldev->msix_entries[i].entry;
1389 iwdev->iw_msixtbl[i].irq = ldev->msix_entries[i].vector;
1390 if (i == 0) {
1391 iw_qvinfo->aeq_idx = 0;
1392 if (iwdev->msix_shared)
1393 iw_qvinfo->ceq_idx = ceq_idx++;
1394 else
1395 iw_qvinfo->ceq_idx = I40E_QUEUE_INVALID_IDX;
1396 } else {
1397 iw_qvinfo->aeq_idx = I40E_QUEUE_INVALID_IDX;
1398 iw_qvinfo->ceq_idx = ceq_idx++;
1399 }
1400 iw_qvinfo->itr_idx = 3;
1401 iw_qvinfo->v_idx = iwdev->iw_msixtbl[i].idx;
1402 }
1403 return 0;
1404}
1405
1406/**
1407 * i40iw_deinit_device - clean up the device resources
1408 * @iwdev: iwarp device
1409 * @reset: true if called before reset
1410 * @del_hdl: true if delete hdl entry
1411 *
1412 * Destroy the ib device interface, remove the mac ip entry and ipv4/ipv6 addresses,
1413 * destroy the device queues and free the pble and the hmc objects
1414 */
1415static void i40iw_deinit_device(struct i40iw_device *iwdev, bool reset, bool del_hdl)
1416{
1417 struct i40e_info *ldev = iwdev->ldev;
1418
1419 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1420
1421 i40iw_pr_info("state = %d\n", iwdev->init_state);
1422
1423 switch (iwdev->init_state) {
1424 case RDMA_DEV_REGISTERED:
1425 iwdev->iw_status = 0;
1426 i40iw_port_ibevent(iwdev);
1427 i40iw_destroy_rdma_device(iwdev->iwibdev);
1428 /* fallthrough */
1429 case IP_ADDR_REGISTERED:
1430 if (!reset)
1431 i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
1432 /* fallthrough */
1433 case INET_NOTIFIER:
1434 if (i40iw_notifiers_registered > 0) {
1435 i40iw_notifiers_registered--;
1436 unregister_netevent_notifier(&i40iw_net_notifier);
1437 unregister_inetaddr_notifier(&i40iw_inetaddr_notifier);
1438 unregister_inet6addr_notifier(&i40iw_inetaddr6_notifier);
1439 }
1440 /* fallthrough */
1441 case CEQ_CREATED:
1442 i40iw_dele_ceqs(iwdev, reset);
1443 /* fallthrough */
1444 case AEQ_CREATED:
1445 i40iw_destroy_aeq(iwdev, reset);
1446 /* fallthrough */
1447 case IEQ_CREATED:
1448 i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_IEQ, reset);
1449 /* fallthrough */
1450 case ILQ_CREATED:
1451 i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_ILQ, reset);
1452 /* fallthrough */
1453 case CCQ_CREATED:
1454 i40iw_destroy_ccq(iwdev, reset);
1455 /* fallthrough */
1456 case PBLE_CHUNK_MEM:
1457 i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
1458 /* fallthrough */
1459 case HMC_OBJS_CREATED:
1460 i40iw_del_hmc_objects(dev, dev->hmc_info, true, reset);
1461 /* fallthrough */
1462 case CQP_CREATED:
1463 i40iw_destroy_cqp(iwdev, !reset);
1464 /* fallthrough */
1465 case INITIAL_STATE:
1466 i40iw_cleanup_cm_core(&iwdev->cm_core);
1467 if (dev->is_pf)
1468 i40iw_hw_stats_del_timer(dev);
1469
1470 i40iw_del_init_mem(iwdev);
1471 break;
1472 case INVALID_STATE:
1473 /* fallthrough */
1474 default:
1475 i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
1476 break;
1477 }
1478
1479 if (del_hdl)
1480 i40iw_del_handler(i40iw_find_i40e_handler(ldev));
1481 kfree(iwdev->hdl);
1482}
1483
1484/**
1485 * i40iw_setup_init_state - set up the initial device struct
1486 * @hdl: handler for iwarp device - one per instance
1487 * @ldev: lan device information
1488 * @client: iwarp client information, provided during registration
1489 *
1490 * Initialize the iwarp device and its hdl information
1491 * using the ldev and client information
1492 * Return 0 if successful, otherwise return error
1493 */
1494static enum i40iw_status_code i40iw_setup_init_state(struct i40iw_handler *hdl,
1495 struct i40e_info *ldev,
1496 struct i40e_client *client)
1497{
1498 struct i40iw_device *iwdev = &hdl->device;
1499 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1500 enum i40iw_status_code status;
1501
1502 memcpy(&hdl->ldev, ldev, sizeof(*ldev));
1503 if (resource_profile == 1)
1504 resource_profile = 2;
1505
1506 iwdev->mpa_version = mpa_version;
1507 iwdev->resource_profile = (resource_profile < I40IW_HMC_PROFILE_EQUAL) ?
1508 (u8)resource_profile + I40IW_HMC_PROFILE_DEFAULT :
1509 I40IW_HMC_PROFILE_DEFAULT;
1510 iwdev->max_rdma_vfs =
1511 (iwdev->resource_profile != I40IW_HMC_PROFILE_DEFAULT) ? max_rdma_vfs : 0;
eb9b0379 1512 iwdev->max_enabled_vfs = iwdev->max_rdma_vfs;
8e06af71
FL		 1513 iwdev->netdev = ldev->netdev;
1514 hdl->client = client;
1515 iwdev->mss = (!ldev->params.mtu) ? I40IW_DEFAULT_MSS : ldev->params.mtu - I40IW_MTU_TO_MSS;
1516 if (!ldev->ftype)
1517 iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_DB_ADDR_OFFSET;
1518 else
1519 iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_VF_DB_ADDR_OFFSET;
1520
1521 status = i40iw_save_msix_info(iwdev, ldev);
1522 if (status)
1523 goto exit;
1524 iwdev->hw.dev_context = (void *)ldev->pcidev;
1525 iwdev->hw.hw_addr = ldev->hw_addr;
1526 status = i40iw_allocate_dma_mem(&iwdev->hw,
1527 &iwdev->obj_mem, 8192, 4096);
1528 if (status)
1529 goto exit;
1530 iwdev->obj_next = iwdev->obj_mem;
1531 iwdev->push_mode = push_mode;
f69c3331 1532
8e06af71 1533 init_waitqueue_head(&iwdev->vchnl_waitq);
f69c3331
IM		 1534 init_waitqueue_head(&dev->vf_reqs);
1535
8e06af71
FL		 1536 status = i40iw_initialize_dev(iwdev, ldev);
1537exit:
1538 if (status) {
1539 kfree(iwdev->iw_msixtbl);
1540 i40iw_free_dma_mem(dev->hw, &iwdev->obj_mem);
1541 iwdev->iw_msixtbl = NULL;
1542 }
1543 return status;
1544}
1545
1546/**
1547 * i40iw_open - client interface operation open for iwarp/uda device
1548 * @ldev: lan device information
1549 * @client: iwarp client information, provided during registration
1550 *
1551 * Called by the lan driver during the processing of client register
1552 * Create device resources, set up queues, pble and hmc objects and
1553 * register the device with the ib verbs interface
1554 * Return 0 if successful, otherwise return error
1555 */
1556static int i40iw_open(struct i40e_info *ldev, struct i40e_client *client)
1557{
1558 struct i40iw_device *iwdev;
1559 struct i40iw_sc_dev *dev;
1560 enum i40iw_status_code status;
1561 struct i40iw_handler *hdl;
1562
1563 hdl = kzalloc(sizeof(*hdl), GFP_KERNEL);
1564 if (!hdl)
1565 return -ENOMEM;
1566 iwdev = &hdl->device;
1567 iwdev->hdl = hdl;
1568 dev = &iwdev->sc_dev;
1569 i40iw_setup_cm_core(iwdev);
1570
1571 dev->back_dev = (void *)iwdev;
1572 iwdev->ldev = &hdl->ldev;
1573 iwdev->client = client;
1574 mutex_init(&iwdev->pbl_mutex);
1575 i40iw_add_handler(hdl);
1576
1577 do {
1578 status = i40iw_setup_init_state(hdl, ldev, client);
1579 if (status)
1580 break;
1581 iwdev->init_state = INITIAL_STATE;
1582 if (dev->is_pf)
1583 i40iw_wait_pe_ready(dev->hw);
1584 status = i40iw_create_cqp(iwdev);
1585 if (status)
1586 break;
1587 iwdev->init_state = CQP_CREATED;
1588 status = i40iw_hmc_setup(iwdev);
1589 if (status)
1590 break;
1591 status = i40iw_create_ccq(iwdev);
1592 if (status)
1593 break;
1594 iwdev->init_state = CCQ_CREATED;
1595 status = i40iw_initialize_ilq(iwdev);
1596 if (status)
1597 break;
1598 iwdev->init_state = ILQ_CREATED;
1599 status = i40iw_initialize_ieq(iwdev);
1600 if (status)
1601 break;
1602 iwdev->init_state = IEQ_CREATED;
1603 status = i40iw_setup_aeq(iwdev);
1604 if (status)
1605 break;
1606 iwdev->init_state = AEQ_CREATED;
1607 status = i40iw_setup_ceqs(iwdev, ldev);
1608 if (status)
1609 break;
1610 iwdev->init_state = CEQ_CREATED;
1611 status = i40iw_initialize_hw_resources(iwdev);
1612 if (status)
1613 break;
1614 dev->ccq_ops->ccq_arm(dev->ccq);
1615 status = i40iw_hmc_init_pble(&iwdev->sc_dev, iwdev->pble_rsrc);
1616 if (status)
1617 break;
1618 iwdev->virtchnl_wq = create_singlethread_workqueue("iwvch");
1619 i40iw_register_notifiers();
1620 iwdev->init_state = INET_NOTIFIER;
1621 status = i40iw_add_mac_ip(iwdev);
1622 if (status)
1623 break;
1624 iwdev->init_state = IP_ADDR_REGISTERED;
1625 if (i40iw_register_rdma_device(iwdev)) {
1626 i40iw_pr_err("register rdma device fail\n");
1627 break;
1628 };
1629
1630 iwdev->init_state = RDMA_DEV_REGISTERED;
1631 iwdev->iw_status = 1;
1632 i40iw_port_ibevent(iwdev);
1633 i40iw_pr_info("i40iw_open completed\n");
1634 return 0;
1635 } while (0);
1636
1637 i40iw_pr_err("status = %d last completion = %d\n", status, iwdev->init_state);
1638 i40iw_deinit_device(iwdev, false, false);
1639 return -ERESTART;
1640}
1641
1642/**
1643 * i40iw_l2param_change : handle qs handles for qos and mss change
1644 * @ldev: lan device information
1645 * @client: client for paramater change
1646 * @params: new parameters from L2
1647 */
1648static void i40iw_l2param_change(struct i40e_info *ldev,
1649 struct i40e_client *client,
1650 struct i40e_params *params)
1651{
1652 struct i40iw_handler *hdl;
1653 struct i40iw_device *iwdev;
1654
1655 hdl = i40iw_find_i40e_handler(ldev);
1656 if (!hdl)
1657 return;
1658
1659 iwdev = &hdl->device;
1660 if (params->mtu)
1661 iwdev->mss = params->mtu - I40IW_MTU_TO_MSS;
1662}
1663
1664/**
1665 * i40iw_close - client interface operation close for iwarp/uda device
1666 * @ldev: lan device information
1667 * @client: client to close
1668 *
1669 * Called by the lan driver during the processing of client unregister
1670 * Destroy and clean up the driver resources
1671 */
1672static void i40iw_close(struct i40e_info *ldev, struct i40e_client *client, bool reset)
1673{
1674 struct i40iw_device *iwdev;
1675 struct i40iw_handler *hdl;
1676
1677 hdl = i40iw_find_i40e_handler(ldev);
1678 if (!hdl)
1679 return;
1680
1681 iwdev = &hdl->device;
1682 destroy_workqueue(iwdev->virtchnl_wq);
1683 i40iw_deinit_device(iwdev, reset, true);
1684}
1685
1686/**
1687 * i40iw_vf_reset - process VF reset
1688 * @ldev: lan device information
1689 * @client: client interface instance
1690 * @vf_id: virtual function id
1691 *
1692 * Called when a VF is reset by the PF
1693 * Destroy and clean up the VF resources
1694 */
1695static void i40iw_vf_reset(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id)
1696{
1697 struct i40iw_handler *hdl;
1698 struct i40iw_sc_dev *dev;
1699 struct i40iw_hmc_fcn_info hmc_fcn_info;
1700 struct i40iw_virt_mem vf_dev_mem;
1701 struct i40iw_vfdev *tmp_vfdev;
1702 unsigned int i;
1703 unsigned long flags;
1704
1705 hdl = i40iw_find_i40e_handler(ldev);
1706 if (!hdl)
1707 return;
1708
1709 dev = &hdl->device.sc_dev;
1710
1711 for (i = 0; i < I40IW_MAX_PE_ENABLED_VF_COUNT; i++) {
1712 if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id != vf_id))
1713 continue;
8e06af71
FL		 1714 /* free all resources allocated on behalf of vf */
1715 tmp_vfdev = dev->vf_dev[i];
1716 spin_lock_irqsave(&dev->dev_pestat.stats_lock, flags);
1717 dev->vf_dev[i] = NULL;
1718 spin_unlock_irqrestore(&dev->dev_pestat.stats_lock, flags);
1719 i40iw_del_hmc_objects(dev, &tmp_vfdev->hmc_info, false, false);
1720 /* remove vf hmc function */
1721 memset(&hmc_fcn_info, 0, sizeof(hmc_fcn_info));
1722 hmc_fcn_info.vf_id = vf_id;
1723 hmc_fcn_info.iw_vf_idx = tmp_vfdev->iw_vf_idx;
1724 hmc_fcn_info.free_fcn = true;
1725 i40iw_cqp_manage_hmc_fcn_cmd(dev, &hmc_fcn_info);
1726 /* free vf_dev */
1727 vf_dev_mem.va = tmp_vfdev;
1728 vf_dev_mem.size = sizeof(struct i40iw_vfdev) +
1729 sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX;
1730 i40iw_free_virt_mem(dev->hw, &vf_dev_mem);
1731 break;
1732 }
1733}
1734
1735/**
1736 * i40iw_vf_enable - enable a number of VFs
1737 * @ldev: lan device information
1738 * @client: client interface instance
1739 * @num_vfs: number of VFs for the PF
1740 *
1741 * Called when the number of VFs changes
1742 */
1743static void i40iw_vf_enable(struct i40e_info *ldev,
1744 struct i40e_client *client,
1745 u32 num_vfs)
1746{
1747 struct i40iw_handler *hdl;
1748
1749 hdl = i40iw_find_i40e_handler(ldev);
1750 if (!hdl)
1751 return;
1752
1753 if (num_vfs > I40IW_MAX_PE_ENABLED_VF_COUNT)
1754 hdl->device.max_enabled_vfs = I40IW_MAX_PE_ENABLED_VF_COUNT;
1755 else
1756 hdl->device.max_enabled_vfs = num_vfs;
1757}
1758
1759/**
1760 * i40iw_vf_capable - check if VF capable
1761 * @ldev: lan device information
1762 * @client: client interface instance
1763 * @vf_id: virtual function id
1764 *
1765 * Return 1 if a VF slot is available or if VF is already RDMA enabled
1766 * Return 0 otherwise
1767 */
1768static int i40iw_vf_capable(struct i40e_info *ldev,
1769 struct i40e_client *client,
1770 u32 vf_id)
1771{
1772 struct i40iw_handler *hdl;
1773 struct i40iw_sc_dev *dev;
1774 unsigned int i;
1775
1776 hdl = i40iw_find_i40e_handler(ldev);
1777 if (!hdl)
1778 return 0;
1779
1780 dev = &hdl->device.sc_dev;
1781
1782 for (i = 0; i < hdl->device.max_enabled_vfs; i++) {
1783 if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id == vf_id))
1784 return 1;
1785 }
1786
1787 return 0;
1788}
1789
1790/**
1791 * i40iw_virtchnl_receive - receive a message through the virtual channel
1792 * @ldev: lan device information
1793 * @client: client interface instance
1794 * @vf_id: virtual function id associated with the message
1795 * @msg: message buffer pointer
1796 * @len: length of the message
1797 *
1798 * Invoke virtual channel receive operation for the given msg
1799 * Return 0 if successful, otherwise return error
1800 */
1801static int i40iw_virtchnl_receive(struct i40e_info *ldev,
1802 struct i40e_client *client,
1803 u32 vf_id,
1804 u8 *msg,
1805 u16 len)
1806{
1807 struct i40iw_handler *hdl;
1808 struct i40iw_sc_dev *dev;
1809 struct i40iw_device *iwdev;
1810 int ret_code = I40IW_NOT_SUPPORTED;
1811
1812 if (!len || !msg)
1813 return I40IW_ERR_PARAM;
1814
1815 hdl = i40iw_find_i40e_handler(ldev);
1816 if (!hdl)
1817 return I40IW_ERR_PARAM;
1818
1819 dev = &hdl->device.sc_dev;
1820 iwdev = dev->back_dev;
1821
8e06af71
FL		 1822 if (dev->vchnl_if.vchnl_recv) {
1823 ret_code = dev->vchnl_if.vchnl_recv(dev, vf_id, msg, len);
1824 if (!dev->is_pf) {
1825 atomic_dec(&iwdev->vchnl_msgs);
1826 wake_up(&iwdev->vchnl_waitq);
1827 }
1828 }
1829 return ret_code;
1830}
1831
f69c3331
IM		 1832/**
1833 * i40iw_vf_clear_to_send - wait to send virtual channel message
1834 * @dev: iwarp device *
1835 * Wait for until virtual channel is clear
1836 * before sending the next message
1837 *
1838 * Returns false if error
1839 * Returns true if clear to send
1840 */
1841bool i40iw_vf_clear_to_send(struct i40iw_sc_dev *dev)
1842{
1843 struct i40iw_device *iwdev;
1844 wait_queue_t wait;
1845
1846 iwdev = dev->back_dev;
1847
1848 if (!wq_has_sleeper(&dev->vf_reqs) &&
1849 (atomic_read(&iwdev->vchnl_msgs) == 0))
1850 return true; /* virtual channel is clear */
1851
1852 init_wait(&wait);
1853 add_wait_queue_exclusive(&dev->vf_reqs, &wait);
1854
1855 if (!wait_event_timeout(dev->vf_reqs,
1856 (atomic_read(&iwdev->vchnl_msgs) == 0),
1857 I40IW_VCHNL_EVENT_TIMEOUT))
1858 dev->vchnl_up = false;
1859
1860 remove_wait_queue(&dev->vf_reqs, &wait);
1861
1862 return dev->vchnl_up;
1863}
1864
8e06af71
FL		 1865/**
1866 * i40iw_virtchnl_send - send a message through the virtual channel
1867 * @dev: iwarp device
1868 * @vf_id: virtual function id associated with the message
1869 * @msg: virtual channel message buffer pointer
1870 * @len: length of the message
1871 *
1872 * Invoke virtual channel send operation for the given msg
1873 * Return 0 if successful, otherwise return error
1874 */
1875static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
1876 u32 vf_id,
1877 u8 *msg,
1878 u16 len)
1879{
1880 struct i40iw_device *iwdev;
1881 struct i40e_info *ldev;
8e06af71
FL		 1882
1883 if (!dev || !dev->back_dev)
f69c3331 1884 return I40IW_ERR_BAD_PTR;
8e06af71
FL		 1885
1886 iwdev = dev->back_dev;
1887 ldev = iwdev->ldev;
1888
1889 if (ldev && ldev->ops && ldev->ops->virtchnl_send)
f69c3331
IM		 1890 return ldev->ops->virtchnl_send(ldev, &i40iw_client, vf_id, msg, len);
1891 return I40IW_ERR_BAD_PTR;
8e06af71
FL		 1892}
1893
1894/* client interface functions */
1895static struct i40e_client_ops i40e_ops = {
1896 .open = i40iw_open,
1897 .close = i40iw_close,
1898 .l2_param_change = i40iw_l2param_change,
1899 .virtchnl_receive = i40iw_virtchnl_receive,
1900 .vf_reset = i40iw_vf_reset,
1901 .vf_enable = i40iw_vf_enable,
1902 .vf_capable = i40iw_vf_capable
1903};
1904
1905/**
1906 * i40iw_init_module - driver initialization function
1907 *
1908 * First function to call when the driver is loaded
1909 * Register the driver as i40e client and port mapper client
1910 */
1911static int __init i40iw_init_module(void)
1912{
1913 int ret;
1914
1915 memset(&i40iw_client, 0, sizeof(i40iw_client));
1916 i40iw_client.version.major = CLIENT_IW_INTERFACE_VERSION_MAJOR;
1917 i40iw_client.version.minor = CLIENT_IW_INTERFACE_VERSION_MINOR;
1918 i40iw_client.version.build = CLIENT_IW_INTERFACE_VERSION_BUILD;
1919 i40iw_client.ops = &i40e_ops;
1920 memcpy(i40iw_client.name, i40iw_client_name, I40E_CLIENT_STR_LENGTH);
1921 i40iw_client.type = I40E_CLIENT_IWARP;
1922 spin_lock_init(&i40iw_handler_lock);
1923 ret = i40e_register_client(&i40iw_client);
8e06af71
FL		 1924 return ret;
1925}
1926
1927/**
1928 * i40iw_exit_module - driver exit clean up function
1929 *
1930 * The function is called just before the driver is unloaded
1931 * Unregister the driver as i40e client and port mapper client
1932 */
1933static void __exit i40iw_exit_module(void)
1934{
1935 i40e_unregister_client(&i40iw_client);
8e06af71
FL		 1936}
1937
1938module_init(i40iw_init_module);
1939module_exit(i40iw_exit_module);
Linux kernel - Deliverables
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