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RDMA/ocrdma: Fix memory leak in _ocrdma_alloc_pd()
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
56c1d233 69int mlx4_ib_sm_guid_assign = 0;
a0c64a17 70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
56c1d233 71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
a0c64a17 72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f
RD		 134static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props)
136{
137 struct mlx4_ib_dev *dev = to_mdev(ibdev);
138 struct ib_smp *in_mad = NULL;
139 struct ib_smp *out_mad = NULL;
140 int err = -ENOMEM;
3dec4878 141 int have_ib_ports;
225c7b1f
RD		 142
143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
145 if (!in_mad || !out_mad)
146 goto out;
147
148 init_query_mad(in_mad);
149 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
150
0a9a0188
JM		 151 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
152 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 153 if (err)
154 goto out;
155
156 memset(props, 0, sizeof *props);
157
3dec4878
JM		 158 have_ib_ports = num_ib_ports(dev->dev);
159
225c7b1f
RD		 160 props->fw_ver = dev->dev->caps.fw_ver;
161 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
162 IB_DEVICE_PORT_ACTIVE_EVENT |
163 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 164 IB_DEVICE_RC_RNR_NAK_GEN |
165 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
167 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
169 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 171 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
173 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
175 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 176 if (dev->dev->caps.max_gso_sz &&
177 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 179 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
181 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
185 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
187 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
189 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
192 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
193 else
194 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 195 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 196 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 197 }
225c7b1f
RD		 198
199 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
200 0xffffff;
872bf2fb 201 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 202 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
203 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
204
205 props->max_mr_size = ~0ull;
206 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 207 props->max_qp = dev->dev->quotas.qp;
fc2d0044 208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 209 props->max_sge = min(dev->dev->caps.max_sq_sg,
210 dev->dev->caps.max_rq_sg);
5a0d0a61 211 props->max_cq = dev->dev->quotas.cq;
225c7b1f 212 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 213 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
217 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 218 props->max_srq = dev->dev->quotas.srq;
c8681f14 219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 220 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 221 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
224 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 225 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 226 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
229 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
230 props->max_mcast_grp;
a5bbe892 231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 232
233out:
234 kfree(in_mad);
235 kfree(out_mad);
236
237 return err;
238}
239
fa417f7b
EC		 240static enum rdma_link_layer
241mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 242{
fa417f7b 243 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 244
65dab25d 245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 246 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
247}
225c7b1f 248
fa417f7b 249static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 250 struct ib_port_attr *props, int netw_view)
fa417f7b 251{
a9c766bb
OG		 252 struct ib_smp *in_mad = NULL;
253 struct ib_smp *out_mad = NULL;
a5e12dff 254 int ext_active_speed;
0a9a0188 255 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 256 int err = -ENOMEM;
257
258 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
259 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
260 if (!in_mad || !out_mad)
261 goto out;
262
263 init_query_mad(in_mad);
264 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
265 in_mad->attr_mod = cpu_to_be32(port);
266
0a9a0188
JM		 267 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
268 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
269
270 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 271 in_mad, out_mad);
272 if (err)
273 goto out;
274
a5e12dff 275
225c7b1f
RD		 276 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
277 props->lmc = out_mad->data[34] & 0x7;
278 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
279 props->sm_sl = out_mad->data[36] & 0xf;
280 props->state = out_mad->data[32] & 0xf;
281 props->phys_state = out_mad->data[33] >> 4;
282 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 283 if (netw_view)
284 props->gid_tbl_len = out_mad->data[50];
285 else
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 289 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
290 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
291 props->active_width = out_mad->data[31] & 0xf;
292 props->active_speed = out_mad->data[35] >> 4;
293 props->max_mtu = out_mad->data[41] & 0xf;
294 props->active_mtu = out_mad->data[36] >> 4;
295 props->subnet_timeout = out_mad->data[51] & 0x1f;
296 props->max_vl_num = out_mad->data[37] >> 4;
297 props->init_type_reply = out_mad->data[41] >> 4;
298
a5e12dff
MA		 299 /* Check if extended speeds (EDR/FDR/...) are supported */
300 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
301 ext_active_speed = out_mad->data[62] >> 4;
302
303 switch (ext_active_speed) {
304 case 1:
2e96691c 305 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 306 break;
307 case 2:
2e96691c 308 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 309 break;
310 }
311 }
312
313 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 314 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
318
0a9a0188 319 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 320 NULL, NULL, in_mad, out_mad);
321 if (err)
bf6b47de 322 goto out;
8154c07f
OG		 323
324 /* Checking LinkSpeedActive for FDR-10 */
325 if (out_mad->data[15] & 0x1)
326 props->active_speed = IB_SPEED_FDR10;
a5e12dff 327 }
d2ef4068
OG		 328
329 /* Avoid wrong speed value returned by FW if the IB link is down. */
330 if (props->state == IB_PORT_DOWN)
331 props->active_speed = IB_SPEED_SDR;
332
a9c766bb
OG		 333out:
334 kfree(in_mad);
335 kfree(out_mad);
336 return err;
fa417f7b
EC		 337}
338
339static u8 state_to_phys_state(enum ib_port_state state)
340{
341 return state == IB_PORT_ACTIVE ? 5 : 3;
342}
343
344static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 345 struct ib_port_attr *props, int netw_view)
fa417f7b 346{
a9c766bb
OG		 347
348 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
349 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 350 struct net_device *ndev;
351 enum ib_mtu tmp;
a9c766bb
OG		 352 struct mlx4_cmd_mailbox *mailbox;
353 int err = 0;
a5750090 354 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 355
356 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
357 if (IS_ERR(mailbox))
358 return PTR_ERR(mailbox);
fa417f7b 359
a9c766bb
OG		 360 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
361 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
362 MLX4_CMD_WRAPPED);
363 if (err)
364 goto out;
365
366 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
367 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 368 props->active_speed = IB_SPEED_QDR;
b4a26a27 369 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 370 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
371 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 372 props->pkey_tbl_len = 1;
bcacb897 373 props->max_mtu = IB_MTU_4096;
a9c766bb 374 props->max_vl_num = 2;
fa417f7b
EC		 375 props->state = IB_PORT_DOWN;
376 props->phys_state = state_to_phys_state(props->state);
377 props->active_mtu = IB_MTU_256;
a5750090
MS		 378 if (is_bonded)
379 rtnl_lock(); /* required to get upper dev */
dba3ad2a 380 spin_lock_bh(&iboe->lock);
fa417f7b 381 ndev = iboe->netdevs[port - 1];
a5750090
MS		 382 if (ndev && is_bonded)
383 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 384 if (!ndev)
a9c766bb 385 goto out_unlock;
fa417f7b
EC		 386
387 tmp = iboe_get_mtu(ndev->mtu);
388 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
389
21d60609 390 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 391 IB_PORT_ACTIVE : IB_PORT_DOWN;
392 props->phys_state = state_to_phys_state(props->state);
a9c766bb 393out_unlock:
dba3ad2a 394 spin_unlock_bh(&iboe->lock);
a5750090
MS		 395 if (is_bonded)
396 rtnl_unlock();
a9c766bb
OG		 397out:
398 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
399 return err;
fa417f7b
EC		 400}
401
0a9a0188
JM		 402int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
403 struct ib_port_attr *props, int netw_view)
fa417f7b 404{
a9c766bb 405 int err;
fa417f7b
EC		 406
407 memset(props, 0, sizeof *props);
408
fa417f7b 409 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 410 ib_link_query_port(ibdev, port, props, netw_view) :
411 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 412
413 return err;
414}
415
0a9a0188
JM		 416static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
417 struct ib_port_attr *props)
418{
419 /* returns host view */
420 return __mlx4_ib_query_port(ibdev, port, props, 0);
421}
422
a0c64a17
JM		 423int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
424 union ib_gid *gid, int netw_view)
225c7b1f
RD		 425{
426 struct ib_smp *in_mad = NULL;
427 struct ib_smp *out_mad = NULL;
428 int err = -ENOMEM;
a0c64a17
JM		 429 struct mlx4_ib_dev *dev = to_mdev(ibdev);
430 int clear = 0;
431 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 432
433 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
434 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
435 if (!in_mad || !out_mad)
436 goto out;
437
438 init_query_mad(in_mad);
439 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
440 in_mad->attr_mod = cpu_to_be32(port);
441
a0c64a17
JM		 442 if (mlx4_is_mfunc(dev->dev) && netw_view)
443 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
444
445 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 446 if (err)
447 goto out;
448
449 memcpy(gid->raw, out_mad->data + 8, 8);
450
a0c64a17
JM		 451 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
452 if (index) {
453 /* For any index > 0, return the null guid */
454 err = 0;
455 clear = 1;
456 goto out;
457 }
458 }
459
225c7b1f
RD		 460 init_query_mad(in_mad);
461 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
462 in_mad->attr_mod = cpu_to_be32(index / 8);
463
a0c64a17 464 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 465 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 466 if (err)
467 goto out;
468
469 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
470
471out:
a0c64a17
JM		 472 if (clear)
473 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 474 kfree(in_mad);
475 kfree(out_mad);
476 return err;
477}
478
fa417f7b
EC		 479static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
480 union ib_gid *gid)
481{
482 struct mlx4_ib_dev *dev = to_mdev(ibdev);
483
484 *gid = dev->iboe.gid_table[port - 1][index];
485
486 return 0;
487}
488
489static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
490 union ib_gid *gid)
491{
492 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 493 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 494 else
495 return iboe_query_gid(ibdev, port, index, gid);
496}
497
0a9a0188
JM		 498int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
499 u16 *pkey, int netw_view)
225c7b1f
RD		 500{
501 struct ib_smp *in_mad = NULL;
502 struct ib_smp *out_mad = NULL;
0a9a0188 503 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 504 int err = -ENOMEM;
505
506 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
507 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
508 if (!in_mad || !out_mad)
509 goto out;
510
511 init_query_mad(in_mad);
512 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
513 in_mad->attr_mod = cpu_to_be32(index / 32);
514
0a9a0188
JM		 515 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
516 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
517
518 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
519 in_mad, out_mad);
225c7b1f
RD		 520 if (err)
521 goto out;
522
523 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
524
525out:
526 kfree(in_mad);
527 kfree(out_mad);
528 return err;
529}
530
0a9a0188
JM		 531static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
532{
533 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
534}
535
225c7b1f
RD		 536static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
537 struct ib_device_modify *props)
538{
d0d68b86 539 struct mlx4_cmd_mailbox *mailbox;
df7fba66 540 unsigned long flags;
d0d68b86 541
225c7b1f
RD		 542 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
543 return -EOPNOTSUPP;
544
d0d68b86
JM		 545 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
546 return 0;
547
992e8e6e
JM		 548 if (mlx4_is_slave(to_mdev(ibdev)->dev))
549 return -EOPNOTSUPP;
550
df7fba66 551 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 552 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 553 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 554
555 /*
556 * If possible, pass node desc to FW, so it can generate
557 * a 144 trap. If cmd fails, just ignore.
558 */
559 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
560 if (IS_ERR(mailbox))
561 return 0;
562
d0d68b86
JM		 563 memcpy(mailbox->buf, props->node_desc, 64);
564 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 565 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 566
567 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 568
569 return 0;
570}
571
61565013
JM		 572static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
573 u32 cap_mask)
225c7b1f
RD		 574{
575 struct mlx4_cmd_mailbox *mailbox;
576 int err;
577
578 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
579 if (IS_ERR(mailbox))
580 return PTR_ERR(mailbox);
581
5ae2a7a8
RD		 582 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
583 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
584 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
585 } else {
586 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
587 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
588 }
225c7b1f 589
a130b590
IS		 590 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
591 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
592 MLX4_CMD_WRAPPED);
225c7b1f
RD		 593
594 mlx4_free_cmd_mailbox(dev->dev, mailbox);
595 return err;
596}
597
598static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
599 struct ib_port_modify *props)
600{
61565013
JM		 601 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
602 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 603 struct ib_port_attr attr;
604 u32 cap_mask;
605 int err;
606
61565013
JM		 607 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
608 * of whether port link layer is ETH or IB. For ETH ports, qkey
609 * violations and port capabilities are not meaningful.
610 */
611 if (is_eth)
612 return 0;
613
614 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 615
616 err = mlx4_ib_query_port(ibdev, port, &attr);
617 if (err)
618 goto out;
619
620 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
621 ~props->clr_port_cap_mask;
622
61565013
JM		 623 err = mlx4_ib_SET_PORT(mdev, port,
624 !!(mask & IB_PORT_RESET_QKEY_CNTR),
625 cap_mask);
225c7b1f
RD		 626
627out:
628 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
629 return err;
630}
631
632static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
633 struct ib_udata *udata)
634{
635 struct mlx4_ib_dev *dev = to_mdev(ibdev);
636 struct mlx4_ib_ucontext *context;
08ff3235 637 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 638 struct mlx4_ib_alloc_ucontext_resp resp;
639 int err;
640
3b4a8cd5
JM		 641 if (!dev->ib_active)
642 return ERR_PTR(-EAGAIN);
643
08ff3235
OG		 644 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
645 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
646 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
647 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
648 } else {
649 resp.dev_caps = dev->dev->caps.userspace_caps;
650 resp.qp_tab_size = dev->dev->caps.num_qps;
651 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
652 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
653 resp.cqe_size = dev->dev->caps.cqe_size;
654 }
225c7b1f
RD		 655
656 context = kmalloc(sizeof *context, GFP_KERNEL);
657 if (!context)
658 return ERR_PTR(-ENOMEM);
659
660 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
661 if (err) {
662 kfree(context);
663 return ERR_PTR(err);
664 }
665
666 INIT_LIST_HEAD(&context->db_page_list);
667 mutex_init(&context->db_page_mutex);
668
08ff3235
OG		 669 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
670 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
671 else
672 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
673
225c7b1f
RD		 674 if (err) {
675 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
676 kfree(context);
677 return ERR_PTR(-EFAULT);
678 }
679
680 return &context->ibucontext;
681}
682
683static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
684{
685 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
686
687 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
688 kfree(context);
689
690 return 0;
691}
692
693static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
694{
695 struct mlx4_ib_dev *dev = to_mdev(context->device);
696
697 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
698 return -EINVAL;
699
700 if (vma->vm_pgoff == 0) {
701 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
702
703 if (io_remap_pfn_range(vma, vma->vm_start,
704 to_mucontext(context)->uar.pfn,
705 PAGE_SIZE, vma->vm_page_prot))
706 return -EAGAIN;
707 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 708 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 709
710 if (io_remap_pfn_range(vma, vma->vm_start,
711 to_mucontext(context)->uar.pfn +
712 dev->dev->caps.num_uars,
713 PAGE_SIZE, vma->vm_page_prot))
714 return -EAGAIN;
715 } else
716 return -EINVAL;
717
718 return 0;
719}
720
721static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
722 struct ib_ucontext *context,
723 struct ib_udata *udata)
724{
725 struct mlx4_ib_pd *pd;
726 int err;
727
728 pd = kmalloc(sizeof *pd, GFP_KERNEL);
729 if (!pd)
730 return ERR_PTR(-ENOMEM);
731
732 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
733 if (err) {
734 kfree(pd);
735 return ERR_PTR(err);
736 }
737
738 if (context)
739 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
740 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
741 kfree(pd);
742 return ERR_PTR(-EFAULT);
743 }
744
745 return &pd->ibpd;
746}
747
748static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
749{
750 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
751 kfree(pd);
752
753 return 0;
754}
755
012a8ff5
SH		 756static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
757 struct ib_ucontext *context,
758 struct ib_udata *udata)
759{
760 struct mlx4_ib_xrcd *xrcd;
761 int err;
762
763 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
764 return ERR_PTR(-ENOSYS);
765
766 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
767 if (!xrcd)
768 return ERR_PTR(-ENOMEM);
769
770 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
771 if (err)
772 goto err1;
773
774 xrcd->pd = ib_alloc_pd(ibdev);
775 if (IS_ERR(xrcd->pd)) {
776 err = PTR_ERR(xrcd->pd);
777 goto err2;
778 }
779
780 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
781 if (IS_ERR(xrcd->cq)) {
782 err = PTR_ERR(xrcd->cq);
783 goto err3;
784 }
785
786 return &xrcd->ibxrcd;
787
788err3:
789 ib_dealloc_pd(xrcd->pd);
790err2:
791 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
792err1:
793 kfree(xrcd);
794 return ERR_PTR(err);
795}
796
797static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
798{
799 ib_destroy_cq(to_mxrcd(xrcd)->cq);
800 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
801 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
802 kfree(xrcd);
803
804 return 0;
805}
806
fa417f7b
EC		 807static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
808{
809 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
810 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
811 struct mlx4_ib_gid_entry *ge;
812
813 ge = kzalloc(sizeof *ge, GFP_KERNEL);
814 if (!ge)
815 return -ENOMEM;
816
817 ge->gid = *gid;
818 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
819 ge->port = mqp->port;
820 ge->added = 1;
821 }
822
823 mutex_lock(&mqp->mutex);
824 list_add_tail(&ge->list, &mqp->gid_list);
825 mutex_unlock(&mqp->mutex);
826
827 return 0;
828}
829
830int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
831 union ib_gid *gid)
832{
fa417f7b
EC		 833 struct net_device *ndev;
834 int ret = 0;
835
836 if (!mqp->port)
837 return 0;
838
dba3ad2a 839 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 840 ndev = mdev->iboe.netdevs[mqp->port - 1];
841 if (ndev)
842 dev_hold(ndev);
dba3ad2a 843 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 844
845 if (ndev) {
fa417f7b 846 ret = 1;
fa417f7b
EC		 847 dev_put(ndev);
848 }
849
850 return ret;
851}
852
0ff1fb65
HHZ		 853struct mlx4_ib_steering {
854 struct list_head list;
146d6e19 855 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 856 union ib_gid gid;
857};
858
f77c0162 859static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 860 u32 qp_num,
f77c0162
HHZ		 861 union ib_flow_spec *ib_spec,
862 struct _rule_hw *mlx4_spec)
863{
864 enum mlx4_net_trans_rule_id type;
865
866 switch (ib_spec->type) {
867 case IB_FLOW_SPEC_ETH:
868 type = MLX4_NET_TRANS_RULE_ID_ETH;
869 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
870 ETH_ALEN);
871 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
872 ETH_ALEN);
873 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
874 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
875 break;
a37a1a42
MB		 876 case IB_FLOW_SPEC_IB:
877 type = MLX4_NET_TRANS_RULE_ID_IB;
878 mlx4_spec->ib.l3_qpn =
879 cpu_to_be32(qp_num);
880 mlx4_spec->ib.qpn_mask =
881 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
882 break;
883
f77c0162
HHZ		 884
885 case IB_FLOW_SPEC_IPV4:
886 type = MLX4_NET_TRANS_RULE_ID_IPV4;
887 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
888 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
889 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
890 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
891 break;
892
893 case IB_FLOW_SPEC_TCP:
894 case IB_FLOW_SPEC_UDP:
895 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
896 MLX4_NET_TRANS_RULE_ID_TCP :
897 MLX4_NET_TRANS_RULE_ID_UDP;
898 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
899 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
900 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
901 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
902 break;
903
904 default:
905 return -EINVAL;
906 }
907 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
908 mlx4_hw_rule_sz(dev, type) < 0)
909 return -EINVAL;
910 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
911 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
912 return mlx4_hw_rule_sz(dev, type);
913}
914
a37a1a42
MB		 915struct default_rules {
916 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
917 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
918 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
919 __u8 link_layer;
920};
921static const struct default_rules default_table[] = {
922 {
923 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
924 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
925 .rules_create_list = {IB_FLOW_SPEC_IB},
926 .link_layer = IB_LINK_LAYER_INFINIBAND
927 }
928};
929
930static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
931 struct ib_flow_attr *flow_attr)
932{
933 int i, j, k;
934 void *ib_flow;
935 const struct default_rules *pdefault_rules = default_table;
936 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
937
a57f23f6 938 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 939 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
940 memset(&field_types, 0, sizeof(field_types));
941
942 if (link_layer != pdefault_rules->link_layer)
943 continue;
944
945 ib_flow = flow_attr + 1;
946 /* we assume the specs are sorted */
947 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
948 j < flow_attr->num_of_specs; k++) {
949 union ib_flow_spec *current_flow =
950 (union ib_flow_spec *)ib_flow;
951
952 /* same layer but different type */
953 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
954 (pdefault_rules->mandatory_fields[k] &
955 IB_FLOW_SPEC_LAYER_MASK)) &&
956 (current_flow->type !=
957 pdefault_rules->mandatory_fields[k]))
958 goto out;
959
960 /* same layer, try match next one */
961 if (current_flow->type ==
962 pdefault_rules->mandatory_fields[k]) {
963 j++;
964 ib_flow +=
965 ((union ib_flow_spec *)ib_flow)->size;
966 }
967 }
968
969 ib_flow = flow_attr + 1;
970 for (j = 0; j < flow_attr->num_of_specs;
971 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
972 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
973 /* same layer and same type */
974 if (((union ib_flow_spec *)ib_flow)->type ==
975 pdefault_rules->mandatory_not_fields[k])
976 goto out;
977
978 return i;
979 }
980out:
981 return -1;
982}
983
984static int __mlx4_ib_create_default_rules(
985 struct mlx4_ib_dev *mdev,
986 struct ib_qp *qp,
987 const struct default_rules *pdefault_rules,
988 struct _rule_hw *mlx4_spec) {
989 int size = 0;
990 int i;
991
a57f23f6 992 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 993 int ret;
994 union ib_flow_spec ib_spec;
995 switch (pdefault_rules->rules_create_list[i]) {
996 case 0:
997 /* no rule */
998 continue;
999 case IB_FLOW_SPEC_IB:
1000 ib_spec.type = IB_FLOW_SPEC_IB;
1001 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1002
1003 break;
1004 default:
1005 /* invalid rule */
1006 return -EINVAL;
1007 }
1008 /* We must put empty rule, qpn is being ignored */
1009 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1010 mlx4_spec);
1011 if (ret < 0) {
1012 pr_info("invalid parsing\n");
1013 return -EINVAL;
1014 }
1015
1016 mlx4_spec = (void *)mlx4_spec + ret;
1017 size += ret;
1018 }
1019 return size;
1020}
1021
f77c0162
HHZ		 1022static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1023 int domain,
1024 enum mlx4_net_trans_promisc_mode flow_type,
1025 u64 *reg_id)
1026{
1027 int ret, i;
1028 int size = 0;
1029 void *ib_flow;
1030 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1031 struct mlx4_cmd_mailbox *mailbox;
1032 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1033 int default_flow;
f77c0162
HHZ		 1034
1035 static const u16 __mlx4_domain[] = {
1036 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1037 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1038 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1039 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1040 };
1041
1042 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1043 pr_err("Invalid priority value %d\n", flow_attr->priority);
1044 return -EINVAL;
1045 }
1046
1047 if (domain >= IB_FLOW_DOMAIN_NUM) {
1048 pr_err("Invalid domain value %d\n", domain);
1049 return -EINVAL;
1050 }
1051
1052 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1053 return -EINVAL;
1054
1055 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1056 if (IS_ERR(mailbox))
1057 return PTR_ERR(mailbox);
f77c0162
HHZ		 1058 ctrl = mailbox->buf;
1059
1060 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1061 flow_attr->priority);
1062 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1063 ctrl->port = flow_attr->port;
1064 ctrl->qpn = cpu_to_be32(qp->qp_num);
1065
1066 ib_flow = flow_attr + 1;
1067 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1068 /* Add default flows */
1069 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1070 if (default_flow >= 0) {
1071 ret = __mlx4_ib_create_default_rules(
1072 mdev, qp, default_table + default_flow,
1073 mailbox->buf + size);
1074 if (ret < 0) {
1075 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1076 return -EINVAL;
1077 }
1078 size += ret;
1079 }
f77c0162 1080 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1081 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1082 mailbox->buf + size);
f77c0162
HHZ		 1083 if (ret < 0) {
1084 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1085 return -EINVAL;
1086 }
1087 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1088 size += ret;
1089 }
1090
1091 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1092 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1093 MLX4_CMD_NATIVE);
1094 if (ret == -ENOMEM)
1095 pr_err("mcg table is full. Fail to register network rule.\n");
1096 else if (ret == -ENXIO)
1097 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1098 else if (ret)
1099 pr_err("Invalid argumant. Fail to register network rule.\n");
1100
1101 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1102 return ret;
1103}
1104
1105static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1106{
1107 int err;
1108 err = mlx4_cmd(dev, reg_id, 0, 0,
1109 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1110 MLX4_CMD_NATIVE);
1111 if (err)
1112 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1113 reg_id);
1114 return err;
1115}
1116
d2fce8a9
OG		 1117static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1118 u64 *reg_id)
1119{
1120 void *ib_flow;
1121 union ib_flow_spec *ib_spec;
1122 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1123 int err = 0;
1124
5eff6dad
OG		 1125 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1126 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1127 return 0; /* do nothing */
1128
1129 ib_flow = flow_attr + 1;
1130 ib_spec = (union ib_flow_spec *)ib_flow;
1131
1132 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1133 return 0; /* do nothing */
1134
1135 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1136 flow_attr->port, qp->qp_num,
1137 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1138 reg_id);
1139 return err;
1140}
1141
f77c0162
HHZ		 1142static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1143 struct ib_flow_attr *flow_attr,
1144 int domain)
1145{
146d6e19 1146 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1147 struct mlx4_ib_flow *mflow;
1148 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1149 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1150 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1151
1152 memset(type, 0, sizeof(type));
1153
1154 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1155 if (!mflow) {
1156 err = -ENOMEM;
1157 goto err_free;
1158 }
1159
1160 switch (flow_attr->type) {
1161 case IB_FLOW_ATTR_NORMAL:
1162 type[0] = MLX4_FS_REGULAR;
1163 break;
1164
1165 case IB_FLOW_ATTR_ALL_DEFAULT:
1166 type[0] = MLX4_FS_ALL_DEFAULT;
1167 break;
1168
1169 case IB_FLOW_ATTR_MC_DEFAULT:
1170 type[0] = MLX4_FS_MC_DEFAULT;
1171 break;
1172
1173 case IB_FLOW_ATTR_SNIFFER:
1174 type[0] = MLX4_FS_UC_SNIFFER;
1175 type[1] = MLX4_FS_MC_SNIFFER;
1176 break;
1177
1178 default:
1179 err = -EINVAL;
1180 goto err_free;
1181 }
1182
1183 while (i < ARRAY_SIZE(type) && type[i]) {
1184 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1185 &mflow->reg_id[i].id);
f77c0162 1186 if (err)
571e1b2c 1187 goto err_create_flow;
f77c0162 1188 i++;
146d6e19 1189 if (is_bonded) {
824c25c1
MS		 1190 /* Application always sees one port so the mirror rule
1191 * must be on port #2
1192 */
146d6e19
MS		 1193 flow_attr->port = 2;
1194 err = __mlx4_ib_create_flow(qp, flow_attr,
1195 domain, type[j],
1196 &mflow->reg_id[j].mirror);
1197 flow_attr->port = 1;
1198 if (err)
1199 goto err_create_flow;
1200 j++;
1201 }
1202
f77c0162
HHZ		 1203 }
1204
d2fce8a9 1205 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1206 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1207 &mflow->reg_id[i].id);
d2fce8a9 1208 if (err)
571e1b2c
OG		 1209 goto err_create_flow;
1210 i++;
146d6e19
MS		 1211 if (is_bonded) {
1212 flow_attr->port = 2;
1213 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1214 &mflow->reg_id[j].mirror);
1215 flow_attr->port = 1;
1216 if (err)
1217 goto err_create_flow;
1218 j++;
1219 }
1220 /* function to create mirror rule */
d2fce8a9
OG		 1221 }
1222
f77c0162
HHZ		 1223 return &mflow->ibflow;
1224
571e1b2c
OG		 1225err_create_flow:
1226 while (i) {
146d6e19
MS		 1227 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1228 mflow->reg_id[i].id);
571e1b2c
OG		 1229 i--;
1230 }
146d6e19
MS		 1231
1232 while (j) {
1233 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1234 mflow->reg_id[j].mirror);
1235 j--;
1236 }
f77c0162
HHZ		 1237err_free:
1238 kfree(mflow);
1239 return ERR_PTR(err);
1240}
1241
1242static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1243{
1244 int err, ret = 0;
1245 int i = 0;
1246 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1247 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1248
146d6e19
MS		 1249 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1250 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1251 if (err)
1252 ret = err;
146d6e19
MS		 1253 if (mflow->reg_id[i].mirror) {
1254 err = __mlx4_ib_destroy_flow(mdev->dev,
1255 mflow->reg_id[i].mirror);
1256 if (err)
1257 ret = err;
1258 }
f77c0162
HHZ		 1259 i++;
1260 }
1261
1262 kfree(mflow);
1263 return ret;
1264}
1265
225c7b1f
RD		 1266static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1267{
fa417f7b
EC		 1268 int err;
1269 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1270 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1271 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1272 struct mlx4_ib_steering *ib_steering = NULL;
e9a7faf1 1273 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
146d6e19 1274 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1275
1276 if (mdev->dev->caps.steering_mode ==
1277 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1278 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1279 if (!ib_steering)
1280 return -ENOMEM;
1281 }
fa417f7b 1282
0ff1fb65
HHZ		 1283 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1284 !!(mqp->flags &
1285 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1286 prot, &reg_id.id);
e9a7faf1
OG		 1287 if (err) {
1288 pr_err("multicast attach op failed, err %d\n", err);
0ff1fb65 1289 goto err_malloc;
e9a7faf1 1290 }
fa417f7b 1291
146d6e19
MS		 1292 reg_id.mirror = 0;
1293 if (mlx4_is_bonded(dev)) {
824c25c1
MS		 1294 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1295 (mqp->port == 1) ? 2 : 1,
146d6e19
MS		 1296 !!(mqp->flags &
1297 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1298 prot, &reg_id.mirror);
1299 if (err)
1300 goto err_add;
1301 }
1302
fa417f7b
EC		 1303 err = add_gid_entry(ibqp, gid);
1304 if (err)
1305 goto err_add;
1306
0ff1fb65
HHZ		 1307 if (ib_steering) {
1308 memcpy(ib_steering->gid.raw, gid->raw, 16);
1309 ib_steering->reg_id = reg_id;
1310 mutex_lock(&mqp->mutex);
1311 list_add(&ib_steering->list, &mqp->steering_rules);
1312 mutex_unlock(&mqp->mutex);
1313 }
fa417f7b
EC		 1314 return 0;
1315
1316err_add:
0ff1fb65 1317 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1318 prot, reg_id.id);
1319 if (reg_id.mirror)
1320 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1321 prot, reg_id.mirror);
0ff1fb65
HHZ		 1322err_malloc:
1323 kfree(ib_steering);
1324
fa417f7b
EC		 1325 return err;
1326}
1327
1328static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1329{
1330 struct mlx4_ib_gid_entry *ge;
1331 struct mlx4_ib_gid_entry *tmp;
1332 struct mlx4_ib_gid_entry *ret = NULL;
1333
1334 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1335 if (!memcmp(raw, ge->gid.raw, 16)) {
1336 ret = ge;
1337 break;
1338 }
1339 }
1340
1341 return ret;
225c7b1f
RD		 1342}
1343
1344static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1345{
fa417f7b
EC		 1346 int err;
1347 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1348 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1349 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1350 struct net_device *ndev;
1351 struct mlx4_ib_gid_entry *ge;
146d6e19 1352 struct mlx4_flow_reg_id reg_id = {0, 0};
e9a7faf1 1353 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1354
1355 if (mdev->dev->caps.steering_mode ==
1356 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1357 struct mlx4_ib_steering *ib_steering;
1358
1359 mutex_lock(&mqp->mutex);
1360 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1361 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1362 list_del(&ib_steering->list);
1363 break;
1364 }
1365 }
1366 mutex_unlock(&mqp->mutex);
1367 if (&ib_steering->list == &mqp->steering_rules) {
1368 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1369 return -EINVAL;
1370 }
1371 reg_id = ib_steering->reg_id;
1372 kfree(ib_steering);
1373 }
fa417f7b 1374
0ff1fb65 1375 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1376 prot, reg_id.id);
fa417f7b
EC		 1377 if (err)
1378 return err;
1379
146d6e19
MS		 1380 if (mlx4_is_bonded(dev)) {
1381 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1382 prot, reg_id.mirror);
1383 if (err)
1384 return err;
1385 }
1386
fa417f7b
EC		 1387 mutex_lock(&mqp->mutex);
1388 ge = find_gid_entry(mqp, gid->raw);
1389 if (ge) {
dba3ad2a 1390 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1391 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1392 if (ndev)
1393 dev_hold(ndev);
dba3ad2a 1394 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1395 if (ndev)
fa417f7b 1396 dev_put(ndev);
fa417f7b
EC		 1397 list_del(&ge->list);
1398 kfree(ge);
1399 } else
987c8f8f 1400 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1401
1402 mutex_unlock(&mqp->mutex);
1403
1404 return 0;
225c7b1f
RD		 1405}
1406
1407static int init_node_data(struct mlx4_ib_dev *dev)
1408{
1409 struct ib_smp *in_mad = NULL;
1410 struct ib_smp *out_mad = NULL;
0a9a0188 1411 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1412 int err = -ENOMEM;
1413
1414 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1415 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1416 if (!in_mad || !out_mad)
1417 goto out;
1418
1419 init_query_mad(in_mad);
1420 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1421 if (mlx4_is_master(dev->dev))
1422 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1423
0a9a0188 1424 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1425 if (err)
1426 goto out;
1427
1428 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1429
1430 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1431
0a9a0188 1432 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1433 if (err)
1434 goto out;
1435
992e8e6e 1436 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1437 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1438
1439out:
1440 kfree(in_mad);
1441 kfree(out_mad);
1442 return err;
1443}
1444
f4e91eb4
TJ		 1445static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1446 char *buf)
cd9281d8 1447{
f4e91eb4
TJ		 1448 struct mlx4_ib_dev *dev =
1449 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1450 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1451}
1452
f4e91eb4
TJ		 1453static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1454 char *buf)
cd9281d8 1455{
f4e91eb4
TJ		 1456 struct mlx4_ib_dev *dev =
1457 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1458 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1459 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1460 (int) dev->dev->caps.fw_ver & 0xffff);
1461}
1462
f4e91eb4
TJ		 1463static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1464 char *buf)
cd9281d8 1465{
f4e91eb4
TJ		 1466 struct mlx4_ib_dev *dev =
1467 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1468 return sprintf(buf, "%x\n", dev->dev->rev_id);
1469}
1470
f4e91eb4
TJ		 1471static ssize_t show_board(struct device *device, struct device_attribute *attr,
1472 char *buf)
cd9281d8 1473{
f4e91eb4
TJ		 1474 struct mlx4_ib_dev *dev =
1475 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1476 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1477 dev->dev->board_id);
cd9281d8
JM		 1478}
1479
f4e91eb4
TJ		 1480static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1481static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1482static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1483static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1484
f4e91eb4
TJ		 1485static struct device_attribute *mlx4_class_attributes[] = {
1486 &dev_attr_hw_rev,
1487 &dev_attr_fw_ver,
1488 &dev_attr_hca_type,
1489 &dev_attr_board_id
cd9281d8
JM		 1490};
1491
acc4fccf
MS		 1492static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1493 struct net_device *dev)
1494{
1495 memcpy(eui, dev->dev_addr, 3);
1496 memcpy(eui + 5, dev->dev_addr + 3, 3);
1497 if (vlan_id < 0x1000) {
1498 eui[3] = vlan_id >> 8;
1499 eui[4] = vlan_id & 0xff;
1500 } else {
1501 eui[3] = 0xff;
1502 eui[4] = 0xfe;
1503 }
1504 eui[0] ^= 2;
1505}
1506
fa417f7b
EC		 1507static void update_gids_task(struct work_struct *work)
1508{
1509 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1510 struct mlx4_cmd_mailbox *mailbox;
1511 union ib_gid *gids;
1512 int err;
1513 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1514 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1515
4bf9715f
MS		 1516 if (!gw->dev->ib_active)
1517 return;
1518
fa417f7b
EC		 1519 mailbox = mlx4_alloc_cmd_mailbox(dev);
1520 if (IS_ERR(mailbox)) {
987c8f8f 1521 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1522 return;
1523 }
1524
1525 gids = mailbox->buf;
1526 memcpy(gids, gw->gids, sizeof gw->gids);
1527
1528 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590
IS		 1529 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1530 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
fa417f7b 1531 if (err)
987c8f8f 1532 pr_warn("set port command failed\n");
d487ee77 1533 else
a5750090
MS		 1534 if ((gw->port == 1) || !is_bonded)
1535 mlx4_ib_dispatch_event(gw->dev,
1536 is_bonded ? 1 : gw->port,
1537 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1538
1539 mlx4_free_cmd_mailbox(dev, mailbox);
1540 kfree(gw);
1541}
1542
d487ee77 1543static void reset_gids_task(struct work_struct *work)
fa417f7b 1544{
d487ee77
MS		 1545 struct update_gid_work *gw =
1546 container_of(work, struct update_gid_work, work);
1547 struct mlx4_cmd_mailbox *mailbox;
1548 union ib_gid *gids;
1549 int err;
d487ee77 1550 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1551
4bf9715f
MS		 1552 if (!gw->dev->ib_active)
1553 return;
1554
d487ee77
MS		 1555 mailbox = mlx4_alloc_cmd_mailbox(dev);
1556 if (IS_ERR(mailbox)) {
1557 pr_warn("reset gid table failed\n");
1558 goto free;
1559 }
fa417f7b 1560
d487ee77
MS		 1561 gids = mailbox->buf;
1562 memcpy(gids, gw->gids, sizeof(gw->gids));
1563
5071456f
MS		 1564 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1565 IB_LINK_LAYER_ETHERNET) {
1566 err = mlx4_cmd(dev, mailbox->dma,
1567 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590 1568 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
5071456f
MS		 1569 MLX4_CMD_TIME_CLASS_B,
1570 MLX4_CMD_WRAPPED);
1571 if (err)
f4f01b54 1572 pr_warn("set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1573 }
1574
d487ee77
MS		 1575 mlx4_free_cmd_mailbox(dev, mailbox);
1576free:
1577 kfree(gw);
1578}
4c3eb3ca 1579
d487ee77 1580static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1581 union ib_gid *gid, int clear,
1582 int default_gid)
d487ee77
MS		 1583{
1584 struct update_gid_work *work;
1585 int i;
1586 int need_update = 0;
1587 int free = -1;
1588 int found = -1;
1589 int max_gids;
1590
acc4fccf
MS		 1591 if (default_gid) {
1592 free = 0;
1593 } else {
1594 max_gids = dev->dev->caps.gid_table_len[port];
1595 for (i = 1; i < max_gids; ++i) {
1596 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1597 sizeof(*gid)))
acc4fccf
MS		 1598 found = i;
1599
1600 if (clear) {
1601 if (found >= 0) {
1602 need_update = 1;
1603 dev->iboe.gid_table[port - 1][found] =
1604 zgid;
1605 break;
1606 }
1607 } else {
1608 if (found >= 0)
1609 break;
1610
1611 if (free < 0 &&
1612 !memcmp(&dev->iboe.gid_table[port - 1][i],
1613 &zgid, sizeof(*gid)))
1614 free = i;
1615 }
4c3eb3ca 1616 }
fa417f7b 1617 }
4c3eb3ca 1618
d487ee77
MS		 1619 if (found == -1 && !clear && free >= 0) {
1620 dev->iboe.gid_table[port - 1][free] = *gid;
1621 need_update = 1;
1622 }
fa417f7b 1623
d487ee77
MS		 1624 if (!need_update)
1625 return 0;
1626
1627 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1628 if (!work)
1629 return -ENOMEM;
1630
1631 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1632 INIT_WORK(&work->work, update_gids_task);
1633 work->port = port;
1634 work->dev = dev;
1635 queue_work(wq, &work->work);
fa417f7b
EC		 1636
1637 return 0;
d487ee77 1638}
4c3eb3ca 1639
acc4fccf 1640static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1641{
acc4fccf
MS		 1642 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1643 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1644}
1645
d487ee77 1646
5071456f 1647static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1648{
1649 struct update_gid_work *work;
d487ee77
MS		 1650
1651 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1652 if (!work)
1653 return -ENOMEM;
5071456f
MS		 1654
1655 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1656 memset(work->gids, 0, sizeof(work->gids));
1657 INIT_WORK(&work->work, reset_gids_task);
1658 work->dev = dev;
5071456f 1659 work->port = port;
d487ee77
MS		 1660 queue_work(wq, &work->work);
1661 return 0;
fa417f7b
EC		 1662}
1663
d487ee77
MS		 1664static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1665 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1666{
d487ee77
MS		 1667 struct mlx4_ib_iboe *iboe;
1668 int port = 0;
1669 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1670 rdma_vlan_dev_real_dev(event_netdev) :
1671 event_netdev;
acc4fccf
MS		 1672 union ib_gid default_gid;
1673
1674 mlx4_make_default_gid(real_dev, &default_gid);
1675
1676 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1677 return 0;
d487ee77
MS		 1678
1679 if (event != NETDEV_DOWN && event != NETDEV_UP)
1680 return 0;
1681
1682 if ((real_dev != event_netdev) &&
1683 (event == NETDEV_DOWN) &&
1684 rdma_link_local_addr((struct in6_addr *)gid))
1685 return 0;
1686
1687 iboe = &ibdev->iboe;
dba3ad2a 1688 spin_lock_bh(&iboe->lock);
d487ee77 1689
82373701 1690 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1691 if ((netif_is_bond_master(real_dev) &&
1692 (real_dev == iboe->masters[port - 1])) ||
1693 (!netif_is_bond_master(real_dev) &&
1694 (real_dev == iboe->netdevs[port - 1])))
1695 update_gid_table(ibdev, port, gid,
acc4fccf 1696 event == NETDEV_DOWN, 0);
d487ee77 1697
dba3ad2a 1698 spin_unlock_bh(&iboe->lock);
d487ee77 1699 return 0;
fa417f7b 1700
fa417f7b
EC		 1701}
1702
d487ee77
MS		 1703static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1704 struct mlx4_ib_dev *ibdev)
fa417f7b 1705{
d487ee77
MS		 1706 u8 port = 0;
1707 struct mlx4_ib_iboe *iboe;
1708 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1709 rdma_vlan_dev_real_dev(dev) : dev;
1710
1711 iboe = &ibdev->iboe;
d487ee77 1712
82373701 1713 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1714 if ((netif_is_bond_master(real_dev) &&
1715 (real_dev == iboe->masters[port - 1])) ||
1716 (!netif_is_bond_master(real_dev) &&
1717 (real_dev == iboe->netdevs[port - 1])))
1718 break;
1719
82373701 1720 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1721 return 0;
1722 else
1723 return port;
fa417f7b
EC		 1724}
1725
d487ee77
MS		 1726static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1727 void *ptr)
fa417f7b 1728{
d487ee77
MS		 1729 struct mlx4_ib_dev *ibdev;
1730 struct in_ifaddr *ifa = ptr;
1731 union ib_gid gid;
1732 struct net_device *event_netdev = ifa->ifa_dev->dev;
1733
1734 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1735
1736 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1737
1738 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1739 return NOTIFY_DONE;
fa417f7b
EC		 1740}
1741
27cdef63 1742#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1743static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1744 void *ptr)
1745{
fa417f7b 1746 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1747 struct inet6_ifaddr *ifa = ptr;
1748 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1749 struct net_device *event_netdev = ifa->idev->dev;
1750
1751 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1752
1753 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1754 return NOTIFY_DONE;
1755}
1756#endif
1757
9433c188
MB		 1758#define MLX4_IB_INVALID_MAC ((u64)-1)
1759static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1760 struct net_device *dev,
1761 int port)
1762{
1763 u64 new_smac = 0;
1764 u64 release_mac = MLX4_IB_INVALID_MAC;
1765 struct mlx4_ib_qp *qp;
1766
1767 read_lock(&dev_base_lock);
1768 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1769 read_unlock(&dev_base_lock);
1770
3e0629cb
JM		 1771 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1772
d24d9f43
JM		 1773 /* no need for update QP1 and mac registration in non-SRIOV */
1774 if (!mlx4_is_mfunc(ibdev->dev))
1775 return;
1776
9433c188
MB		 1777 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1778 qp = ibdev->qp1_proxy[port - 1];
1779 if (qp) {
1780 int new_smac_index;
25476b02 1781 u64 old_smac;
9433c188
MB		 1782 struct mlx4_update_qp_params update_params;
1783
25476b02
JM		 1784 mutex_lock(&qp->mutex);
1785 old_smac = qp->pri.smac;
9433c188
MB		 1786 if (new_smac == old_smac)
1787 goto unlock;
1788
1789 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1790
1791 if (new_smac_index < 0)
1792 goto unlock;
1793
1794 update_params.smac_index = new_smac_index;
09e05c3f 1795 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1796 &update_params)) {
1797 release_mac = new_smac;
1798 goto unlock;
1799 }
25476b02
JM		 1800 /* if old port was zero, no mac was yet registered for this QP */
1801 if (qp->pri.smac_port)
1802 release_mac = old_smac;
9433c188 1803 qp->pri.smac = new_smac;
25476b02 1804 qp->pri.smac_port = port;
9433c188 1805 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1806 }
1807
1808unlock:
9433c188
MB		 1809 if (release_mac != MLX4_IB_INVALID_MAC)
1810 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1811 if (qp)
1812 mutex_unlock(&qp->mutex);
1813 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1814}
1815
d487ee77
MS		 1816static void mlx4_ib_get_dev_addr(struct net_device *dev,
1817 struct mlx4_ib_dev *ibdev, u8 port)
1818{
1819 struct in_device *in_dev;
27cdef63 1820#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1821 struct inet6_dev *in6_dev;
1822 union ib_gid *pgid;
1823 struct inet6_ifaddr *ifp;
f5c4834d 1824 union ib_gid default_gid;
d487ee77
MS		 1825#endif
1826 union ib_gid gid;
1827
1828
82373701 1829 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1830 return;
1831
1832 /* IPv4 gids */
1833 in_dev = in_dev_get(dev);
1834 if (in_dev) {
1835 for_ifa(in_dev) {
1836 /*ifa->ifa_address;*/
1837 ipv6_addr_set_v4mapped(ifa->ifa_address,
1838 (struct in6_addr *)&gid);
acc4fccf 1839 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1840 }
1841 endfor_ifa(in_dev);
1842 in_dev_put(in_dev);
1843 }
27cdef63 1844#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1845 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1846 /* IPv6 gids */
1847 in6_dev = in6_dev_get(dev);
1848 if (in6_dev) {
1849 read_lock_bh(&in6_dev->lock);
1850 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1851 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1852 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1853 continue;
acc4fccf 1854 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1855 }
1856 read_unlock_bh(&in6_dev->lock);
1857 in6_dev_put(in6_dev);
1858 }
1859#endif
1860}
1861
acc4fccf
MS		 1862static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1863 struct net_device *dev, u8 port)
1864{
1865 union ib_gid gid;
1866 mlx4_make_default_gid(dev, &gid);
1867 update_gid_table(ibdev, port, &gid, 0, 1);
1868}
1869
d487ee77
MS		 1870static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1871{
1872 struct net_device *dev;
ddf8bd34 1873 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1874 int i;
655b2aae 1875 int err = 0;
d487ee77 1876
655b2aae
MS		 1877 for (i = 1; i <= ibdev->num_ports; ++i) {
1878 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1879 IB_LINK_LAYER_ETHERNET) {
1880 err = reset_gid_table(ibdev, i);
1881 if (err)
1882 goto out;
1883 }
1884 }
d487ee77
MS		 1885
1886 read_lock(&dev_base_lock);
dba3ad2a 1887 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1888
1889 for_each_netdev(&init_net, dev) {
1890 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1891 /* port will be non-zero only for ETH ports */
1892 if (port) {
1893 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1894 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1895 }
d487ee77
MS		 1896 }
1897
dba3ad2a 1898 spin_unlock_bh(&iboe->lock);
d487ee77 1899 read_unlock(&dev_base_lock);
655b2aae
MS		 1900out:
1901 return err;
d487ee77
MS		 1902}
1903
9433c188
MB		 1904static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1905 struct net_device *dev,
1906 unsigned long event)
1907
d487ee77 1908{
fa417f7b 1909 struct mlx4_ib_iboe *iboe;
9433c188 1910 int update_qps_port = -1;
fa417f7b
EC		 1911 int port;
1912
fa417f7b
EC		 1913 iboe = &ibdev->iboe;
1914
dba3ad2a 1915 spin_lock_bh(&iboe->lock);
fa417f7b 1916 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1917 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1918 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1919 struct net_device *curr_netdev;
d487ee77 1920 struct net_device *curr_master;
ad4885d2 1921
fa417f7b 1922 iboe->netdevs[port - 1] =
0345584e 1923 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1924 if (iboe->netdevs[port - 1])
1925 mlx4_ib_set_default_gid(ibdev,
1926 iboe->netdevs[port - 1], port);
ad4885d2 1927 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1928
1929 if (iboe->netdevs[port - 1] &&
1930 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1931 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1932 iboe->netdevs[port - 1]);
ad4885d2
MS		 1933 } else {
1934 iboe->masters[port - 1] = NULL;
fa417f7b 1935 }
d487ee77 1936 curr_master = iboe->masters[port - 1];
fa417f7b 1937
9433c188
MB		 1938 if (dev == iboe->netdevs[port - 1] &&
1939 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1940 event == NETDEV_UP || event == NETDEV_CHANGE))
1941 update_qps_port = port;
1942
ad4885d2
MS		 1943 if (curr_netdev) {
1944 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1945 IB_PORT_ACTIVE : IB_PORT_DOWN;
1946 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1947 if (curr_master) {
1948 /* if using bonding/team and a slave port is down, we
1949 * don't want the bond IP based gids in the table since
1950 * flows that select port by gid may get the down port.
1951 */
a5750090
MS		 1952 if (port_state == IB_PORT_DOWN &&
1953 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 1954 reset_gid_table(ibdev, port);
1955 mlx4_ib_set_default_gid(ibdev,
1956 curr_netdev,
1957 port);
1958 } else {
1959 /* gids from the upper dev (bond/team)
1960 * should appear in port's gid table
1961 */
1962 mlx4_ib_get_dev_addr(curr_master,
1963 ibdev, port);
1964 }
e381835c
MS		 1965 }
1966 /* if bonding is used it is possible that we add it to
1967 * masters only after IP address is assigned to the
1968 * net bonding interface.
1969 */
1970 if (curr_master && (old_master != curr_master)) {
1971 reset_gid_table(ibdev, port);
1972 mlx4_ib_set_default_gid(ibdev,
1973 curr_netdev, port);
1974 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1975 }
ad4885d2 1976
e381835c
MS		 1977 if (!curr_master && (old_master != curr_master)) {
1978 reset_gid_table(ibdev, port);
1979 mlx4_ib_set_default_gid(ibdev,
1980 curr_netdev, port);
1981 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1982 }
1983 } else {
ad4885d2 1984 reset_gid_table(ibdev, port);
ad4885d2 1985 }
d487ee77 1986 }
fa417f7b 1987
dba3ad2a 1988 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1989
1990 if (update_qps_port > 0)
1991 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 1992}
1993
1994static int mlx4_ib_netdev_event(struct notifier_block *this,
1995 unsigned long event, void *ptr)
1996{
1997 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1998 struct mlx4_ib_dev *ibdev;
1999
2000 if (!net_eq(dev_net(dev), &init_net))
2001 return NOTIFY_DONE;
2002
2003 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2004 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2005
2006 return NOTIFY_DONE;
2007}
2008
54679e14
JM		 2009static void init_pkeys(struct mlx4_ib_dev *ibdev)
2010{
2011 int port;
2012 int slave;
2013 int i;
2014
2015 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2016 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2017 ++slave) {
54679e14
JM		 2018 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2019 for (i = 0;
2020 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2021 ++i) {
2022 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2023 /* master has the identity virt2phys pkey mapping */
2024 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2025 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2026 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2027 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2028 }
2029 }
2030 }
2031 /* initialize pkey cache */
2032 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2033 for (i = 0;
2034 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2035 ++i)
2036 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2037 (i) ? 0 : 0xFFFF;
2038 }
2039 }
2040}
2041
e605b743
SP		 2042static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2043{
4661bd79 2044 char name[80];
e605b743
SP		 2045 int eq_per_port = 0;
2046 int added_eqs = 0;
2047 int total_eqs = 0;
2048 int i, j, eq;
2049
3aac6ff1
SP		 2050 /* Legacy mode or comp_pool is not large enough */
2051 if (dev->caps.comp_pool == 0 ||
2052 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2053 return;
2054
7ae0e400 2055 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2056
2057 /* Init eq table */
2058 added_eqs = 0;
2059 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2060 added_eqs += eq_per_port;
2061
2062 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2063
2064 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2065 if (!ibdev->eq_table)
2066 return;
2067
2068 ibdev->eq_added = added_eqs;
2069
2070 eq = 0;
2071 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2072 for (j = 0; j < eq_per_port; j++) {
4661bd79 2073 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2074 i, j, dev->persist->pdev->bus->name);
e605b743 2075 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2076 if (mlx4_assign_eq(dev, name, NULL,
2077 &ibdev->eq_table[eq])) {
e605b743
SP		 2078 /* Use legacy (same as mlx4_en driver) */
2079 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2080 ibdev->eq_table[eq] =
2081 (eq % dev->caps.num_comp_vectors);
2082 }
2083 eq++;
2084 }
2085 }
2086
2087 /* Fill the reset of the vector with legacy EQ */
2088 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2089 ibdev->eq_table[eq++] = i;
2090
2091 /* Advertise the new number of EQs to clients */
2092 ibdev->ib_dev.num_comp_vectors = total_eqs;
2093}
2094
2095static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2096{
2097 int i;
3aac6ff1
SP		 2098
2099 /* no additional eqs were added */
2100 if (!ibdev->eq_table)
2101 return;
e605b743
SP		 2102
2103 /* Reset the advertised EQ number */
2104 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2105
2106 /* Free only the added eqs */
2107 for (i = 0; i < ibdev->eq_added; i++) {
2108 /* Don't free legacy eqs if used */
2109 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2110 continue;
2111 mlx4_release_eq(dev, ibdev->eq_table[i]);
2112 }
2113
e605b743 2114 kfree(ibdev->eq_table);
e605b743
SP		 2115}
2116
225c7b1f
RD		 2117static void *mlx4_ib_add(struct mlx4_dev *dev)
2118{
2119 struct mlx4_ib_dev *ibdev;
22e7ef9c 2120 int num_ports = 0;
035b1032 2121 int i, j;
fa417f7b
EC		 2122 int err;
2123 struct mlx4_ib_iboe *iboe;
4196670b 2124 int ib_num_ports = 0;
a5750090 2125 int num_req_counters;
225c7b1f 2126
987c8f8f 2127 pr_info_once("%s", mlx4_ib_version);
68f3948d 2128
026149cb 2129 num_ports = 0;
fa417f7b 2130 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2131 num_ports++;
2132
2133 /* No point in registering a device with no ports... */
2134 if (num_ports == 0)
2135 return NULL;
2136
225c7b1f
RD		 2137 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2138 if (!ibdev) {
872bf2fb
YH		 2139 dev_err(&dev->persist->pdev->dev,
2140 "Device struct alloc failed\n");
225c7b1f
RD		 2141 return NULL;
2142 }
2143
fa417f7b
EC		 2144 iboe = &ibdev->iboe;
2145
225c7b1f
RD		 2146 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2147 goto err_dealloc;
2148
2149 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2150 goto err_pd;
2151
4979d18f
RD		 2152 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2153 PAGE_SIZE);
225c7b1f
RD		 2154 if (!ibdev->uar_map)
2155 goto err_uar;
26c6bc7b 2156 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2157
225c7b1f 2158 ibdev->dev = dev;
c6215745 2159 ibdev->bond_next_port = 0;
225c7b1f
RD		 2160
2161 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2162 ibdev->ib_dev.owner = THIS_MODULE;
2163 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2164 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2165 ibdev->num_ports = num_ports;
a5750090
MS		 2166 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2167 1 : ibdev->num_ports;
b8dd786f 2168 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2169 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2170
08ff3235
OG		 2171 if (dev->caps.userspace_caps)
2172 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2173 else
2174 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2175
225c7b1f
RD		 2176 ibdev->ib_dev.uverbs_cmd_mask =
2177 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2178 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2179 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2180 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2181 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2182 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2183 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2184 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2185 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2186 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2187 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2188 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2189 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2190 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2191 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2192 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2193 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2194 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2195 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2196 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2197 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2198 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2199 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2200 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2201
2202 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2203 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2204 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2205 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2206 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2207 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2208 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2209 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2210 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2211 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2212 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2213 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2214 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2215 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2216 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2217 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2218 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2219 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2220 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2221 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2222 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2223 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2224 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2225 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2226 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2227 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2228 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2229 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2230 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2231 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2232 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2233 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2234 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2235 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2236 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2237 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2238 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2239 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2240 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2241 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2242 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2243 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2244
992e8e6e
JM		 2245 if (!mlx4_is_slave(ibdev->dev)) {
2246 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2247 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2248 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2249 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2250 }
8ad11fb6 2251
b425388d
SM		 2252 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2253 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2254 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2255 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2256 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2257
2258 ibdev->ib_dev.uverbs_cmd_mask |=
2259 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2260 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2261 }
2262
012a8ff5
SH		 2263 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2264 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2265 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2266 ibdev->ib_dev.uverbs_cmd_mask |=
2267 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2268 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2269 }
2270
f77c0162 2271 if (check_flow_steering_support(dev)) {
0a9b7d59 2272 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2273 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2274 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2275
f21519b2
YD		 2276 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2277 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2278 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2279 }
2280
e605b743
SP		 2281 mlx4_ib_alloc_eqs(dev, ibdev);
2282
fa417f7b
EC		 2283 spin_lock_init(&iboe->lock);
2284
225c7b1f
RD		 2285 if (init_node_data(ibdev))
2286 goto err_map;
2287
a5750090
MS		 2288 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2289 for (i = 0; i < num_req_counters; ++i) {
9433c188 2290 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2291 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2292 IB_LINK_LAYER_ETHERNET) {
2293 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2294 if (err)
2295 ibdev->counters[i] = -1;
3839d8ac
DC		 2296 } else {
2297 ibdev->counters[i] = -1;
2298 }
cfcde11c 2299 }
a5750090
MS		 2300 if (mlx4_is_bonded(dev))
2301 for (i = 1; i < ibdev->num_ports ; ++i)
2302 ibdev->counters[i] = ibdev->counters[0];
2303
cfcde11c 2304
4196670b
MB		 2305 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2306 ib_num_ports++;
2307
225c7b1f
RD		 2308 spin_lock_init(&ibdev->sm_lock);
2309 mutex_init(&ibdev->cap_mask_mutex);
35f05dab
YH		 2310 INIT_LIST_HEAD(&ibdev->qp_list);
2311 spin_lock_init(&ibdev->reset_flow_resource_lock);
225c7b1f 2312
4196670b
MB		 2313 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2314 ib_num_ports) {
c1c98501
MB		 2315 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2316 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2317 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2318 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2319 if (err)
2320 goto err_counter;
2321
2322 ibdev->ib_uc_qpns_bitmap =
2323 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2324 sizeof(long),
2325 GFP_KERNEL);
2326 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2327 dev_err(&dev->persist->pdev->dev,
2328 "bit map alloc failed\n");
c1c98501
MB		 2329 goto err_steer_qp_release;
2330 }
2331
2332 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2333
2334 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2335 dev, ibdev->steer_qpn_base,
2336 ibdev->steer_qpn_base +
2337 ibdev->steer_qpn_count - 1);
2338 if (err)
2339 goto err_steer_free_bitmap;
2340 }
2341
3e0629cb
JM		 2342 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2343 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2344
9a6edb60 2345 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2346 goto err_steer_free_bitmap;
225c7b1f
RD		 2347
2348 if (mlx4_ib_mad_init(ibdev))
2349 goto err_reg;
2350
fc06573d
JM		 2351 if (mlx4_ib_init_sriov(ibdev))
2352 goto err_mad;
2353
d487ee77
MS		 2354 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2355 if (!iboe->nb.notifier_call) {
2356 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2357 err = register_netdevice_notifier(&iboe->nb);
2358 if (err) {
2359 iboe->nb.notifier_call = NULL;
2360 goto err_notif;
2361 }
2362 }
2363 if (!iboe->nb_inet.notifier_call) {
2364 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2365 err = register_inetaddr_notifier(&iboe->nb_inet);
2366 if (err) {
2367 iboe->nb_inet.notifier_call = NULL;
2368 goto err_notif;
2369 }
2370 }
27cdef63 2371#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2372 if (!iboe->nb_inet6.notifier_call) {
2373 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2374 err = register_inet6addr_notifier(&iboe->nb_inet6);
2375 if (err) {
2376 iboe->nb_inet6.notifier_call = NULL;
2377 goto err_notif;
2378 }
2379 }
2380#endif
655b2aae
MS		 2381 if (mlx4_ib_init_gid_table(ibdev))
2382 goto err_notif;
fa417f7b
EC		 2383 }
2384
035b1032 2385 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2386 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2387 mlx4_class_attributes[j]))
fa417f7b 2388 goto err_notif;
cd9281d8
JM		 2389 }
2390
3b4a8cd5
JM		 2391 ibdev->ib_active = true;
2392
54679e14
JM		 2393 if (mlx4_is_mfunc(ibdev->dev))
2394 init_pkeys(ibdev);
2395
3806d08c
JM		 2396 /* create paravirt contexts for any VFs which are active */
2397 if (mlx4_is_master(ibdev->dev)) {
2398 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2399 if (j == mlx4_master_func_num(ibdev->dev))
2400 continue;
2401 if (mlx4_is_slave_active(ibdev->dev, j))
2402 do_slave_init(ibdev, j, 1);
2403 }
2404 }
225c7b1f
RD		 2405 return ibdev;
2406
fa417f7b 2407err_notif:
d487ee77
MS		 2408 if (ibdev->iboe.nb.notifier_call) {
2409 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2410 pr_warn("failure unregistering notifier\n");
2411 ibdev->iboe.nb.notifier_call = NULL;
2412 }
2413 if (ibdev->iboe.nb_inet.notifier_call) {
2414 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2415 pr_warn("failure unregistering notifier\n");
2416 ibdev->iboe.nb_inet.notifier_call = NULL;
2417 }
27cdef63 2418#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2419 if (ibdev->iboe.nb_inet6.notifier_call) {
2420 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2421 pr_warn("failure unregistering notifier\n");
2422 ibdev->iboe.nb_inet6.notifier_call = NULL;
2423 }
2424#endif
fa417f7b
EC		 2425 flush_workqueue(wq);
2426
fc06573d
JM		 2427 mlx4_ib_close_sriov(ibdev);
2428
2429err_mad:
2430 mlx4_ib_mad_cleanup(ibdev);
2431
225c7b1f
RD		 2432err_reg:
2433 ib_unregister_device(&ibdev->ib_dev);
2434
c1c98501
MB		 2435err_steer_free_bitmap:
2436 kfree(ibdev->ib_uc_qpns_bitmap);
2437
2438err_steer_qp_release:
2439 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2440 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2441 ibdev->steer_qpn_count);
cfcde11c
OG		 2442err_counter:
2443 for (; i; --i)
4af3ce0d
RD		 2444 if (ibdev->counters[i - 1] != -1)
2445 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2446
225c7b1f
RD		 2447err_map:
2448 iounmap(ibdev->uar_map);
2449
2450err_uar:
2451 mlx4_uar_free(dev, &ibdev->priv_uar);
2452
2453err_pd:
2454 mlx4_pd_free(dev, ibdev->priv_pdn);
2455
2456err_dealloc:
2457 ib_dealloc_device(&ibdev->ib_dev);
2458
2459 return NULL;
2460}
2461
c1c98501
MB		 2462int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2463{
2464 int offset;
2465
2466 WARN_ON(!dev->ib_uc_qpns_bitmap);
2467
2468 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2469 dev->steer_qpn_count,
2470 get_count_order(count));
2471 if (offset < 0)
2472 return offset;
2473
2474 *qpn = dev->steer_qpn_base + offset;
2475 return 0;
2476}
2477
2478void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2479{
2480 if (!qpn ||
2481 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2482 return;
2483
2484 BUG_ON(qpn < dev->steer_qpn_base);
2485
2486 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2487 qpn - dev->steer_qpn_base,
2488 get_count_order(count));
2489}
2490
2491int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2492 int is_attach)
2493{
2494 int err;
2495 size_t flow_size;
2496 struct ib_flow_attr *flow = NULL;
2497 struct ib_flow_spec_ib *ib_spec;
2498
2499 if (is_attach) {
2500 flow_size = sizeof(struct ib_flow_attr) +
2501 sizeof(struct ib_flow_spec_ib);
2502 flow = kzalloc(flow_size, GFP_KERNEL);
2503 if (!flow)
2504 return -ENOMEM;
2505 flow->port = mqp->port;
2506 flow->num_of_specs = 1;
2507 flow->size = flow_size;
2508 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2509 ib_spec->type = IB_FLOW_SPEC_IB;
2510 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2511 /* Add an empty rule for IB L2 */
2512 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2513
2514 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2515 IB_FLOW_DOMAIN_NIC,
2516 MLX4_FS_REGULAR,
2517 &mqp->reg_id);
2518 } else {
2519 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2520 }
2521 kfree(flow);
2522 return err;
2523}
2524
225c7b1f
RD		 2525static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2526{
2527 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2528 int p;
2529
4bf9715f
MS		 2530 ibdev->ib_active = false;
2531 flush_workqueue(wq);
2532
fc06573d 2533 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2534 mlx4_ib_mad_cleanup(ibdev);
2535 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2536 if (ibdev->iboe.nb.notifier_call) {
2537 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2538 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2539 ibdev->iboe.nb.notifier_call = NULL;
2540 }
c1c98501
MB		 2541
2542 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2543 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2544 ibdev->steer_qpn_count);
2545 kfree(ibdev->ib_uc_qpns_bitmap);
2546 }
2547
d487ee77
MS		 2548 if (ibdev->iboe.nb_inet.notifier_call) {
2549 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2550 pr_warn("failure unregistering notifier\n");
2551 ibdev->iboe.nb_inet.notifier_call = NULL;
2552 }
27cdef63 2553#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2554 if (ibdev->iboe.nb_inet6.notifier_call) {
2555 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2556 pr_warn("failure unregistering notifier\n");
2557 ibdev->iboe.nb_inet6.notifier_call = NULL;
2558 }
2559#endif
fb1b5034 2560
fa417f7b 2561 iounmap(ibdev->uar_map);
cfcde11c 2562 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2563 if (ibdev->counters[p] != -1)
2564 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2565 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2566 mlx4_CLOSE_PORT(dev, p);
2567
e605b743
SP		 2568 mlx4_ib_free_eqs(dev, ibdev);
2569
225c7b1f
RD		 2570 mlx4_uar_free(dev, &ibdev->priv_uar);
2571 mlx4_pd_free(dev, ibdev->priv_pdn);
2572 ib_dealloc_device(&ibdev->ib_dev);
2573}
2574
fc06573d
JM		 2575static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2576{
2577 struct mlx4_ib_demux_work **dm = NULL;
2578 struct mlx4_dev *dev = ibdev->dev;
2579 int i;
2580 unsigned long flags;
449fc488
MB		 2581 struct mlx4_active_ports actv_ports;
2582 unsigned int ports;
2583 unsigned int first_port;
fc06573d
JM		 2584
2585 if (!mlx4_is_master(dev))
2586 return;
2587
449fc488
MB		 2588 actv_ports = mlx4_get_active_ports(dev, slave);
2589 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2590 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2591
2592 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2593 if (!dm) {
2594 pr_err("failed to allocate memory for tunneling qp update\n");
2595 goto out;
2596 }
2597
449fc488 2598 for (i = 0; i < ports; i++) {
fc06573d
JM		 2599 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2600 if (!dm[i]) {
2601 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2602 for (i = 0; i < dev->caps.num_ports; i++) {
2603 if (dm[i])
2604 kfree(dm[i]);
2605 }
2606 goto out;
2607 }
2608 }
2609 /* initialize or tear down tunnel QPs for the slave */
449fc488 2610 for (i = 0; i < ports; i++) {
fc06573d 2611 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2612 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2613 dm[i]->slave = slave;
2614 dm[i]->do_init = do_init;
2615 dm[i]->dev = ibdev;
2616 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2617 if (!ibdev->sriov.is_going_down)
2618 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2619 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2620 }
2621out:
c89d1271 2622 kfree(dm);
fc06573d
JM		 2623 return;
2624}
2625
35f05dab
YH		 2626static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2627{
2628 struct mlx4_ib_qp *mqp;
2629 unsigned long flags_qp;
2630 unsigned long flags_cq;
2631 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2632 struct list_head cq_notify_list;
2633 struct mlx4_cq *mcq;
2634 unsigned long flags;
2635
2636 pr_warn("mlx4_ib_handle_catas_error was started\n");
2637 INIT_LIST_HEAD(&cq_notify_list);
2638
2639 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2640 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2641
2642 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2643 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2644 if (mqp->sq.tail != mqp->sq.head) {
2645 send_mcq = to_mcq(mqp->ibqp.send_cq);
2646 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2647 if (send_mcq->mcq.comp &&
2648 mqp->ibqp.send_cq->comp_handler) {
2649 if (!send_mcq->mcq.reset_notify_added) {
2650 send_mcq->mcq.reset_notify_added = 1;
2651 list_add_tail(&send_mcq->mcq.reset_notify,
2652 &cq_notify_list);
2653 }
2654 }
2655 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2656 }
2657 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2658 /* Now, handle the QP's receive queue */
2659 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2660 /* no handling is needed for SRQ */
2661 if (!mqp->ibqp.srq) {
2662 if (mqp->rq.tail != mqp->rq.head) {
2663 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2664 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2665 if (recv_mcq->mcq.comp &&
2666 mqp->ibqp.recv_cq->comp_handler) {
2667 if (!recv_mcq->mcq.reset_notify_added) {
2668 recv_mcq->mcq.reset_notify_added = 1;
2669 list_add_tail(&recv_mcq->mcq.reset_notify,
2670 &cq_notify_list);
2671 }
2672 }
2673 spin_unlock_irqrestore(&recv_mcq->lock,
2674 flags_cq);
2675 }
2676 }
2677 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2678 }
2679
2680 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2681 mcq->comp(mcq);
2682 }
2683 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2684 pr_warn("mlx4_ib_handle_catas_error ended\n");
2685}
2686
a5750090
MS		 2687static void handle_bonded_port_state_event(struct work_struct *work)
2688{
2689 struct ib_event_work *ew =
2690 container_of(work, struct ib_event_work, work);
2691 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2692 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2693 int i;
2694 struct ib_event ibev;
2695
2696 kfree(ew);
2697 spin_lock_bh(&ibdev->iboe.lock);
2698 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2699 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
217e8b16 2700 enum ib_port_state curr_port_state;
a5750090 2701
217e8b16
MS		 2702 if (!curr_netdev)
2703 continue;
2704
2705 curr_port_state =
a5750090
MS		 2706 (netif_running(curr_netdev) &&
2707 netif_carrier_ok(curr_netdev)) ?
2708 IB_PORT_ACTIVE : IB_PORT_DOWN;
2709
2710 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2711 curr_port_state : IB_PORT_ACTIVE;
2712 }
2713 spin_unlock_bh(&ibdev->iboe.lock);
2714
2715 ibev.device = &ibdev->ib_dev;
2716 ibev.element.port_num = 1;
2717 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2718 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2719
2720 ib_dispatch_event(&ibev);
2721}
2722
225c7b1f 2723static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2724 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2725{
2726 struct ib_event ibev;
7ff93f8b 2727 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2728 struct mlx4_eqe *eqe = NULL;
2729 struct ib_event_work *ew;
fc06573d 2730 int p = 0;
00f5ce99 2731
a5750090
MS		 2732 if (mlx4_is_bonded(dev) &&
2733 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2734 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2735 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2736 if (!ew)
2737 return;
2738 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2739 ew->ib_dev = ibdev;
2740 queue_work(wq, &ew->work);
2741 return;
2742 }
2743
00f5ce99
JM		 2744 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2745 eqe = (struct mlx4_eqe *)param;
2746 else
fc06573d 2747 p = (int) param;
225c7b1f
RD		 2748
2749 switch (event) {
37608eea 2750 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2751 if (p > ibdev->num_ports)
2752 return;
a0c64a17
JM		 2753 if (mlx4_is_master(dev) &&
2754 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2755 IB_LINK_LAYER_INFINIBAND) {
2756 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2757 }
37608eea 2758 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2759 break;
2760
37608eea 2761 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2762 if (p > ibdev->num_ports)
2763 return;
37608eea
RD		 2764 ibev.event = IB_EVENT_PORT_ERR;
2765 break;
2766
2767 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2768 ibdev->ib_active = false;
225c7b1f 2769 ibev.event = IB_EVENT_DEVICE_FATAL;
35f05dab 2770 mlx4_ib_handle_catas_error(ibdev);
225c7b1f
RD		 2771 break;
2772
00f5ce99
JM		 2773 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2774 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2775 if (!ew) {
2776 pr_err("failed to allocate memory for events work\n");
2777 break;
2778 }
2779
2780 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2781 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2782 ew->ib_dev = ibdev;
992e8e6e
JM		 2783 /* need to queue only for port owner, which uses GEN_EQE */
2784 if (mlx4_is_master(dev))
2785 queue_work(wq, &ew->work);
2786 else
2787 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2788 return;
2789
fc06573d
JM		 2790 case MLX4_DEV_EVENT_SLAVE_INIT:
2791 /* here, p is the slave id */
2792 do_slave_init(ibdev, p, 1);
ee59fa0d
YH		 2793 if (mlx4_is_master(dev)) {
2794 int i;
2795
2796 for (i = 1; i <= ibdev->num_ports; i++) {
2797 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2798 == IB_LINK_LAYER_INFINIBAND)
2799 mlx4_ib_slave_alias_guid_event(ibdev,
2800 p, i,
2801 1);
2802 }
2803 }
fc06573d
JM		 2804 return;
2805
2806 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
ee59fa0d
YH		 2807 if (mlx4_is_master(dev)) {
2808 int i;
2809
2810 for (i = 1; i <= ibdev->num_ports; i++) {
2811 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2812 == IB_LINK_LAYER_INFINIBAND)
2813 mlx4_ib_slave_alias_guid_event(ibdev,
2814 p, i,
2815 0);
2816 }
2817 }
fc06573d
JM		 2818 /* here, p is the slave id */
2819 do_slave_init(ibdev, p, 0);
2820 return;
2821
225c7b1f
RD		 2822 default:
2823 return;
2824 }
2825
2826 ibev.device = ibdev_ptr;
a5750090 2827 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2828
2829 ib_dispatch_event(&ibev);
2830}
2831
2832static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2833 .add = mlx4_ib_add,
2834 .remove = mlx4_ib_remove,
2835 .event = mlx4_ib_event,
a5750090
MS		 2836 .protocol = MLX4_PROT_IB_IPV6,
2837 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2838};
2839
2840static int __init mlx4_ib_init(void)
2841{
fa417f7b
EC		 2842 int err;
2843
2844 wq = create_singlethread_workqueue("mlx4_ib");
2845 if (!wq)
2846 return -ENOMEM;
2847
b9c5d6a6
OD		 2848 err = mlx4_ib_mcg_init();
2849 if (err)
2850 goto clean_wq;
2851
fa417f7b 2852 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2853 if (err)
2854 goto clean_mcg;
fa417f7b
EC		 2855
2856 return 0;
b9c5d6a6
OD		 2857
2858clean_mcg:
2859 mlx4_ib_mcg_destroy();
2860
2861clean_wq:
2862 destroy_workqueue(wq);
2863 return err;
225c7b1f
RD		 2864}
2865
2866static void __exit mlx4_ib_cleanup(void)
2867{
2868 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2869 mlx4_ib_mcg_destroy();
fa417f7b 2870 destroy_workqueue(wq);
225c7b1f
RD		 2871}
2872
2873module_init(mlx4_ib_init);
2874module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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