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IB/core: Add timestamp_mask and hca_core_clock to query_device
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
56c1d233 69int mlx4_ib_sm_guid_assign = 0;
a0c64a17 70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
56c1d233 71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
a0c64a17 72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f
RD		 134static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props)
136{
137 struct mlx4_ib_dev *dev = to_mdev(ibdev);
138 struct ib_smp *in_mad = NULL;
139 struct ib_smp *out_mad = NULL;
140 int err = -ENOMEM;
3dec4878 141 int have_ib_ports;
225c7b1f
RD		 142
143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
145 if (!in_mad || !out_mad)
146 goto out;
147
148 init_query_mad(in_mad);
149 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
150
0a9a0188
JM		 151 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
152 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 153 if (err)
154 goto out;
155
156 memset(props, 0, sizeof *props);
157
3dec4878
JM		 158 have_ib_ports = num_ib_ports(dev->dev);
159
225c7b1f
RD		 160 props->fw_ver = dev->dev->caps.fw_ver;
161 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
162 IB_DEVICE_PORT_ACTIVE_EVENT |
163 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 164 IB_DEVICE_RC_RNR_NAK_GEN |
165 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
167 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
169 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 171 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
173 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
175 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 176 if (dev->dev->caps.max_gso_sz &&
177 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 179 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
181 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
185 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
187 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
189 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
192 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
193 else
194 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 195 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 196 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 197 }
225c7b1f
RD		 198
199 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
200 0xffffff;
872bf2fb 201 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 202 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
203 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
204
205 props->max_mr_size = ~0ull;
206 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 207 props->max_qp = dev->dev->quotas.qp;
fc2d0044 208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 209 props->max_sge = min(dev->dev->caps.max_sq_sg,
210 dev->dev->caps.max_rq_sg);
5a0d0a61 211 props->max_cq = dev->dev->quotas.cq;
225c7b1f 212 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 213 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
217 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 218 props->max_srq = dev->dev->quotas.srq;
c8681f14 219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 220 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 221 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
224 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 225 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 226 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
229 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
230 props->max_mcast_grp;
a5bbe892 231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 232
233out:
234 kfree(in_mad);
235 kfree(out_mad);
236
237 return err;
238}
239
fa417f7b
EC		 240static enum rdma_link_layer
241mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 242{
fa417f7b 243 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 244
65dab25d 245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 246 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
247}
225c7b1f 248
fa417f7b 249static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 250 struct ib_port_attr *props, int netw_view)
fa417f7b 251{
a9c766bb
OG		 252 struct ib_smp *in_mad = NULL;
253 struct ib_smp *out_mad = NULL;
a5e12dff 254 int ext_active_speed;
0a9a0188 255 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 256 int err = -ENOMEM;
257
258 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
259 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
260 if (!in_mad || !out_mad)
261 goto out;
262
263 init_query_mad(in_mad);
264 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
265 in_mad->attr_mod = cpu_to_be32(port);
266
0a9a0188
JM		 267 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
268 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
269
270 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 271 in_mad, out_mad);
272 if (err)
273 goto out;
274
a5e12dff 275
225c7b1f
RD		 276 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
277 props->lmc = out_mad->data[34] & 0x7;
278 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
279 props->sm_sl = out_mad->data[36] & 0xf;
280 props->state = out_mad->data[32] & 0xf;
281 props->phys_state = out_mad->data[33] >> 4;
282 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 283 if (netw_view)
284 props->gid_tbl_len = out_mad->data[50];
285 else
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 289 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
290 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
291 props->active_width = out_mad->data[31] & 0xf;
292 props->active_speed = out_mad->data[35] >> 4;
293 props->max_mtu = out_mad->data[41] & 0xf;
294 props->active_mtu = out_mad->data[36] >> 4;
295 props->subnet_timeout = out_mad->data[51] & 0x1f;
296 props->max_vl_num = out_mad->data[37] >> 4;
297 props->init_type_reply = out_mad->data[41] >> 4;
298
a5e12dff
MA		 299 /* Check if extended speeds (EDR/FDR/...) are supported */
300 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
301 ext_active_speed = out_mad->data[62] >> 4;
302
303 switch (ext_active_speed) {
304 case 1:
2e96691c 305 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 306 break;
307 case 2:
2e96691c 308 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 309 break;
310 }
311 }
312
313 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 314 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
318
0a9a0188 319 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 320 NULL, NULL, in_mad, out_mad);
321 if (err)
bf6b47de 322 goto out;
8154c07f
OG		 323
324 /* Checking LinkSpeedActive for FDR-10 */
325 if (out_mad->data[15] & 0x1)
326 props->active_speed = IB_SPEED_FDR10;
a5e12dff 327 }
d2ef4068
OG		 328
329 /* Avoid wrong speed value returned by FW if the IB link is down. */
330 if (props->state == IB_PORT_DOWN)
331 props->active_speed = IB_SPEED_SDR;
332
a9c766bb
OG		 333out:
334 kfree(in_mad);
335 kfree(out_mad);
336 return err;
fa417f7b
EC		 337}
338
339static u8 state_to_phys_state(enum ib_port_state state)
340{
341 return state == IB_PORT_ACTIVE ? 5 : 3;
342}
343
344static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 345 struct ib_port_attr *props, int netw_view)
fa417f7b 346{
a9c766bb
OG		 347
348 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
349 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 350 struct net_device *ndev;
351 enum ib_mtu tmp;
a9c766bb
OG		 352 struct mlx4_cmd_mailbox *mailbox;
353 int err = 0;
a5750090 354 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 355
356 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
357 if (IS_ERR(mailbox))
358 return PTR_ERR(mailbox);
fa417f7b 359
a9c766bb
OG		 360 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
361 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
362 MLX4_CMD_WRAPPED);
363 if (err)
364 goto out;
365
366 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
367 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 368 props->active_speed = IB_SPEED_QDR;
b4a26a27 369 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 370 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
371 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 372 props->pkey_tbl_len = 1;
bcacb897 373 props->max_mtu = IB_MTU_4096;
a9c766bb 374 props->max_vl_num = 2;
fa417f7b
EC		 375 props->state = IB_PORT_DOWN;
376 props->phys_state = state_to_phys_state(props->state);
377 props->active_mtu = IB_MTU_256;
a5750090
MS		 378 if (is_bonded)
379 rtnl_lock(); /* required to get upper dev */
dba3ad2a 380 spin_lock_bh(&iboe->lock);
fa417f7b 381 ndev = iboe->netdevs[port - 1];
a5750090
MS		 382 if (ndev && is_bonded)
383 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 384 if (!ndev)
a9c766bb 385 goto out_unlock;
fa417f7b
EC		 386
387 tmp = iboe_get_mtu(ndev->mtu);
388 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
389
21d60609 390 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 391 IB_PORT_ACTIVE : IB_PORT_DOWN;
392 props->phys_state = state_to_phys_state(props->state);
a9c766bb 393out_unlock:
dba3ad2a 394 spin_unlock_bh(&iboe->lock);
a5750090
MS		 395 if (is_bonded)
396 rtnl_unlock();
a9c766bb
OG		 397out:
398 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
399 return err;
fa417f7b
EC		 400}
401
0a9a0188
JM		 402int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
403 struct ib_port_attr *props, int netw_view)
fa417f7b 404{
a9c766bb 405 int err;
fa417f7b
EC		 406
407 memset(props, 0, sizeof *props);
408
fa417f7b 409 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 410 ib_link_query_port(ibdev, port, props, netw_view) :
411 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 412
413 return err;
414}
415
0a9a0188
JM		 416static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
417 struct ib_port_attr *props)
418{
419 /* returns host view */
420 return __mlx4_ib_query_port(ibdev, port, props, 0);
421}
422
a0c64a17
JM		 423int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
424 union ib_gid *gid, int netw_view)
225c7b1f
RD		 425{
426 struct ib_smp *in_mad = NULL;
427 struct ib_smp *out_mad = NULL;
428 int err = -ENOMEM;
a0c64a17
JM		 429 struct mlx4_ib_dev *dev = to_mdev(ibdev);
430 int clear = 0;
431 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 432
433 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
434 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
435 if (!in_mad || !out_mad)
436 goto out;
437
438 init_query_mad(in_mad);
439 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
440 in_mad->attr_mod = cpu_to_be32(port);
441
a0c64a17
JM		 442 if (mlx4_is_mfunc(dev->dev) && netw_view)
443 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
444
445 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 446 if (err)
447 goto out;
448
449 memcpy(gid->raw, out_mad->data + 8, 8);
450
a0c64a17
JM		 451 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
452 if (index) {
453 /* For any index > 0, return the null guid */
454 err = 0;
455 clear = 1;
456 goto out;
457 }
458 }
459
225c7b1f
RD		 460 init_query_mad(in_mad);
461 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
462 in_mad->attr_mod = cpu_to_be32(index / 8);
463
a0c64a17 464 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 465 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 466 if (err)
467 goto out;
468
469 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
470
471out:
a0c64a17
JM		 472 if (clear)
473 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 474 kfree(in_mad);
475 kfree(out_mad);
476 return err;
477}
478
fa417f7b
EC		 479static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
480 union ib_gid *gid)
481{
482 struct mlx4_ib_dev *dev = to_mdev(ibdev);
483
484 *gid = dev->iboe.gid_table[port - 1][index];
485
486 return 0;
487}
488
489static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
490 union ib_gid *gid)
491{
492 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 493 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 494 else
495 return iboe_query_gid(ibdev, port, index, gid);
496}
497
0a9a0188
JM		 498int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
499 u16 *pkey, int netw_view)
225c7b1f
RD		 500{
501 struct ib_smp *in_mad = NULL;
502 struct ib_smp *out_mad = NULL;
0a9a0188 503 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 504 int err = -ENOMEM;
505
506 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
507 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
508 if (!in_mad || !out_mad)
509 goto out;
510
511 init_query_mad(in_mad);
512 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
513 in_mad->attr_mod = cpu_to_be32(index / 32);
514
0a9a0188
JM		 515 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
516 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
517
518 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
519 in_mad, out_mad);
225c7b1f
RD		 520 if (err)
521 goto out;
522
523 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
524
525out:
526 kfree(in_mad);
527 kfree(out_mad);
528 return err;
529}
530
0a9a0188
JM		 531static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
532{
533 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
534}
535
225c7b1f
RD		 536static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
537 struct ib_device_modify *props)
538{
d0d68b86 539 struct mlx4_cmd_mailbox *mailbox;
df7fba66 540 unsigned long flags;
d0d68b86 541
225c7b1f
RD		 542 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
543 return -EOPNOTSUPP;
544
d0d68b86
JM		 545 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
546 return 0;
547
992e8e6e
JM		 548 if (mlx4_is_slave(to_mdev(ibdev)->dev))
549 return -EOPNOTSUPP;
550
df7fba66 551 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 552 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 553 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 554
555 /*
556 * If possible, pass node desc to FW, so it can generate
557 * a 144 trap. If cmd fails, just ignore.
558 */
559 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
560 if (IS_ERR(mailbox))
561 return 0;
562
d0d68b86
JM		 563 memcpy(mailbox->buf, props->node_desc, 64);
564 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 565 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 566
567 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 568
569 return 0;
570}
571
61565013
JM		 572static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
573 u32 cap_mask)
225c7b1f
RD		 574{
575 struct mlx4_cmd_mailbox *mailbox;
576 int err;
577
578 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
579 if (IS_ERR(mailbox))
580 return PTR_ERR(mailbox);
581
5ae2a7a8
RD		 582 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
583 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
584 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
585 } else {
586 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
587 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
588 }
225c7b1f 589
a130b590
IS		 590 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
591 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
592 MLX4_CMD_WRAPPED);
225c7b1f
RD		 593
594 mlx4_free_cmd_mailbox(dev->dev, mailbox);
595 return err;
596}
597
598static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
599 struct ib_port_modify *props)
600{
61565013
JM		 601 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
602 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 603 struct ib_port_attr attr;
604 u32 cap_mask;
605 int err;
606
61565013
JM		 607 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
608 * of whether port link layer is ETH or IB. For ETH ports, qkey
609 * violations and port capabilities are not meaningful.
610 */
611 if (is_eth)
612 return 0;
613
614 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 615
616 err = mlx4_ib_query_port(ibdev, port, &attr);
617 if (err)
618 goto out;
619
620 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
621 ~props->clr_port_cap_mask;
622
61565013
JM		 623 err = mlx4_ib_SET_PORT(mdev, port,
624 !!(mask & IB_PORT_RESET_QKEY_CNTR),
625 cap_mask);
225c7b1f
RD		 626
627out:
628 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
629 return err;
630}
631
632static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
633 struct ib_udata *udata)
634{
635 struct mlx4_ib_dev *dev = to_mdev(ibdev);
636 struct mlx4_ib_ucontext *context;
08ff3235 637 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 638 struct mlx4_ib_alloc_ucontext_resp resp;
639 int err;
640
3b4a8cd5
JM		 641 if (!dev->ib_active)
642 return ERR_PTR(-EAGAIN);
643
08ff3235
OG		 644 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
645 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
646 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
647 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
648 } else {
649 resp.dev_caps = dev->dev->caps.userspace_caps;
650 resp.qp_tab_size = dev->dev->caps.num_qps;
651 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
652 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
653 resp.cqe_size = dev->dev->caps.cqe_size;
654 }
225c7b1f
RD		 655
656 context = kmalloc(sizeof *context, GFP_KERNEL);
657 if (!context)
658 return ERR_PTR(-ENOMEM);
659
660 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
661 if (err) {
662 kfree(context);
663 return ERR_PTR(err);
664 }
665
666 INIT_LIST_HEAD(&context->db_page_list);
667 mutex_init(&context->db_page_mutex);
668
08ff3235
OG		 669 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
670 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
671 else
672 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
673
225c7b1f
RD		 674 if (err) {
675 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
676 kfree(context);
677 return ERR_PTR(-EFAULT);
678 }
679
680 return &context->ibucontext;
681}
682
683static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
684{
685 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
686
687 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
688 kfree(context);
689
690 return 0;
691}
692
693static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
694{
695 struct mlx4_ib_dev *dev = to_mdev(context->device);
696
697 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
698 return -EINVAL;
699
700 if (vma->vm_pgoff == 0) {
701 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
702
703 if (io_remap_pfn_range(vma, vma->vm_start,
704 to_mucontext(context)->uar.pfn,
705 PAGE_SIZE, vma->vm_page_prot))
706 return -EAGAIN;
707 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 708 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 709
710 if (io_remap_pfn_range(vma, vma->vm_start,
711 to_mucontext(context)->uar.pfn +
712 dev->dev->caps.num_uars,
713 PAGE_SIZE, vma->vm_page_prot))
714 return -EAGAIN;
715 } else
716 return -EINVAL;
717
718 return 0;
719}
720
721static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
722 struct ib_ucontext *context,
723 struct ib_udata *udata)
724{
725 struct mlx4_ib_pd *pd;
726 int err;
727
728 pd = kmalloc(sizeof *pd, GFP_KERNEL);
729 if (!pd)
730 return ERR_PTR(-ENOMEM);
731
732 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
733 if (err) {
734 kfree(pd);
735 return ERR_PTR(err);
736 }
737
738 if (context)
739 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
740 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
741 kfree(pd);
742 return ERR_PTR(-EFAULT);
743 }
744
745 return &pd->ibpd;
746}
747
748static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
749{
750 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
751 kfree(pd);
752
753 return 0;
754}
755
012a8ff5
SH		 756static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
757 struct ib_ucontext *context,
758 struct ib_udata *udata)
759{
760 struct mlx4_ib_xrcd *xrcd;
8e37210b 761 struct ib_cq_init_attr cq_attr = {};
012a8ff5
SH		 762 int err;
763
764 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
765 return ERR_PTR(-ENOSYS);
766
767 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
768 if (!xrcd)
769 return ERR_PTR(-ENOMEM);
770
771 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
772 if (err)
773 goto err1;
774
775 xrcd->pd = ib_alloc_pd(ibdev);
776 if (IS_ERR(xrcd->pd)) {
777 err = PTR_ERR(xrcd->pd);
778 goto err2;
779 }
780
8e37210b
MB		 781 cq_attr.cqe = 1;
782 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
012a8ff5
SH		 783 if (IS_ERR(xrcd->cq)) {
784 err = PTR_ERR(xrcd->cq);
785 goto err3;
786 }
787
788 return &xrcd->ibxrcd;
789
790err3:
791 ib_dealloc_pd(xrcd->pd);
792err2:
793 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
794err1:
795 kfree(xrcd);
796 return ERR_PTR(err);
797}
798
799static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
800{
801 ib_destroy_cq(to_mxrcd(xrcd)->cq);
802 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
803 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
804 kfree(xrcd);
805
806 return 0;
807}
808
fa417f7b
EC		 809static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
810{
811 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
812 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
813 struct mlx4_ib_gid_entry *ge;
814
815 ge = kzalloc(sizeof *ge, GFP_KERNEL);
816 if (!ge)
817 return -ENOMEM;
818
819 ge->gid = *gid;
820 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
821 ge->port = mqp->port;
822 ge->added = 1;
823 }
824
825 mutex_lock(&mqp->mutex);
826 list_add_tail(&ge->list, &mqp->gid_list);
827 mutex_unlock(&mqp->mutex);
828
829 return 0;
830}
831
832int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
833 union ib_gid *gid)
834{
fa417f7b
EC		 835 struct net_device *ndev;
836 int ret = 0;
837
838 if (!mqp->port)
839 return 0;
840
dba3ad2a 841 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 842 ndev = mdev->iboe.netdevs[mqp->port - 1];
843 if (ndev)
844 dev_hold(ndev);
dba3ad2a 845 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 846
847 if (ndev) {
fa417f7b 848 ret = 1;
fa417f7b
EC		 849 dev_put(ndev);
850 }
851
852 return ret;
853}
854
0ff1fb65
HHZ		 855struct mlx4_ib_steering {
856 struct list_head list;
146d6e19 857 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 858 union ib_gid gid;
859};
860
f77c0162 861static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 862 u32 qp_num,
f77c0162
HHZ		 863 union ib_flow_spec *ib_spec,
864 struct _rule_hw *mlx4_spec)
865{
866 enum mlx4_net_trans_rule_id type;
867
868 switch (ib_spec->type) {
869 case IB_FLOW_SPEC_ETH:
870 type = MLX4_NET_TRANS_RULE_ID_ETH;
871 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
872 ETH_ALEN);
873 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
874 ETH_ALEN);
875 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
876 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
877 break;
a37a1a42
MB		 878 case IB_FLOW_SPEC_IB:
879 type = MLX4_NET_TRANS_RULE_ID_IB;
880 mlx4_spec->ib.l3_qpn =
881 cpu_to_be32(qp_num);
882 mlx4_spec->ib.qpn_mask =
883 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
884 break;
885
f77c0162
HHZ		 886
887 case IB_FLOW_SPEC_IPV4:
888 type = MLX4_NET_TRANS_RULE_ID_IPV4;
889 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
890 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
891 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
892 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
893 break;
894
895 case IB_FLOW_SPEC_TCP:
896 case IB_FLOW_SPEC_UDP:
897 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
898 MLX4_NET_TRANS_RULE_ID_TCP :
899 MLX4_NET_TRANS_RULE_ID_UDP;
900 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
901 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
902 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
903 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
904 break;
905
906 default:
907 return -EINVAL;
908 }
909 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
910 mlx4_hw_rule_sz(dev, type) < 0)
911 return -EINVAL;
912 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
913 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
914 return mlx4_hw_rule_sz(dev, type);
915}
916
a37a1a42
MB		 917struct default_rules {
918 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
919 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
920 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
921 __u8 link_layer;
922};
923static const struct default_rules default_table[] = {
924 {
925 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
926 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
927 .rules_create_list = {IB_FLOW_SPEC_IB},
928 .link_layer = IB_LINK_LAYER_INFINIBAND
929 }
930};
931
932static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
933 struct ib_flow_attr *flow_attr)
934{
935 int i, j, k;
936 void *ib_flow;
937 const struct default_rules *pdefault_rules = default_table;
938 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
939
a57f23f6 940 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 941 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
942 memset(&field_types, 0, sizeof(field_types));
943
944 if (link_layer != pdefault_rules->link_layer)
945 continue;
946
947 ib_flow = flow_attr + 1;
948 /* we assume the specs are sorted */
949 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
950 j < flow_attr->num_of_specs; k++) {
951 union ib_flow_spec *current_flow =
952 (union ib_flow_spec *)ib_flow;
953
954 /* same layer but different type */
955 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
956 (pdefault_rules->mandatory_fields[k] &
957 IB_FLOW_SPEC_LAYER_MASK)) &&
958 (current_flow->type !=
959 pdefault_rules->mandatory_fields[k]))
960 goto out;
961
962 /* same layer, try match next one */
963 if (current_flow->type ==
964 pdefault_rules->mandatory_fields[k]) {
965 j++;
966 ib_flow +=
967 ((union ib_flow_spec *)ib_flow)->size;
968 }
969 }
970
971 ib_flow = flow_attr + 1;
972 for (j = 0; j < flow_attr->num_of_specs;
973 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
974 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
975 /* same layer and same type */
976 if (((union ib_flow_spec *)ib_flow)->type ==
977 pdefault_rules->mandatory_not_fields[k])
978 goto out;
979
980 return i;
981 }
982out:
983 return -1;
984}
985
986static int __mlx4_ib_create_default_rules(
987 struct mlx4_ib_dev *mdev,
988 struct ib_qp *qp,
989 const struct default_rules *pdefault_rules,
990 struct _rule_hw *mlx4_spec) {
991 int size = 0;
992 int i;
993
a57f23f6 994 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 995 int ret;
996 union ib_flow_spec ib_spec;
997 switch (pdefault_rules->rules_create_list[i]) {
998 case 0:
999 /* no rule */
1000 continue;
1001 case IB_FLOW_SPEC_IB:
1002 ib_spec.type = IB_FLOW_SPEC_IB;
1003 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1004
1005 break;
1006 default:
1007 /* invalid rule */
1008 return -EINVAL;
1009 }
1010 /* We must put empty rule, qpn is being ignored */
1011 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1012 mlx4_spec);
1013 if (ret < 0) {
1014 pr_info("invalid parsing\n");
1015 return -EINVAL;
1016 }
1017
1018 mlx4_spec = (void *)mlx4_spec + ret;
1019 size += ret;
1020 }
1021 return size;
1022}
1023
f77c0162
HHZ		 1024static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1025 int domain,
1026 enum mlx4_net_trans_promisc_mode flow_type,
1027 u64 *reg_id)
1028{
1029 int ret, i;
1030 int size = 0;
1031 void *ib_flow;
1032 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1033 struct mlx4_cmd_mailbox *mailbox;
1034 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1035 int default_flow;
f77c0162
HHZ		 1036
1037 static const u16 __mlx4_domain[] = {
1038 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1039 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1040 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1041 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1042 };
1043
1044 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1045 pr_err("Invalid priority value %d\n", flow_attr->priority);
1046 return -EINVAL;
1047 }
1048
1049 if (domain >= IB_FLOW_DOMAIN_NUM) {
1050 pr_err("Invalid domain value %d\n", domain);
1051 return -EINVAL;
1052 }
1053
1054 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1055 return -EINVAL;
1056
1057 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1058 if (IS_ERR(mailbox))
1059 return PTR_ERR(mailbox);
f77c0162
HHZ		 1060 ctrl = mailbox->buf;
1061
1062 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1063 flow_attr->priority);
1064 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1065 ctrl->port = flow_attr->port;
1066 ctrl->qpn = cpu_to_be32(qp->qp_num);
1067
1068 ib_flow = flow_attr + 1;
1069 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1070 /* Add default flows */
1071 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1072 if (default_flow >= 0) {
1073 ret = __mlx4_ib_create_default_rules(
1074 mdev, qp, default_table + default_flow,
1075 mailbox->buf + size);
1076 if (ret < 0) {
1077 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1078 return -EINVAL;
1079 }
1080 size += ret;
1081 }
f77c0162 1082 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1083 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1084 mailbox->buf + size);
f77c0162
HHZ		 1085 if (ret < 0) {
1086 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1087 return -EINVAL;
1088 }
1089 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1090 size += ret;
1091 }
1092
1093 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1094 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1095 MLX4_CMD_NATIVE);
1096 if (ret == -ENOMEM)
1097 pr_err("mcg table is full. Fail to register network rule.\n");
1098 else if (ret == -ENXIO)
1099 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1100 else if (ret)
1101 pr_err("Invalid argumant. Fail to register network rule.\n");
1102
1103 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1104 return ret;
1105}
1106
1107static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1108{
1109 int err;
1110 err = mlx4_cmd(dev, reg_id, 0, 0,
1111 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1112 MLX4_CMD_NATIVE);
1113 if (err)
1114 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1115 reg_id);
1116 return err;
1117}
1118
d2fce8a9
OG		 1119static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1120 u64 *reg_id)
1121{
1122 void *ib_flow;
1123 union ib_flow_spec *ib_spec;
1124 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1125 int err = 0;
1126
5eff6dad
OG		 1127 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1128 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1129 return 0; /* do nothing */
1130
1131 ib_flow = flow_attr + 1;
1132 ib_spec = (union ib_flow_spec *)ib_flow;
1133
1134 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1135 return 0; /* do nothing */
1136
1137 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1138 flow_attr->port, qp->qp_num,
1139 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1140 reg_id);
1141 return err;
1142}
1143
f77c0162
HHZ		 1144static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1145 struct ib_flow_attr *flow_attr,
1146 int domain)
1147{
146d6e19 1148 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1149 struct mlx4_ib_flow *mflow;
1150 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1151 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1152 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1153
1154 memset(type, 0, sizeof(type));
1155
1156 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1157 if (!mflow) {
1158 err = -ENOMEM;
1159 goto err_free;
1160 }
1161
1162 switch (flow_attr->type) {
1163 case IB_FLOW_ATTR_NORMAL:
1164 type[0] = MLX4_FS_REGULAR;
1165 break;
1166
1167 case IB_FLOW_ATTR_ALL_DEFAULT:
1168 type[0] = MLX4_FS_ALL_DEFAULT;
1169 break;
1170
1171 case IB_FLOW_ATTR_MC_DEFAULT:
1172 type[0] = MLX4_FS_MC_DEFAULT;
1173 break;
1174
1175 case IB_FLOW_ATTR_SNIFFER:
1176 type[0] = MLX4_FS_UC_SNIFFER;
1177 type[1] = MLX4_FS_MC_SNIFFER;
1178 break;
1179
1180 default:
1181 err = -EINVAL;
1182 goto err_free;
1183 }
1184
1185 while (i < ARRAY_SIZE(type) && type[i]) {
1186 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1187 &mflow->reg_id[i].id);
f77c0162 1188 if (err)
571e1b2c 1189 goto err_create_flow;
146d6e19 1190 if (is_bonded) {
824c25c1
MS		 1191 /* Application always sees one port so the mirror rule
1192 * must be on port #2
1193 */
146d6e19
MS		 1194 flow_attr->port = 2;
1195 err = __mlx4_ib_create_flow(qp, flow_attr,
1196 domain, type[j],
1197 &mflow->reg_id[j].mirror);
1198 flow_attr->port = 1;
1199 if (err)
1200 goto err_create_flow;
1201 j++;
1202 }
1203
11562568 1204 i++;
f77c0162
HHZ		 1205 }
1206
d2fce8a9 1207 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1208 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1209 &mflow->reg_id[i].id);
d2fce8a9 1210 if (err)
571e1b2c 1211 goto err_create_flow;
11562568 1212
146d6e19
MS		 1213 if (is_bonded) {
1214 flow_attr->port = 2;
1215 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1216 &mflow->reg_id[j].mirror);
1217 flow_attr->port = 1;
1218 if (err)
1219 goto err_create_flow;
1220 j++;
1221 }
1222 /* function to create mirror rule */
11562568 1223 i++;
d2fce8a9
OG		 1224 }
1225
f77c0162
HHZ		 1226 return &mflow->ibflow;
1227
571e1b2c
OG		 1228err_create_flow:
1229 while (i) {
146d6e19
MS		 1230 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1231 mflow->reg_id[i].id);
571e1b2c
OG		 1232 i--;
1233 }
146d6e19
MS		 1234
1235 while (j) {
1236 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1237 mflow->reg_id[j].mirror);
1238 j--;
1239 }
f77c0162
HHZ		 1240err_free:
1241 kfree(mflow);
1242 return ERR_PTR(err);
1243}
1244
1245static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1246{
1247 int err, ret = 0;
1248 int i = 0;
1249 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1250 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1251
146d6e19
MS		 1252 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1253 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1254 if (err)
1255 ret = err;
146d6e19
MS		 1256 if (mflow->reg_id[i].mirror) {
1257 err = __mlx4_ib_destroy_flow(mdev->dev,
1258 mflow->reg_id[i].mirror);
1259 if (err)
1260 ret = err;
1261 }
f77c0162
HHZ		 1262 i++;
1263 }
1264
1265 kfree(mflow);
1266 return ret;
1267}
1268
225c7b1f
RD		 1269static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1270{
fa417f7b
EC		 1271 int err;
1272 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1273 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1274 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1275 struct mlx4_ib_steering *ib_steering = NULL;
e9a7faf1 1276 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
146d6e19 1277 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1278
1279 if (mdev->dev->caps.steering_mode ==
1280 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1281 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1282 if (!ib_steering)
1283 return -ENOMEM;
1284 }
fa417f7b 1285
0ff1fb65
HHZ		 1286 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1287 !!(mqp->flags &
1288 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1289 prot, &reg_id.id);
e9a7faf1
OG		 1290 if (err) {
1291 pr_err("multicast attach op failed, err %d\n", err);
0ff1fb65 1292 goto err_malloc;
e9a7faf1 1293 }
fa417f7b 1294
146d6e19
MS		 1295 reg_id.mirror = 0;
1296 if (mlx4_is_bonded(dev)) {
824c25c1
MS		 1297 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1298 (mqp->port == 1) ? 2 : 1,
146d6e19
MS		 1299 !!(mqp->flags &
1300 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1301 prot, &reg_id.mirror);
1302 if (err)
1303 goto err_add;
1304 }
1305
fa417f7b
EC		 1306 err = add_gid_entry(ibqp, gid);
1307 if (err)
1308 goto err_add;
1309
0ff1fb65
HHZ		 1310 if (ib_steering) {
1311 memcpy(ib_steering->gid.raw, gid->raw, 16);
1312 ib_steering->reg_id = reg_id;
1313 mutex_lock(&mqp->mutex);
1314 list_add(&ib_steering->list, &mqp->steering_rules);
1315 mutex_unlock(&mqp->mutex);
1316 }
fa417f7b
EC		 1317 return 0;
1318
1319err_add:
0ff1fb65 1320 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1321 prot, reg_id.id);
1322 if (reg_id.mirror)
1323 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1324 prot, reg_id.mirror);
0ff1fb65
HHZ		 1325err_malloc:
1326 kfree(ib_steering);
1327
fa417f7b
EC		 1328 return err;
1329}
1330
1331static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1332{
1333 struct mlx4_ib_gid_entry *ge;
1334 struct mlx4_ib_gid_entry *tmp;
1335 struct mlx4_ib_gid_entry *ret = NULL;
1336
1337 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1338 if (!memcmp(raw, ge->gid.raw, 16)) {
1339 ret = ge;
1340 break;
1341 }
1342 }
1343
1344 return ret;
225c7b1f
RD		 1345}
1346
1347static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1348{
fa417f7b
EC		 1349 int err;
1350 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1351 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1352 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1353 struct net_device *ndev;
1354 struct mlx4_ib_gid_entry *ge;
146d6e19 1355 struct mlx4_flow_reg_id reg_id = {0, 0};
e9a7faf1 1356 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1357
1358 if (mdev->dev->caps.steering_mode ==
1359 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1360 struct mlx4_ib_steering *ib_steering;
1361
1362 mutex_lock(&mqp->mutex);
1363 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1364 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1365 list_del(&ib_steering->list);
1366 break;
1367 }
1368 }
1369 mutex_unlock(&mqp->mutex);
1370 if (&ib_steering->list == &mqp->steering_rules) {
1371 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1372 return -EINVAL;
1373 }
1374 reg_id = ib_steering->reg_id;
1375 kfree(ib_steering);
1376 }
fa417f7b 1377
0ff1fb65 1378 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1379 prot, reg_id.id);
fa417f7b
EC		 1380 if (err)
1381 return err;
1382
146d6e19
MS		 1383 if (mlx4_is_bonded(dev)) {
1384 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1385 prot, reg_id.mirror);
1386 if (err)
1387 return err;
1388 }
1389
fa417f7b
EC		 1390 mutex_lock(&mqp->mutex);
1391 ge = find_gid_entry(mqp, gid->raw);
1392 if (ge) {
dba3ad2a 1393 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1394 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1395 if (ndev)
1396 dev_hold(ndev);
dba3ad2a 1397 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1398 if (ndev)
fa417f7b 1399 dev_put(ndev);
fa417f7b
EC		 1400 list_del(&ge->list);
1401 kfree(ge);
1402 } else
987c8f8f 1403 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1404
1405 mutex_unlock(&mqp->mutex);
1406
1407 return 0;
225c7b1f
RD		 1408}
1409
1410static int init_node_data(struct mlx4_ib_dev *dev)
1411{
1412 struct ib_smp *in_mad = NULL;
1413 struct ib_smp *out_mad = NULL;
0a9a0188 1414 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1415 int err = -ENOMEM;
1416
1417 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1418 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1419 if (!in_mad || !out_mad)
1420 goto out;
1421
1422 init_query_mad(in_mad);
1423 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1424 if (mlx4_is_master(dev->dev))
1425 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1426
0a9a0188 1427 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1428 if (err)
1429 goto out;
1430
1431 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1432
1433 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1434
0a9a0188 1435 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1436 if (err)
1437 goto out;
1438
992e8e6e 1439 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1440 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1441
1442out:
1443 kfree(in_mad);
1444 kfree(out_mad);
1445 return err;
1446}
1447
f4e91eb4
TJ		 1448static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1449 char *buf)
cd9281d8 1450{
f4e91eb4
TJ		 1451 struct mlx4_ib_dev *dev =
1452 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1453 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1454}
1455
f4e91eb4
TJ		 1456static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1457 char *buf)
cd9281d8 1458{
f4e91eb4
TJ		 1459 struct mlx4_ib_dev *dev =
1460 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1461 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1462 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1463 (int) dev->dev->caps.fw_ver & 0xffff);
1464}
1465
f4e91eb4
TJ		 1466static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1467 char *buf)
cd9281d8 1468{
f4e91eb4
TJ		 1469 struct mlx4_ib_dev *dev =
1470 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1471 return sprintf(buf, "%x\n", dev->dev->rev_id);
1472}
1473
f4e91eb4
TJ		 1474static ssize_t show_board(struct device *device, struct device_attribute *attr,
1475 char *buf)
cd9281d8 1476{
f4e91eb4
TJ		 1477 struct mlx4_ib_dev *dev =
1478 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1479 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1480 dev->dev->board_id);
cd9281d8
JM		 1481}
1482
f4e91eb4
TJ		 1483static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1484static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1485static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1486static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1487
f4e91eb4
TJ		 1488static struct device_attribute *mlx4_class_attributes[] = {
1489 &dev_attr_hw_rev,
1490 &dev_attr_fw_ver,
1491 &dev_attr_hca_type,
1492 &dev_attr_board_id
cd9281d8
JM		 1493};
1494
acc4fccf
MS		 1495static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1496 struct net_device *dev)
1497{
1498 memcpy(eui, dev->dev_addr, 3);
1499 memcpy(eui + 5, dev->dev_addr + 3, 3);
1500 if (vlan_id < 0x1000) {
1501 eui[3] = vlan_id >> 8;
1502 eui[4] = vlan_id & 0xff;
1503 } else {
1504 eui[3] = 0xff;
1505 eui[4] = 0xfe;
1506 }
1507 eui[0] ^= 2;
1508}
1509
fa417f7b
EC		 1510static void update_gids_task(struct work_struct *work)
1511{
1512 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1513 struct mlx4_cmd_mailbox *mailbox;
1514 union ib_gid *gids;
1515 int err;
1516 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1517 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1518
4bf9715f
MS		 1519 if (!gw->dev->ib_active)
1520 return;
1521
fa417f7b
EC		 1522 mailbox = mlx4_alloc_cmd_mailbox(dev);
1523 if (IS_ERR(mailbox)) {
987c8f8f 1524 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1525 return;
1526 }
1527
1528 gids = mailbox->buf;
1529 memcpy(gids, gw->gids, sizeof gw->gids);
1530
1531 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590
IS		 1532 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1533 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
fa417f7b 1534 if (err)
987c8f8f 1535 pr_warn("set port command failed\n");
d487ee77 1536 else
a5750090
MS		 1537 if ((gw->port == 1) || !is_bonded)
1538 mlx4_ib_dispatch_event(gw->dev,
1539 is_bonded ? 1 : gw->port,
1540 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1541
1542 mlx4_free_cmd_mailbox(dev, mailbox);
1543 kfree(gw);
1544}
1545
d487ee77 1546static void reset_gids_task(struct work_struct *work)
fa417f7b 1547{
d487ee77
MS		 1548 struct update_gid_work *gw =
1549 container_of(work, struct update_gid_work, work);
1550 struct mlx4_cmd_mailbox *mailbox;
1551 union ib_gid *gids;
1552 int err;
d487ee77 1553 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1554
4bf9715f
MS		 1555 if (!gw->dev->ib_active)
1556 return;
1557
d487ee77
MS		 1558 mailbox = mlx4_alloc_cmd_mailbox(dev);
1559 if (IS_ERR(mailbox)) {
1560 pr_warn("reset gid table failed\n");
1561 goto free;
1562 }
fa417f7b 1563
d487ee77
MS		 1564 gids = mailbox->buf;
1565 memcpy(gids, gw->gids, sizeof(gw->gids));
1566
5071456f
MS		 1567 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1568 IB_LINK_LAYER_ETHERNET) {
1569 err = mlx4_cmd(dev, mailbox->dma,
1570 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590 1571 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
5071456f
MS		 1572 MLX4_CMD_TIME_CLASS_B,
1573 MLX4_CMD_WRAPPED);
1574 if (err)
f4f01b54 1575 pr_warn("set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1576 }
1577
d487ee77
MS		 1578 mlx4_free_cmd_mailbox(dev, mailbox);
1579free:
1580 kfree(gw);
1581}
4c3eb3ca 1582
d487ee77 1583static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1584 union ib_gid *gid, int clear,
1585 int default_gid)
d487ee77
MS		 1586{
1587 struct update_gid_work *work;
1588 int i;
1589 int need_update = 0;
1590 int free = -1;
1591 int found = -1;
1592 int max_gids;
1593
acc4fccf
MS		 1594 if (default_gid) {
1595 free = 0;
1596 } else {
1597 max_gids = dev->dev->caps.gid_table_len[port];
1598 for (i = 1; i < max_gids; ++i) {
1599 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1600 sizeof(*gid)))
acc4fccf
MS		 1601 found = i;
1602
1603 if (clear) {
1604 if (found >= 0) {
1605 need_update = 1;
1606 dev->iboe.gid_table[port - 1][found] =
1607 zgid;
1608 break;
1609 }
1610 } else {
1611 if (found >= 0)
1612 break;
1613
1614 if (free < 0 &&
1615 !memcmp(&dev->iboe.gid_table[port - 1][i],
1616 &zgid, sizeof(*gid)))
1617 free = i;
1618 }
4c3eb3ca 1619 }
fa417f7b 1620 }
4c3eb3ca 1621
d487ee77
MS		 1622 if (found == -1 && !clear && free >= 0) {
1623 dev->iboe.gid_table[port - 1][free] = *gid;
1624 need_update = 1;
1625 }
fa417f7b 1626
d487ee77
MS		 1627 if (!need_update)
1628 return 0;
1629
1630 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1631 if (!work)
1632 return -ENOMEM;
1633
1634 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1635 INIT_WORK(&work->work, update_gids_task);
1636 work->port = port;
1637 work->dev = dev;
1638 queue_work(wq, &work->work);
fa417f7b
EC		 1639
1640 return 0;
d487ee77 1641}
4c3eb3ca 1642
acc4fccf 1643static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1644{
acc4fccf
MS		 1645 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1646 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1647}
1648
d487ee77 1649
5071456f 1650static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1651{
1652 struct update_gid_work *work;
d487ee77
MS		 1653
1654 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1655 if (!work)
1656 return -ENOMEM;
5071456f
MS		 1657
1658 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1659 memset(work->gids, 0, sizeof(work->gids));
1660 INIT_WORK(&work->work, reset_gids_task);
1661 work->dev = dev;
5071456f 1662 work->port = port;
d487ee77
MS		 1663 queue_work(wq, &work->work);
1664 return 0;
fa417f7b
EC		 1665}
1666
d487ee77
MS		 1667static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1668 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1669{
d487ee77
MS		 1670 struct mlx4_ib_iboe *iboe;
1671 int port = 0;
1672 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1673 rdma_vlan_dev_real_dev(event_netdev) :
1674 event_netdev;
acc4fccf
MS		 1675 union ib_gid default_gid;
1676
1677 mlx4_make_default_gid(real_dev, &default_gid);
1678
1679 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1680 return 0;
d487ee77
MS		 1681
1682 if (event != NETDEV_DOWN && event != NETDEV_UP)
1683 return 0;
1684
1685 if ((real_dev != event_netdev) &&
1686 (event == NETDEV_DOWN) &&
1687 rdma_link_local_addr((struct in6_addr *)gid))
1688 return 0;
1689
1690 iboe = &ibdev->iboe;
dba3ad2a 1691 spin_lock_bh(&iboe->lock);
d487ee77 1692
82373701 1693 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1694 if ((netif_is_bond_master(real_dev) &&
1695 (real_dev == iboe->masters[port - 1])) ||
1696 (!netif_is_bond_master(real_dev) &&
1697 (real_dev == iboe->netdevs[port - 1])))
1698 update_gid_table(ibdev, port, gid,
acc4fccf 1699 event == NETDEV_DOWN, 0);
d487ee77 1700
dba3ad2a 1701 spin_unlock_bh(&iboe->lock);
d487ee77 1702 return 0;
fa417f7b 1703
fa417f7b
EC		 1704}
1705
d487ee77
MS		 1706static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1707 struct mlx4_ib_dev *ibdev)
fa417f7b 1708{
d487ee77
MS		 1709 u8 port = 0;
1710 struct mlx4_ib_iboe *iboe;
1711 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1712 rdma_vlan_dev_real_dev(dev) : dev;
1713
1714 iboe = &ibdev->iboe;
d487ee77 1715
82373701 1716 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1717 if ((netif_is_bond_master(real_dev) &&
1718 (real_dev == iboe->masters[port - 1])) ||
1719 (!netif_is_bond_master(real_dev) &&
1720 (real_dev == iboe->netdevs[port - 1])))
1721 break;
1722
82373701 1723 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1724 return 0;
1725 else
1726 return port;
fa417f7b
EC		 1727}
1728
d487ee77
MS		 1729static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1730 void *ptr)
fa417f7b 1731{
d487ee77
MS		 1732 struct mlx4_ib_dev *ibdev;
1733 struct in_ifaddr *ifa = ptr;
1734 union ib_gid gid;
1735 struct net_device *event_netdev = ifa->ifa_dev->dev;
1736
1737 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1738
1739 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1740
1741 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1742 return NOTIFY_DONE;
fa417f7b
EC		 1743}
1744
27cdef63 1745#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1746static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1747 void *ptr)
1748{
fa417f7b 1749 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1750 struct inet6_ifaddr *ifa = ptr;
1751 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1752 struct net_device *event_netdev = ifa->idev->dev;
1753
1754 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1755
1756 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1757 return NOTIFY_DONE;
1758}
1759#endif
1760
9433c188
MB		 1761#define MLX4_IB_INVALID_MAC ((u64)-1)
1762static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1763 struct net_device *dev,
1764 int port)
1765{
1766 u64 new_smac = 0;
1767 u64 release_mac = MLX4_IB_INVALID_MAC;
1768 struct mlx4_ib_qp *qp;
1769
1770 read_lock(&dev_base_lock);
1771 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1772 read_unlock(&dev_base_lock);
1773
3e0629cb
JM		 1774 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1775
d24d9f43
JM		 1776 /* no need for update QP1 and mac registration in non-SRIOV */
1777 if (!mlx4_is_mfunc(ibdev->dev))
1778 return;
1779
9433c188
MB		 1780 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1781 qp = ibdev->qp1_proxy[port - 1];
1782 if (qp) {
1783 int new_smac_index;
25476b02 1784 u64 old_smac;
9433c188
MB		 1785 struct mlx4_update_qp_params update_params;
1786
25476b02
JM		 1787 mutex_lock(&qp->mutex);
1788 old_smac = qp->pri.smac;
9433c188
MB		 1789 if (new_smac == old_smac)
1790 goto unlock;
1791
1792 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1793
1794 if (new_smac_index < 0)
1795 goto unlock;
1796
1797 update_params.smac_index = new_smac_index;
09e05c3f 1798 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1799 &update_params)) {
1800 release_mac = new_smac;
1801 goto unlock;
1802 }
25476b02
JM		 1803 /* if old port was zero, no mac was yet registered for this QP */
1804 if (qp->pri.smac_port)
1805 release_mac = old_smac;
9433c188 1806 qp->pri.smac = new_smac;
25476b02 1807 qp->pri.smac_port = port;
9433c188 1808 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1809 }
1810
1811unlock:
9433c188
MB		 1812 if (release_mac != MLX4_IB_INVALID_MAC)
1813 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1814 if (qp)
1815 mutex_unlock(&qp->mutex);
1816 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1817}
1818
d487ee77
MS		 1819static void mlx4_ib_get_dev_addr(struct net_device *dev,
1820 struct mlx4_ib_dev *ibdev, u8 port)
1821{
1822 struct in_device *in_dev;
27cdef63 1823#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1824 struct inet6_dev *in6_dev;
1825 union ib_gid *pgid;
1826 struct inet6_ifaddr *ifp;
f5c4834d 1827 union ib_gid default_gid;
d487ee77
MS		 1828#endif
1829 union ib_gid gid;
1830
1831
82373701 1832 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1833 return;
1834
1835 /* IPv4 gids */
1836 in_dev = in_dev_get(dev);
1837 if (in_dev) {
1838 for_ifa(in_dev) {
1839 /*ifa->ifa_address;*/
1840 ipv6_addr_set_v4mapped(ifa->ifa_address,
1841 (struct in6_addr *)&gid);
acc4fccf 1842 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1843 }
1844 endfor_ifa(in_dev);
1845 in_dev_put(in_dev);
1846 }
27cdef63 1847#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1848 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1849 /* IPv6 gids */
1850 in6_dev = in6_dev_get(dev);
1851 if (in6_dev) {
1852 read_lock_bh(&in6_dev->lock);
1853 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1854 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1855 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1856 continue;
acc4fccf 1857 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1858 }
1859 read_unlock_bh(&in6_dev->lock);
1860 in6_dev_put(in6_dev);
1861 }
1862#endif
1863}
1864
acc4fccf
MS		 1865static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1866 struct net_device *dev, u8 port)
1867{
1868 union ib_gid gid;
1869 mlx4_make_default_gid(dev, &gid);
1870 update_gid_table(ibdev, port, &gid, 0, 1);
1871}
1872
d487ee77
MS		 1873static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1874{
1875 struct net_device *dev;
ddf8bd34 1876 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1877 int i;
655b2aae 1878 int err = 0;
d487ee77 1879
655b2aae
MS		 1880 for (i = 1; i <= ibdev->num_ports; ++i) {
1881 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1882 IB_LINK_LAYER_ETHERNET) {
1883 err = reset_gid_table(ibdev, i);
1884 if (err)
1885 goto out;
1886 }
1887 }
d487ee77
MS		 1888
1889 read_lock(&dev_base_lock);
dba3ad2a 1890 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1891
1892 for_each_netdev(&init_net, dev) {
1893 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1894 /* port will be non-zero only for ETH ports */
1895 if (port) {
1896 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1897 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1898 }
d487ee77
MS		 1899 }
1900
dba3ad2a 1901 spin_unlock_bh(&iboe->lock);
d487ee77 1902 read_unlock(&dev_base_lock);
655b2aae
MS		 1903out:
1904 return err;
d487ee77
MS		 1905}
1906
9433c188
MB		 1907static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1908 struct net_device *dev,
1909 unsigned long event)
1910
d487ee77 1911{
fa417f7b 1912 struct mlx4_ib_iboe *iboe;
9433c188 1913 int update_qps_port = -1;
fa417f7b
EC		 1914 int port;
1915
fa417f7b
EC		 1916 iboe = &ibdev->iboe;
1917
dba3ad2a 1918 spin_lock_bh(&iboe->lock);
fa417f7b 1919 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1920 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1921 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1922 struct net_device *curr_netdev;
d487ee77 1923 struct net_device *curr_master;
ad4885d2 1924
fa417f7b 1925 iboe->netdevs[port - 1] =
0345584e 1926 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1927 if (iboe->netdevs[port - 1])
1928 mlx4_ib_set_default_gid(ibdev,
1929 iboe->netdevs[port - 1], port);
ad4885d2 1930 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1931
1932 if (iboe->netdevs[port - 1] &&
1933 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1934 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1935 iboe->netdevs[port - 1]);
ad4885d2
MS		 1936 } else {
1937 iboe->masters[port - 1] = NULL;
fa417f7b 1938 }
d487ee77 1939 curr_master = iboe->masters[port - 1];
fa417f7b 1940
9433c188
MB		 1941 if (dev == iboe->netdevs[port - 1] &&
1942 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1943 event == NETDEV_UP || event == NETDEV_CHANGE))
1944 update_qps_port = port;
1945
ad4885d2
MS		 1946 if (curr_netdev) {
1947 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1948 IB_PORT_ACTIVE : IB_PORT_DOWN;
1949 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1950 if (curr_master) {
1951 /* if using bonding/team and a slave port is down, we
1952 * don't want the bond IP based gids in the table since
1953 * flows that select port by gid may get the down port.
1954 */
a5750090
MS		 1955 if (port_state == IB_PORT_DOWN &&
1956 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 1957 reset_gid_table(ibdev, port);
1958 mlx4_ib_set_default_gid(ibdev,
1959 curr_netdev,
1960 port);
1961 } else {
1962 /* gids from the upper dev (bond/team)
1963 * should appear in port's gid table
1964 */
1965 mlx4_ib_get_dev_addr(curr_master,
1966 ibdev, port);
1967 }
e381835c
MS		 1968 }
1969 /* if bonding is used it is possible that we add it to
1970 * masters only after IP address is assigned to the
1971 * net bonding interface.
1972 */
1973 if (curr_master && (old_master != curr_master)) {
1974 reset_gid_table(ibdev, port);
1975 mlx4_ib_set_default_gid(ibdev,
1976 curr_netdev, port);
1977 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1978 }
ad4885d2 1979
e381835c
MS		 1980 if (!curr_master && (old_master != curr_master)) {
1981 reset_gid_table(ibdev, port);
1982 mlx4_ib_set_default_gid(ibdev,
1983 curr_netdev, port);
1984 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1985 }
1986 } else {
ad4885d2 1987 reset_gid_table(ibdev, port);
ad4885d2 1988 }
d487ee77 1989 }
fa417f7b 1990
dba3ad2a 1991 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1992
1993 if (update_qps_port > 0)
1994 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 1995}
1996
1997static int mlx4_ib_netdev_event(struct notifier_block *this,
1998 unsigned long event, void *ptr)
1999{
2000 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2001 struct mlx4_ib_dev *ibdev;
2002
2003 if (!net_eq(dev_net(dev), &init_net))
2004 return NOTIFY_DONE;
2005
2006 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2007 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2008
2009 return NOTIFY_DONE;
2010}
2011
54679e14
JM		 2012static void init_pkeys(struct mlx4_ib_dev *ibdev)
2013{
2014 int port;
2015 int slave;
2016 int i;
2017
2018 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2019 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2020 ++slave) {
54679e14
JM		 2021 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2022 for (i = 0;
2023 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2024 ++i) {
2025 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2026 /* master has the identity virt2phys pkey mapping */
2027 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2028 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2029 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2030 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2031 }
2032 }
2033 }
2034 /* initialize pkey cache */
2035 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2036 for (i = 0;
2037 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2038 ++i)
2039 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2040 (i) ? 0 : 0xFFFF;
2041 }
2042 }
2043}
2044
e605b743
SP		 2045static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2046{
4661bd79 2047 char name[80];
e605b743
SP		 2048 int eq_per_port = 0;
2049 int added_eqs = 0;
2050 int total_eqs = 0;
2051 int i, j, eq;
2052
3aac6ff1
SP		 2053 /* Legacy mode or comp_pool is not large enough */
2054 if (dev->caps.comp_pool == 0 ||
2055 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2056 return;
2057
7ae0e400 2058 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2059
2060 /* Init eq table */
2061 added_eqs = 0;
2062 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2063 added_eqs += eq_per_port;
2064
2065 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2066
2067 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2068 if (!ibdev->eq_table)
2069 return;
2070
2071 ibdev->eq_added = added_eqs;
2072
2073 eq = 0;
2074 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2075 for (j = 0; j < eq_per_port; j++) {
4661bd79 2076 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2077 i, j, dev->persist->pdev->bus->name);
e605b743 2078 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2079 if (mlx4_assign_eq(dev, name, NULL,
2080 &ibdev->eq_table[eq])) {
e605b743
SP		 2081 /* Use legacy (same as mlx4_en driver) */
2082 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2083 ibdev->eq_table[eq] =
2084 (eq % dev->caps.num_comp_vectors);
2085 }
2086 eq++;
2087 }
2088 }
2089
2090 /* Fill the reset of the vector with legacy EQ */
2091 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2092 ibdev->eq_table[eq++] = i;
2093
2094 /* Advertise the new number of EQs to clients */
2095 ibdev->ib_dev.num_comp_vectors = total_eqs;
2096}
2097
2098static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2099{
2100 int i;
3aac6ff1
SP		 2101
2102 /* no additional eqs were added */
2103 if (!ibdev->eq_table)
2104 return;
e605b743
SP		 2105
2106 /* Reset the advertised EQ number */
2107 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2108
2109 /* Free only the added eqs */
2110 for (i = 0; i < ibdev->eq_added; i++) {
2111 /* Don't free legacy eqs if used */
2112 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2113 continue;
2114 mlx4_release_eq(dev, ibdev->eq_table[i]);
2115 }
2116
e605b743 2117 kfree(ibdev->eq_table);
e605b743
SP		 2118}
2119
7738613e
IW		 2120static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2121 struct ib_port_immutable *immutable)
2122{
2123 struct ib_port_attr attr;
2124 int err;
2125
2126 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2127 if (err)
2128 return err;
2129
2130 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2131 immutable->gid_tbl_len = attr.gid_tbl_len;
2132
f9b22e35
IW		 2133 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND)
2134 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2135 else
2136 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2137
7738613e
IW		 2138 return 0;
2139}
2140
225c7b1f
RD		 2141static void *mlx4_ib_add(struct mlx4_dev *dev)
2142{
2143 struct mlx4_ib_dev *ibdev;
22e7ef9c 2144 int num_ports = 0;
035b1032 2145 int i, j;
fa417f7b
EC		 2146 int err;
2147 struct mlx4_ib_iboe *iboe;
4196670b 2148 int ib_num_ports = 0;
a5750090 2149 int num_req_counters;
225c7b1f 2150
987c8f8f 2151 pr_info_once("%s", mlx4_ib_version);
68f3948d 2152
026149cb 2153 num_ports = 0;
fa417f7b 2154 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2155 num_ports++;
2156
2157 /* No point in registering a device with no ports... */
2158 if (num_ports == 0)
2159 return NULL;
2160
225c7b1f
RD		 2161 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2162 if (!ibdev) {
872bf2fb
YH		 2163 dev_err(&dev->persist->pdev->dev,
2164 "Device struct alloc failed\n");
225c7b1f
RD		 2165 return NULL;
2166 }
2167
fa417f7b
EC		 2168 iboe = &ibdev->iboe;
2169
225c7b1f
RD		 2170 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2171 goto err_dealloc;
2172
2173 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2174 goto err_pd;
2175
4979d18f
RD		 2176 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2177 PAGE_SIZE);
225c7b1f
RD		 2178 if (!ibdev->uar_map)
2179 goto err_uar;
26c6bc7b 2180 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2181
225c7b1f 2182 ibdev->dev = dev;
c6215745 2183 ibdev->bond_next_port = 0;
225c7b1f
RD		 2184
2185 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2186 ibdev->ib_dev.owner = THIS_MODULE;
2187 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2188 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2189 ibdev->num_ports = num_ports;
a5750090
MS		 2190 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2191 1 : ibdev->num_ports;
b8dd786f 2192 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2193 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2194
08ff3235
OG		 2195 if (dev->caps.userspace_caps)
2196 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2197 else
2198 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2199
225c7b1f
RD		 2200 ibdev->ib_dev.uverbs_cmd_mask =
2201 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2202 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2203 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2204 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2205 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2206 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2207 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2208 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2209 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2210 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2211 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2212 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2213 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2214 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2215 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2216 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2217 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2218 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2219 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2220 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2221 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2222 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2223 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2224 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2225
2226 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2227 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2228 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2229 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2230 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2231 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2232 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2233 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2234 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2235 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2236 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2237 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2238 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2239 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2240 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2241 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2242 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2243 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2244 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2245 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2246 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2247 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2248 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2249 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2250 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2251 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2252 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2253 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2254 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2255 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2256 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2257 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2258 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2259 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2260 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2261 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2262 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2263 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2264 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2265 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2266 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2267 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
7738613e 2268 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
225c7b1f 2269
992e8e6e
JM		 2270 if (!mlx4_is_slave(ibdev->dev)) {
2271 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2272 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2273 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2274 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2275 }
8ad11fb6 2276
b425388d
SM		 2277 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2278 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2279 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2280 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2281 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2282
2283 ibdev->ib_dev.uverbs_cmd_mask |=
2284 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2285 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2286 }
2287
012a8ff5
SH		 2288 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2289 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2290 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2291 ibdev->ib_dev.uverbs_cmd_mask |=
2292 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2293 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2294 }
2295
f77c0162 2296 if (check_flow_steering_support(dev)) {
0a9b7d59 2297 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2298 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2299 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2300
f21519b2
YD		 2301 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2302 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2303 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2304 }
2305
e605b743
SP		 2306 mlx4_ib_alloc_eqs(dev, ibdev);
2307
fa417f7b
EC		 2308 spin_lock_init(&iboe->lock);
2309
225c7b1f
RD		 2310 if (init_node_data(ibdev))
2311 goto err_map;
2312
a5750090
MS		 2313 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2314 for (i = 0; i < num_req_counters; ++i) {
9433c188 2315 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2316 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2317 IB_LINK_LAYER_ETHERNET) {
2318 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2319 if (err)
2320 ibdev->counters[i] = -1;
3839d8ac
DC		 2321 } else {
2322 ibdev->counters[i] = -1;
2323 }
cfcde11c 2324 }
a5750090
MS		 2325 if (mlx4_is_bonded(dev))
2326 for (i = 1; i < ibdev->num_ports ; ++i)
2327 ibdev->counters[i] = ibdev->counters[0];
2328
cfcde11c 2329
4196670b
MB		 2330 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2331 ib_num_ports++;
2332
225c7b1f
RD		 2333 spin_lock_init(&ibdev->sm_lock);
2334 mutex_init(&ibdev->cap_mask_mutex);
35f05dab
YH		 2335 INIT_LIST_HEAD(&ibdev->qp_list);
2336 spin_lock_init(&ibdev->reset_flow_resource_lock);
225c7b1f 2337
4196670b
MB		 2338 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2339 ib_num_ports) {
c1c98501
MB		 2340 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2341 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2342 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2343 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2344 if (err)
2345 goto err_counter;
2346
2347 ibdev->ib_uc_qpns_bitmap =
2348 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2349 sizeof(long),
2350 GFP_KERNEL);
2351 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2352 dev_err(&dev->persist->pdev->dev,
2353 "bit map alloc failed\n");
c1c98501
MB		 2354 goto err_steer_qp_release;
2355 }
2356
2357 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2358
2359 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2360 dev, ibdev->steer_qpn_base,
2361 ibdev->steer_qpn_base +
2362 ibdev->steer_qpn_count - 1);
2363 if (err)
2364 goto err_steer_free_bitmap;
2365 }
2366
3e0629cb
JM		 2367 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2368 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2369
9a6edb60 2370 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2371 goto err_steer_free_bitmap;
225c7b1f
RD		 2372
2373 if (mlx4_ib_mad_init(ibdev))
2374 goto err_reg;
2375
fc06573d
JM		 2376 if (mlx4_ib_init_sriov(ibdev))
2377 goto err_mad;
2378
d487ee77
MS		 2379 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2380 if (!iboe->nb.notifier_call) {
2381 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2382 err = register_netdevice_notifier(&iboe->nb);
2383 if (err) {
2384 iboe->nb.notifier_call = NULL;
2385 goto err_notif;
2386 }
2387 }
2388 if (!iboe->nb_inet.notifier_call) {
2389 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2390 err = register_inetaddr_notifier(&iboe->nb_inet);
2391 if (err) {
2392 iboe->nb_inet.notifier_call = NULL;
2393 goto err_notif;
2394 }
2395 }
27cdef63 2396#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2397 if (!iboe->nb_inet6.notifier_call) {
2398 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2399 err = register_inet6addr_notifier(&iboe->nb_inet6);
2400 if (err) {
2401 iboe->nb_inet6.notifier_call = NULL;
2402 goto err_notif;
2403 }
2404 }
2405#endif
655b2aae
MS		 2406 if (mlx4_ib_init_gid_table(ibdev))
2407 goto err_notif;
fa417f7b
EC		 2408 }
2409
035b1032 2410 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2411 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2412 mlx4_class_attributes[j]))
fa417f7b 2413 goto err_notif;
cd9281d8
JM		 2414 }
2415
3b4a8cd5
JM		 2416 ibdev->ib_active = true;
2417
54679e14
JM		 2418 if (mlx4_is_mfunc(ibdev->dev))
2419 init_pkeys(ibdev);
2420
3806d08c
JM		 2421 /* create paravirt contexts for any VFs which are active */
2422 if (mlx4_is_master(ibdev->dev)) {
2423 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2424 if (j == mlx4_master_func_num(ibdev->dev))
2425 continue;
2426 if (mlx4_is_slave_active(ibdev->dev, j))
2427 do_slave_init(ibdev, j, 1);
2428 }
2429 }
225c7b1f
RD		 2430 return ibdev;
2431
fa417f7b 2432err_notif:
d487ee77
MS		 2433 if (ibdev->iboe.nb.notifier_call) {
2434 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2435 pr_warn("failure unregistering notifier\n");
2436 ibdev->iboe.nb.notifier_call = NULL;
2437 }
2438 if (ibdev->iboe.nb_inet.notifier_call) {
2439 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2440 pr_warn("failure unregistering notifier\n");
2441 ibdev->iboe.nb_inet.notifier_call = NULL;
2442 }
27cdef63 2443#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2444 if (ibdev->iboe.nb_inet6.notifier_call) {
2445 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2446 pr_warn("failure unregistering notifier\n");
2447 ibdev->iboe.nb_inet6.notifier_call = NULL;
2448 }
2449#endif
fa417f7b
EC		 2450 flush_workqueue(wq);
2451
fc06573d
JM		 2452 mlx4_ib_close_sriov(ibdev);
2453
2454err_mad:
2455 mlx4_ib_mad_cleanup(ibdev);
2456
225c7b1f
RD		 2457err_reg:
2458 ib_unregister_device(&ibdev->ib_dev);
2459
c1c98501
MB		 2460err_steer_free_bitmap:
2461 kfree(ibdev->ib_uc_qpns_bitmap);
2462
2463err_steer_qp_release:
2464 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2465 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2466 ibdev->steer_qpn_count);
cfcde11c
OG		 2467err_counter:
2468 for (; i; --i)
4af3ce0d
RD		 2469 if (ibdev->counters[i - 1] != -1)
2470 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2471
225c7b1f
RD		 2472err_map:
2473 iounmap(ibdev->uar_map);
2474
2475err_uar:
2476 mlx4_uar_free(dev, &ibdev->priv_uar);
2477
2478err_pd:
2479 mlx4_pd_free(dev, ibdev->priv_pdn);
2480
2481err_dealloc:
2482 ib_dealloc_device(&ibdev->ib_dev);
2483
2484 return NULL;
2485}
2486
c1c98501
MB		 2487int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2488{
2489 int offset;
2490
2491 WARN_ON(!dev->ib_uc_qpns_bitmap);
2492
2493 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2494 dev->steer_qpn_count,
2495 get_count_order(count));
2496 if (offset < 0)
2497 return offset;
2498
2499 *qpn = dev->steer_qpn_base + offset;
2500 return 0;
2501}
2502
2503void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2504{
2505 if (!qpn ||
2506 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2507 return;
2508
2509 BUG_ON(qpn < dev->steer_qpn_base);
2510
2511 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2512 qpn - dev->steer_qpn_base,
2513 get_count_order(count));
2514}
2515
2516int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2517 int is_attach)
2518{
2519 int err;
2520 size_t flow_size;
2521 struct ib_flow_attr *flow = NULL;
2522 struct ib_flow_spec_ib *ib_spec;
2523
2524 if (is_attach) {
2525 flow_size = sizeof(struct ib_flow_attr) +
2526 sizeof(struct ib_flow_spec_ib);
2527 flow = kzalloc(flow_size, GFP_KERNEL);
2528 if (!flow)
2529 return -ENOMEM;
2530 flow->port = mqp->port;
2531 flow->num_of_specs = 1;
2532 flow->size = flow_size;
2533 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2534 ib_spec->type = IB_FLOW_SPEC_IB;
2535 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2536 /* Add an empty rule for IB L2 */
2537 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2538
2539 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2540 IB_FLOW_DOMAIN_NIC,
2541 MLX4_FS_REGULAR,
2542 &mqp->reg_id);
2543 } else {
2544 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2545 }
2546 kfree(flow);
2547 return err;
2548}
2549
225c7b1f
RD		 2550static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2551{
2552 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2553 int p;
2554
4bf9715f
MS		 2555 ibdev->ib_active = false;
2556 flush_workqueue(wq);
2557
fc06573d 2558 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2559 mlx4_ib_mad_cleanup(ibdev);
2560 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2561 if (ibdev->iboe.nb.notifier_call) {
2562 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2563 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2564 ibdev->iboe.nb.notifier_call = NULL;
2565 }
c1c98501
MB		 2566
2567 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2568 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2569 ibdev->steer_qpn_count);
2570 kfree(ibdev->ib_uc_qpns_bitmap);
2571 }
2572
d487ee77
MS		 2573 if (ibdev->iboe.nb_inet.notifier_call) {
2574 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2575 pr_warn("failure unregistering notifier\n");
2576 ibdev->iboe.nb_inet.notifier_call = NULL;
2577 }
27cdef63 2578#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2579 if (ibdev->iboe.nb_inet6.notifier_call) {
2580 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2581 pr_warn("failure unregistering notifier\n");
2582 ibdev->iboe.nb_inet6.notifier_call = NULL;
2583 }
2584#endif
fb1b5034 2585
fa417f7b 2586 iounmap(ibdev->uar_map);
cfcde11c 2587 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2588 if (ibdev->counters[p] != -1)
2589 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2590 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2591 mlx4_CLOSE_PORT(dev, p);
2592
e605b743
SP		 2593 mlx4_ib_free_eqs(dev, ibdev);
2594
225c7b1f
RD		 2595 mlx4_uar_free(dev, &ibdev->priv_uar);
2596 mlx4_pd_free(dev, ibdev->priv_pdn);
2597 ib_dealloc_device(&ibdev->ib_dev);
2598}
2599
fc06573d
JM		 2600static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2601{
2602 struct mlx4_ib_demux_work **dm = NULL;
2603 struct mlx4_dev *dev = ibdev->dev;
2604 int i;
2605 unsigned long flags;
449fc488
MB		 2606 struct mlx4_active_ports actv_ports;
2607 unsigned int ports;
2608 unsigned int first_port;
fc06573d
JM		 2609
2610 if (!mlx4_is_master(dev))
2611 return;
2612
449fc488
MB		 2613 actv_ports = mlx4_get_active_ports(dev, slave);
2614 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2615 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2616
2617 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2618 if (!dm) {
2619 pr_err("failed to allocate memory for tunneling qp update\n");
2620 goto out;
2621 }
2622
449fc488 2623 for (i = 0; i < ports; i++) {
fc06573d
JM		 2624 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2625 if (!dm[i]) {
2626 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2627 for (i = 0; i < dev->caps.num_ports; i++) {
2628 if (dm[i])
2629 kfree(dm[i]);
2630 }
2631 goto out;
2632 }
2633 }
2634 /* initialize or tear down tunnel QPs for the slave */
449fc488 2635 for (i = 0; i < ports; i++) {
fc06573d 2636 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2637 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2638 dm[i]->slave = slave;
2639 dm[i]->do_init = do_init;
2640 dm[i]->dev = ibdev;
2641 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2642 if (!ibdev->sriov.is_going_down)
2643 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2644 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2645 }
2646out:
c89d1271 2647 kfree(dm);
fc06573d
JM		 2648 return;
2649}
2650
35f05dab
YH		 2651static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2652{
2653 struct mlx4_ib_qp *mqp;
2654 unsigned long flags_qp;
2655 unsigned long flags_cq;
2656 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2657 struct list_head cq_notify_list;
2658 struct mlx4_cq *mcq;
2659 unsigned long flags;
2660
2661 pr_warn("mlx4_ib_handle_catas_error was started\n");
2662 INIT_LIST_HEAD(&cq_notify_list);
2663
2664 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2665 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2666
2667 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2668 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2669 if (mqp->sq.tail != mqp->sq.head) {
2670 send_mcq = to_mcq(mqp->ibqp.send_cq);
2671 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2672 if (send_mcq->mcq.comp &&
2673 mqp->ibqp.send_cq->comp_handler) {
2674 if (!send_mcq->mcq.reset_notify_added) {
2675 send_mcq->mcq.reset_notify_added = 1;
2676 list_add_tail(&send_mcq->mcq.reset_notify,
2677 &cq_notify_list);
2678 }
2679 }
2680 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2681 }
2682 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2683 /* Now, handle the QP's receive queue */
2684 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2685 /* no handling is needed for SRQ */
2686 if (!mqp->ibqp.srq) {
2687 if (mqp->rq.tail != mqp->rq.head) {
2688 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2689 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2690 if (recv_mcq->mcq.comp &&
2691 mqp->ibqp.recv_cq->comp_handler) {
2692 if (!recv_mcq->mcq.reset_notify_added) {
2693 recv_mcq->mcq.reset_notify_added = 1;
2694 list_add_tail(&recv_mcq->mcq.reset_notify,
2695 &cq_notify_list);
2696 }
2697 }
2698 spin_unlock_irqrestore(&recv_mcq->lock,
2699 flags_cq);
2700 }
2701 }
2702 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2703 }
2704
2705 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2706 mcq->comp(mcq);
2707 }
2708 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2709 pr_warn("mlx4_ib_handle_catas_error ended\n");
2710}
2711
a5750090
MS		 2712static void handle_bonded_port_state_event(struct work_struct *work)
2713{
2714 struct ib_event_work *ew =
2715 container_of(work, struct ib_event_work, work);
2716 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2717 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2718 int i;
2719 struct ib_event ibev;
2720
2721 kfree(ew);
2722 spin_lock_bh(&ibdev->iboe.lock);
2723 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2724 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
217e8b16 2725 enum ib_port_state curr_port_state;
a5750090 2726
217e8b16
MS		 2727 if (!curr_netdev)
2728 continue;
2729
2730 curr_port_state =
a5750090
MS		 2731 (netif_running(curr_netdev) &&
2732 netif_carrier_ok(curr_netdev)) ?
2733 IB_PORT_ACTIVE : IB_PORT_DOWN;
2734
2735 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2736 curr_port_state : IB_PORT_ACTIVE;
2737 }
2738 spin_unlock_bh(&ibdev->iboe.lock);
2739
2740 ibev.device = &ibdev->ib_dev;
2741 ibev.element.port_num = 1;
2742 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2743 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2744
2745 ib_dispatch_event(&ibev);
2746}
2747
225c7b1f 2748static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2749 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2750{
2751 struct ib_event ibev;
7ff93f8b 2752 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2753 struct mlx4_eqe *eqe = NULL;
2754 struct ib_event_work *ew;
fc06573d 2755 int p = 0;
00f5ce99 2756
a5750090
MS		 2757 if (mlx4_is_bonded(dev) &&
2758 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2759 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2760 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2761 if (!ew)
2762 return;
2763 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2764 ew->ib_dev = ibdev;
2765 queue_work(wq, &ew->work);
2766 return;
2767 }
2768
00f5ce99
JM		 2769 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2770 eqe = (struct mlx4_eqe *)param;
2771 else
fc06573d 2772 p = (int) param;
225c7b1f
RD		 2773
2774 switch (event) {
37608eea 2775 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2776 if (p > ibdev->num_ports)
2777 return;
a0c64a17
JM		 2778 if (mlx4_is_master(dev) &&
2779 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2780 IB_LINK_LAYER_INFINIBAND) {
2781 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2782 }
37608eea 2783 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2784 break;
2785
37608eea 2786 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2787 if (p > ibdev->num_ports)
2788 return;
37608eea
RD		 2789 ibev.event = IB_EVENT_PORT_ERR;
2790 break;
2791
2792 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2793 ibdev->ib_active = false;
225c7b1f 2794 ibev.event = IB_EVENT_DEVICE_FATAL;
35f05dab 2795 mlx4_ib_handle_catas_error(ibdev);
225c7b1f
RD		 2796 break;
2797
00f5ce99
JM		 2798 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2799 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2800 if (!ew) {
2801 pr_err("failed to allocate memory for events work\n");
2802 break;
2803 }
2804
2805 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2806 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2807 ew->ib_dev = ibdev;
992e8e6e
JM		 2808 /* need to queue only for port owner, which uses GEN_EQE */
2809 if (mlx4_is_master(dev))
2810 queue_work(wq, &ew->work);
2811 else
2812 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2813 return;
2814
fc06573d
JM		 2815 case MLX4_DEV_EVENT_SLAVE_INIT:
2816 /* here, p is the slave id */
2817 do_slave_init(ibdev, p, 1);
ee59fa0d
YH		 2818 if (mlx4_is_master(dev)) {
2819 int i;
2820
2821 for (i = 1; i <= ibdev->num_ports; i++) {
2822 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2823 == IB_LINK_LAYER_INFINIBAND)
2824 mlx4_ib_slave_alias_guid_event(ibdev,
2825 p, i,
2826 1);
2827 }
2828 }
fc06573d
JM		 2829 return;
2830
2831 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
ee59fa0d
YH		 2832 if (mlx4_is_master(dev)) {
2833 int i;
2834
2835 for (i = 1; i <= ibdev->num_ports; i++) {
2836 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2837 == IB_LINK_LAYER_INFINIBAND)
2838 mlx4_ib_slave_alias_guid_event(ibdev,
2839 p, i,
2840 0);
2841 }
2842 }
fc06573d
JM		 2843 /* here, p is the slave id */
2844 do_slave_init(ibdev, p, 0);
2845 return;
2846
225c7b1f
RD		 2847 default:
2848 return;
2849 }
2850
2851 ibev.device = ibdev_ptr;
a5750090 2852 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2853
2854 ib_dispatch_event(&ibev);
2855}
2856
2857static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2858 .add = mlx4_ib_add,
2859 .remove = mlx4_ib_remove,
2860 .event = mlx4_ib_event,
a5750090
MS		 2861 .protocol = MLX4_PROT_IB_IPV6,
2862 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2863};
2864
2865static int __init mlx4_ib_init(void)
2866{
fa417f7b
EC		 2867 int err;
2868
2869 wq = create_singlethread_workqueue("mlx4_ib");
2870 if (!wq)
2871 return -ENOMEM;
2872
b9c5d6a6
OD		 2873 err = mlx4_ib_mcg_init();
2874 if (err)
2875 goto clean_wq;
2876
fa417f7b 2877 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2878 if (err)
2879 goto clean_mcg;
fa417f7b
EC		 2880
2881 return 0;
b9c5d6a6
OD		 2882
2883clean_mcg:
2884 mlx4_ib_mcg_destroy();
2885
2886clean_wq:
2887 destroy_workqueue(wq);
2888 return err;
225c7b1f
RD		 2889}
2890
2891static void __exit mlx4_ib_cleanup(void)
2892{
2893 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2894 mlx4_ib_mcg_destroy();
fa417f7b 2895 destroy_workqueue(wq);
225c7b1f
RD		 2896}
2897
2898module_init(mlx4_ib_init);
2899module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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