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IB/mlx4: Avoid accessing netdevice when building RoCE qp1 header
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
a0c64a17
JM		 69int mlx4_ib_sm_guid_assign = 1;
70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
225c7b1f
RD		 123static int mlx4_ib_query_device(struct ib_device *ibdev,
124 struct ib_device_attr *props)
125{
126 struct mlx4_ib_dev *dev = to_mdev(ibdev);
127 struct ib_smp *in_mad = NULL;
128 struct ib_smp *out_mad = NULL;
129 int err = -ENOMEM;
130
131 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
132 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
133 if (!in_mad || !out_mad)
134 goto out;
135
136 init_query_mad(in_mad);
137 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
138
0a9a0188
JM		 139 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
140 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 141 if (err)
142 goto out;
143
144 memset(props, 0, sizeof *props);
145
146 props->fw_ver = dev->dev->caps.fw_ver;
147 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
148 IB_DEVICE_PORT_ACTIVE_EVENT |
149 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 150 IB_DEVICE_RC_RNR_NAK_GEN |
151 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 152 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
153 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
154 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
155 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
156 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
157 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
158 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
159 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 160 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
161 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 162 if (dev->dev->caps.max_gso_sz &&
163 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
164 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 165 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 166 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
167 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
168 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
169 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
170 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
171 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
173 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
175 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
176 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
177 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
178 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
179 else
180 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 181 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 182 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 183 }
225c7b1f
RD		 184
185 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
186 0xffffff;
992e8e6e 187 props->vendor_part_id = dev->dev->pdev->device;
225c7b1f
RD		 188 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
189 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
190
191 props->max_mr_size = ~0ull;
192 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 193 props->max_qp = dev->dev->quotas.qp;
fc2d0044 194 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 195 props->max_sge = min(dev->dev->caps.max_sq_sg,
196 dev->dev->caps.max_rq_sg);
5a0d0a61 197 props->max_cq = dev->dev->quotas.cq;
225c7b1f 198 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 199 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 200 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
201 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
202 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
203 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 204 props->max_srq = dev->dev->quotas.srq;
c8681f14 205 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 206 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 207 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 208 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
209 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
210 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 211 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 212 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 213 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
214 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
215 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
216 props->max_mcast_grp;
a5bbe892 217 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 218
219out:
220 kfree(in_mad);
221 kfree(out_mad);
222
223 return err;
224}
225
fa417f7b
EC		 226static enum rdma_link_layer
227mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 228{
fa417f7b 229 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 230
65dab25d 231 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 232 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
233}
225c7b1f 234
fa417f7b 235static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 236 struct ib_port_attr *props, int netw_view)
fa417f7b 237{
a9c766bb
OG		 238 struct ib_smp *in_mad = NULL;
239 struct ib_smp *out_mad = NULL;
a5e12dff 240 int ext_active_speed;
0a9a0188 241 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 242 int err = -ENOMEM;
243
244 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
245 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
246 if (!in_mad || !out_mad)
247 goto out;
248
249 init_query_mad(in_mad);
250 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
251 in_mad->attr_mod = cpu_to_be32(port);
252
0a9a0188
JM		 253 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
254 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
255
256 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 257 in_mad, out_mad);
258 if (err)
259 goto out;
260
a5e12dff 261
225c7b1f
RD		 262 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
263 props->lmc = out_mad->data[34] & 0x7;
264 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
265 props->sm_sl = out_mad->data[36] & 0xf;
266 props->state = out_mad->data[32] & 0xf;
267 props->phys_state = out_mad->data[33] >> 4;
268 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 269 if (netw_view)
270 props->gid_tbl_len = out_mad->data[50];
271 else
272 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 273 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 274 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 275 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
276 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
277 props->active_width = out_mad->data[31] & 0xf;
278 props->active_speed = out_mad->data[35] >> 4;
279 props->max_mtu = out_mad->data[41] & 0xf;
280 props->active_mtu = out_mad->data[36] >> 4;
281 props->subnet_timeout = out_mad->data[51] & 0x1f;
282 props->max_vl_num = out_mad->data[37] >> 4;
283 props->init_type_reply = out_mad->data[41] >> 4;
284
a5e12dff
MA		 285 /* Check if extended speeds (EDR/FDR/...) are supported */
286 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
287 ext_active_speed = out_mad->data[62] >> 4;
288
289 switch (ext_active_speed) {
290 case 1:
2e96691c 291 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 292 break;
293 case 2:
2e96691c 294 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 295 break;
296 }
297 }
298
299 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 300 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 301 init_query_mad(in_mad);
302 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
303 in_mad->attr_mod = cpu_to_be32(port);
304
0a9a0188 305 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 306 NULL, NULL, in_mad, out_mad);
307 if (err)
bf6b47de 308 goto out;
8154c07f
OG		 309
310 /* Checking LinkSpeedActive for FDR-10 */
311 if (out_mad->data[15] & 0x1)
312 props->active_speed = IB_SPEED_FDR10;
a5e12dff 313 }
d2ef4068
OG		 314
315 /* Avoid wrong speed value returned by FW if the IB link is down. */
316 if (props->state == IB_PORT_DOWN)
317 props->active_speed = IB_SPEED_SDR;
318
a9c766bb
OG		 319out:
320 kfree(in_mad);
321 kfree(out_mad);
322 return err;
fa417f7b
EC		 323}
324
325static u8 state_to_phys_state(enum ib_port_state state)
326{
327 return state == IB_PORT_ACTIVE ? 5 : 3;
328}
329
330static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 331 struct ib_port_attr *props, int netw_view)
fa417f7b 332{
a9c766bb
OG		 333
334 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
335 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 336 struct net_device *ndev;
337 enum ib_mtu tmp;
a9c766bb
OG		 338 struct mlx4_cmd_mailbox *mailbox;
339 int err = 0;
340
341 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
342 if (IS_ERR(mailbox))
343 return PTR_ERR(mailbox);
fa417f7b 344
a9c766bb
OG		 345 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
346 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
347 MLX4_CMD_WRAPPED);
348 if (err)
349 goto out;
350
351 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
352 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 353 props->active_speed = IB_SPEED_QDR;
b4a26a27 354 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 355 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
356 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 357 props->pkey_tbl_len = 1;
bcacb897 358 props->max_mtu = IB_MTU_4096;
a9c766bb 359 props->max_vl_num = 2;
fa417f7b
EC		 360 props->state = IB_PORT_DOWN;
361 props->phys_state = state_to_phys_state(props->state);
362 props->active_mtu = IB_MTU_256;
dba3ad2a 363 spin_lock_bh(&iboe->lock);
fa417f7b
EC		 364 ndev = iboe->netdevs[port - 1];
365 if (!ndev)
a9c766bb 366 goto out_unlock;
fa417f7b
EC		 367
368 tmp = iboe_get_mtu(ndev->mtu);
369 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
370
21d60609 371 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 372 IB_PORT_ACTIVE : IB_PORT_DOWN;
373 props->phys_state = state_to_phys_state(props->state);
a9c766bb 374out_unlock:
dba3ad2a 375 spin_unlock_bh(&iboe->lock);
a9c766bb
OG		 376out:
377 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
378 return err;
fa417f7b
EC		 379}
380
0a9a0188
JM		 381int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
382 struct ib_port_attr *props, int netw_view)
fa417f7b 383{
a9c766bb 384 int err;
fa417f7b
EC		 385
386 memset(props, 0, sizeof *props);
387
fa417f7b 388 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 389 ib_link_query_port(ibdev, port, props, netw_view) :
390 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 391
392 return err;
393}
394
0a9a0188
JM		 395static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
396 struct ib_port_attr *props)
397{
398 /* returns host view */
399 return __mlx4_ib_query_port(ibdev, port, props, 0);
400}
401
a0c64a17
JM		 402int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
403 union ib_gid *gid, int netw_view)
225c7b1f
RD		 404{
405 struct ib_smp *in_mad = NULL;
406 struct ib_smp *out_mad = NULL;
407 int err = -ENOMEM;
a0c64a17
JM		 408 struct mlx4_ib_dev *dev = to_mdev(ibdev);
409 int clear = 0;
410 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 411
412 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
413 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
414 if (!in_mad || !out_mad)
415 goto out;
416
417 init_query_mad(in_mad);
418 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
419 in_mad->attr_mod = cpu_to_be32(port);
420
a0c64a17
JM		 421 if (mlx4_is_mfunc(dev->dev) && netw_view)
422 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
423
424 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 425 if (err)
426 goto out;
427
428 memcpy(gid->raw, out_mad->data + 8, 8);
429
a0c64a17
JM		 430 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
431 if (index) {
432 /* For any index > 0, return the null guid */
433 err = 0;
434 clear = 1;
435 goto out;
436 }
437 }
438
225c7b1f
RD		 439 init_query_mad(in_mad);
440 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
441 in_mad->attr_mod = cpu_to_be32(index / 8);
442
a0c64a17 443 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 444 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 445 if (err)
446 goto out;
447
448 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
449
450out:
a0c64a17
JM		 451 if (clear)
452 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 453 kfree(in_mad);
454 kfree(out_mad);
455 return err;
456}
457
fa417f7b
EC		 458static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
459 union ib_gid *gid)
460{
461 struct mlx4_ib_dev *dev = to_mdev(ibdev);
462
463 *gid = dev->iboe.gid_table[port - 1][index];
464
465 return 0;
466}
467
468static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
469 union ib_gid *gid)
470{
471 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 472 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 473 else
474 return iboe_query_gid(ibdev, port, index, gid);
475}
476
0a9a0188
JM		 477int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
478 u16 *pkey, int netw_view)
225c7b1f
RD		 479{
480 struct ib_smp *in_mad = NULL;
481 struct ib_smp *out_mad = NULL;
0a9a0188 482 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 483 int err = -ENOMEM;
484
485 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
486 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
487 if (!in_mad || !out_mad)
488 goto out;
489
490 init_query_mad(in_mad);
491 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
492 in_mad->attr_mod = cpu_to_be32(index / 32);
493
0a9a0188
JM		 494 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
495 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
496
497 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
498 in_mad, out_mad);
225c7b1f
RD		 499 if (err)
500 goto out;
501
502 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
503
504out:
505 kfree(in_mad);
506 kfree(out_mad);
507 return err;
508}
509
0a9a0188
JM		 510static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
511{
512 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
513}
514
225c7b1f
RD		 515static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
516 struct ib_device_modify *props)
517{
d0d68b86 518 struct mlx4_cmd_mailbox *mailbox;
df7fba66 519 unsigned long flags;
d0d68b86 520
225c7b1f
RD		 521 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
522 return -EOPNOTSUPP;
523
d0d68b86
JM		 524 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
525 return 0;
526
992e8e6e
JM		 527 if (mlx4_is_slave(to_mdev(ibdev)->dev))
528 return -EOPNOTSUPP;
529
df7fba66 530 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 531 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 532 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 533
534 /*
535 * If possible, pass node desc to FW, so it can generate
536 * a 144 trap. If cmd fails, just ignore.
537 */
538 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
539 if (IS_ERR(mailbox))
540 return 0;
541
d0d68b86
JM		 542 memcpy(mailbox->buf, props->node_desc, 64);
543 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 544 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 545
546 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 547
548 return 0;
549}
550
61565013
JM		 551static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
552 u32 cap_mask)
225c7b1f
RD		 553{
554 struct mlx4_cmd_mailbox *mailbox;
555 int err;
556
557 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
558 if (IS_ERR(mailbox))
559 return PTR_ERR(mailbox);
560
5ae2a7a8
RD		 561 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
562 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
563 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
564 } else {
565 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
566 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
567 }
225c7b1f 568
61565013
JM		 569 err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
570 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
225c7b1f
RD		 571
572 mlx4_free_cmd_mailbox(dev->dev, mailbox);
573 return err;
574}
575
576static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
577 struct ib_port_modify *props)
578{
61565013
JM		 579 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
580 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 581 struct ib_port_attr attr;
582 u32 cap_mask;
583 int err;
584
61565013
JM		 585 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
586 * of whether port link layer is ETH or IB. For ETH ports, qkey
587 * violations and port capabilities are not meaningful.
588 */
589 if (is_eth)
590 return 0;
591
592 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 593
594 err = mlx4_ib_query_port(ibdev, port, &attr);
595 if (err)
596 goto out;
597
598 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
599 ~props->clr_port_cap_mask;
600
61565013
JM		 601 err = mlx4_ib_SET_PORT(mdev, port,
602 !!(mask & IB_PORT_RESET_QKEY_CNTR),
603 cap_mask);
225c7b1f
RD		 604
605out:
606 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
607 return err;
608}
609
610static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
611 struct ib_udata *udata)
612{
613 struct mlx4_ib_dev *dev = to_mdev(ibdev);
614 struct mlx4_ib_ucontext *context;
08ff3235 615 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 616 struct mlx4_ib_alloc_ucontext_resp resp;
617 int err;
618
3b4a8cd5
JM		 619 if (!dev->ib_active)
620 return ERR_PTR(-EAGAIN);
621
08ff3235
OG		 622 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
623 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
624 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
625 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
626 } else {
627 resp.dev_caps = dev->dev->caps.userspace_caps;
628 resp.qp_tab_size = dev->dev->caps.num_qps;
629 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
630 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
631 resp.cqe_size = dev->dev->caps.cqe_size;
632 }
225c7b1f
RD		 633
634 context = kmalloc(sizeof *context, GFP_KERNEL);
635 if (!context)
636 return ERR_PTR(-ENOMEM);
637
638 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
639 if (err) {
640 kfree(context);
641 return ERR_PTR(err);
642 }
643
644 INIT_LIST_HEAD(&context->db_page_list);
645 mutex_init(&context->db_page_mutex);
646
08ff3235
OG		 647 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
648 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
649 else
650 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
651
225c7b1f
RD		 652 if (err) {
653 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
654 kfree(context);
655 return ERR_PTR(-EFAULT);
656 }
657
658 return &context->ibucontext;
659}
660
661static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
662{
663 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
664
665 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
666 kfree(context);
667
668 return 0;
669}
670
671static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
672{
673 struct mlx4_ib_dev *dev = to_mdev(context->device);
674
675 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
676 return -EINVAL;
677
678 if (vma->vm_pgoff == 0) {
679 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
680
681 if (io_remap_pfn_range(vma, vma->vm_start,
682 to_mucontext(context)->uar.pfn,
683 PAGE_SIZE, vma->vm_page_prot))
684 return -EAGAIN;
685 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 686 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 687
688 if (io_remap_pfn_range(vma, vma->vm_start,
689 to_mucontext(context)->uar.pfn +
690 dev->dev->caps.num_uars,
691 PAGE_SIZE, vma->vm_page_prot))
692 return -EAGAIN;
693 } else
694 return -EINVAL;
695
696 return 0;
697}
698
699static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
700 struct ib_ucontext *context,
701 struct ib_udata *udata)
702{
703 struct mlx4_ib_pd *pd;
704 int err;
705
706 pd = kmalloc(sizeof *pd, GFP_KERNEL);
707 if (!pd)
708 return ERR_PTR(-ENOMEM);
709
710 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
711 if (err) {
712 kfree(pd);
713 return ERR_PTR(err);
714 }
715
716 if (context)
717 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
718 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
719 kfree(pd);
720 return ERR_PTR(-EFAULT);
721 }
722
723 return &pd->ibpd;
724}
725
726static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
727{
728 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
729 kfree(pd);
730
731 return 0;
732}
733
012a8ff5
SH		 734static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
735 struct ib_ucontext *context,
736 struct ib_udata *udata)
737{
738 struct mlx4_ib_xrcd *xrcd;
739 int err;
740
741 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
742 return ERR_PTR(-ENOSYS);
743
744 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
745 if (!xrcd)
746 return ERR_PTR(-ENOMEM);
747
748 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
749 if (err)
750 goto err1;
751
752 xrcd->pd = ib_alloc_pd(ibdev);
753 if (IS_ERR(xrcd->pd)) {
754 err = PTR_ERR(xrcd->pd);
755 goto err2;
756 }
757
758 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
759 if (IS_ERR(xrcd->cq)) {
760 err = PTR_ERR(xrcd->cq);
761 goto err3;
762 }
763
764 return &xrcd->ibxrcd;
765
766err3:
767 ib_dealloc_pd(xrcd->pd);
768err2:
769 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
770err1:
771 kfree(xrcd);
772 return ERR_PTR(err);
773}
774
775static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
776{
777 ib_destroy_cq(to_mxrcd(xrcd)->cq);
778 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
779 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
780 kfree(xrcd);
781
782 return 0;
783}
784
fa417f7b
EC		 785static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
786{
787 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
788 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
789 struct mlx4_ib_gid_entry *ge;
790
791 ge = kzalloc(sizeof *ge, GFP_KERNEL);
792 if (!ge)
793 return -ENOMEM;
794
795 ge->gid = *gid;
796 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
797 ge->port = mqp->port;
798 ge->added = 1;
799 }
800
801 mutex_lock(&mqp->mutex);
802 list_add_tail(&ge->list, &mqp->gid_list);
803 mutex_unlock(&mqp->mutex);
804
805 return 0;
806}
807
808int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
809 union ib_gid *gid)
810{
fa417f7b
EC		 811 struct net_device *ndev;
812 int ret = 0;
813
814 if (!mqp->port)
815 return 0;
816
dba3ad2a 817 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 818 ndev = mdev->iboe.netdevs[mqp->port - 1];
819 if (ndev)
820 dev_hold(ndev);
dba3ad2a 821 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 822
823 if (ndev) {
fa417f7b 824 ret = 1;
fa417f7b
EC		 825 dev_put(ndev);
826 }
827
828 return ret;
829}
830
0ff1fb65
HHZ		 831struct mlx4_ib_steering {
832 struct list_head list;
833 u64 reg_id;
834 union ib_gid gid;
835};
836
f77c0162 837static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 838 u32 qp_num,
f77c0162
HHZ		 839 union ib_flow_spec *ib_spec,
840 struct _rule_hw *mlx4_spec)
841{
842 enum mlx4_net_trans_rule_id type;
843
844 switch (ib_spec->type) {
845 case IB_FLOW_SPEC_ETH:
846 type = MLX4_NET_TRANS_RULE_ID_ETH;
847 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
848 ETH_ALEN);
849 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
850 ETH_ALEN);
851 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
852 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
853 break;
a37a1a42
MB		 854 case IB_FLOW_SPEC_IB:
855 type = MLX4_NET_TRANS_RULE_ID_IB;
856 mlx4_spec->ib.l3_qpn =
857 cpu_to_be32(qp_num);
858 mlx4_spec->ib.qpn_mask =
859 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
860 break;
861
f77c0162
HHZ		 862
863 case IB_FLOW_SPEC_IPV4:
864 type = MLX4_NET_TRANS_RULE_ID_IPV4;
865 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
866 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
867 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
868 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
869 break;
870
871 case IB_FLOW_SPEC_TCP:
872 case IB_FLOW_SPEC_UDP:
873 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
874 MLX4_NET_TRANS_RULE_ID_TCP :
875 MLX4_NET_TRANS_RULE_ID_UDP;
876 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
877 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
878 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
879 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
880 break;
881
882 default:
883 return -EINVAL;
884 }
885 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
886 mlx4_hw_rule_sz(dev, type) < 0)
887 return -EINVAL;
888 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
889 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
890 return mlx4_hw_rule_sz(dev, type);
891}
892
a37a1a42
MB		 893struct default_rules {
894 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
895 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
896 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
897 __u8 link_layer;
898};
899static const struct default_rules default_table[] = {
900 {
901 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
902 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
903 .rules_create_list = {IB_FLOW_SPEC_IB},
904 .link_layer = IB_LINK_LAYER_INFINIBAND
905 }
906};
907
908static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
909 struct ib_flow_attr *flow_attr)
910{
911 int i, j, k;
912 void *ib_flow;
913 const struct default_rules *pdefault_rules = default_table;
914 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
915
a57f23f6 916 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 917 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
918 memset(&field_types, 0, sizeof(field_types));
919
920 if (link_layer != pdefault_rules->link_layer)
921 continue;
922
923 ib_flow = flow_attr + 1;
924 /* we assume the specs are sorted */
925 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
926 j < flow_attr->num_of_specs; k++) {
927 union ib_flow_spec *current_flow =
928 (union ib_flow_spec *)ib_flow;
929
930 /* same layer but different type */
931 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
932 (pdefault_rules->mandatory_fields[k] &
933 IB_FLOW_SPEC_LAYER_MASK)) &&
934 (current_flow->type !=
935 pdefault_rules->mandatory_fields[k]))
936 goto out;
937
938 /* same layer, try match next one */
939 if (current_flow->type ==
940 pdefault_rules->mandatory_fields[k]) {
941 j++;
942 ib_flow +=
943 ((union ib_flow_spec *)ib_flow)->size;
944 }
945 }
946
947 ib_flow = flow_attr + 1;
948 for (j = 0; j < flow_attr->num_of_specs;
949 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
950 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
951 /* same layer and same type */
952 if (((union ib_flow_spec *)ib_flow)->type ==
953 pdefault_rules->mandatory_not_fields[k])
954 goto out;
955
956 return i;
957 }
958out:
959 return -1;
960}
961
962static int __mlx4_ib_create_default_rules(
963 struct mlx4_ib_dev *mdev,
964 struct ib_qp *qp,
965 const struct default_rules *pdefault_rules,
966 struct _rule_hw *mlx4_spec) {
967 int size = 0;
968 int i;
969
a57f23f6 970 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 971 int ret;
972 union ib_flow_spec ib_spec;
973 switch (pdefault_rules->rules_create_list[i]) {
974 case 0:
975 /* no rule */
976 continue;
977 case IB_FLOW_SPEC_IB:
978 ib_spec.type = IB_FLOW_SPEC_IB;
979 ib_spec.size = sizeof(struct ib_flow_spec_ib);
980
981 break;
982 default:
983 /* invalid rule */
984 return -EINVAL;
985 }
986 /* We must put empty rule, qpn is being ignored */
987 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
988 mlx4_spec);
989 if (ret < 0) {
990 pr_info("invalid parsing\n");
991 return -EINVAL;
992 }
993
994 mlx4_spec = (void *)mlx4_spec + ret;
995 size += ret;
996 }
997 return size;
998}
999
f77c0162
HHZ		 1000static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1001 int domain,
1002 enum mlx4_net_trans_promisc_mode flow_type,
1003 u64 *reg_id)
1004{
1005 int ret, i;
1006 int size = 0;
1007 void *ib_flow;
1008 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1009 struct mlx4_cmd_mailbox *mailbox;
1010 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1011 int default_flow;
f77c0162
HHZ		 1012
1013 static const u16 __mlx4_domain[] = {
1014 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1015 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1016 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1017 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1018 };
1019
1020 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1021 pr_err("Invalid priority value %d\n", flow_attr->priority);
1022 return -EINVAL;
1023 }
1024
1025 if (domain >= IB_FLOW_DOMAIN_NUM) {
1026 pr_err("Invalid domain value %d\n", domain);
1027 return -EINVAL;
1028 }
1029
1030 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1031 return -EINVAL;
1032
1033 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1034 if (IS_ERR(mailbox))
1035 return PTR_ERR(mailbox);
f77c0162
HHZ		 1036 ctrl = mailbox->buf;
1037
1038 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1039 flow_attr->priority);
1040 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1041 ctrl->port = flow_attr->port;
1042 ctrl->qpn = cpu_to_be32(qp->qp_num);
1043
1044 ib_flow = flow_attr + 1;
1045 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1046 /* Add default flows */
1047 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1048 if (default_flow >= 0) {
1049 ret = __mlx4_ib_create_default_rules(
1050 mdev, qp, default_table + default_flow,
1051 mailbox->buf + size);
1052 if (ret < 0) {
1053 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1054 return -EINVAL;
1055 }
1056 size += ret;
1057 }
f77c0162 1058 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1059 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1060 mailbox->buf + size);
f77c0162
HHZ		 1061 if (ret < 0) {
1062 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1063 return -EINVAL;
1064 }
1065 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1066 size += ret;
1067 }
1068
1069 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1070 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1071 MLX4_CMD_NATIVE);
1072 if (ret == -ENOMEM)
1073 pr_err("mcg table is full. Fail to register network rule.\n");
1074 else if (ret == -ENXIO)
1075 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1076 else if (ret)
1077 pr_err("Invalid argumant. Fail to register network rule.\n");
1078
1079 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1080 return ret;
1081}
1082
1083static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1084{
1085 int err;
1086 err = mlx4_cmd(dev, reg_id, 0, 0,
1087 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1088 MLX4_CMD_NATIVE);
1089 if (err)
1090 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1091 reg_id);
1092 return err;
1093}
1094
1095static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1096 struct ib_flow_attr *flow_attr,
1097 int domain)
1098{
1099 int err = 0, i = 0;
1100 struct mlx4_ib_flow *mflow;
1101 enum mlx4_net_trans_promisc_mode type[2];
1102
1103 memset(type, 0, sizeof(type));
1104
1105 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1106 if (!mflow) {
1107 err = -ENOMEM;
1108 goto err_free;
1109 }
1110
1111 switch (flow_attr->type) {
1112 case IB_FLOW_ATTR_NORMAL:
1113 type[0] = MLX4_FS_REGULAR;
1114 break;
1115
1116 case IB_FLOW_ATTR_ALL_DEFAULT:
1117 type[0] = MLX4_FS_ALL_DEFAULT;
1118 break;
1119
1120 case IB_FLOW_ATTR_MC_DEFAULT:
1121 type[0] = MLX4_FS_MC_DEFAULT;
1122 break;
1123
1124 case IB_FLOW_ATTR_SNIFFER:
1125 type[0] = MLX4_FS_UC_SNIFFER;
1126 type[1] = MLX4_FS_MC_SNIFFER;
1127 break;
1128
1129 default:
1130 err = -EINVAL;
1131 goto err_free;
1132 }
1133
1134 while (i < ARRAY_SIZE(type) && type[i]) {
1135 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1136 &mflow->reg_id[i]);
1137 if (err)
1138 goto err_free;
1139 i++;
1140 }
1141
1142 return &mflow->ibflow;
1143
1144err_free:
1145 kfree(mflow);
1146 return ERR_PTR(err);
1147}
1148
1149static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1150{
1151 int err, ret = 0;
1152 int i = 0;
1153 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1154 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1155
1156 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
1157 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
1158 if (err)
1159 ret = err;
1160 i++;
1161 }
1162
1163 kfree(mflow);
1164 return ret;
1165}
1166
225c7b1f
RD		 1167static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1168{
fa417f7b
EC		 1169 int err;
1170 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1171 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65
HHZ		 1172 u64 reg_id;
1173 struct mlx4_ib_steering *ib_steering = NULL;
d487ee77
MS		 1174 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1175 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1176
1177 if (mdev->dev->caps.steering_mode ==
1178 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1179 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1180 if (!ib_steering)
1181 return -ENOMEM;
1182 }
fa417f7b 1183
0ff1fb65
HHZ		 1184 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1185 !!(mqp->flags &
1186 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
d487ee77 1187 prot, &reg_id);
fa417f7b 1188 if (err)
0ff1fb65 1189 goto err_malloc;
fa417f7b
EC		 1190
1191 err = add_gid_entry(ibqp, gid);
1192 if (err)
1193 goto err_add;
1194
0ff1fb65
HHZ		 1195 if (ib_steering) {
1196 memcpy(ib_steering->gid.raw, gid->raw, 16);
1197 ib_steering->reg_id = reg_id;
1198 mutex_lock(&mqp->mutex);
1199 list_add(&ib_steering->list, &mqp->steering_rules);
1200 mutex_unlock(&mqp->mutex);
1201 }
fa417f7b
EC		 1202 return 0;
1203
1204err_add:
0ff1fb65 1205 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1206 prot, reg_id);
0ff1fb65
HHZ		 1207err_malloc:
1208 kfree(ib_steering);
1209
fa417f7b
EC		 1210 return err;
1211}
1212
1213static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1214{
1215 struct mlx4_ib_gid_entry *ge;
1216 struct mlx4_ib_gid_entry *tmp;
1217 struct mlx4_ib_gid_entry *ret = NULL;
1218
1219 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1220 if (!memcmp(raw, ge->gid.raw, 16)) {
1221 ret = ge;
1222 break;
1223 }
1224 }
1225
1226 return ret;
225c7b1f
RD		 1227}
1228
1229static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1230{
fa417f7b
EC		 1231 int err;
1232 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1233 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1234 struct net_device *ndev;
1235 struct mlx4_ib_gid_entry *ge;
0ff1fb65 1236 u64 reg_id = 0;
d487ee77
MS		 1237 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1238 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1239
1240 if (mdev->dev->caps.steering_mode ==
1241 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1242 struct mlx4_ib_steering *ib_steering;
1243
1244 mutex_lock(&mqp->mutex);
1245 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1246 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1247 list_del(&ib_steering->list);
1248 break;
1249 }
1250 }
1251 mutex_unlock(&mqp->mutex);
1252 if (&ib_steering->list == &mqp->steering_rules) {
1253 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1254 return -EINVAL;
1255 }
1256 reg_id = ib_steering->reg_id;
1257 kfree(ib_steering);
1258 }
fa417f7b 1259
0ff1fb65 1260 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1261 prot, reg_id);
fa417f7b
EC		 1262 if (err)
1263 return err;
1264
1265 mutex_lock(&mqp->mutex);
1266 ge = find_gid_entry(mqp, gid->raw);
1267 if (ge) {
dba3ad2a 1268 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1269 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1270 if (ndev)
1271 dev_hold(ndev);
dba3ad2a 1272 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1273 if (ndev)
fa417f7b 1274 dev_put(ndev);
fa417f7b
EC		 1275 list_del(&ge->list);
1276 kfree(ge);
1277 } else
987c8f8f 1278 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1279
1280 mutex_unlock(&mqp->mutex);
1281
1282 return 0;
225c7b1f
RD		 1283}
1284
1285static int init_node_data(struct mlx4_ib_dev *dev)
1286{
1287 struct ib_smp *in_mad = NULL;
1288 struct ib_smp *out_mad = NULL;
0a9a0188 1289 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1290 int err = -ENOMEM;
1291
1292 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1293 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1294 if (!in_mad || !out_mad)
1295 goto out;
1296
1297 init_query_mad(in_mad);
1298 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1299 if (mlx4_is_master(dev->dev))
1300 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1301
0a9a0188 1302 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1303 if (err)
1304 goto out;
1305
1306 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1307
1308 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1309
0a9a0188 1310 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1311 if (err)
1312 goto out;
1313
992e8e6e 1314 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1315 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1316
1317out:
1318 kfree(in_mad);
1319 kfree(out_mad);
1320 return err;
1321}
1322
f4e91eb4
TJ		 1323static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1324 char *buf)
cd9281d8 1325{
f4e91eb4
TJ		 1326 struct mlx4_ib_dev *dev =
1327 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1328 return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
1329}
1330
f4e91eb4
TJ		 1331static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1332 char *buf)
cd9281d8 1333{
f4e91eb4
TJ		 1334 struct mlx4_ib_dev *dev =
1335 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1336 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1337 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1338 (int) dev->dev->caps.fw_ver & 0xffff);
1339}
1340
f4e91eb4
TJ		 1341static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1342 char *buf)
cd9281d8 1343{
f4e91eb4
TJ		 1344 struct mlx4_ib_dev *dev =
1345 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1346 return sprintf(buf, "%x\n", dev->dev->rev_id);
1347}
1348
f4e91eb4
TJ		 1349static ssize_t show_board(struct device *device, struct device_attribute *attr,
1350 char *buf)
cd9281d8 1351{
f4e91eb4
TJ		 1352 struct mlx4_ib_dev *dev =
1353 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1354 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1355 dev->dev->board_id);
cd9281d8
JM		 1356}
1357
f4e91eb4
TJ		 1358static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1359static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1360static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1361static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1362
f4e91eb4
TJ		 1363static struct device_attribute *mlx4_class_attributes[] = {
1364 &dev_attr_hw_rev,
1365 &dev_attr_fw_ver,
1366 &dev_attr_hca_type,
1367 &dev_attr_board_id
cd9281d8
JM		 1368};
1369
acc4fccf
MS		 1370static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1371 struct net_device *dev)
1372{
1373 memcpy(eui, dev->dev_addr, 3);
1374 memcpy(eui + 5, dev->dev_addr + 3, 3);
1375 if (vlan_id < 0x1000) {
1376 eui[3] = vlan_id >> 8;
1377 eui[4] = vlan_id & 0xff;
1378 } else {
1379 eui[3] = 0xff;
1380 eui[4] = 0xfe;
1381 }
1382 eui[0] ^= 2;
1383}
1384
fa417f7b
EC		 1385static void update_gids_task(struct work_struct *work)
1386{
1387 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1388 struct mlx4_cmd_mailbox *mailbox;
1389 union ib_gid *gids;
1390 int err;
1391 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1392
4bf9715f
MS		 1393 if (!gw->dev->ib_active)
1394 return;
1395
fa417f7b
EC		 1396 mailbox = mlx4_alloc_cmd_mailbox(dev);
1397 if (IS_ERR(mailbox)) {
987c8f8f 1398 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1399 return;
1400 }
1401
1402 gids = mailbox->buf;
1403 memcpy(gids, gw->gids, sizeof gw->gids);
1404
1405 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
f9baff50 1406 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
992e8e6e 1407 MLX4_CMD_WRAPPED);
fa417f7b 1408 if (err)
987c8f8f 1409 pr_warn("set port command failed\n");
d487ee77 1410 else
00f5ce99 1411 mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1412
1413 mlx4_free_cmd_mailbox(dev, mailbox);
1414 kfree(gw);
1415}
1416
d487ee77 1417static void reset_gids_task(struct work_struct *work)
fa417f7b 1418{
d487ee77
MS		 1419 struct update_gid_work *gw =
1420 container_of(work, struct update_gid_work, work);
1421 struct mlx4_cmd_mailbox *mailbox;
1422 union ib_gid *gids;
1423 int err;
d487ee77 1424 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1425
4bf9715f
MS		 1426 if (!gw->dev->ib_active)
1427 return;
1428
d487ee77
MS		 1429 mailbox = mlx4_alloc_cmd_mailbox(dev);
1430 if (IS_ERR(mailbox)) {
1431 pr_warn("reset gid table failed\n");
1432 goto free;
1433 }
fa417f7b 1434
d487ee77
MS		 1435 gids = mailbox->buf;
1436 memcpy(gids, gw->gids, sizeof(gw->gids));
1437
5071456f
MS		 1438 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1439 IB_LINK_LAYER_ETHERNET) {
1440 err = mlx4_cmd(dev, mailbox->dma,
1441 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1442 1, MLX4_CMD_SET_PORT,
1443 MLX4_CMD_TIME_CLASS_B,
1444 MLX4_CMD_WRAPPED);
1445 if (err)
1446 pr_warn(KERN_WARNING
1447 "set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1448 }
1449
d487ee77
MS		 1450 mlx4_free_cmd_mailbox(dev, mailbox);
1451free:
1452 kfree(gw);
1453}
4c3eb3ca 1454
d487ee77 1455static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1456 union ib_gid *gid, int clear,
1457 int default_gid)
d487ee77
MS		 1458{
1459 struct update_gid_work *work;
1460 int i;
1461 int need_update = 0;
1462 int free = -1;
1463 int found = -1;
1464 int max_gids;
1465
acc4fccf
MS		 1466 if (default_gid) {
1467 free = 0;
1468 } else {
1469 max_gids = dev->dev->caps.gid_table_len[port];
1470 for (i = 1; i < max_gids; ++i) {
1471 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1472 sizeof(*gid)))
acc4fccf
MS		 1473 found = i;
1474
1475 if (clear) {
1476 if (found >= 0) {
1477 need_update = 1;
1478 dev->iboe.gid_table[port - 1][found] =
1479 zgid;
1480 break;
1481 }
1482 } else {
1483 if (found >= 0)
1484 break;
1485
1486 if (free < 0 &&
1487 !memcmp(&dev->iboe.gid_table[port - 1][i],
1488 &zgid, sizeof(*gid)))
1489 free = i;
1490 }
4c3eb3ca 1491 }
fa417f7b 1492 }
4c3eb3ca 1493
d487ee77
MS		 1494 if (found == -1 && !clear && free >= 0) {
1495 dev->iboe.gid_table[port - 1][free] = *gid;
1496 need_update = 1;
1497 }
fa417f7b 1498
d487ee77
MS		 1499 if (!need_update)
1500 return 0;
1501
1502 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1503 if (!work)
1504 return -ENOMEM;
1505
1506 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1507 INIT_WORK(&work->work, update_gids_task);
1508 work->port = port;
1509 work->dev = dev;
1510 queue_work(wq, &work->work);
fa417f7b
EC		 1511
1512 return 0;
d487ee77 1513}
4c3eb3ca 1514
acc4fccf 1515static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1516{
acc4fccf
MS		 1517 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1518 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1519}
1520
d487ee77 1521
5071456f 1522static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1523{
1524 struct update_gid_work *work;
d487ee77
MS		 1525
1526 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1527 if (!work)
1528 return -ENOMEM;
5071456f
MS		 1529
1530 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1531 memset(work->gids, 0, sizeof(work->gids));
1532 INIT_WORK(&work->work, reset_gids_task);
1533 work->dev = dev;
5071456f 1534 work->port = port;
d487ee77
MS		 1535 queue_work(wq, &work->work);
1536 return 0;
fa417f7b
EC		 1537}
1538
d487ee77
MS		 1539static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1540 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1541{
d487ee77
MS		 1542 struct mlx4_ib_iboe *iboe;
1543 int port = 0;
1544 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1545 rdma_vlan_dev_real_dev(event_netdev) :
1546 event_netdev;
acc4fccf
MS		 1547 union ib_gid default_gid;
1548
1549 mlx4_make_default_gid(real_dev, &default_gid);
1550
1551 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1552 return 0;
d487ee77
MS		 1553
1554 if (event != NETDEV_DOWN && event != NETDEV_UP)
1555 return 0;
1556
1557 if ((real_dev != event_netdev) &&
1558 (event == NETDEV_DOWN) &&
1559 rdma_link_local_addr((struct in6_addr *)gid))
1560 return 0;
1561
1562 iboe = &ibdev->iboe;
dba3ad2a 1563 spin_lock_bh(&iboe->lock);
d487ee77 1564
82373701 1565 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1566 if ((netif_is_bond_master(real_dev) &&
1567 (real_dev == iboe->masters[port - 1])) ||
1568 (!netif_is_bond_master(real_dev) &&
1569 (real_dev == iboe->netdevs[port - 1])))
1570 update_gid_table(ibdev, port, gid,
acc4fccf 1571 event == NETDEV_DOWN, 0);
d487ee77 1572
dba3ad2a 1573 spin_unlock_bh(&iboe->lock);
d487ee77 1574 return 0;
fa417f7b 1575
fa417f7b
EC		 1576}
1577
d487ee77
MS		 1578static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1579 struct mlx4_ib_dev *ibdev)
fa417f7b 1580{
d487ee77
MS		 1581 u8 port = 0;
1582 struct mlx4_ib_iboe *iboe;
1583 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1584 rdma_vlan_dev_real_dev(dev) : dev;
1585
1586 iboe = &ibdev->iboe;
d487ee77 1587
82373701 1588 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1589 if ((netif_is_bond_master(real_dev) &&
1590 (real_dev == iboe->masters[port - 1])) ||
1591 (!netif_is_bond_master(real_dev) &&
1592 (real_dev == iboe->netdevs[port - 1])))
1593 break;
1594
82373701 1595 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1596 return 0;
1597 else
1598 return port;
fa417f7b
EC		 1599}
1600
d487ee77
MS		 1601static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1602 void *ptr)
fa417f7b 1603{
d487ee77
MS		 1604 struct mlx4_ib_dev *ibdev;
1605 struct in_ifaddr *ifa = ptr;
1606 union ib_gid gid;
1607 struct net_device *event_netdev = ifa->ifa_dev->dev;
1608
1609 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1610
1611 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1612
1613 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1614 return NOTIFY_DONE;
fa417f7b
EC		 1615}
1616
27cdef63 1617#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1618static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1619 void *ptr)
1620{
fa417f7b 1621 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1622 struct inet6_ifaddr *ifa = ptr;
1623 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1624 struct net_device *event_netdev = ifa->idev->dev;
1625
1626 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1627
1628 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1629 return NOTIFY_DONE;
1630}
1631#endif
1632
9433c188
MB		 1633#define MLX4_IB_INVALID_MAC ((u64)-1)
1634static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1635 struct net_device *dev,
1636 int port)
1637{
1638 u64 new_smac = 0;
1639 u64 release_mac = MLX4_IB_INVALID_MAC;
1640 struct mlx4_ib_qp *qp;
1641
1642 read_lock(&dev_base_lock);
1643 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1644 read_unlock(&dev_base_lock);
1645
3e0629cb
JM		 1646 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1647
9433c188
MB		 1648 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1649 qp = ibdev->qp1_proxy[port - 1];
1650 if (qp) {
1651 int new_smac_index;
1652 u64 old_smac = qp->pri.smac;
1653 struct mlx4_update_qp_params update_params;
1654
1655 if (new_smac == old_smac)
1656 goto unlock;
1657
1658 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1659
1660 if (new_smac_index < 0)
1661 goto unlock;
1662
1663 update_params.smac_index = new_smac_index;
1664 if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC,
1665 &update_params)) {
1666 release_mac = new_smac;
1667 goto unlock;
1668 }
1669
1670 qp->pri.smac = new_smac;
1671 qp->pri.smac_index = new_smac_index;
1672
1673 release_mac = old_smac;
1674 }
1675
1676unlock:
1677 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
1678 if (release_mac != MLX4_IB_INVALID_MAC)
1679 mlx4_unregister_mac(ibdev->dev, port, release_mac);
1680}
1681
d487ee77
MS		 1682static void mlx4_ib_get_dev_addr(struct net_device *dev,
1683 struct mlx4_ib_dev *ibdev, u8 port)
1684{
1685 struct in_device *in_dev;
27cdef63 1686#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1687 struct inet6_dev *in6_dev;
1688 union ib_gid *pgid;
1689 struct inet6_ifaddr *ifp;
f5c4834d 1690 union ib_gid default_gid;
d487ee77
MS		 1691#endif
1692 union ib_gid gid;
1693
1694
82373701 1695 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1696 return;
1697
1698 /* IPv4 gids */
1699 in_dev = in_dev_get(dev);
1700 if (in_dev) {
1701 for_ifa(in_dev) {
1702 /*ifa->ifa_address;*/
1703 ipv6_addr_set_v4mapped(ifa->ifa_address,
1704 (struct in6_addr *)&gid);
acc4fccf 1705 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1706 }
1707 endfor_ifa(in_dev);
1708 in_dev_put(in_dev);
1709 }
27cdef63 1710#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1711 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1712 /* IPv6 gids */
1713 in6_dev = in6_dev_get(dev);
1714 if (in6_dev) {
1715 read_lock_bh(&in6_dev->lock);
1716 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1717 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1718 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1719 continue;
acc4fccf 1720 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1721 }
1722 read_unlock_bh(&in6_dev->lock);
1723 in6_dev_put(in6_dev);
1724 }
1725#endif
1726}
1727
acc4fccf
MS		 1728static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1729 struct net_device *dev, u8 port)
1730{
1731 union ib_gid gid;
1732 mlx4_make_default_gid(dev, &gid);
1733 update_gid_table(ibdev, port, &gid, 0, 1);
1734}
1735
d487ee77
MS		 1736static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1737{
1738 struct net_device *dev;
ddf8bd34 1739 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1740 int i;
655b2aae 1741 int err = 0;
d487ee77 1742
655b2aae
MS		 1743 for (i = 1; i <= ibdev->num_ports; ++i) {
1744 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1745 IB_LINK_LAYER_ETHERNET) {
1746 err = reset_gid_table(ibdev, i);
1747 if (err)
1748 goto out;
1749 }
1750 }
d487ee77
MS		 1751
1752 read_lock(&dev_base_lock);
dba3ad2a 1753 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1754
1755 for_each_netdev(&init_net, dev) {
1756 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1757 /* port will be non-zero only for ETH ports */
1758 if (port) {
1759 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1760 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1761 }
d487ee77
MS		 1762 }
1763
dba3ad2a 1764 spin_unlock_bh(&iboe->lock);
d487ee77 1765 read_unlock(&dev_base_lock);
655b2aae
MS		 1766out:
1767 return err;
d487ee77
MS		 1768}
1769
9433c188
MB		 1770static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1771 struct net_device *dev,
1772 unsigned long event)
1773
d487ee77 1774{
fa417f7b 1775 struct mlx4_ib_iboe *iboe;
9433c188 1776 int update_qps_port = -1;
fa417f7b
EC		 1777 int port;
1778
fa417f7b
EC		 1779 iboe = &ibdev->iboe;
1780
dba3ad2a 1781 spin_lock_bh(&iboe->lock);
fa417f7b 1782 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1783 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1784 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1785 struct net_device *curr_netdev;
d487ee77 1786 struct net_device *curr_master;
ad4885d2 1787
fa417f7b 1788 iboe->netdevs[port - 1] =
0345584e 1789 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1790 if (iboe->netdevs[port - 1])
1791 mlx4_ib_set_default_gid(ibdev,
1792 iboe->netdevs[port - 1], port);
ad4885d2 1793 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1794
1795 if (iboe->netdevs[port - 1] &&
1796 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1797 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1798 iboe->netdevs[port - 1]);
ad4885d2
MS		 1799 } else {
1800 iboe->masters[port - 1] = NULL;
fa417f7b 1801 }
d487ee77 1802 curr_master = iboe->masters[port - 1];
fa417f7b 1803
9433c188
MB		 1804 if (dev == iboe->netdevs[port - 1] &&
1805 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1806 event == NETDEV_UP || event == NETDEV_CHANGE))
1807 update_qps_port = port;
1808
ad4885d2
MS		 1809 if (curr_netdev) {
1810 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1811 IB_PORT_ACTIVE : IB_PORT_DOWN;
1812 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1813 if (curr_master) {
1814 /* if using bonding/team and a slave port is down, we
1815 * don't want the bond IP based gids in the table since
1816 * flows that select port by gid may get the down port.
1817 */
1818 if (port_state == IB_PORT_DOWN) {
1819 reset_gid_table(ibdev, port);
1820 mlx4_ib_set_default_gid(ibdev,
1821 curr_netdev,
1822 port);
1823 } else {
1824 /* gids from the upper dev (bond/team)
1825 * should appear in port's gid table
1826 */
1827 mlx4_ib_get_dev_addr(curr_master,
1828 ibdev, port);
1829 }
e381835c
MS		 1830 }
1831 /* if bonding is used it is possible that we add it to
1832 * masters only after IP address is assigned to the
1833 * net bonding interface.
1834 */
1835 if (curr_master && (old_master != curr_master)) {
1836 reset_gid_table(ibdev, port);
1837 mlx4_ib_set_default_gid(ibdev,
1838 curr_netdev, port);
1839 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1840 }
ad4885d2 1841
e381835c
MS		 1842 if (!curr_master && (old_master != curr_master)) {
1843 reset_gid_table(ibdev, port);
1844 mlx4_ib_set_default_gid(ibdev,
1845 curr_netdev, port);
1846 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1847 }
1848 } else {
ad4885d2 1849 reset_gid_table(ibdev, port);
ad4885d2 1850 }
d487ee77 1851 }
fa417f7b 1852
dba3ad2a 1853 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1854
1855 if (update_qps_port > 0)
1856 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 1857}
1858
1859static int mlx4_ib_netdev_event(struct notifier_block *this,
1860 unsigned long event, void *ptr)
1861{
1862 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1863 struct mlx4_ib_dev *ibdev;
1864
1865 if (!net_eq(dev_net(dev), &init_net))
1866 return NOTIFY_DONE;
1867
1868 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 1869 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 1870
1871 return NOTIFY_DONE;
1872}
1873
54679e14
JM		 1874static void init_pkeys(struct mlx4_ib_dev *ibdev)
1875{
1876 int port;
1877 int slave;
1878 int i;
1879
1880 if (mlx4_is_master(ibdev->dev)) {
1881 for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
1882 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1883 for (i = 0;
1884 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1885 ++i) {
1886 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
1887 /* master has the identity virt2phys pkey mapping */
1888 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
1889 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
1890 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
1891 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
1892 }
1893 }
1894 }
1895 /* initialize pkey cache */
1896 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1897 for (i = 0;
1898 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1899 ++i)
1900 ibdev->pkeys.phys_pkey_cache[port-1][i] =
1901 (i) ? 0 : 0xFFFF;
1902 }
1903 }
1904}
1905
e605b743
SP		 1906static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1907{
4661bd79 1908 char name[80];
e605b743
SP		 1909 int eq_per_port = 0;
1910 int added_eqs = 0;
1911 int total_eqs = 0;
1912 int i, j, eq;
1913
3aac6ff1
SP		 1914 /* Legacy mode or comp_pool is not large enough */
1915 if (dev->caps.comp_pool == 0 ||
1916 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 1917 return;
1918
1919 eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
1920 dev->caps.num_ports);
1921
1922 /* Init eq table */
1923 added_eqs = 0;
1924 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
1925 added_eqs += eq_per_port;
1926
1927 total_eqs = dev->caps.num_comp_vectors + added_eqs;
1928
1929 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
1930 if (!ibdev->eq_table)
1931 return;
1932
1933 ibdev->eq_added = added_eqs;
1934
1935 eq = 0;
1936 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
1937 for (j = 0; j < eq_per_port; j++) {
4661bd79
DC		 1938 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
1939 i, j, dev->pdev->bus->name);
e605b743 1940 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 1941 if (mlx4_assign_eq(dev, name, NULL,
1942 &ibdev->eq_table[eq])) {
e605b743
SP		 1943 /* Use legacy (same as mlx4_en driver) */
1944 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
1945 ibdev->eq_table[eq] =
1946 (eq % dev->caps.num_comp_vectors);
1947 }
1948 eq++;
1949 }
1950 }
1951
1952 /* Fill the reset of the vector with legacy EQ */
1953 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
1954 ibdev->eq_table[eq++] = i;
1955
1956 /* Advertise the new number of EQs to clients */
1957 ibdev->ib_dev.num_comp_vectors = total_eqs;
1958}
1959
1960static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1961{
1962 int i;
3aac6ff1
SP		 1963
1964 /* no additional eqs were added */
1965 if (!ibdev->eq_table)
1966 return;
e605b743
SP		 1967
1968 /* Reset the advertised EQ number */
1969 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
1970
1971 /* Free only the added eqs */
1972 for (i = 0; i < ibdev->eq_added; i++) {
1973 /* Don't free legacy eqs if used */
1974 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
1975 continue;
1976 mlx4_release_eq(dev, ibdev->eq_table[i]);
1977 }
1978
e605b743 1979 kfree(ibdev->eq_table);
e605b743
SP		 1980}
1981
225c7b1f
RD		 1982static void *mlx4_ib_add(struct mlx4_dev *dev)
1983{
1984 struct mlx4_ib_dev *ibdev;
22e7ef9c 1985 int num_ports = 0;
035b1032 1986 int i, j;
fa417f7b
EC		 1987 int err;
1988 struct mlx4_ib_iboe *iboe;
4196670b 1989 int ib_num_ports = 0;
225c7b1f 1990
987c8f8f 1991 pr_info_once("%s", mlx4_ib_version);
68f3948d 1992
026149cb 1993 num_ports = 0;
fa417f7b 1994 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 1995 num_ports++;
1996
1997 /* No point in registering a device with no ports... */
1998 if (num_ports == 0)
1999 return NULL;
2000
225c7b1f
RD		 2001 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2002 if (!ibdev) {
2003 dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
2004 return NULL;
2005 }
2006
fa417f7b
EC		 2007 iboe = &ibdev->iboe;
2008
225c7b1f
RD		 2009 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2010 goto err_dealloc;
2011
2012 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2013 goto err_pd;
2014
4979d18f
RD		 2015 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2016 PAGE_SIZE);
225c7b1f
RD		 2017 if (!ibdev->uar_map)
2018 goto err_uar;
26c6bc7b 2019 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2020
225c7b1f
RD		 2021 ibdev->dev = dev;
2022
2023 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2024 ibdev->ib_dev.owner = THIS_MODULE;
2025 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2026 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2027 ibdev->num_ports = num_ports;
7ff93f8b 2028 ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
b8dd786f 2029 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
225c7b1f
RD		 2030 ibdev->ib_dev.dma_device = &dev->pdev->dev;
2031
08ff3235
OG		 2032 if (dev->caps.userspace_caps)
2033 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2034 else
2035 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2036
225c7b1f
RD		 2037 ibdev->ib_dev.uverbs_cmd_mask =
2038 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2039 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2040 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2041 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2042 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2043 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2044 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2045 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2046 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2047 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2048 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2049 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2050 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2051 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2052 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2053 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2054 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2055 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2056 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2057 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2058 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2059 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2060 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2061 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2062
2063 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2064 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2065 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2066 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2067 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2068 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2069 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2070 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2071 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2072 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2073 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2074 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2075 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2076 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2077 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2078 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2079 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2080 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2081 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2082 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2083 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2084 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2085 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2086 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2087 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2088 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2089 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2090 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2091 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2092 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2093 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2094 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2095 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2096 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2097 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2098 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2099 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2100 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2101 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2102 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2103 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2104 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2105
992e8e6e
JM		 2106 if (!mlx4_is_slave(ibdev->dev)) {
2107 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2108 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2109 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2110 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2111 }
8ad11fb6 2112
b425388d
SM		 2113 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2114 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2115 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2116 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2117 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2118
2119 ibdev->ib_dev.uverbs_cmd_mask |=
2120 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2121 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2122 }
2123
012a8ff5
SH		 2124 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2125 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2126 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2127 ibdev->ib_dev.uverbs_cmd_mask |=
2128 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2129 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2130 }
2131
f77c0162 2132 if (check_flow_steering_support(dev)) {
0a9b7d59 2133 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2134 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2135 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2136
f21519b2
YD		 2137 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2138 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2139 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2140 }
2141
e605b743
SP		 2142 mlx4_ib_alloc_eqs(dev, ibdev);
2143
fa417f7b
EC		 2144 spin_lock_init(&iboe->lock);
2145
225c7b1f
RD		 2146 if (init_node_data(ibdev))
2147 goto err_map;
2148
cfcde11c 2149 for (i = 0; i < ibdev->num_ports; ++i) {
9433c188 2150 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2151 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2152 IB_LINK_LAYER_ETHERNET) {
2153 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2154 if (err)
2155 ibdev->counters[i] = -1;
3839d8ac
DC		 2156 } else {
2157 ibdev->counters[i] = -1;
2158 }
cfcde11c
OG		 2159 }
2160
4196670b
MB		 2161 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2162 ib_num_ports++;
2163
225c7b1f
RD		 2164 spin_lock_init(&ibdev->sm_lock);
2165 mutex_init(&ibdev->cap_mask_mutex);
2166
4196670b
MB		 2167 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2168 ib_num_ports) {
c1c98501
MB		 2169 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2170 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2171 MLX4_IB_UC_STEER_QPN_ALIGN,
2172 &ibdev->steer_qpn_base);
2173 if (err)
2174 goto err_counter;
2175
2176 ibdev->ib_uc_qpns_bitmap =
2177 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2178 sizeof(long),
2179 GFP_KERNEL);
2180 if (!ibdev->ib_uc_qpns_bitmap) {
2181 dev_err(&dev->pdev->dev, "bit map alloc failed\n");
2182 goto err_steer_qp_release;
2183 }
2184
2185 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2186
2187 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2188 dev, ibdev->steer_qpn_base,
2189 ibdev->steer_qpn_base +
2190 ibdev->steer_qpn_count - 1);
2191 if (err)
2192 goto err_steer_free_bitmap;
2193 }
2194
3e0629cb
JM		 2195 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2196 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2197
9a6edb60 2198 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2199 goto err_steer_free_bitmap;
225c7b1f
RD		 2200
2201 if (mlx4_ib_mad_init(ibdev))
2202 goto err_reg;
2203
fc06573d
JM		 2204 if (mlx4_ib_init_sriov(ibdev))
2205 goto err_mad;
2206
d487ee77
MS		 2207 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2208 if (!iboe->nb.notifier_call) {
2209 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2210 err = register_netdevice_notifier(&iboe->nb);
2211 if (err) {
2212 iboe->nb.notifier_call = NULL;
2213 goto err_notif;
2214 }
2215 }
2216 if (!iboe->nb_inet.notifier_call) {
2217 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2218 err = register_inetaddr_notifier(&iboe->nb_inet);
2219 if (err) {
2220 iboe->nb_inet.notifier_call = NULL;
2221 goto err_notif;
2222 }
2223 }
27cdef63 2224#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2225 if (!iboe->nb_inet6.notifier_call) {
2226 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2227 err = register_inet6addr_notifier(&iboe->nb_inet6);
2228 if (err) {
2229 iboe->nb_inet6.notifier_call = NULL;
2230 goto err_notif;
2231 }
2232 }
2233#endif
655b2aae
MS		 2234 if (mlx4_ib_init_gid_table(ibdev))
2235 goto err_notif;
fa417f7b
EC		 2236 }
2237
035b1032 2238 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2239 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2240 mlx4_class_attributes[j]))
fa417f7b 2241 goto err_notif;
cd9281d8
JM		 2242 }
2243
3b4a8cd5
JM		 2244 ibdev->ib_active = true;
2245
54679e14
JM		 2246 if (mlx4_is_mfunc(ibdev->dev))
2247 init_pkeys(ibdev);
2248
3806d08c
JM		 2249 /* create paravirt contexts for any VFs which are active */
2250 if (mlx4_is_master(ibdev->dev)) {
2251 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2252 if (j == mlx4_master_func_num(ibdev->dev))
2253 continue;
2254 if (mlx4_is_slave_active(ibdev->dev, j))
2255 do_slave_init(ibdev, j, 1);
2256 }
2257 }
225c7b1f
RD		 2258 return ibdev;
2259
fa417f7b 2260err_notif:
d487ee77
MS		 2261 if (ibdev->iboe.nb.notifier_call) {
2262 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2263 pr_warn("failure unregistering notifier\n");
2264 ibdev->iboe.nb.notifier_call = NULL;
2265 }
2266 if (ibdev->iboe.nb_inet.notifier_call) {
2267 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2268 pr_warn("failure unregistering notifier\n");
2269 ibdev->iboe.nb_inet.notifier_call = NULL;
2270 }
27cdef63 2271#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2272 if (ibdev->iboe.nb_inet6.notifier_call) {
2273 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2274 pr_warn("failure unregistering notifier\n");
2275 ibdev->iboe.nb_inet6.notifier_call = NULL;
2276 }
2277#endif
fa417f7b
EC		 2278 flush_workqueue(wq);
2279
fc06573d
JM		 2280 mlx4_ib_close_sriov(ibdev);
2281
2282err_mad:
2283 mlx4_ib_mad_cleanup(ibdev);
2284
225c7b1f
RD		 2285err_reg:
2286 ib_unregister_device(&ibdev->ib_dev);
2287
c1c98501
MB		 2288err_steer_free_bitmap:
2289 kfree(ibdev->ib_uc_qpns_bitmap);
2290
2291err_steer_qp_release:
2292 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2293 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2294 ibdev->steer_qpn_count);
cfcde11c
OG		 2295err_counter:
2296 for (; i; --i)
4af3ce0d
RD		 2297 if (ibdev->counters[i - 1] != -1)
2298 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2299
225c7b1f
RD		 2300err_map:
2301 iounmap(ibdev->uar_map);
2302
2303err_uar:
2304 mlx4_uar_free(dev, &ibdev->priv_uar);
2305
2306err_pd:
2307 mlx4_pd_free(dev, ibdev->priv_pdn);
2308
2309err_dealloc:
2310 ib_dealloc_device(&ibdev->ib_dev);
2311
2312 return NULL;
2313}
2314
c1c98501
MB		 2315int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2316{
2317 int offset;
2318
2319 WARN_ON(!dev->ib_uc_qpns_bitmap);
2320
2321 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2322 dev->steer_qpn_count,
2323 get_count_order(count));
2324 if (offset < 0)
2325 return offset;
2326
2327 *qpn = dev->steer_qpn_base + offset;
2328 return 0;
2329}
2330
2331void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2332{
2333 if (!qpn ||
2334 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2335 return;
2336
2337 BUG_ON(qpn < dev->steer_qpn_base);
2338
2339 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2340 qpn - dev->steer_qpn_base,
2341 get_count_order(count));
2342}
2343
2344int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2345 int is_attach)
2346{
2347 int err;
2348 size_t flow_size;
2349 struct ib_flow_attr *flow = NULL;
2350 struct ib_flow_spec_ib *ib_spec;
2351
2352 if (is_attach) {
2353 flow_size = sizeof(struct ib_flow_attr) +
2354 sizeof(struct ib_flow_spec_ib);
2355 flow = kzalloc(flow_size, GFP_KERNEL);
2356 if (!flow)
2357 return -ENOMEM;
2358 flow->port = mqp->port;
2359 flow->num_of_specs = 1;
2360 flow->size = flow_size;
2361 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2362 ib_spec->type = IB_FLOW_SPEC_IB;
2363 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2364 /* Add an empty rule for IB L2 */
2365 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2366
2367 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2368 IB_FLOW_DOMAIN_NIC,
2369 MLX4_FS_REGULAR,
2370 &mqp->reg_id);
2371 } else {
2372 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2373 }
2374 kfree(flow);
2375 return err;
2376}
2377
225c7b1f
RD		 2378static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2379{
2380 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2381 int p;
2382
4bf9715f
MS		 2383 ibdev->ib_active = false;
2384 flush_workqueue(wq);
2385
fc06573d 2386 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2387 mlx4_ib_mad_cleanup(ibdev);
2388 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2389 if (ibdev->iboe.nb.notifier_call) {
2390 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2391 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2392 ibdev->iboe.nb.notifier_call = NULL;
2393 }
c1c98501
MB		 2394
2395 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2396 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2397 ibdev->steer_qpn_count);
2398 kfree(ibdev->ib_uc_qpns_bitmap);
2399 }
2400
d487ee77
MS		 2401 if (ibdev->iboe.nb_inet.notifier_call) {
2402 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2403 pr_warn("failure unregistering notifier\n");
2404 ibdev->iboe.nb_inet.notifier_call = NULL;
2405 }
27cdef63 2406#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2407 if (ibdev->iboe.nb_inet6.notifier_call) {
2408 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2409 pr_warn("failure unregistering notifier\n");
2410 ibdev->iboe.nb_inet6.notifier_call = NULL;
2411 }
2412#endif
fb1b5034 2413
fa417f7b 2414 iounmap(ibdev->uar_map);
cfcde11c 2415 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2416 if (ibdev->counters[p] != -1)
2417 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2418 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2419 mlx4_CLOSE_PORT(dev, p);
2420
e605b743
SP		 2421 mlx4_ib_free_eqs(dev, ibdev);
2422
225c7b1f
RD		 2423 mlx4_uar_free(dev, &ibdev->priv_uar);
2424 mlx4_pd_free(dev, ibdev->priv_pdn);
2425 ib_dealloc_device(&ibdev->ib_dev);
2426}
2427
fc06573d
JM		 2428static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2429{
2430 struct mlx4_ib_demux_work **dm = NULL;
2431 struct mlx4_dev *dev = ibdev->dev;
2432 int i;
2433 unsigned long flags;
449fc488
MB		 2434 struct mlx4_active_ports actv_ports;
2435 unsigned int ports;
2436 unsigned int first_port;
fc06573d
JM		 2437
2438 if (!mlx4_is_master(dev))
2439 return;
2440
449fc488
MB		 2441 actv_ports = mlx4_get_active_ports(dev, slave);
2442 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2443 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2444
2445 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2446 if (!dm) {
2447 pr_err("failed to allocate memory for tunneling qp update\n");
2448 goto out;
2449 }
2450
449fc488 2451 for (i = 0; i < ports; i++) {
fc06573d
JM		 2452 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2453 if (!dm[i]) {
2454 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2455 for (i = 0; i < dev->caps.num_ports; i++) {
2456 if (dm[i])
2457 kfree(dm[i]);
2458 }
2459 goto out;
2460 }
2461 }
2462 /* initialize or tear down tunnel QPs for the slave */
449fc488 2463 for (i = 0; i < ports; i++) {
fc06573d 2464 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2465 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2466 dm[i]->slave = slave;
2467 dm[i]->do_init = do_init;
2468 dm[i]->dev = ibdev;
2469 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2470 if (!ibdev->sriov.is_going_down)
2471 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2472 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2473 }
2474out:
c89d1271 2475 kfree(dm);
fc06573d
JM		 2476 return;
2477}
2478
225c7b1f 2479static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2480 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2481{
2482 struct ib_event ibev;
7ff93f8b 2483 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2484 struct mlx4_eqe *eqe = NULL;
2485 struct ib_event_work *ew;
fc06573d 2486 int p = 0;
00f5ce99
JM		 2487
2488 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2489 eqe = (struct mlx4_eqe *)param;
2490 else
fc06573d 2491 p = (int) param;
225c7b1f
RD		 2492
2493 switch (event) {
37608eea 2494 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2495 if (p > ibdev->num_ports)
2496 return;
a0c64a17
JM		 2497 if (mlx4_is_master(dev) &&
2498 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2499 IB_LINK_LAYER_INFINIBAND) {
2500 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2501 }
37608eea 2502 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2503 break;
2504
37608eea 2505 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2506 if (p > ibdev->num_ports)
2507 return;
37608eea
RD		 2508 ibev.event = IB_EVENT_PORT_ERR;
2509 break;
2510
2511 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2512 ibdev->ib_active = false;
225c7b1f
RD		 2513 ibev.event = IB_EVENT_DEVICE_FATAL;
2514 break;
2515
00f5ce99
JM		 2516 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2517 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2518 if (!ew) {
2519 pr_err("failed to allocate memory for events work\n");
2520 break;
2521 }
2522
2523 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2524 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2525 ew->ib_dev = ibdev;
992e8e6e
JM		 2526 /* need to queue only for port owner, which uses GEN_EQE */
2527 if (mlx4_is_master(dev))
2528 queue_work(wq, &ew->work);
2529 else
2530 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2531 return;
2532
fc06573d
JM		 2533 case MLX4_DEV_EVENT_SLAVE_INIT:
2534 /* here, p is the slave id */
2535 do_slave_init(ibdev, p, 1);
2536 return;
2537
2538 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2539 /* here, p is the slave id */
2540 do_slave_init(ibdev, p, 0);
2541 return;
2542
225c7b1f
RD		 2543 default:
2544 return;
2545 }
2546
2547 ibev.device = ibdev_ptr;
fc06573d 2548 ibev.element.port_num = (u8) p;
225c7b1f
RD		 2549
2550 ib_dispatch_event(&ibev);
2551}
2552
2553static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2554 .add = mlx4_ib_add,
2555 .remove = mlx4_ib_remove,
2556 .event = mlx4_ib_event,
0345584e 2557 .protocol = MLX4_PROT_IB_IPV6
225c7b1f
RD		 2558};
2559
2560static int __init mlx4_ib_init(void)
2561{
fa417f7b
EC		 2562 int err;
2563
2564 wq = create_singlethread_workqueue("mlx4_ib");
2565 if (!wq)
2566 return -ENOMEM;
2567
b9c5d6a6
OD		 2568 err = mlx4_ib_mcg_init();
2569 if (err)
2570 goto clean_wq;
2571
fa417f7b 2572 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2573 if (err)
2574 goto clean_mcg;
fa417f7b
EC		 2575
2576 return 0;
b9c5d6a6
OD		 2577
2578clean_mcg:
2579 mlx4_ib_mcg_destroy();
2580
2581clean_wq:
2582 destroy_workqueue(wq);
2583 return err;
225c7b1f
RD		 2584}
2585
2586static void __exit mlx4_ib_cleanup(void)
2587{
2588 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2589 mlx4_ib_mcg_destroy();
fa417f7b 2590 destroy_workqueue(wq);
225c7b1f
RD		 2591}
2592
2593module_init(mlx4_ib_init);
2594module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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