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IB/mlx4: Add mmap call to map the hardware clock
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
56c1d233 69int mlx4_ib_sm_guid_assign = 0;
a0c64a17 70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
56c1d233 71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
a0c64a17 72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f 134static int mlx4_ib_query_device(struct ib_device *ibdev,
2528e33e
MB		 135 struct ib_device_attr *props,
136 struct ib_udata *uhw)
225c7b1f
RD		 137{
138 struct mlx4_ib_dev *dev = to_mdev(ibdev);
139 struct ib_smp *in_mad = NULL;
140 struct ib_smp *out_mad = NULL;
141 int err = -ENOMEM;
3dec4878 142 int have_ib_ports;
225c7b1f 143
2528e33e
MB		 144 if (uhw->inlen || uhw->outlen)
145 return -EINVAL;
146
225c7b1f
RD		 147 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
148 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
149 if (!in_mad || !out_mad)
150 goto out;
151
152 init_query_mad(in_mad);
153 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
154
0a9a0188
JM		 155 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
156 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 157 if (err)
158 goto out;
159
160 memset(props, 0, sizeof *props);
161
3dec4878
JM		 162 have_ib_ports = num_ib_ports(dev->dev);
163
225c7b1f
RD		 164 props->fw_ver = dev->dev->caps.fw_ver;
165 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
166 IB_DEVICE_PORT_ACTIVE_EVENT |
167 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 168 IB_DEVICE_RC_RNR_NAK_GEN |
169 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
171 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
173 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 175 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
176 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
177 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 178 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
179 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 180 if (dev->dev->caps.max_gso_sz &&
181 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
182 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 183 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 184 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
185 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
186 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
187 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
188 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
189 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 190 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
191 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 192 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
193 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
194 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
195 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
196 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
197 else
198 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 199 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 200 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 201 }
225c7b1f
RD		 202
203 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
204 0xffffff;
872bf2fb 205 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 206 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
207 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
208
209 props->max_mr_size = ~0ull;
210 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 211 props->max_qp = dev->dev->quotas.qp;
fc2d0044 212 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 213 props->max_sge = min(dev->dev->caps.max_sq_sg,
214 dev->dev->caps.max_rq_sg);
5a0d0a61 215 props->max_cq = dev->dev->quotas.cq;
225c7b1f 216 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 217 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 218 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
219 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
220 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
221 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 222 props->max_srq = dev->dev->quotas.srq;
c8681f14 223 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 224 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 225 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 226 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
227 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
228 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 229 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 230 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 231 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
232 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
233 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
234 props->max_mcast_grp;
a5bbe892 235 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 236
237out:
238 kfree(in_mad);
239 kfree(out_mad);
240
241 return err;
242}
243
fa417f7b
EC		 244static enum rdma_link_layer
245mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 246{
fa417f7b 247 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 248
65dab25d 249 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 250 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
251}
225c7b1f 252
fa417f7b 253static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 254 struct ib_port_attr *props, int netw_view)
fa417f7b 255{
a9c766bb
OG		 256 struct ib_smp *in_mad = NULL;
257 struct ib_smp *out_mad = NULL;
a5e12dff 258 int ext_active_speed;
0a9a0188 259 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 260 int err = -ENOMEM;
261
262 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
263 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
264 if (!in_mad || !out_mad)
265 goto out;
266
267 init_query_mad(in_mad);
268 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
269 in_mad->attr_mod = cpu_to_be32(port);
270
0a9a0188
JM		 271 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
272 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
273
274 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 275 in_mad, out_mad);
276 if (err)
277 goto out;
278
a5e12dff 279
225c7b1f
RD		 280 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
281 props->lmc = out_mad->data[34] & 0x7;
282 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
283 props->sm_sl = out_mad->data[36] & 0xf;
284 props->state = out_mad->data[32] & 0xf;
285 props->phys_state = out_mad->data[33] >> 4;
286 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 287 if (netw_view)
288 props->gid_tbl_len = out_mad->data[50];
289 else
290 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 291 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 292 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 293 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
294 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
295 props->active_width = out_mad->data[31] & 0xf;
296 props->active_speed = out_mad->data[35] >> 4;
297 props->max_mtu = out_mad->data[41] & 0xf;
298 props->active_mtu = out_mad->data[36] >> 4;
299 props->subnet_timeout = out_mad->data[51] & 0x1f;
300 props->max_vl_num = out_mad->data[37] >> 4;
301 props->init_type_reply = out_mad->data[41] >> 4;
302
a5e12dff
MA		 303 /* Check if extended speeds (EDR/FDR/...) are supported */
304 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
305 ext_active_speed = out_mad->data[62] >> 4;
306
307 switch (ext_active_speed) {
308 case 1:
2e96691c 309 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 310 break;
311 case 2:
2e96691c 312 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 313 break;
314 }
315 }
316
317 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 318 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 319 init_query_mad(in_mad);
320 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
321 in_mad->attr_mod = cpu_to_be32(port);
322
0a9a0188 323 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 324 NULL, NULL, in_mad, out_mad);
325 if (err)
bf6b47de 326 goto out;
8154c07f
OG		 327
328 /* Checking LinkSpeedActive for FDR-10 */
329 if (out_mad->data[15] & 0x1)
330 props->active_speed = IB_SPEED_FDR10;
a5e12dff 331 }
d2ef4068
OG		 332
333 /* Avoid wrong speed value returned by FW if the IB link is down. */
334 if (props->state == IB_PORT_DOWN)
335 props->active_speed = IB_SPEED_SDR;
336
a9c766bb
OG		 337out:
338 kfree(in_mad);
339 kfree(out_mad);
340 return err;
fa417f7b
EC		 341}
342
343static u8 state_to_phys_state(enum ib_port_state state)
344{
345 return state == IB_PORT_ACTIVE ? 5 : 3;
346}
347
348static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 349 struct ib_port_attr *props, int netw_view)
fa417f7b 350{
a9c766bb
OG		 351
352 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
353 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 354 struct net_device *ndev;
355 enum ib_mtu tmp;
a9c766bb
OG		 356 struct mlx4_cmd_mailbox *mailbox;
357 int err = 0;
a5750090 358 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 359
360 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
361 if (IS_ERR(mailbox))
362 return PTR_ERR(mailbox);
fa417f7b 363
a9c766bb
OG		 364 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
365 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
366 MLX4_CMD_WRAPPED);
367 if (err)
368 goto out;
369
370 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
371 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 372 props->active_speed = IB_SPEED_QDR;
b4a26a27 373 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 374 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
375 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 376 props->pkey_tbl_len = 1;
bcacb897 377 props->max_mtu = IB_MTU_4096;
a9c766bb 378 props->max_vl_num = 2;
fa417f7b
EC		 379 props->state = IB_PORT_DOWN;
380 props->phys_state = state_to_phys_state(props->state);
381 props->active_mtu = IB_MTU_256;
a5750090
MS		 382 if (is_bonded)
383 rtnl_lock(); /* required to get upper dev */
dba3ad2a 384 spin_lock_bh(&iboe->lock);
fa417f7b 385 ndev = iboe->netdevs[port - 1];
a5750090
MS		 386 if (ndev && is_bonded)
387 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 388 if (!ndev)
a9c766bb 389 goto out_unlock;
fa417f7b
EC		 390
391 tmp = iboe_get_mtu(ndev->mtu);
392 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
393
21d60609 394 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 395 IB_PORT_ACTIVE : IB_PORT_DOWN;
396 props->phys_state = state_to_phys_state(props->state);
a9c766bb 397out_unlock:
dba3ad2a 398 spin_unlock_bh(&iboe->lock);
a5750090
MS		 399 if (is_bonded)
400 rtnl_unlock();
a9c766bb
OG		 401out:
402 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
403 return err;
fa417f7b
EC		 404}
405
0a9a0188
JM		 406int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
407 struct ib_port_attr *props, int netw_view)
fa417f7b 408{
a9c766bb 409 int err;
fa417f7b
EC		 410
411 memset(props, 0, sizeof *props);
412
fa417f7b 413 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 414 ib_link_query_port(ibdev, port, props, netw_view) :
415 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 416
417 return err;
418}
419
0a9a0188
JM		 420static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
421 struct ib_port_attr *props)
422{
423 /* returns host view */
424 return __mlx4_ib_query_port(ibdev, port, props, 0);
425}
426
a0c64a17
JM		 427int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
428 union ib_gid *gid, int netw_view)
225c7b1f
RD		 429{
430 struct ib_smp *in_mad = NULL;
431 struct ib_smp *out_mad = NULL;
432 int err = -ENOMEM;
a0c64a17
JM		 433 struct mlx4_ib_dev *dev = to_mdev(ibdev);
434 int clear = 0;
435 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 436
437 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
438 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
439 if (!in_mad || !out_mad)
440 goto out;
441
442 init_query_mad(in_mad);
443 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
444 in_mad->attr_mod = cpu_to_be32(port);
445
a0c64a17
JM		 446 if (mlx4_is_mfunc(dev->dev) && netw_view)
447 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
448
449 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 450 if (err)
451 goto out;
452
453 memcpy(gid->raw, out_mad->data + 8, 8);
454
a0c64a17
JM		 455 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
456 if (index) {
457 /* For any index > 0, return the null guid */
458 err = 0;
459 clear = 1;
460 goto out;
461 }
462 }
463
225c7b1f
RD		 464 init_query_mad(in_mad);
465 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
466 in_mad->attr_mod = cpu_to_be32(index / 8);
467
a0c64a17 468 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 469 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 470 if (err)
471 goto out;
472
473 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
474
475out:
a0c64a17
JM		 476 if (clear)
477 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 478 kfree(in_mad);
479 kfree(out_mad);
480 return err;
481}
482
fa417f7b
EC		 483static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
484 union ib_gid *gid)
485{
486 struct mlx4_ib_dev *dev = to_mdev(ibdev);
487
488 *gid = dev->iboe.gid_table[port - 1][index];
489
490 return 0;
491}
492
493static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
494 union ib_gid *gid)
495{
496 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 497 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 498 else
499 return iboe_query_gid(ibdev, port, index, gid);
500}
501
0a9a0188
JM		 502int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
503 u16 *pkey, int netw_view)
225c7b1f
RD		 504{
505 struct ib_smp *in_mad = NULL;
506 struct ib_smp *out_mad = NULL;
0a9a0188 507 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 508 int err = -ENOMEM;
509
510 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
511 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
512 if (!in_mad || !out_mad)
513 goto out;
514
515 init_query_mad(in_mad);
516 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
517 in_mad->attr_mod = cpu_to_be32(index / 32);
518
0a9a0188
JM		 519 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
520 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
521
522 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
523 in_mad, out_mad);
225c7b1f
RD		 524 if (err)
525 goto out;
526
527 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
528
529out:
530 kfree(in_mad);
531 kfree(out_mad);
532 return err;
533}
534
0a9a0188
JM		 535static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
536{
537 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
538}
539
225c7b1f
RD		 540static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
541 struct ib_device_modify *props)
542{
d0d68b86 543 struct mlx4_cmd_mailbox *mailbox;
df7fba66 544 unsigned long flags;
d0d68b86 545
225c7b1f
RD		 546 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
547 return -EOPNOTSUPP;
548
d0d68b86
JM		 549 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
550 return 0;
551
992e8e6e
JM		 552 if (mlx4_is_slave(to_mdev(ibdev)->dev))
553 return -EOPNOTSUPP;
554
df7fba66 555 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 556 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 557 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 558
559 /*
560 * If possible, pass node desc to FW, so it can generate
561 * a 144 trap. If cmd fails, just ignore.
562 */
563 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
564 if (IS_ERR(mailbox))
565 return 0;
566
d0d68b86
JM		 567 memcpy(mailbox->buf, props->node_desc, 64);
568 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 569 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 570
571 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 572
573 return 0;
574}
575
61565013
JM		 576static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
577 u32 cap_mask)
225c7b1f
RD		 578{
579 struct mlx4_cmd_mailbox *mailbox;
580 int err;
581
582 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
583 if (IS_ERR(mailbox))
584 return PTR_ERR(mailbox);
585
5ae2a7a8
RD		 586 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
587 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
588 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
589 } else {
590 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
591 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
592 }
225c7b1f 593
a130b590
IS		 594 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
595 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
596 MLX4_CMD_WRAPPED);
225c7b1f
RD		 597
598 mlx4_free_cmd_mailbox(dev->dev, mailbox);
599 return err;
600}
601
602static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
603 struct ib_port_modify *props)
604{
61565013
JM		 605 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
606 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 607 struct ib_port_attr attr;
608 u32 cap_mask;
609 int err;
610
61565013
JM		 611 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
612 * of whether port link layer is ETH or IB. For ETH ports, qkey
613 * violations and port capabilities are not meaningful.
614 */
615 if (is_eth)
616 return 0;
617
618 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 619
620 err = mlx4_ib_query_port(ibdev, port, &attr);
621 if (err)
622 goto out;
623
624 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
625 ~props->clr_port_cap_mask;
626
61565013
JM		 627 err = mlx4_ib_SET_PORT(mdev, port,
628 !!(mask & IB_PORT_RESET_QKEY_CNTR),
629 cap_mask);
225c7b1f
RD		 630
631out:
632 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
633 return err;
634}
635
636static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
637 struct ib_udata *udata)
638{
639 struct mlx4_ib_dev *dev = to_mdev(ibdev);
640 struct mlx4_ib_ucontext *context;
08ff3235 641 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 642 struct mlx4_ib_alloc_ucontext_resp resp;
643 int err;
644
3b4a8cd5
JM		 645 if (!dev->ib_active)
646 return ERR_PTR(-EAGAIN);
647
08ff3235
OG		 648 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
649 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
650 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
651 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
652 } else {
653 resp.dev_caps = dev->dev->caps.userspace_caps;
654 resp.qp_tab_size = dev->dev->caps.num_qps;
655 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
656 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
657 resp.cqe_size = dev->dev->caps.cqe_size;
658 }
225c7b1f
RD		 659
660 context = kmalloc(sizeof *context, GFP_KERNEL);
661 if (!context)
662 return ERR_PTR(-ENOMEM);
663
664 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
665 if (err) {
666 kfree(context);
667 return ERR_PTR(err);
668 }
669
670 INIT_LIST_HEAD(&context->db_page_list);
671 mutex_init(&context->db_page_mutex);
672
08ff3235
OG		 673 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
674 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
675 else
676 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
677
225c7b1f
RD		 678 if (err) {
679 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
680 kfree(context);
681 return ERR_PTR(-EFAULT);
682 }
683
684 return &context->ibucontext;
685}
686
687static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
688{
689 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
690
691 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
692 kfree(context);
693
694 return 0;
695}
696
697static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
698{
699 struct mlx4_ib_dev *dev = to_mdev(context->device);
700
701 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
702 return -EINVAL;
703
704 if (vma->vm_pgoff == 0) {
705 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
706
707 if (io_remap_pfn_range(vma, vma->vm_start,
708 to_mucontext(context)->uar.pfn,
709 PAGE_SIZE, vma->vm_page_prot))
710 return -EAGAIN;
711 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 712 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 713
714 if (io_remap_pfn_range(vma, vma->vm_start,
715 to_mucontext(context)->uar.pfn +
716 dev->dev->caps.num_uars,
717 PAGE_SIZE, vma->vm_page_prot))
718 return -EAGAIN;
52033cfb
MB		 719 } else if (vma->vm_pgoff == 3) {
720 struct mlx4_clock_params params;
721 int ret = mlx4_get_internal_clock_params(dev->dev, &params);
722
723 if (ret)
724 return ret;
725
726 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
727 if (io_remap_pfn_range(vma, vma->vm_start,
728 (pci_resource_start(dev->dev->persist->pdev,
729 params.bar) +
730 params.offset)
731 >> PAGE_SHIFT,
732 PAGE_SIZE, vma->vm_page_prot))
733 return -EAGAIN;
734 } else {
225c7b1f 735 return -EINVAL;
52033cfb 736 }
225c7b1f
RD		 737
738 return 0;
739}
740
741static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
742 struct ib_ucontext *context,
743 struct ib_udata *udata)
744{
745 struct mlx4_ib_pd *pd;
746 int err;
747
748 pd = kmalloc(sizeof *pd, GFP_KERNEL);
749 if (!pd)
750 return ERR_PTR(-ENOMEM);
751
752 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
753 if (err) {
754 kfree(pd);
755 return ERR_PTR(err);
756 }
757
758 if (context)
759 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
760 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
761 kfree(pd);
762 return ERR_PTR(-EFAULT);
763 }
764
765 return &pd->ibpd;
766}
767
768static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
769{
770 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
771 kfree(pd);
772
773 return 0;
774}
775
012a8ff5
SH		 776static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
777 struct ib_ucontext *context,
778 struct ib_udata *udata)
779{
780 struct mlx4_ib_xrcd *xrcd;
8e37210b 781 struct ib_cq_init_attr cq_attr = {};
012a8ff5
SH		 782 int err;
783
784 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
785 return ERR_PTR(-ENOSYS);
786
787 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
788 if (!xrcd)
789 return ERR_PTR(-ENOMEM);
790
791 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
792 if (err)
793 goto err1;
794
795 xrcd->pd = ib_alloc_pd(ibdev);
796 if (IS_ERR(xrcd->pd)) {
797 err = PTR_ERR(xrcd->pd);
798 goto err2;
799 }
800
8e37210b
MB		 801 cq_attr.cqe = 1;
802 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
012a8ff5
SH		 803 if (IS_ERR(xrcd->cq)) {
804 err = PTR_ERR(xrcd->cq);
805 goto err3;
806 }
807
808 return &xrcd->ibxrcd;
809
810err3:
811 ib_dealloc_pd(xrcd->pd);
812err2:
813 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
814err1:
815 kfree(xrcd);
816 return ERR_PTR(err);
817}
818
819static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
820{
821 ib_destroy_cq(to_mxrcd(xrcd)->cq);
822 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
823 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
824 kfree(xrcd);
825
826 return 0;
827}
828
fa417f7b
EC		 829static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
830{
831 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
832 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
833 struct mlx4_ib_gid_entry *ge;
834
835 ge = kzalloc(sizeof *ge, GFP_KERNEL);
836 if (!ge)
837 return -ENOMEM;
838
839 ge->gid = *gid;
840 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
841 ge->port = mqp->port;
842 ge->added = 1;
843 }
844
845 mutex_lock(&mqp->mutex);
846 list_add_tail(&ge->list, &mqp->gid_list);
847 mutex_unlock(&mqp->mutex);
848
849 return 0;
850}
851
852int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
853 union ib_gid *gid)
854{
fa417f7b
EC		 855 struct net_device *ndev;
856 int ret = 0;
857
858 if (!mqp->port)
859 return 0;
860
dba3ad2a 861 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 862 ndev = mdev->iboe.netdevs[mqp->port - 1];
863 if (ndev)
864 dev_hold(ndev);
dba3ad2a 865 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 866
867 if (ndev) {
fa417f7b 868 ret = 1;
fa417f7b
EC		 869 dev_put(ndev);
870 }
871
872 return ret;
873}
874
0ff1fb65
HHZ		 875struct mlx4_ib_steering {
876 struct list_head list;
146d6e19 877 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 878 union ib_gid gid;
879};
880
f77c0162 881static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 882 u32 qp_num,
f77c0162
HHZ		 883 union ib_flow_spec *ib_spec,
884 struct _rule_hw *mlx4_spec)
885{
886 enum mlx4_net_trans_rule_id type;
887
888 switch (ib_spec->type) {
889 case IB_FLOW_SPEC_ETH:
890 type = MLX4_NET_TRANS_RULE_ID_ETH;
891 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
892 ETH_ALEN);
893 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
894 ETH_ALEN);
895 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
896 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
897 break;
a37a1a42
MB		 898 case IB_FLOW_SPEC_IB:
899 type = MLX4_NET_TRANS_RULE_ID_IB;
900 mlx4_spec->ib.l3_qpn =
901 cpu_to_be32(qp_num);
902 mlx4_spec->ib.qpn_mask =
903 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
904 break;
905
f77c0162
HHZ		 906
907 case IB_FLOW_SPEC_IPV4:
908 type = MLX4_NET_TRANS_RULE_ID_IPV4;
909 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
910 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
911 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
912 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
913 break;
914
915 case IB_FLOW_SPEC_TCP:
916 case IB_FLOW_SPEC_UDP:
917 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
918 MLX4_NET_TRANS_RULE_ID_TCP :
919 MLX4_NET_TRANS_RULE_ID_UDP;
920 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
921 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
922 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
923 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
924 break;
925
926 default:
927 return -EINVAL;
928 }
929 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
930 mlx4_hw_rule_sz(dev, type) < 0)
931 return -EINVAL;
932 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
933 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
934 return mlx4_hw_rule_sz(dev, type);
935}
936
a37a1a42
MB		 937struct default_rules {
938 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
939 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
940 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
941 __u8 link_layer;
942};
943static const struct default_rules default_table[] = {
944 {
945 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
946 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
947 .rules_create_list = {IB_FLOW_SPEC_IB},
948 .link_layer = IB_LINK_LAYER_INFINIBAND
949 }
950};
951
952static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
953 struct ib_flow_attr *flow_attr)
954{
955 int i, j, k;
956 void *ib_flow;
957 const struct default_rules *pdefault_rules = default_table;
958 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
959
a57f23f6 960 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 961 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
962 memset(&field_types, 0, sizeof(field_types));
963
964 if (link_layer != pdefault_rules->link_layer)
965 continue;
966
967 ib_flow = flow_attr + 1;
968 /* we assume the specs are sorted */
969 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
970 j < flow_attr->num_of_specs; k++) {
971 union ib_flow_spec *current_flow =
972 (union ib_flow_spec *)ib_flow;
973
974 /* same layer but different type */
975 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
976 (pdefault_rules->mandatory_fields[k] &
977 IB_FLOW_SPEC_LAYER_MASK)) &&
978 (current_flow->type !=
979 pdefault_rules->mandatory_fields[k]))
980 goto out;
981
982 /* same layer, try match next one */
983 if (current_flow->type ==
984 pdefault_rules->mandatory_fields[k]) {
985 j++;
986 ib_flow +=
987 ((union ib_flow_spec *)ib_flow)->size;
988 }
989 }
990
991 ib_flow = flow_attr + 1;
992 for (j = 0; j < flow_attr->num_of_specs;
993 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
994 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
995 /* same layer and same type */
996 if (((union ib_flow_spec *)ib_flow)->type ==
997 pdefault_rules->mandatory_not_fields[k])
998 goto out;
999
1000 return i;
1001 }
1002out:
1003 return -1;
1004}
1005
1006static int __mlx4_ib_create_default_rules(
1007 struct mlx4_ib_dev *mdev,
1008 struct ib_qp *qp,
1009 const struct default_rules *pdefault_rules,
1010 struct _rule_hw *mlx4_spec) {
1011 int size = 0;
1012 int i;
1013
a57f23f6 1014 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 1015 int ret;
1016 union ib_flow_spec ib_spec;
1017 switch (pdefault_rules->rules_create_list[i]) {
1018 case 0:
1019 /* no rule */
1020 continue;
1021 case IB_FLOW_SPEC_IB:
1022 ib_spec.type = IB_FLOW_SPEC_IB;
1023 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1024
1025 break;
1026 default:
1027 /* invalid rule */
1028 return -EINVAL;
1029 }
1030 /* We must put empty rule, qpn is being ignored */
1031 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1032 mlx4_spec);
1033 if (ret < 0) {
1034 pr_info("invalid parsing\n");
1035 return -EINVAL;
1036 }
1037
1038 mlx4_spec = (void *)mlx4_spec + ret;
1039 size += ret;
1040 }
1041 return size;
1042}
1043
f77c0162
HHZ		 1044static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1045 int domain,
1046 enum mlx4_net_trans_promisc_mode flow_type,
1047 u64 *reg_id)
1048{
1049 int ret, i;
1050 int size = 0;
1051 void *ib_flow;
1052 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1053 struct mlx4_cmd_mailbox *mailbox;
1054 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1055 int default_flow;
f77c0162
HHZ		 1056
1057 static const u16 __mlx4_domain[] = {
1058 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1059 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1060 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1061 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1062 };
1063
1064 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1065 pr_err("Invalid priority value %d\n", flow_attr->priority);
1066 return -EINVAL;
1067 }
1068
1069 if (domain >= IB_FLOW_DOMAIN_NUM) {
1070 pr_err("Invalid domain value %d\n", domain);
1071 return -EINVAL;
1072 }
1073
1074 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1075 return -EINVAL;
1076
1077 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1078 if (IS_ERR(mailbox))
1079 return PTR_ERR(mailbox);
f77c0162
HHZ		 1080 ctrl = mailbox->buf;
1081
1082 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1083 flow_attr->priority);
1084 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1085 ctrl->port = flow_attr->port;
1086 ctrl->qpn = cpu_to_be32(qp->qp_num);
1087
1088 ib_flow = flow_attr + 1;
1089 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1090 /* Add default flows */
1091 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1092 if (default_flow >= 0) {
1093 ret = __mlx4_ib_create_default_rules(
1094 mdev, qp, default_table + default_flow,
1095 mailbox->buf + size);
1096 if (ret < 0) {
1097 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1098 return -EINVAL;
1099 }
1100 size += ret;
1101 }
f77c0162 1102 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1103 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1104 mailbox->buf + size);
f77c0162
HHZ		 1105 if (ret < 0) {
1106 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1107 return -EINVAL;
1108 }
1109 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1110 size += ret;
1111 }
1112
1113 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1114 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1115 MLX4_CMD_NATIVE);
1116 if (ret == -ENOMEM)
1117 pr_err("mcg table is full. Fail to register network rule.\n");
1118 else if (ret == -ENXIO)
1119 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1120 else if (ret)
1121 pr_err("Invalid argumant. Fail to register network rule.\n");
1122
1123 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1124 return ret;
1125}
1126
1127static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1128{
1129 int err;
1130 err = mlx4_cmd(dev, reg_id, 0, 0,
1131 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1132 MLX4_CMD_NATIVE);
1133 if (err)
1134 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1135 reg_id);
1136 return err;
1137}
1138
d2fce8a9
OG		 1139static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1140 u64 *reg_id)
1141{
1142 void *ib_flow;
1143 union ib_flow_spec *ib_spec;
1144 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1145 int err = 0;
1146
5eff6dad
OG		 1147 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1148 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1149 return 0; /* do nothing */
1150
1151 ib_flow = flow_attr + 1;
1152 ib_spec = (union ib_flow_spec *)ib_flow;
1153
1154 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1155 return 0; /* do nothing */
1156
1157 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1158 flow_attr->port, qp->qp_num,
1159 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1160 reg_id);
1161 return err;
1162}
1163
f77c0162
HHZ		 1164static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1165 struct ib_flow_attr *flow_attr,
1166 int domain)
1167{
146d6e19 1168 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1169 struct mlx4_ib_flow *mflow;
1170 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1171 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1172 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1173
1174 memset(type, 0, sizeof(type));
1175
1176 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1177 if (!mflow) {
1178 err = -ENOMEM;
1179 goto err_free;
1180 }
1181
1182 switch (flow_attr->type) {
1183 case IB_FLOW_ATTR_NORMAL:
1184 type[0] = MLX4_FS_REGULAR;
1185 break;
1186
1187 case IB_FLOW_ATTR_ALL_DEFAULT:
1188 type[0] = MLX4_FS_ALL_DEFAULT;
1189 break;
1190
1191 case IB_FLOW_ATTR_MC_DEFAULT:
1192 type[0] = MLX4_FS_MC_DEFAULT;
1193 break;
1194
1195 case IB_FLOW_ATTR_SNIFFER:
1196 type[0] = MLX4_FS_UC_SNIFFER;
1197 type[1] = MLX4_FS_MC_SNIFFER;
1198 break;
1199
1200 default:
1201 err = -EINVAL;
1202 goto err_free;
1203 }
1204
1205 while (i < ARRAY_SIZE(type) && type[i]) {
1206 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1207 &mflow->reg_id[i].id);
f77c0162 1208 if (err)
571e1b2c 1209 goto err_create_flow;
146d6e19 1210 if (is_bonded) {
824c25c1
MS		 1211 /* Application always sees one port so the mirror rule
1212 * must be on port #2
1213 */
146d6e19
MS		 1214 flow_attr->port = 2;
1215 err = __mlx4_ib_create_flow(qp, flow_attr,
1216 domain, type[j],
1217 &mflow->reg_id[j].mirror);
1218 flow_attr->port = 1;
1219 if (err)
1220 goto err_create_flow;
1221 j++;
1222 }
1223
11562568 1224 i++;
f77c0162
HHZ		 1225 }
1226
d2fce8a9 1227 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1228 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1229 &mflow->reg_id[i].id);
d2fce8a9 1230 if (err)
571e1b2c 1231 goto err_create_flow;
11562568 1232
146d6e19
MS		 1233 if (is_bonded) {
1234 flow_attr->port = 2;
1235 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1236 &mflow->reg_id[j].mirror);
1237 flow_attr->port = 1;
1238 if (err)
1239 goto err_create_flow;
1240 j++;
1241 }
1242 /* function to create mirror rule */
11562568 1243 i++;
d2fce8a9
OG		 1244 }
1245
f77c0162
HHZ		 1246 return &mflow->ibflow;
1247
571e1b2c
OG		 1248err_create_flow:
1249 while (i) {
146d6e19
MS		 1250 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1251 mflow->reg_id[i].id);
571e1b2c
OG		 1252 i--;
1253 }
146d6e19
MS		 1254
1255 while (j) {
1256 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1257 mflow->reg_id[j].mirror);
1258 j--;
1259 }
f77c0162
HHZ		 1260err_free:
1261 kfree(mflow);
1262 return ERR_PTR(err);
1263}
1264
1265static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1266{
1267 int err, ret = 0;
1268 int i = 0;
1269 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1270 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1271
146d6e19
MS		 1272 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1273 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1274 if (err)
1275 ret = err;
146d6e19
MS		 1276 if (mflow->reg_id[i].mirror) {
1277 err = __mlx4_ib_destroy_flow(mdev->dev,
1278 mflow->reg_id[i].mirror);
1279 if (err)
1280 ret = err;
1281 }
f77c0162
HHZ		 1282 i++;
1283 }
1284
1285 kfree(mflow);
1286 return ret;
1287}
1288
225c7b1f
RD		 1289static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1290{
fa417f7b
EC		 1291 int err;
1292 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1293 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1294 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1295 struct mlx4_ib_steering *ib_steering = NULL;
e9a7faf1 1296 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
146d6e19 1297 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1298
1299 if (mdev->dev->caps.steering_mode ==
1300 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1301 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1302 if (!ib_steering)
1303 return -ENOMEM;
1304 }
fa417f7b 1305
0ff1fb65
HHZ		 1306 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1307 !!(mqp->flags &
1308 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1309 prot, &reg_id.id);
e9a7faf1
OG		 1310 if (err) {
1311 pr_err("multicast attach op failed, err %d\n", err);
0ff1fb65 1312 goto err_malloc;
e9a7faf1 1313 }
fa417f7b 1314
146d6e19
MS		 1315 reg_id.mirror = 0;
1316 if (mlx4_is_bonded(dev)) {
824c25c1
MS		 1317 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1318 (mqp->port == 1) ? 2 : 1,
146d6e19
MS		 1319 !!(mqp->flags &
1320 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1321 prot, &reg_id.mirror);
1322 if (err)
1323 goto err_add;
1324 }
1325
fa417f7b
EC		 1326 err = add_gid_entry(ibqp, gid);
1327 if (err)
1328 goto err_add;
1329
0ff1fb65
HHZ		 1330 if (ib_steering) {
1331 memcpy(ib_steering->gid.raw, gid->raw, 16);
1332 ib_steering->reg_id = reg_id;
1333 mutex_lock(&mqp->mutex);
1334 list_add(&ib_steering->list, &mqp->steering_rules);
1335 mutex_unlock(&mqp->mutex);
1336 }
fa417f7b
EC		 1337 return 0;
1338
1339err_add:
0ff1fb65 1340 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1341 prot, reg_id.id);
1342 if (reg_id.mirror)
1343 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1344 prot, reg_id.mirror);
0ff1fb65
HHZ		 1345err_malloc:
1346 kfree(ib_steering);
1347
fa417f7b
EC		 1348 return err;
1349}
1350
1351static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1352{
1353 struct mlx4_ib_gid_entry *ge;
1354 struct mlx4_ib_gid_entry *tmp;
1355 struct mlx4_ib_gid_entry *ret = NULL;
1356
1357 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1358 if (!memcmp(raw, ge->gid.raw, 16)) {
1359 ret = ge;
1360 break;
1361 }
1362 }
1363
1364 return ret;
225c7b1f
RD		 1365}
1366
1367static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1368{
fa417f7b
EC		 1369 int err;
1370 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1371 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1372 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1373 struct net_device *ndev;
1374 struct mlx4_ib_gid_entry *ge;
146d6e19 1375 struct mlx4_flow_reg_id reg_id = {0, 0};
e9a7faf1 1376 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1377
1378 if (mdev->dev->caps.steering_mode ==
1379 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1380 struct mlx4_ib_steering *ib_steering;
1381
1382 mutex_lock(&mqp->mutex);
1383 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1384 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1385 list_del(&ib_steering->list);
1386 break;
1387 }
1388 }
1389 mutex_unlock(&mqp->mutex);
1390 if (&ib_steering->list == &mqp->steering_rules) {
1391 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1392 return -EINVAL;
1393 }
1394 reg_id = ib_steering->reg_id;
1395 kfree(ib_steering);
1396 }
fa417f7b 1397
0ff1fb65 1398 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1399 prot, reg_id.id);
fa417f7b
EC		 1400 if (err)
1401 return err;
1402
146d6e19
MS		 1403 if (mlx4_is_bonded(dev)) {
1404 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1405 prot, reg_id.mirror);
1406 if (err)
1407 return err;
1408 }
1409
fa417f7b
EC		 1410 mutex_lock(&mqp->mutex);
1411 ge = find_gid_entry(mqp, gid->raw);
1412 if (ge) {
dba3ad2a 1413 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1414 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1415 if (ndev)
1416 dev_hold(ndev);
dba3ad2a 1417 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1418 if (ndev)
fa417f7b 1419 dev_put(ndev);
fa417f7b
EC		 1420 list_del(&ge->list);
1421 kfree(ge);
1422 } else
987c8f8f 1423 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1424
1425 mutex_unlock(&mqp->mutex);
1426
1427 return 0;
225c7b1f
RD		 1428}
1429
1430static int init_node_data(struct mlx4_ib_dev *dev)
1431{
1432 struct ib_smp *in_mad = NULL;
1433 struct ib_smp *out_mad = NULL;
0a9a0188 1434 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1435 int err = -ENOMEM;
1436
1437 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1438 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1439 if (!in_mad || !out_mad)
1440 goto out;
1441
1442 init_query_mad(in_mad);
1443 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1444 if (mlx4_is_master(dev->dev))
1445 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1446
0a9a0188 1447 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1448 if (err)
1449 goto out;
1450
1451 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1452
1453 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1454
0a9a0188 1455 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1456 if (err)
1457 goto out;
1458
992e8e6e 1459 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1460 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1461
1462out:
1463 kfree(in_mad);
1464 kfree(out_mad);
1465 return err;
1466}
1467
f4e91eb4
TJ		 1468static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1469 char *buf)
cd9281d8 1470{
f4e91eb4
TJ		 1471 struct mlx4_ib_dev *dev =
1472 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1473 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1474}
1475
f4e91eb4
TJ		 1476static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1477 char *buf)
cd9281d8 1478{
f4e91eb4
TJ		 1479 struct mlx4_ib_dev *dev =
1480 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1481 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1482 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1483 (int) dev->dev->caps.fw_ver & 0xffff);
1484}
1485
f4e91eb4
TJ		 1486static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1487 char *buf)
cd9281d8 1488{
f4e91eb4
TJ		 1489 struct mlx4_ib_dev *dev =
1490 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1491 return sprintf(buf, "%x\n", dev->dev->rev_id);
1492}
1493
f4e91eb4
TJ		 1494static ssize_t show_board(struct device *device, struct device_attribute *attr,
1495 char *buf)
cd9281d8 1496{
f4e91eb4
TJ		 1497 struct mlx4_ib_dev *dev =
1498 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1499 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1500 dev->dev->board_id);
cd9281d8
JM		 1501}
1502
f4e91eb4
TJ		 1503static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1504static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1505static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1506static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1507
f4e91eb4
TJ		 1508static struct device_attribute *mlx4_class_attributes[] = {
1509 &dev_attr_hw_rev,
1510 &dev_attr_fw_ver,
1511 &dev_attr_hca_type,
1512 &dev_attr_board_id
cd9281d8
JM		 1513};
1514
acc4fccf
MS		 1515static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1516 struct net_device *dev)
1517{
1518 memcpy(eui, dev->dev_addr, 3);
1519 memcpy(eui + 5, dev->dev_addr + 3, 3);
1520 if (vlan_id < 0x1000) {
1521 eui[3] = vlan_id >> 8;
1522 eui[4] = vlan_id & 0xff;
1523 } else {
1524 eui[3] = 0xff;
1525 eui[4] = 0xfe;
1526 }
1527 eui[0] ^= 2;
1528}
1529
fa417f7b
EC		 1530static void update_gids_task(struct work_struct *work)
1531{
1532 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1533 struct mlx4_cmd_mailbox *mailbox;
1534 union ib_gid *gids;
1535 int err;
1536 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1537 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1538
4bf9715f
MS		 1539 if (!gw->dev->ib_active)
1540 return;
1541
fa417f7b
EC		 1542 mailbox = mlx4_alloc_cmd_mailbox(dev);
1543 if (IS_ERR(mailbox)) {
987c8f8f 1544 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1545 return;
1546 }
1547
1548 gids = mailbox->buf;
1549 memcpy(gids, gw->gids, sizeof gw->gids);
1550
1551 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590
IS		 1552 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1553 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
fa417f7b 1554 if (err)
987c8f8f 1555 pr_warn("set port command failed\n");
d487ee77 1556 else
a5750090
MS		 1557 if ((gw->port == 1) || !is_bonded)
1558 mlx4_ib_dispatch_event(gw->dev,
1559 is_bonded ? 1 : gw->port,
1560 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1561
1562 mlx4_free_cmd_mailbox(dev, mailbox);
1563 kfree(gw);
1564}
1565
d487ee77 1566static void reset_gids_task(struct work_struct *work)
fa417f7b 1567{
d487ee77
MS		 1568 struct update_gid_work *gw =
1569 container_of(work, struct update_gid_work, work);
1570 struct mlx4_cmd_mailbox *mailbox;
1571 union ib_gid *gids;
1572 int err;
d487ee77 1573 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1574
4bf9715f
MS		 1575 if (!gw->dev->ib_active)
1576 return;
1577
d487ee77
MS		 1578 mailbox = mlx4_alloc_cmd_mailbox(dev);
1579 if (IS_ERR(mailbox)) {
1580 pr_warn("reset gid table failed\n");
1581 goto free;
1582 }
fa417f7b 1583
d487ee77
MS		 1584 gids = mailbox->buf;
1585 memcpy(gids, gw->gids, sizeof(gw->gids));
1586
5071456f
MS		 1587 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1588 IB_LINK_LAYER_ETHERNET) {
1589 err = mlx4_cmd(dev, mailbox->dma,
1590 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590 1591 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
5071456f
MS		 1592 MLX4_CMD_TIME_CLASS_B,
1593 MLX4_CMD_WRAPPED);
1594 if (err)
f4f01b54 1595 pr_warn("set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1596 }
1597
d487ee77
MS		 1598 mlx4_free_cmd_mailbox(dev, mailbox);
1599free:
1600 kfree(gw);
1601}
4c3eb3ca 1602
d487ee77 1603static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1604 union ib_gid *gid, int clear,
1605 int default_gid)
d487ee77
MS		 1606{
1607 struct update_gid_work *work;
1608 int i;
1609 int need_update = 0;
1610 int free = -1;
1611 int found = -1;
1612 int max_gids;
1613
acc4fccf
MS		 1614 if (default_gid) {
1615 free = 0;
1616 } else {
1617 max_gids = dev->dev->caps.gid_table_len[port];
1618 for (i = 1; i < max_gids; ++i) {
1619 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1620 sizeof(*gid)))
acc4fccf
MS		 1621 found = i;
1622
1623 if (clear) {
1624 if (found >= 0) {
1625 need_update = 1;
1626 dev->iboe.gid_table[port - 1][found] =
1627 zgid;
1628 break;
1629 }
1630 } else {
1631 if (found >= 0)
1632 break;
1633
1634 if (free < 0 &&
1635 !memcmp(&dev->iboe.gid_table[port - 1][i],
1636 &zgid, sizeof(*gid)))
1637 free = i;
1638 }
4c3eb3ca 1639 }
fa417f7b 1640 }
4c3eb3ca 1641
d487ee77
MS		 1642 if (found == -1 && !clear && free >= 0) {
1643 dev->iboe.gid_table[port - 1][free] = *gid;
1644 need_update = 1;
1645 }
fa417f7b 1646
d487ee77
MS		 1647 if (!need_update)
1648 return 0;
1649
1650 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1651 if (!work)
1652 return -ENOMEM;
1653
1654 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1655 INIT_WORK(&work->work, update_gids_task);
1656 work->port = port;
1657 work->dev = dev;
1658 queue_work(wq, &work->work);
fa417f7b
EC		 1659
1660 return 0;
d487ee77 1661}
4c3eb3ca 1662
acc4fccf 1663static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1664{
acc4fccf
MS		 1665 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1666 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1667}
1668
d487ee77 1669
5071456f 1670static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1671{
1672 struct update_gid_work *work;
d487ee77
MS		 1673
1674 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1675 if (!work)
1676 return -ENOMEM;
5071456f
MS		 1677
1678 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1679 memset(work->gids, 0, sizeof(work->gids));
1680 INIT_WORK(&work->work, reset_gids_task);
1681 work->dev = dev;
5071456f 1682 work->port = port;
d487ee77
MS		 1683 queue_work(wq, &work->work);
1684 return 0;
fa417f7b
EC		 1685}
1686
d487ee77
MS		 1687static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1688 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1689{
d487ee77
MS		 1690 struct mlx4_ib_iboe *iboe;
1691 int port = 0;
1692 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1693 rdma_vlan_dev_real_dev(event_netdev) :
1694 event_netdev;
acc4fccf
MS		 1695 union ib_gid default_gid;
1696
1697 mlx4_make_default_gid(real_dev, &default_gid);
1698
1699 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1700 return 0;
d487ee77
MS		 1701
1702 if (event != NETDEV_DOWN && event != NETDEV_UP)
1703 return 0;
1704
1705 if ((real_dev != event_netdev) &&
1706 (event == NETDEV_DOWN) &&
1707 rdma_link_local_addr((struct in6_addr *)gid))
1708 return 0;
1709
1710 iboe = &ibdev->iboe;
dba3ad2a 1711 spin_lock_bh(&iboe->lock);
d487ee77 1712
82373701 1713 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1714 if ((netif_is_bond_master(real_dev) &&
1715 (real_dev == iboe->masters[port - 1])) ||
1716 (!netif_is_bond_master(real_dev) &&
1717 (real_dev == iboe->netdevs[port - 1])))
1718 update_gid_table(ibdev, port, gid,
acc4fccf 1719 event == NETDEV_DOWN, 0);
d487ee77 1720
dba3ad2a 1721 spin_unlock_bh(&iboe->lock);
d487ee77 1722 return 0;
fa417f7b 1723
fa417f7b
EC		 1724}
1725
d487ee77
MS		 1726static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1727 struct mlx4_ib_dev *ibdev)
fa417f7b 1728{
d487ee77
MS		 1729 u8 port = 0;
1730 struct mlx4_ib_iboe *iboe;
1731 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1732 rdma_vlan_dev_real_dev(dev) : dev;
1733
1734 iboe = &ibdev->iboe;
d487ee77 1735
82373701 1736 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1737 if ((netif_is_bond_master(real_dev) &&
1738 (real_dev == iboe->masters[port - 1])) ||
1739 (!netif_is_bond_master(real_dev) &&
1740 (real_dev == iboe->netdevs[port - 1])))
1741 break;
1742
82373701 1743 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1744 return 0;
1745 else
1746 return port;
fa417f7b
EC		 1747}
1748
d487ee77
MS		 1749static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1750 void *ptr)
fa417f7b 1751{
d487ee77
MS		 1752 struct mlx4_ib_dev *ibdev;
1753 struct in_ifaddr *ifa = ptr;
1754 union ib_gid gid;
1755 struct net_device *event_netdev = ifa->ifa_dev->dev;
1756
1757 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1758
1759 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1760
1761 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1762 return NOTIFY_DONE;
fa417f7b
EC		 1763}
1764
27cdef63 1765#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1766static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1767 void *ptr)
1768{
fa417f7b 1769 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1770 struct inet6_ifaddr *ifa = ptr;
1771 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1772 struct net_device *event_netdev = ifa->idev->dev;
1773
1774 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1775
1776 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1777 return NOTIFY_DONE;
1778}
1779#endif
1780
9433c188
MB		 1781#define MLX4_IB_INVALID_MAC ((u64)-1)
1782static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1783 struct net_device *dev,
1784 int port)
1785{
1786 u64 new_smac = 0;
1787 u64 release_mac = MLX4_IB_INVALID_MAC;
1788 struct mlx4_ib_qp *qp;
1789
1790 read_lock(&dev_base_lock);
1791 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1792 read_unlock(&dev_base_lock);
1793
3e0629cb
JM		 1794 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1795
d24d9f43
JM		 1796 /* no need for update QP1 and mac registration in non-SRIOV */
1797 if (!mlx4_is_mfunc(ibdev->dev))
1798 return;
1799
9433c188
MB		 1800 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1801 qp = ibdev->qp1_proxy[port - 1];
1802 if (qp) {
1803 int new_smac_index;
25476b02 1804 u64 old_smac;
9433c188
MB		 1805 struct mlx4_update_qp_params update_params;
1806
25476b02
JM		 1807 mutex_lock(&qp->mutex);
1808 old_smac = qp->pri.smac;
9433c188
MB		 1809 if (new_smac == old_smac)
1810 goto unlock;
1811
1812 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1813
1814 if (new_smac_index < 0)
1815 goto unlock;
1816
1817 update_params.smac_index = new_smac_index;
09e05c3f 1818 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1819 &update_params)) {
1820 release_mac = new_smac;
1821 goto unlock;
1822 }
25476b02
JM		 1823 /* if old port was zero, no mac was yet registered for this QP */
1824 if (qp->pri.smac_port)
1825 release_mac = old_smac;
9433c188 1826 qp->pri.smac = new_smac;
25476b02 1827 qp->pri.smac_port = port;
9433c188 1828 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1829 }
1830
1831unlock:
9433c188
MB		 1832 if (release_mac != MLX4_IB_INVALID_MAC)
1833 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1834 if (qp)
1835 mutex_unlock(&qp->mutex);
1836 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1837}
1838
d487ee77
MS		 1839static void mlx4_ib_get_dev_addr(struct net_device *dev,
1840 struct mlx4_ib_dev *ibdev, u8 port)
1841{
1842 struct in_device *in_dev;
27cdef63 1843#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1844 struct inet6_dev *in6_dev;
1845 union ib_gid *pgid;
1846 struct inet6_ifaddr *ifp;
f5c4834d 1847 union ib_gid default_gid;
d487ee77
MS		 1848#endif
1849 union ib_gid gid;
1850
1851
82373701 1852 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1853 return;
1854
1855 /* IPv4 gids */
1856 in_dev = in_dev_get(dev);
1857 if (in_dev) {
1858 for_ifa(in_dev) {
1859 /*ifa->ifa_address;*/
1860 ipv6_addr_set_v4mapped(ifa->ifa_address,
1861 (struct in6_addr *)&gid);
acc4fccf 1862 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1863 }
1864 endfor_ifa(in_dev);
1865 in_dev_put(in_dev);
1866 }
27cdef63 1867#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1868 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1869 /* IPv6 gids */
1870 in6_dev = in6_dev_get(dev);
1871 if (in6_dev) {
1872 read_lock_bh(&in6_dev->lock);
1873 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1874 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1875 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1876 continue;
acc4fccf 1877 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1878 }
1879 read_unlock_bh(&in6_dev->lock);
1880 in6_dev_put(in6_dev);
1881 }
1882#endif
1883}
1884
acc4fccf
MS		 1885static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1886 struct net_device *dev, u8 port)
1887{
1888 union ib_gid gid;
1889 mlx4_make_default_gid(dev, &gid);
1890 update_gid_table(ibdev, port, &gid, 0, 1);
1891}
1892
d487ee77
MS		 1893static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1894{
1895 struct net_device *dev;
ddf8bd34 1896 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1897 int i;
655b2aae 1898 int err = 0;
d487ee77 1899
655b2aae
MS		 1900 for (i = 1; i <= ibdev->num_ports; ++i) {
1901 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1902 IB_LINK_LAYER_ETHERNET) {
1903 err = reset_gid_table(ibdev, i);
1904 if (err)
1905 goto out;
1906 }
1907 }
d487ee77
MS		 1908
1909 read_lock(&dev_base_lock);
dba3ad2a 1910 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1911
1912 for_each_netdev(&init_net, dev) {
1913 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1914 /* port will be non-zero only for ETH ports */
1915 if (port) {
1916 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1917 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1918 }
d487ee77
MS		 1919 }
1920
dba3ad2a 1921 spin_unlock_bh(&iboe->lock);
d487ee77 1922 read_unlock(&dev_base_lock);
655b2aae
MS		 1923out:
1924 return err;
d487ee77
MS		 1925}
1926
9433c188
MB		 1927static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1928 struct net_device *dev,
1929 unsigned long event)
1930
d487ee77 1931{
fa417f7b 1932 struct mlx4_ib_iboe *iboe;
9433c188 1933 int update_qps_port = -1;
fa417f7b
EC		 1934 int port;
1935
fa417f7b
EC		 1936 iboe = &ibdev->iboe;
1937
dba3ad2a 1938 spin_lock_bh(&iboe->lock);
fa417f7b 1939 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1940 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1941 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1942 struct net_device *curr_netdev;
d487ee77 1943 struct net_device *curr_master;
ad4885d2 1944
fa417f7b 1945 iboe->netdevs[port - 1] =
0345584e 1946 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1947 if (iboe->netdevs[port - 1])
1948 mlx4_ib_set_default_gid(ibdev,
1949 iboe->netdevs[port - 1], port);
ad4885d2 1950 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1951
1952 if (iboe->netdevs[port - 1] &&
1953 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1954 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1955 iboe->netdevs[port - 1]);
ad4885d2
MS		 1956 } else {
1957 iboe->masters[port - 1] = NULL;
fa417f7b 1958 }
d487ee77 1959 curr_master = iboe->masters[port - 1];
fa417f7b 1960
9433c188
MB		 1961 if (dev == iboe->netdevs[port - 1] &&
1962 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1963 event == NETDEV_UP || event == NETDEV_CHANGE))
1964 update_qps_port = port;
1965
ad4885d2
MS		 1966 if (curr_netdev) {
1967 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1968 IB_PORT_ACTIVE : IB_PORT_DOWN;
1969 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1970 if (curr_master) {
1971 /* if using bonding/team and a slave port is down, we
1972 * don't want the bond IP based gids in the table since
1973 * flows that select port by gid may get the down port.
1974 */
a5750090
MS		 1975 if (port_state == IB_PORT_DOWN &&
1976 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 1977 reset_gid_table(ibdev, port);
1978 mlx4_ib_set_default_gid(ibdev,
1979 curr_netdev,
1980 port);
1981 } else {
1982 /* gids from the upper dev (bond/team)
1983 * should appear in port's gid table
1984 */
1985 mlx4_ib_get_dev_addr(curr_master,
1986 ibdev, port);
1987 }
e381835c
MS		 1988 }
1989 /* if bonding is used it is possible that we add it to
1990 * masters only after IP address is assigned to the
1991 * net bonding interface.
1992 */
1993 if (curr_master && (old_master != curr_master)) {
1994 reset_gid_table(ibdev, port);
1995 mlx4_ib_set_default_gid(ibdev,
1996 curr_netdev, port);
1997 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1998 }
ad4885d2 1999
e381835c
MS		 2000 if (!curr_master && (old_master != curr_master)) {
2001 reset_gid_table(ibdev, port);
2002 mlx4_ib_set_default_gid(ibdev,
2003 curr_netdev, port);
2004 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
2005 }
2006 } else {
ad4885d2 2007 reset_gid_table(ibdev, port);
ad4885d2 2008 }
d487ee77 2009 }
fa417f7b 2010
dba3ad2a 2011 spin_unlock_bh(&iboe->lock);
9433c188
MB		 2012
2013 if (update_qps_port > 0)
2014 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 2015}
2016
2017static int mlx4_ib_netdev_event(struct notifier_block *this,
2018 unsigned long event, void *ptr)
2019{
2020 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2021 struct mlx4_ib_dev *ibdev;
2022
2023 if (!net_eq(dev_net(dev), &init_net))
2024 return NOTIFY_DONE;
2025
2026 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2027 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2028
2029 return NOTIFY_DONE;
2030}
2031
54679e14
JM		 2032static void init_pkeys(struct mlx4_ib_dev *ibdev)
2033{
2034 int port;
2035 int slave;
2036 int i;
2037
2038 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2039 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2040 ++slave) {
54679e14
JM		 2041 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2042 for (i = 0;
2043 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2044 ++i) {
2045 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2046 /* master has the identity virt2phys pkey mapping */
2047 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2048 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2049 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2050 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2051 }
2052 }
2053 }
2054 /* initialize pkey cache */
2055 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2056 for (i = 0;
2057 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2058 ++i)
2059 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2060 (i) ? 0 : 0xFFFF;
2061 }
2062 }
2063}
2064
e605b743
SP		 2065static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2066{
4661bd79 2067 char name[80];
e605b743
SP		 2068 int eq_per_port = 0;
2069 int added_eqs = 0;
2070 int total_eqs = 0;
2071 int i, j, eq;
2072
3aac6ff1
SP		 2073 /* Legacy mode or comp_pool is not large enough */
2074 if (dev->caps.comp_pool == 0 ||
2075 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2076 return;
2077
7ae0e400 2078 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2079
2080 /* Init eq table */
2081 added_eqs = 0;
2082 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2083 added_eqs += eq_per_port;
2084
2085 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2086
2087 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2088 if (!ibdev->eq_table)
2089 return;
2090
2091 ibdev->eq_added = added_eqs;
2092
2093 eq = 0;
2094 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2095 for (j = 0; j < eq_per_port; j++) {
4661bd79 2096 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2097 i, j, dev->persist->pdev->bus->name);
e605b743 2098 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2099 if (mlx4_assign_eq(dev, name, NULL,
2100 &ibdev->eq_table[eq])) {
e605b743
SP		 2101 /* Use legacy (same as mlx4_en driver) */
2102 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2103 ibdev->eq_table[eq] =
2104 (eq % dev->caps.num_comp_vectors);
2105 }
2106 eq++;
2107 }
2108 }
2109
2110 /* Fill the reset of the vector with legacy EQ */
2111 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2112 ibdev->eq_table[eq++] = i;
2113
2114 /* Advertise the new number of EQs to clients */
2115 ibdev->ib_dev.num_comp_vectors = total_eqs;
2116}
2117
2118static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2119{
2120 int i;
3aac6ff1
SP		 2121
2122 /* no additional eqs were added */
2123 if (!ibdev->eq_table)
2124 return;
e605b743
SP		 2125
2126 /* Reset the advertised EQ number */
2127 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2128
2129 /* Free only the added eqs */
2130 for (i = 0; i < ibdev->eq_added; i++) {
2131 /* Don't free legacy eqs if used */
2132 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2133 continue;
2134 mlx4_release_eq(dev, ibdev->eq_table[i]);
2135 }
2136
e605b743 2137 kfree(ibdev->eq_table);
e605b743
SP		 2138}
2139
7738613e
IW		 2140static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2141 struct ib_port_immutable *immutable)
2142{
2143 struct ib_port_attr attr;
2144 int err;
2145
2146 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2147 if (err)
2148 return err;
2149
2150 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2151 immutable->gid_tbl_len = attr.gid_tbl_len;
2152
f9b22e35
IW		 2153 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND)
2154 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2155 else
2156 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2157
7738613e
IW		 2158 return 0;
2159}
2160
225c7b1f
RD		 2161static void *mlx4_ib_add(struct mlx4_dev *dev)
2162{
2163 struct mlx4_ib_dev *ibdev;
22e7ef9c 2164 int num_ports = 0;
035b1032 2165 int i, j;
fa417f7b
EC		 2166 int err;
2167 struct mlx4_ib_iboe *iboe;
4196670b 2168 int ib_num_ports = 0;
a5750090 2169 int num_req_counters;
225c7b1f 2170
987c8f8f 2171 pr_info_once("%s", mlx4_ib_version);
68f3948d 2172
026149cb 2173 num_ports = 0;
fa417f7b 2174 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2175 num_ports++;
2176
2177 /* No point in registering a device with no ports... */
2178 if (num_ports == 0)
2179 return NULL;
2180
225c7b1f
RD		 2181 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2182 if (!ibdev) {
872bf2fb
YH		 2183 dev_err(&dev->persist->pdev->dev,
2184 "Device struct alloc failed\n");
225c7b1f
RD		 2185 return NULL;
2186 }
2187
fa417f7b
EC		 2188 iboe = &ibdev->iboe;
2189
225c7b1f
RD		 2190 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2191 goto err_dealloc;
2192
2193 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2194 goto err_pd;
2195
4979d18f
RD		 2196 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2197 PAGE_SIZE);
225c7b1f
RD		 2198 if (!ibdev->uar_map)
2199 goto err_uar;
26c6bc7b 2200 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2201
225c7b1f 2202 ibdev->dev = dev;
c6215745 2203 ibdev->bond_next_port = 0;
225c7b1f
RD		 2204
2205 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2206 ibdev->ib_dev.owner = THIS_MODULE;
2207 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2208 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2209 ibdev->num_ports = num_ports;
a5750090
MS		 2210 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2211 1 : ibdev->num_ports;
b8dd786f 2212 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2213 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2214
08ff3235
OG		 2215 if (dev->caps.userspace_caps)
2216 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2217 else
2218 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2219
225c7b1f
RD		 2220 ibdev->ib_dev.uverbs_cmd_mask =
2221 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2222 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2223 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2224 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2225 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2226 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2227 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2228 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2229 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2230 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2231 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2232 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2233 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2234 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2235 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2236 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2237 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2238 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2239 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2240 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2241 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2242 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2243 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2244 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2245
2246 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2247 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2248 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2249 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2250 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2251 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2252 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2253 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2254 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2255 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2256 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2257 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2258 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2259 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2260 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2261 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2262 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2263 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2264 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2265 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2266 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2267 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2268 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2269 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2270 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2271 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2272 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2273 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2274 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2275 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2276 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2277 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2278 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2279 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2280 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2281 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2282 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2283 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2284 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2285 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2286 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2287 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
7738613e 2288 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
225c7b1f 2289
992e8e6e
JM		 2290 if (!mlx4_is_slave(ibdev->dev)) {
2291 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2292 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2293 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2294 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2295 }
8ad11fb6 2296
b425388d
SM		 2297 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2298 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2299 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2300 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2301 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2302
2303 ibdev->ib_dev.uverbs_cmd_mask |=
2304 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2305 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2306 }
2307
012a8ff5
SH		 2308 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2309 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2310 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2311 ibdev->ib_dev.uverbs_cmd_mask |=
2312 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2313 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2314 }
2315
f77c0162 2316 if (check_flow_steering_support(dev)) {
0a9b7d59 2317 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2318 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2319 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2320
f21519b2
YD		 2321 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2322 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2323 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2324 }
2325
e605b743
SP		 2326 mlx4_ib_alloc_eqs(dev, ibdev);
2327
fa417f7b
EC		 2328 spin_lock_init(&iboe->lock);
2329
225c7b1f
RD		 2330 if (init_node_data(ibdev))
2331 goto err_map;
2332
a5750090
MS		 2333 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2334 for (i = 0; i < num_req_counters; ++i) {
9433c188 2335 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2336 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2337 IB_LINK_LAYER_ETHERNET) {
2338 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2339 if (err)
2340 ibdev->counters[i] = -1;
3839d8ac
DC		 2341 } else {
2342 ibdev->counters[i] = -1;
2343 }
cfcde11c 2344 }
a5750090
MS		 2345 if (mlx4_is_bonded(dev))
2346 for (i = 1; i < ibdev->num_ports ; ++i)
2347 ibdev->counters[i] = ibdev->counters[0];
2348
cfcde11c 2349
4196670b
MB		 2350 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2351 ib_num_ports++;
2352
225c7b1f
RD		 2353 spin_lock_init(&ibdev->sm_lock);
2354 mutex_init(&ibdev->cap_mask_mutex);
35f05dab
YH		 2355 INIT_LIST_HEAD(&ibdev->qp_list);
2356 spin_lock_init(&ibdev->reset_flow_resource_lock);
225c7b1f 2357
4196670b
MB		 2358 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2359 ib_num_ports) {
c1c98501
MB		 2360 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2361 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2362 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2363 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2364 if (err)
2365 goto err_counter;
2366
2367 ibdev->ib_uc_qpns_bitmap =
2368 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2369 sizeof(long),
2370 GFP_KERNEL);
2371 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2372 dev_err(&dev->persist->pdev->dev,
2373 "bit map alloc failed\n");
c1c98501
MB		 2374 goto err_steer_qp_release;
2375 }
2376
2377 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2378
2379 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2380 dev, ibdev->steer_qpn_base,
2381 ibdev->steer_qpn_base +
2382 ibdev->steer_qpn_count - 1);
2383 if (err)
2384 goto err_steer_free_bitmap;
2385 }
2386
3e0629cb
JM		 2387 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2388 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2389
9a6edb60 2390 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2391 goto err_steer_free_bitmap;
225c7b1f
RD		 2392
2393 if (mlx4_ib_mad_init(ibdev))
2394 goto err_reg;
2395
fc06573d
JM		 2396 if (mlx4_ib_init_sriov(ibdev))
2397 goto err_mad;
2398
d487ee77
MS		 2399 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2400 if (!iboe->nb.notifier_call) {
2401 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2402 err = register_netdevice_notifier(&iboe->nb);
2403 if (err) {
2404 iboe->nb.notifier_call = NULL;
2405 goto err_notif;
2406 }
2407 }
2408 if (!iboe->nb_inet.notifier_call) {
2409 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2410 err = register_inetaddr_notifier(&iboe->nb_inet);
2411 if (err) {
2412 iboe->nb_inet.notifier_call = NULL;
2413 goto err_notif;
2414 }
2415 }
27cdef63 2416#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2417 if (!iboe->nb_inet6.notifier_call) {
2418 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2419 err = register_inet6addr_notifier(&iboe->nb_inet6);
2420 if (err) {
2421 iboe->nb_inet6.notifier_call = NULL;
2422 goto err_notif;
2423 }
2424 }
2425#endif
655b2aae
MS		 2426 if (mlx4_ib_init_gid_table(ibdev))
2427 goto err_notif;
fa417f7b
EC		 2428 }
2429
035b1032 2430 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2431 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2432 mlx4_class_attributes[j]))
fa417f7b 2433 goto err_notif;
cd9281d8
JM		 2434 }
2435
3b4a8cd5
JM		 2436 ibdev->ib_active = true;
2437
54679e14
JM		 2438 if (mlx4_is_mfunc(ibdev->dev))
2439 init_pkeys(ibdev);
2440
3806d08c
JM		 2441 /* create paravirt contexts for any VFs which are active */
2442 if (mlx4_is_master(ibdev->dev)) {
2443 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2444 if (j == mlx4_master_func_num(ibdev->dev))
2445 continue;
2446 if (mlx4_is_slave_active(ibdev->dev, j))
2447 do_slave_init(ibdev, j, 1);
2448 }
2449 }
225c7b1f
RD		 2450 return ibdev;
2451
fa417f7b 2452err_notif:
d487ee77
MS		 2453 if (ibdev->iboe.nb.notifier_call) {
2454 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2455 pr_warn("failure unregistering notifier\n");
2456 ibdev->iboe.nb.notifier_call = NULL;
2457 }
2458 if (ibdev->iboe.nb_inet.notifier_call) {
2459 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2460 pr_warn("failure unregistering notifier\n");
2461 ibdev->iboe.nb_inet.notifier_call = NULL;
2462 }
27cdef63 2463#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2464 if (ibdev->iboe.nb_inet6.notifier_call) {
2465 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2466 pr_warn("failure unregistering notifier\n");
2467 ibdev->iboe.nb_inet6.notifier_call = NULL;
2468 }
2469#endif
fa417f7b
EC		 2470 flush_workqueue(wq);
2471
fc06573d
JM		 2472 mlx4_ib_close_sriov(ibdev);
2473
2474err_mad:
2475 mlx4_ib_mad_cleanup(ibdev);
2476
225c7b1f
RD		 2477err_reg:
2478 ib_unregister_device(&ibdev->ib_dev);
2479
c1c98501
MB		 2480err_steer_free_bitmap:
2481 kfree(ibdev->ib_uc_qpns_bitmap);
2482
2483err_steer_qp_release:
2484 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2485 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2486 ibdev->steer_qpn_count);
cfcde11c
OG		 2487err_counter:
2488 for (; i; --i)
4af3ce0d
RD		 2489 if (ibdev->counters[i - 1] != -1)
2490 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2491
225c7b1f
RD		 2492err_map:
2493 iounmap(ibdev->uar_map);
2494
2495err_uar:
2496 mlx4_uar_free(dev, &ibdev->priv_uar);
2497
2498err_pd:
2499 mlx4_pd_free(dev, ibdev->priv_pdn);
2500
2501err_dealloc:
2502 ib_dealloc_device(&ibdev->ib_dev);
2503
2504 return NULL;
2505}
2506
c1c98501
MB		 2507int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2508{
2509 int offset;
2510
2511 WARN_ON(!dev->ib_uc_qpns_bitmap);
2512
2513 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2514 dev->steer_qpn_count,
2515 get_count_order(count));
2516 if (offset < 0)
2517 return offset;
2518
2519 *qpn = dev->steer_qpn_base + offset;
2520 return 0;
2521}
2522
2523void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2524{
2525 if (!qpn ||
2526 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2527 return;
2528
2529 BUG_ON(qpn < dev->steer_qpn_base);
2530
2531 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2532 qpn - dev->steer_qpn_base,
2533 get_count_order(count));
2534}
2535
2536int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2537 int is_attach)
2538{
2539 int err;
2540 size_t flow_size;
2541 struct ib_flow_attr *flow = NULL;
2542 struct ib_flow_spec_ib *ib_spec;
2543
2544 if (is_attach) {
2545 flow_size = sizeof(struct ib_flow_attr) +
2546 sizeof(struct ib_flow_spec_ib);
2547 flow = kzalloc(flow_size, GFP_KERNEL);
2548 if (!flow)
2549 return -ENOMEM;
2550 flow->port = mqp->port;
2551 flow->num_of_specs = 1;
2552 flow->size = flow_size;
2553 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2554 ib_spec->type = IB_FLOW_SPEC_IB;
2555 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2556 /* Add an empty rule for IB L2 */
2557 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2558
2559 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2560 IB_FLOW_DOMAIN_NIC,
2561 MLX4_FS_REGULAR,
2562 &mqp->reg_id);
2563 } else {
2564 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2565 }
2566 kfree(flow);
2567 return err;
2568}
2569
225c7b1f
RD		 2570static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2571{
2572 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2573 int p;
2574
4bf9715f
MS		 2575 ibdev->ib_active = false;
2576 flush_workqueue(wq);
2577
fc06573d 2578 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2579 mlx4_ib_mad_cleanup(ibdev);
2580 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2581 if (ibdev->iboe.nb.notifier_call) {
2582 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2583 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2584 ibdev->iboe.nb.notifier_call = NULL;
2585 }
c1c98501
MB		 2586
2587 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2588 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2589 ibdev->steer_qpn_count);
2590 kfree(ibdev->ib_uc_qpns_bitmap);
2591 }
2592
d487ee77
MS		 2593 if (ibdev->iboe.nb_inet.notifier_call) {
2594 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2595 pr_warn("failure unregistering notifier\n");
2596 ibdev->iboe.nb_inet.notifier_call = NULL;
2597 }
27cdef63 2598#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2599 if (ibdev->iboe.nb_inet6.notifier_call) {
2600 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2601 pr_warn("failure unregistering notifier\n");
2602 ibdev->iboe.nb_inet6.notifier_call = NULL;
2603 }
2604#endif
fb1b5034 2605
fa417f7b 2606 iounmap(ibdev->uar_map);
cfcde11c 2607 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2608 if (ibdev->counters[p] != -1)
2609 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2610 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2611 mlx4_CLOSE_PORT(dev, p);
2612
e605b743
SP		 2613 mlx4_ib_free_eqs(dev, ibdev);
2614
225c7b1f
RD		 2615 mlx4_uar_free(dev, &ibdev->priv_uar);
2616 mlx4_pd_free(dev, ibdev->priv_pdn);
2617 ib_dealloc_device(&ibdev->ib_dev);
2618}
2619
fc06573d
JM		 2620static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2621{
2622 struct mlx4_ib_demux_work **dm = NULL;
2623 struct mlx4_dev *dev = ibdev->dev;
2624 int i;
2625 unsigned long flags;
449fc488
MB		 2626 struct mlx4_active_ports actv_ports;
2627 unsigned int ports;
2628 unsigned int first_port;
fc06573d
JM		 2629
2630 if (!mlx4_is_master(dev))
2631 return;
2632
449fc488
MB		 2633 actv_ports = mlx4_get_active_ports(dev, slave);
2634 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2635 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2636
2637 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2638 if (!dm) {
2639 pr_err("failed to allocate memory for tunneling qp update\n");
2640 goto out;
2641 }
2642
449fc488 2643 for (i = 0; i < ports; i++) {
fc06573d
JM		 2644 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2645 if (!dm[i]) {
2646 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2647 for (i = 0; i < dev->caps.num_ports; i++) {
2648 if (dm[i])
2649 kfree(dm[i]);
2650 }
2651 goto out;
2652 }
2653 }
2654 /* initialize or tear down tunnel QPs for the slave */
449fc488 2655 for (i = 0; i < ports; i++) {
fc06573d 2656 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2657 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2658 dm[i]->slave = slave;
2659 dm[i]->do_init = do_init;
2660 dm[i]->dev = ibdev;
2661 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2662 if (!ibdev->sriov.is_going_down)
2663 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2664 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2665 }
2666out:
c89d1271 2667 kfree(dm);
fc06573d
JM		 2668 return;
2669}
2670
35f05dab
YH		 2671static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2672{
2673 struct mlx4_ib_qp *mqp;
2674 unsigned long flags_qp;
2675 unsigned long flags_cq;
2676 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2677 struct list_head cq_notify_list;
2678 struct mlx4_cq *mcq;
2679 unsigned long flags;
2680
2681 pr_warn("mlx4_ib_handle_catas_error was started\n");
2682 INIT_LIST_HEAD(&cq_notify_list);
2683
2684 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2685 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2686
2687 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2688 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2689 if (mqp->sq.tail != mqp->sq.head) {
2690 send_mcq = to_mcq(mqp->ibqp.send_cq);
2691 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2692 if (send_mcq->mcq.comp &&
2693 mqp->ibqp.send_cq->comp_handler) {
2694 if (!send_mcq->mcq.reset_notify_added) {
2695 send_mcq->mcq.reset_notify_added = 1;
2696 list_add_tail(&send_mcq->mcq.reset_notify,
2697 &cq_notify_list);
2698 }
2699 }
2700 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2701 }
2702 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2703 /* Now, handle the QP's receive queue */
2704 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2705 /* no handling is needed for SRQ */
2706 if (!mqp->ibqp.srq) {
2707 if (mqp->rq.tail != mqp->rq.head) {
2708 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2709 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2710 if (recv_mcq->mcq.comp &&
2711 mqp->ibqp.recv_cq->comp_handler) {
2712 if (!recv_mcq->mcq.reset_notify_added) {
2713 recv_mcq->mcq.reset_notify_added = 1;
2714 list_add_tail(&recv_mcq->mcq.reset_notify,
2715 &cq_notify_list);
2716 }
2717 }
2718 spin_unlock_irqrestore(&recv_mcq->lock,
2719 flags_cq);
2720 }
2721 }
2722 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2723 }
2724
2725 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2726 mcq->comp(mcq);
2727 }
2728 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2729 pr_warn("mlx4_ib_handle_catas_error ended\n");
2730}
2731
a5750090
MS		 2732static void handle_bonded_port_state_event(struct work_struct *work)
2733{
2734 struct ib_event_work *ew =
2735 container_of(work, struct ib_event_work, work);
2736 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2737 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2738 int i;
2739 struct ib_event ibev;
2740
2741 kfree(ew);
2742 spin_lock_bh(&ibdev->iboe.lock);
2743 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2744 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
217e8b16 2745 enum ib_port_state curr_port_state;
a5750090 2746
217e8b16
MS		 2747 if (!curr_netdev)
2748 continue;
2749
2750 curr_port_state =
a5750090
MS		 2751 (netif_running(curr_netdev) &&
2752 netif_carrier_ok(curr_netdev)) ?
2753 IB_PORT_ACTIVE : IB_PORT_DOWN;
2754
2755 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2756 curr_port_state : IB_PORT_ACTIVE;
2757 }
2758 spin_unlock_bh(&ibdev->iboe.lock);
2759
2760 ibev.device = &ibdev->ib_dev;
2761 ibev.element.port_num = 1;
2762 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2763 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2764
2765 ib_dispatch_event(&ibev);
2766}
2767
225c7b1f 2768static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2769 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2770{
2771 struct ib_event ibev;
7ff93f8b 2772 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2773 struct mlx4_eqe *eqe = NULL;
2774 struct ib_event_work *ew;
fc06573d 2775 int p = 0;
00f5ce99 2776
a5750090
MS		 2777 if (mlx4_is_bonded(dev) &&
2778 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2779 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2780 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2781 if (!ew)
2782 return;
2783 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2784 ew->ib_dev = ibdev;
2785 queue_work(wq, &ew->work);
2786 return;
2787 }
2788
00f5ce99
JM		 2789 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2790 eqe = (struct mlx4_eqe *)param;
2791 else
fc06573d 2792 p = (int) param;
225c7b1f
RD		 2793
2794 switch (event) {
37608eea 2795 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2796 if (p > ibdev->num_ports)
2797 return;
a0c64a17
JM		 2798 if (mlx4_is_master(dev) &&
2799 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2800 IB_LINK_LAYER_INFINIBAND) {
2801 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2802 }
37608eea 2803 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2804 break;
2805
37608eea 2806 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2807 if (p > ibdev->num_ports)
2808 return;
37608eea
RD		 2809 ibev.event = IB_EVENT_PORT_ERR;
2810 break;
2811
2812 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2813 ibdev->ib_active = false;
225c7b1f 2814 ibev.event = IB_EVENT_DEVICE_FATAL;
35f05dab 2815 mlx4_ib_handle_catas_error(ibdev);
225c7b1f
RD		 2816 break;
2817
00f5ce99
JM		 2818 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2819 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2820 if (!ew) {
2821 pr_err("failed to allocate memory for events work\n");
2822 break;
2823 }
2824
2825 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2826 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2827 ew->ib_dev = ibdev;
992e8e6e
JM		 2828 /* need to queue only for port owner, which uses GEN_EQE */
2829 if (mlx4_is_master(dev))
2830 queue_work(wq, &ew->work);
2831 else
2832 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2833 return;
2834
fc06573d
JM		 2835 case MLX4_DEV_EVENT_SLAVE_INIT:
2836 /* here, p is the slave id */
2837 do_slave_init(ibdev, p, 1);
ee59fa0d
YH		 2838 if (mlx4_is_master(dev)) {
2839 int i;
2840
2841 for (i = 1; i <= ibdev->num_ports; i++) {
2842 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2843 == IB_LINK_LAYER_INFINIBAND)
2844 mlx4_ib_slave_alias_guid_event(ibdev,
2845 p, i,
2846 1);
2847 }
2848 }
fc06573d
JM		 2849 return;
2850
2851 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
ee59fa0d
YH		 2852 if (mlx4_is_master(dev)) {
2853 int i;
2854
2855 for (i = 1; i <= ibdev->num_ports; i++) {
2856 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2857 == IB_LINK_LAYER_INFINIBAND)
2858 mlx4_ib_slave_alias_guid_event(ibdev,
2859 p, i,
2860 0);
2861 }
2862 }
fc06573d
JM		 2863 /* here, p is the slave id */
2864 do_slave_init(ibdev, p, 0);
2865 return;
2866
225c7b1f
RD		 2867 default:
2868 return;
2869 }
2870
2871 ibev.device = ibdev_ptr;
a5750090 2872 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2873
2874 ib_dispatch_event(&ibev);
2875}
2876
2877static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2878 .add = mlx4_ib_add,
2879 .remove = mlx4_ib_remove,
2880 .event = mlx4_ib_event,
a5750090
MS		 2881 .protocol = MLX4_PROT_IB_IPV6,
2882 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2883};
2884
2885static int __init mlx4_ib_init(void)
2886{
fa417f7b
EC		 2887 int err;
2888
2889 wq = create_singlethread_workqueue("mlx4_ib");
2890 if (!wq)
2891 return -ENOMEM;
2892
b9c5d6a6
OD		 2893 err = mlx4_ib_mcg_init();
2894 if (err)
2895 goto clean_wq;
2896
fa417f7b 2897 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2898 if (err)
2899 goto clean_mcg;
fa417f7b
EC		 2900
2901 return 0;
b9c5d6a6
OD		 2902
2903clean_mcg:
2904 mlx4_ib_mcg_destroy();
2905
2906clean_wq:
2907 destroy_workqueue(wq);
2908 return err;
225c7b1f
RD		 2909}
2910
2911static void __exit mlx4_ib_cleanup(void)
2912{
2913 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2914 mlx4_ib_mcg_destroy();
fa417f7b 2915 destroy_workqueue(wq);
225c7b1f
RD		 2916}
2917
2918module_init(mlx4_ib_init);
2919module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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