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net/mlx4_en: Don't attempt to TX offload the outer UDP checksum for VXLAN
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
a0c64a17
JM		 69int mlx4_ib_sm_guid_assign = 1;
70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f
RD		 134static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props)
136{
137 struct mlx4_ib_dev *dev = to_mdev(ibdev);
138 struct ib_smp *in_mad = NULL;
139 struct ib_smp *out_mad = NULL;
140 int err = -ENOMEM;
3dec4878 141 int have_ib_ports;
225c7b1f
RD		 142
143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
145 if (!in_mad || !out_mad)
146 goto out;
147
148 init_query_mad(in_mad);
149 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
150
0a9a0188
JM		 151 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
152 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 153 if (err)
154 goto out;
155
156 memset(props, 0, sizeof *props);
157
3dec4878
JM		 158 have_ib_ports = num_ib_ports(dev->dev);
159
225c7b1f
RD		 160 props->fw_ver = dev->dev->caps.fw_ver;
161 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
162 IB_DEVICE_PORT_ACTIVE_EVENT |
163 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 164 IB_DEVICE_RC_RNR_NAK_GEN |
165 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
167 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
169 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 171 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
173 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
175 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 176 if (dev->dev->caps.max_gso_sz &&
177 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 179 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
181 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
185 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
187 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
189 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
192 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
193 else
194 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 195 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 196 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 197 }
225c7b1f
RD		 198
199 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
200 0xffffff;
992e8e6e 201 props->vendor_part_id = dev->dev->pdev->device;
225c7b1f
RD		 202 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
203 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
204
205 props->max_mr_size = ~0ull;
206 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 207 props->max_qp = dev->dev->quotas.qp;
fc2d0044 208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 209 props->max_sge = min(dev->dev->caps.max_sq_sg,
210 dev->dev->caps.max_rq_sg);
5a0d0a61 211 props->max_cq = dev->dev->quotas.cq;
225c7b1f 212 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 213 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
217 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 218 props->max_srq = dev->dev->quotas.srq;
c8681f14 219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 220 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 221 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
224 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 225 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 226 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
229 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
230 props->max_mcast_grp;
a5bbe892 231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 232
233out:
234 kfree(in_mad);
235 kfree(out_mad);
236
237 return err;
238}
239
fa417f7b
EC		 240static enum rdma_link_layer
241mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 242{
fa417f7b 243 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 244
65dab25d 245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 246 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
247}
225c7b1f 248
fa417f7b 249static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 250 struct ib_port_attr *props, int netw_view)
fa417f7b 251{
a9c766bb
OG		 252 struct ib_smp *in_mad = NULL;
253 struct ib_smp *out_mad = NULL;
a5e12dff 254 int ext_active_speed;
0a9a0188 255 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 256 int err = -ENOMEM;
257
258 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
259 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
260 if (!in_mad || !out_mad)
261 goto out;
262
263 init_query_mad(in_mad);
264 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
265 in_mad->attr_mod = cpu_to_be32(port);
266
0a9a0188
JM		 267 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
268 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
269
270 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 271 in_mad, out_mad);
272 if (err)
273 goto out;
274
a5e12dff 275
225c7b1f
RD		 276 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
277 props->lmc = out_mad->data[34] & 0x7;
278 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
279 props->sm_sl = out_mad->data[36] & 0xf;
280 props->state = out_mad->data[32] & 0xf;
281 props->phys_state = out_mad->data[33] >> 4;
282 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 283 if (netw_view)
284 props->gid_tbl_len = out_mad->data[50];
285 else
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 289 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
290 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
291 props->active_width = out_mad->data[31] & 0xf;
292 props->active_speed = out_mad->data[35] >> 4;
293 props->max_mtu = out_mad->data[41] & 0xf;
294 props->active_mtu = out_mad->data[36] >> 4;
295 props->subnet_timeout = out_mad->data[51] & 0x1f;
296 props->max_vl_num = out_mad->data[37] >> 4;
297 props->init_type_reply = out_mad->data[41] >> 4;
298
a5e12dff
MA		 299 /* Check if extended speeds (EDR/FDR/...) are supported */
300 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
301 ext_active_speed = out_mad->data[62] >> 4;
302
303 switch (ext_active_speed) {
304 case 1:
2e96691c 305 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 306 break;
307 case 2:
2e96691c 308 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 309 break;
310 }
311 }
312
313 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 314 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
318
0a9a0188 319 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 320 NULL, NULL, in_mad, out_mad);
321 if (err)
bf6b47de 322 goto out;
8154c07f
OG		 323
324 /* Checking LinkSpeedActive for FDR-10 */
325 if (out_mad->data[15] & 0x1)
326 props->active_speed = IB_SPEED_FDR10;
a5e12dff 327 }
d2ef4068
OG		 328
329 /* Avoid wrong speed value returned by FW if the IB link is down. */
330 if (props->state == IB_PORT_DOWN)
331 props->active_speed = IB_SPEED_SDR;
332
a9c766bb
OG		 333out:
334 kfree(in_mad);
335 kfree(out_mad);
336 return err;
fa417f7b
EC		 337}
338
339static u8 state_to_phys_state(enum ib_port_state state)
340{
341 return state == IB_PORT_ACTIVE ? 5 : 3;
342}
343
344static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 345 struct ib_port_attr *props, int netw_view)
fa417f7b 346{
a9c766bb
OG		 347
348 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
349 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 350 struct net_device *ndev;
351 enum ib_mtu tmp;
a9c766bb
OG		 352 struct mlx4_cmd_mailbox *mailbox;
353 int err = 0;
354
355 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
356 if (IS_ERR(mailbox))
357 return PTR_ERR(mailbox);
fa417f7b 358
a9c766bb
OG		 359 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
360 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
361 MLX4_CMD_WRAPPED);
362 if (err)
363 goto out;
364
365 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
366 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 367 props->active_speed = IB_SPEED_QDR;
b4a26a27 368 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 369 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
370 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 371 props->pkey_tbl_len = 1;
bcacb897 372 props->max_mtu = IB_MTU_4096;
a9c766bb 373 props->max_vl_num = 2;
fa417f7b
EC		 374 props->state = IB_PORT_DOWN;
375 props->phys_state = state_to_phys_state(props->state);
376 props->active_mtu = IB_MTU_256;
dba3ad2a 377 spin_lock_bh(&iboe->lock);
fa417f7b
EC		 378 ndev = iboe->netdevs[port - 1];
379 if (!ndev)
a9c766bb 380 goto out_unlock;
fa417f7b
EC		 381
382 tmp = iboe_get_mtu(ndev->mtu);
383 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
384
21d60609 385 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 386 IB_PORT_ACTIVE : IB_PORT_DOWN;
387 props->phys_state = state_to_phys_state(props->state);
a9c766bb 388out_unlock:
dba3ad2a 389 spin_unlock_bh(&iboe->lock);
a9c766bb
OG		 390out:
391 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
392 return err;
fa417f7b
EC		 393}
394
0a9a0188
JM		 395int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
396 struct ib_port_attr *props, int netw_view)
fa417f7b 397{
a9c766bb 398 int err;
fa417f7b
EC		 399
400 memset(props, 0, sizeof *props);
401
fa417f7b 402 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 403 ib_link_query_port(ibdev, port, props, netw_view) :
404 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 405
406 return err;
407}
408
0a9a0188
JM		 409static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
410 struct ib_port_attr *props)
411{
412 /* returns host view */
413 return __mlx4_ib_query_port(ibdev, port, props, 0);
414}
415
a0c64a17
JM		 416int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
417 union ib_gid *gid, int netw_view)
225c7b1f
RD		 418{
419 struct ib_smp *in_mad = NULL;
420 struct ib_smp *out_mad = NULL;
421 int err = -ENOMEM;
a0c64a17
JM		 422 struct mlx4_ib_dev *dev = to_mdev(ibdev);
423 int clear = 0;
424 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 425
426 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
427 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
428 if (!in_mad || !out_mad)
429 goto out;
430
431 init_query_mad(in_mad);
432 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
433 in_mad->attr_mod = cpu_to_be32(port);
434
a0c64a17
JM		 435 if (mlx4_is_mfunc(dev->dev) && netw_view)
436 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
437
438 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 439 if (err)
440 goto out;
441
442 memcpy(gid->raw, out_mad->data + 8, 8);
443
a0c64a17
JM		 444 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
445 if (index) {
446 /* For any index > 0, return the null guid */
447 err = 0;
448 clear = 1;
449 goto out;
450 }
451 }
452
225c7b1f
RD		 453 init_query_mad(in_mad);
454 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
455 in_mad->attr_mod = cpu_to_be32(index / 8);
456
a0c64a17 457 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 458 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 459 if (err)
460 goto out;
461
462 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
463
464out:
a0c64a17
JM		 465 if (clear)
466 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 467 kfree(in_mad);
468 kfree(out_mad);
469 return err;
470}
471
fa417f7b
EC		 472static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
473 union ib_gid *gid)
474{
475 struct mlx4_ib_dev *dev = to_mdev(ibdev);
476
477 *gid = dev->iboe.gid_table[port - 1][index];
478
479 return 0;
480}
481
482static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
483 union ib_gid *gid)
484{
485 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 486 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 487 else
488 return iboe_query_gid(ibdev, port, index, gid);
489}
490
0a9a0188
JM		 491int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
492 u16 *pkey, int netw_view)
225c7b1f
RD		 493{
494 struct ib_smp *in_mad = NULL;
495 struct ib_smp *out_mad = NULL;
0a9a0188 496 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 497 int err = -ENOMEM;
498
499 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
500 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
501 if (!in_mad || !out_mad)
502 goto out;
503
504 init_query_mad(in_mad);
505 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
506 in_mad->attr_mod = cpu_to_be32(index / 32);
507
0a9a0188
JM		 508 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
509 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
510
511 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
512 in_mad, out_mad);
225c7b1f
RD		 513 if (err)
514 goto out;
515
516 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
517
518out:
519 kfree(in_mad);
520 kfree(out_mad);
521 return err;
522}
523
0a9a0188
JM		 524static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
525{
526 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
527}
528
225c7b1f
RD		 529static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
530 struct ib_device_modify *props)
531{
d0d68b86 532 struct mlx4_cmd_mailbox *mailbox;
df7fba66 533 unsigned long flags;
d0d68b86 534
225c7b1f
RD		 535 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
536 return -EOPNOTSUPP;
537
d0d68b86
JM		 538 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
539 return 0;
540
992e8e6e
JM		 541 if (mlx4_is_slave(to_mdev(ibdev)->dev))
542 return -EOPNOTSUPP;
543
df7fba66 544 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 545 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 546 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 547
548 /*
549 * If possible, pass node desc to FW, so it can generate
550 * a 144 trap. If cmd fails, just ignore.
551 */
552 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
553 if (IS_ERR(mailbox))
554 return 0;
555
d0d68b86
JM		 556 memcpy(mailbox->buf, props->node_desc, 64);
557 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 558 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 559
560 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 561
562 return 0;
563}
564
61565013
JM		 565static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
566 u32 cap_mask)
225c7b1f
RD		 567{
568 struct mlx4_cmd_mailbox *mailbox;
569 int err;
570
571 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
572 if (IS_ERR(mailbox))
573 return PTR_ERR(mailbox);
574
5ae2a7a8
RD		 575 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
576 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
577 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
578 } else {
579 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
580 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
581 }
225c7b1f 582
61565013
JM		 583 err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
584 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
225c7b1f
RD		 585
586 mlx4_free_cmd_mailbox(dev->dev, mailbox);
587 return err;
588}
589
590static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
591 struct ib_port_modify *props)
592{
61565013
JM		 593 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
594 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 595 struct ib_port_attr attr;
596 u32 cap_mask;
597 int err;
598
61565013
JM		 599 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
600 * of whether port link layer is ETH or IB. For ETH ports, qkey
601 * violations and port capabilities are not meaningful.
602 */
603 if (is_eth)
604 return 0;
605
606 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 607
608 err = mlx4_ib_query_port(ibdev, port, &attr);
609 if (err)
610 goto out;
611
612 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
613 ~props->clr_port_cap_mask;
614
61565013
JM		 615 err = mlx4_ib_SET_PORT(mdev, port,
616 !!(mask & IB_PORT_RESET_QKEY_CNTR),
617 cap_mask);
225c7b1f
RD		 618
619out:
620 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
621 return err;
622}
623
624static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
625 struct ib_udata *udata)
626{
627 struct mlx4_ib_dev *dev = to_mdev(ibdev);
628 struct mlx4_ib_ucontext *context;
08ff3235 629 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 630 struct mlx4_ib_alloc_ucontext_resp resp;
631 int err;
632
3b4a8cd5
JM		 633 if (!dev->ib_active)
634 return ERR_PTR(-EAGAIN);
635
08ff3235
OG		 636 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
637 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
638 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
639 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
640 } else {
641 resp.dev_caps = dev->dev->caps.userspace_caps;
642 resp.qp_tab_size = dev->dev->caps.num_qps;
643 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
644 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
645 resp.cqe_size = dev->dev->caps.cqe_size;
646 }
225c7b1f
RD		 647
648 context = kmalloc(sizeof *context, GFP_KERNEL);
649 if (!context)
650 return ERR_PTR(-ENOMEM);
651
652 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
653 if (err) {
654 kfree(context);
655 return ERR_PTR(err);
656 }
657
658 INIT_LIST_HEAD(&context->db_page_list);
659 mutex_init(&context->db_page_mutex);
660
08ff3235
OG		 661 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
662 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
663 else
664 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
665
225c7b1f
RD		 666 if (err) {
667 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
668 kfree(context);
669 return ERR_PTR(-EFAULT);
670 }
671
672 return &context->ibucontext;
673}
674
675static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
676{
677 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
678
679 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
680 kfree(context);
681
682 return 0;
683}
684
685static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
686{
687 struct mlx4_ib_dev *dev = to_mdev(context->device);
688
689 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
690 return -EINVAL;
691
692 if (vma->vm_pgoff == 0) {
693 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
694
695 if (io_remap_pfn_range(vma, vma->vm_start,
696 to_mucontext(context)->uar.pfn,
697 PAGE_SIZE, vma->vm_page_prot))
698 return -EAGAIN;
699 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 700 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 701
702 if (io_remap_pfn_range(vma, vma->vm_start,
703 to_mucontext(context)->uar.pfn +
704 dev->dev->caps.num_uars,
705 PAGE_SIZE, vma->vm_page_prot))
706 return -EAGAIN;
707 } else
708 return -EINVAL;
709
710 return 0;
711}
712
713static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
714 struct ib_ucontext *context,
715 struct ib_udata *udata)
716{
717 struct mlx4_ib_pd *pd;
718 int err;
719
720 pd = kmalloc(sizeof *pd, GFP_KERNEL);
721 if (!pd)
722 return ERR_PTR(-ENOMEM);
723
724 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
725 if (err) {
726 kfree(pd);
727 return ERR_PTR(err);
728 }
729
730 if (context)
731 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
732 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
733 kfree(pd);
734 return ERR_PTR(-EFAULT);
735 }
736
737 return &pd->ibpd;
738}
739
740static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
741{
742 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
743 kfree(pd);
744
745 return 0;
746}
747
012a8ff5
SH		 748static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
749 struct ib_ucontext *context,
750 struct ib_udata *udata)
751{
752 struct mlx4_ib_xrcd *xrcd;
753 int err;
754
755 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
756 return ERR_PTR(-ENOSYS);
757
758 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
759 if (!xrcd)
760 return ERR_PTR(-ENOMEM);
761
762 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
763 if (err)
764 goto err1;
765
766 xrcd->pd = ib_alloc_pd(ibdev);
767 if (IS_ERR(xrcd->pd)) {
768 err = PTR_ERR(xrcd->pd);
769 goto err2;
770 }
771
772 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
773 if (IS_ERR(xrcd->cq)) {
774 err = PTR_ERR(xrcd->cq);
775 goto err3;
776 }
777
778 return &xrcd->ibxrcd;
779
780err3:
781 ib_dealloc_pd(xrcd->pd);
782err2:
783 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
784err1:
785 kfree(xrcd);
786 return ERR_PTR(err);
787}
788
789static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
790{
791 ib_destroy_cq(to_mxrcd(xrcd)->cq);
792 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
793 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
794 kfree(xrcd);
795
796 return 0;
797}
798
fa417f7b
EC		 799static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
800{
801 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
802 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
803 struct mlx4_ib_gid_entry *ge;
804
805 ge = kzalloc(sizeof *ge, GFP_KERNEL);
806 if (!ge)
807 return -ENOMEM;
808
809 ge->gid = *gid;
810 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
811 ge->port = mqp->port;
812 ge->added = 1;
813 }
814
815 mutex_lock(&mqp->mutex);
816 list_add_tail(&ge->list, &mqp->gid_list);
817 mutex_unlock(&mqp->mutex);
818
819 return 0;
820}
821
822int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
823 union ib_gid *gid)
824{
fa417f7b
EC		 825 struct net_device *ndev;
826 int ret = 0;
827
828 if (!mqp->port)
829 return 0;
830
dba3ad2a 831 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 832 ndev = mdev->iboe.netdevs[mqp->port - 1];
833 if (ndev)
834 dev_hold(ndev);
dba3ad2a 835 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 836
837 if (ndev) {
fa417f7b 838 ret = 1;
fa417f7b
EC		 839 dev_put(ndev);
840 }
841
842 return ret;
843}
844
0ff1fb65
HHZ		 845struct mlx4_ib_steering {
846 struct list_head list;
847 u64 reg_id;
848 union ib_gid gid;
849};
850
f77c0162 851static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 852 u32 qp_num,
f77c0162
HHZ		 853 union ib_flow_spec *ib_spec,
854 struct _rule_hw *mlx4_spec)
855{
856 enum mlx4_net_trans_rule_id type;
857
858 switch (ib_spec->type) {
859 case IB_FLOW_SPEC_ETH:
860 type = MLX4_NET_TRANS_RULE_ID_ETH;
861 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
862 ETH_ALEN);
863 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
864 ETH_ALEN);
865 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
866 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
867 break;
a37a1a42
MB		 868 case IB_FLOW_SPEC_IB:
869 type = MLX4_NET_TRANS_RULE_ID_IB;
870 mlx4_spec->ib.l3_qpn =
871 cpu_to_be32(qp_num);
872 mlx4_spec->ib.qpn_mask =
873 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
874 break;
875
f77c0162
HHZ		 876
877 case IB_FLOW_SPEC_IPV4:
878 type = MLX4_NET_TRANS_RULE_ID_IPV4;
879 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
880 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
881 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
882 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
883 break;
884
885 case IB_FLOW_SPEC_TCP:
886 case IB_FLOW_SPEC_UDP:
887 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
888 MLX4_NET_TRANS_RULE_ID_TCP :
889 MLX4_NET_TRANS_RULE_ID_UDP;
890 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
891 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
892 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
893 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
894 break;
895
896 default:
897 return -EINVAL;
898 }
899 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
900 mlx4_hw_rule_sz(dev, type) < 0)
901 return -EINVAL;
902 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
903 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
904 return mlx4_hw_rule_sz(dev, type);
905}
906
a37a1a42
MB		 907struct default_rules {
908 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
909 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
910 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
911 __u8 link_layer;
912};
913static const struct default_rules default_table[] = {
914 {
915 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
916 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
917 .rules_create_list = {IB_FLOW_SPEC_IB},
918 .link_layer = IB_LINK_LAYER_INFINIBAND
919 }
920};
921
922static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
923 struct ib_flow_attr *flow_attr)
924{
925 int i, j, k;
926 void *ib_flow;
927 const struct default_rules *pdefault_rules = default_table;
928 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
929
a57f23f6 930 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 931 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
932 memset(&field_types, 0, sizeof(field_types));
933
934 if (link_layer != pdefault_rules->link_layer)
935 continue;
936
937 ib_flow = flow_attr + 1;
938 /* we assume the specs are sorted */
939 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
940 j < flow_attr->num_of_specs; k++) {
941 union ib_flow_spec *current_flow =
942 (union ib_flow_spec *)ib_flow;
943
944 /* same layer but different type */
945 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
946 (pdefault_rules->mandatory_fields[k] &
947 IB_FLOW_SPEC_LAYER_MASK)) &&
948 (current_flow->type !=
949 pdefault_rules->mandatory_fields[k]))
950 goto out;
951
952 /* same layer, try match next one */
953 if (current_flow->type ==
954 pdefault_rules->mandatory_fields[k]) {
955 j++;
956 ib_flow +=
957 ((union ib_flow_spec *)ib_flow)->size;
958 }
959 }
960
961 ib_flow = flow_attr + 1;
962 for (j = 0; j < flow_attr->num_of_specs;
963 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
964 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
965 /* same layer and same type */
966 if (((union ib_flow_spec *)ib_flow)->type ==
967 pdefault_rules->mandatory_not_fields[k])
968 goto out;
969
970 return i;
971 }
972out:
973 return -1;
974}
975
976static int __mlx4_ib_create_default_rules(
977 struct mlx4_ib_dev *mdev,
978 struct ib_qp *qp,
979 const struct default_rules *pdefault_rules,
980 struct _rule_hw *mlx4_spec) {
981 int size = 0;
982 int i;
983
a57f23f6 984 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 985 int ret;
986 union ib_flow_spec ib_spec;
987 switch (pdefault_rules->rules_create_list[i]) {
988 case 0:
989 /* no rule */
990 continue;
991 case IB_FLOW_SPEC_IB:
992 ib_spec.type = IB_FLOW_SPEC_IB;
993 ib_spec.size = sizeof(struct ib_flow_spec_ib);
994
995 break;
996 default:
997 /* invalid rule */
998 return -EINVAL;
999 }
1000 /* We must put empty rule, qpn is being ignored */
1001 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1002 mlx4_spec);
1003 if (ret < 0) {
1004 pr_info("invalid parsing\n");
1005 return -EINVAL;
1006 }
1007
1008 mlx4_spec = (void *)mlx4_spec + ret;
1009 size += ret;
1010 }
1011 return size;
1012}
1013
f77c0162
HHZ		 1014static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1015 int domain,
1016 enum mlx4_net_trans_promisc_mode flow_type,
1017 u64 *reg_id)
1018{
1019 int ret, i;
1020 int size = 0;
1021 void *ib_flow;
1022 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1023 struct mlx4_cmd_mailbox *mailbox;
1024 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1025 int default_flow;
f77c0162
HHZ		 1026
1027 static const u16 __mlx4_domain[] = {
1028 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1029 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1030 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1031 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1032 };
1033
1034 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1035 pr_err("Invalid priority value %d\n", flow_attr->priority);
1036 return -EINVAL;
1037 }
1038
1039 if (domain >= IB_FLOW_DOMAIN_NUM) {
1040 pr_err("Invalid domain value %d\n", domain);
1041 return -EINVAL;
1042 }
1043
1044 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1045 return -EINVAL;
1046
1047 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1048 if (IS_ERR(mailbox))
1049 return PTR_ERR(mailbox);
f77c0162
HHZ		 1050 ctrl = mailbox->buf;
1051
1052 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1053 flow_attr->priority);
1054 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1055 ctrl->port = flow_attr->port;
1056 ctrl->qpn = cpu_to_be32(qp->qp_num);
1057
1058 ib_flow = flow_attr + 1;
1059 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1060 /* Add default flows */
1061 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1062 if (default_flow >= 0) {
1063 ret = __mlx4_ib_create_default_rules(
1064 mdev, qp, default_table + default_flow,
1065 mailbox->buf + size);
1066 if (ret < 0) {
1067 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1068 return -EINVAL;
1069 }
1070 size += ret;
1071 }
f77c0162 1072 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1073 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1074 mailbox->buf + size);
f77c0162
HHZ		 1075 if (ret < 0) {
1076 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1077 return -EINVAL;
1078 }
1079 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1080 size += ret;
1081 }
1082
1083 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1084 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1085 MLX4_CMD_NATIVE);
1086 if (ret == -ENOMEM)
1087 pr_err("mcg table is full. Fail to register network rule.\n");
1088 else if (ret == -ENXIO)
1089 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1090 else if (ret)
1091 pr_err("Invalid argumant. Fail to register network rule.\n");
1092
1093 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1094 return ret;
1095}
1096
1097static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1098{
1099 int err;
1100 err = mlx4_cmd(dev, reg_id, 0, 0,
1101 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1102 MLX4_CMD_NATIVE);
1103 if (err)
1104 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1105 reg_id);
1106 return err;
1107}
1108
d2fce8a9
OG		 1109static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1110 u64 *reg_id)
1111{
1112 void *ib_flow;
1113 union ib_flow_spec *ib_spec;
1114 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1115 int err = 0;
1116
1117 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1118 return 0; /* do nothing */
1119
1120 ib_flow = flow_attr + 1;
1121 ib_spec = (union ib_flow_spec *)ib_flow;
1122
1123 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1124 return 0; /* do nothing */
1125
1126 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1127 flow_attr->port, qp->qp_num,
1128 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1129 reg_id);
1130 return err;
1131}
1132
f77c0162
HHZ		 1133static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1134 struct ib_flow_attr *flow_attr,
1135 int domain)
1136{
1137 int err = 0, i = 0;
1138 struct mlx4_ib_flow *mflow;
1139 enum mlx4_net_trans_promisc_mode type[2];
1140
1141 memset(type, 0, sizeof(type));
1142
1143 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1144 if (!mflow) {
1145 err = -ENOMEM;
1146 goto err_free;
1147 }
1148
1149 switch (flow_attr->type) {
1150 case IB_FLOW_ATTR_NORMAL:
1151 type[0] = MLX4_FS_REGULAR;
1152 break;
1153
1154 case IB_FLOW_ATTR_ALL_DEFAULT:
1155 type[0] = MLX4_FS_ALL_DEFAULT;
1156 break;
1157
1158 case IB_FLOW_ATTR_MC_DEFAULT:
1159 type[0] = MLX4_FS_MC_DEFAULT;
1160 break;
1161
1162 case IB_FLOW_ATTR_SNIFFER:
1163 type[0] = MLX4_FS_UC_SNIFFER;
1164 type[1] = MLX4_FS_MC_SNIFFER;
1165 break;
1166
1167 default:
1168 err = -EINVAL;
1169 goto err_free;
1170 }
1171
1172 while (i < ARRAY_SIZE(type) && type[i]) {
1173 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1174 &mflow->reg_id[i]);
1175 if (err)
1176 goto err_free;
1177 i++;
1178 }
1179
d2fce8a9
OG		 1180 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1181 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, &mflow->reg_id[i]);
1182 if (err)
1183 goto err_free;
1184 }
1185
f77c0162
HHZ		 1186 return &mflow->ibflow;
1187
1188err_free:
1189 kfree(mflow);
1190 return ERR_PTR(err);
1191}
1192
1193static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1194{
1195 int err, ret = 0;
1196 int i = 0;
1197 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1198 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1199
1200 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
1201 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
1202 if (err)
1203 ret = err;
1204 i++;
1205 }
1206
1207 kfree(mflow);
1208 return ret;
1209}
1210
225c7b1f
RD		 1211static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1212{
fa417f7b
EC		 1213 int err;
1214 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1215 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65
HHZ		 1216 u64 reg_id;
1217 struct mlx4_ib_steering *ib_steering = NULL;
d487ee77
MS		 1218 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1219 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1220
1221 if (mdev->dev->caps.steering_mode ==
1222 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1223 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1224 if (!ib_steering)
1225 return -ENOMEM;
1226 }
fa417f7b 1227
0ff1fb65
HHZ		 1228 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1229 !!(mqp->flags &
1230 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
d487ee77 1231 prot, &reg_id);
fa417f7b 1232 if (err)
0ff1fb65 1233 goto err_malloc;
fa417f7b
EC		 1234
1235 err = add_gid_entry(ibqp, gid);
1236 if (err)
1237 goto err_add;
1238
0ff1fb65
HHZ		 1239 if (ib_steering) {
1240 memcpy(ib_steering->gid.raw, gid->raw, 16);
1241 ib_steering->reg_id = reg_id;
1242 mutex_lock(&mqp->mutex);
1243 list_add(&ib_steering->list, &mqp->steering_rules);
1244 mutex_unlock(&mqp->mutex);
1245 }
fa417f7b
EC		 1246 return 0;
1247
1248err_add:
0ff1fb65 1249 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1250 prot, reg_id);
0ff1fb65
HHZ		 1251err_malloc:
1252 kfree(ib_steering);
1253
fa417f7b
EC		 1254 return err;
1255}
1256
1257static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1258{
1259 struct mlx4_ib_gid_entry *ge;
1260 struct mlx4_ib_gid_entry *tmp;
1261 struct mlx4_ib_gid_entry *ret = NULL;
1262
1263 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1264 if (!memcmp(raw, ge->gid.raw, 16)) {
1265 ret = ge;
1266 break;
1267 }
1268 }
1269
1270 return ret;
225c7b1f
RD		 1271}
1272
1273static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1274{
fa417f7b
EC		 1275 int err;
1276 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1277 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1278 struct net_device *ndev;
1279 struct mlx4_ib_gid_entry *ge;
0ff1fb65 1280 u64 reg_id = 0;
d487ee77
MS		 1281 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1282 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1283
1284 if (mdev->dev->caps.steering_mode ==
1285 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1286 struct mlx4_ib_steering *ib_steering;
1287
1288 mutex_lock(&mqp->mutex);
1289 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1290 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1291 list_del(&ib_steering->list);
1292 break;
1293 }
1294 }
1295 mutex_unlock(&mqp->mutex);
1296 if (&ib_steering->list == &mqp->steering_rules) {
1297 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1298 return -EINVAL;
1299 }
1300 reg_id = ib_steering->reg_id;
1301 kfree(ib_steering);
1302 }
fa417f7b 1303
0ff1fb65 1304 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1305 prot, reg_id);
fa417f7b
EC		 1306 if (err)
1307 return err;
1308
1309 mutex_lock(&mqp->mutex);
1310 ge = find_gid_entry(mqp, gid->raw);
1311 if (ge) {
dba3ad2a 1312 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1313 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1314 if (ndev)
1315 dev_hold(ndev);
dba3ad2a 1316 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1317 if (ndev)
fa417f7b 1318 dev_put(ndev);
fa417f7b
EC		 1319 list_del(&ge->list);
1320 kfree(ge);
1321 } else
987c8f8f 1322 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1323
1324 mutex_unlock(&mqp->mutex);
1325
1326 return 0;
225c7b1f
RD		 1327}
1328
1329static int init_node_data(struct mlx4_ib_dev *dev)
1330{
1331 struct ib_smp *in_mad = NULL;
1332 struct ib_smp *out_mad = NULL;
0a9a0188 1333 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1334 int err = -ENOMEM;
1335
1336 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1337 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1338 if (!in_mad || !out_mad)
1339 goto out;
1340
1341 init_query_mad(in_mad);
1342 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1343 if (mlx4_is_master(dev->dev))
1344 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1345
0a9a0188 1346 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1347 if (err)
1348 goto out;
1349
1350 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1351
1352 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1353
0a9a0188 1354 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1355 if (err)
1356 goto out;
1357
992e8e6e 1358 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1359 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1360
1361out:
1362 kfree(in_mad);
1363 kfree(out_mad);
1364 return err;
1365}
1366
f4e91eb4
TJ		 1367static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1368 char *buf)
cd9281d8 1369{
f4e91eb4
TJ		 1370 struct mlx4_ib_dev *dev =
1371 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1372 return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
1373}
1374
f4e91eb4
TJ		 1375static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1376 char *buf)
cd9281d8 1377{
f4e91eb4
TJ		 1378 struct mlx4_ib_dev *dev =
1379 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1380 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1381 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1382 (int) dev->dev->caps.fw_ver & 0xffff);
1383}
1384
f4e91eb4
TJ		 1385static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1386 char *buf)
cd9281d8 1387{
f4e91eb4
TJ		 1388 struct mlx4_ib_dev *dev =
1389 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1390 return sprintf(buf, "%x\n", dev->dev->rev_id);
1391}
1392
f4e91eb4
TJ		 1393static ssize_t show_board(struct device *device, struct device_attribute *attr,
1394 char *buf)
cd9281d8 1395{
f4e91eb4
TJ		 1396 struct mlx4_ib_dev *dev =
1397 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1398 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1399 dev->dev->board_id);
cd9281d8
JM		 1400}
1401
f4e91eb4
TJ		 1402static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1403static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1404static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1405static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1406
f4e91eb4
TJ		 1407static struct device_attribute *mlx4_class_attributes[] = {
1408 &dev_attr_hw_rev,
1409 &dev_attr_fw_ver,
1410 &dev_attr_hca_type,
1411 &dev_attr_board_id
cd9281d8
JM		 1412};
1413
acc4fccf
MS		 1414static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1415 struct net_device *dev)
1416{
1417 memcpy(eui, dev->dev_addr, 3);
1418 memcpy(eui + 5, dev->dev_addr + 3, 3);
1419 if (vlan_id < 0x1000) {
1420 eui[3] = vlan_id >> 8;
1421 eui[4] = vlan_id & 0xff;
1422 } else {
1423 eui[3] = 0xff;
1424 eui[4] = 0xfe;
1425 }
1426 eui[0] ^= 2;
1427}
1428
fa417f7b
EC		 1429static void update_gids_task(struct work_struct *work)
1430{
1431 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1432 struct mlx4_cmd_mailbox *mailbox;
1433 union ib_gid *gids;
1434 int err;
1435 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1436
4bf9715f
MS		 1437 if (!gw->dev->ib_active)
1438 return;
1439
fa417f7b
EC		 1440 mailbox = mlx4_alloc_cmd_mailbox(dev);
1441 if (IS_ERR(mailbox)) {
987c8f8f 1442 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1443 return;
1444 }
1445
1446 gids = mailbox->buf;
1447 memcpy(gids, gw->gids, sizeof gw->gids);
1448
1449 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
f9baff50 1450 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
992e8e6e 1451 MLX4_CMD_WRAPPED);
fa417f7b 1452 if (err)
987c8f8f 1453 pr_warn("set port command failed\n");
d487ee77 1454 else
00f5ce99 1455 mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1456
1457 mlx4_free_cmd_mailbox(dev, mailbox);
1458 kfree(gw);
1459}
1460
d487ee77 1461static void reset_gids_task(struct work_struct *work)
fa417f7b 1462{
d487ee77
MS		 1463 struct update_gid_work *gw =
1464 container_of(work, struct update_gid_work, work);
1465 struct mlx4_cmd_mailbox *mailbox;
1466 union ib_gid *gids;
1467 int err;
d487ee77 1468 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1469
4bf9715f
MS		 1470 if (!gw->dev->ib_active)
1471 return;
1472
d487ee77
MS		 1473 mailbox = mlx4_alloc_cmd_mailbox(dev);
1474 if (IS_ERR(mailbox)) {
1475 pr_warn("reset gid table failed\n");
1476 goto free;
1477 }
fa417f7b 1478
d487ee77
MS		 1479 gids = mailbox->buf;
1480 memcpy(gids, gw->gids, sizeof(gw->gids));
1481
5071456f
MS		 1482 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1483 IB_LINK_LAYER_ETHERNET) {
1484 err = mlx4_cmd(dev, mailbox->dma,
1485 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1486 1, MLX4_CMD_SET_PORT,
1487 MLX4_CMD_TIME_CLASS_B,
1488 MLX4_CMD_WRAPPED);
1489 if (err)
1490 pr_warn(KERN_WARNING
1491 "set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1492 }
1493
d487ee77
MS		 1494 mlx4_free_cmd_mailbox(dev, mailbox);
1495free:
1496 kfree(gw);
1497}
4c3eb3ca 1498
d487ee77 1499static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1500 union ib_gid *gid, int clear,
1501 int default_gid)
d487ee77
MS		 1502{
1503 struct update_gid_work *work;
1504 int i;
1505 int need_update = 0;
1506 int free = -1;
1507 int found = -1;
1508 int max_gids;
1509
acc4fccf
MS		 1510 if (default_gid) {
1511 free = 0;
1512 } else {
1513 max_gids = dev->dev->caps.gid_table_len[port];
1514 for (i = 1; i < max_gids; ++i) {
1515 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1516 sizeof(*gid)))
acc4fccf
MS		 1517 found = i;
1518
1519 if (clear) {
1520 if (found >= 0) {
1521 need_update = 1;
1522 dev->iboe.gid_table[port - 1][found] =
1523 zgid;
1524 break;
1525 }
1526 } else {
1527 if (found >= 0)
1528 break;
1529
1530 if (free < 0 &&
1531 !memcmp(&dev->iboe.gid_table[port - 1][i],
1532 &zgid, sizeof(*gid)))
1533 free = i;
1534 }
4c3eb3ca 1535 }
fa417f7b 1536 }
4c3eb3ca 1537
d487ee77
MS		 1538 if (found == -1 && !clear && free >= 0) {
1539 dev->iboe.gid_table[port - 1][free] = *gid;
1540 need_update = 1;
1541 }
fa417f7b 1542
d487ee77
MS		 1543 if (!need_update)
1544 return 0;
1545
1546 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1547 if (!work)
1548 return -ENOMEM;
1549
1550 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1551 INIT_WORK(&work->work, update_gids_task);
1552 work->port = port;
1553 work->dev = dev;
1554 queue_work(wq, &work->work);
fa417f7b
EC		 1555
1556 return 0;
d487ee77 1557}
4c3eb3ca 1558
acc4fccf 1559static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1560{
acc4fccf
MS		 1561 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1562 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1563}
1564
d487ee77 1565
5071456f 1566static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1567{
1568 struct update_gid_work *work;
d487ee77
MS		 1569
1570 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1571 if (!work)
1572 return -ENOMEM;
5071456f
MS		 1573
1574 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1575 memset(work->gids, 0, sizeof(work->gids));
1576 INIT_WORK(&work->work, reset_gids_task);
1577 work->dev = dev;
5071456f 1578 work->port = port;
d487ee77
MS		 1579 queue_work(wq, &work->work);
1580 return 0;
fa417f7b
EC		 1581}
1582
d487ee77
MS		 1583static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1584 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1585{
d487ee77
MS		 1586 struct mlx4_ib_iboe *iboe;
1587 int port = 0;
1588 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1589 rdma_vlan_dev_real_dev(event_netdev) :
1590 event_netdev;
acc4fccf
MS		 1591 union ib_gid default_gid;
1592
1593 mlx4_make_default_gid(real_dev, &default_gid);
1594
1595 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1596 return 0;
d487ee77
MS		 1597
1598 if (event != NETDEV_DOWN && event != NETDEV_UP)
1599 return 0;
1600
1601 if ((real_dev != event_netdev) &&
1602 (event == NETDEV_DOWN) &&
1603 rdma_link_local_addr((struct in6_addr *)gid))
1604 return 0;
1605
1606 iboe = &ibdev->iboe;
dba3ad2a 1607 spin_lock_bh(&iboe->lock);
d487ee77 1608
82373701 1609 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1610 if ((netif_is_bond_master(real_dev) &&
1611 (real_dev == iboe->masters[port - 1])) ||
1612 (!netif_is_bond_master(real_dev) &&
1613 (real_dev == iboe->netdevs[port - 1])))
1614 update_gid_table(ibdev, port, gid,
acc4fccf 1615 event == NETDEV_DOWN, 0);
d487ee77 1616
dba3ad2a 1617 spin_unlock_bh(&iboe->lock);
d487ee77 1618 return 0;
fa417f7b 1619
fa417f7b
EC		 1620}
1621
d487ee77
MS		 1622static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1623 struct mlx4_ib_dev *ibdev)
fa417f7b 1624{
d487ee77
MS		 1625 u8 port = 0;
1626 struct mlx4_ib_iboe *iboe;
1627 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1628 rdma_vlan_dev_real_dev(dev) : dev;
1629
1630 iboe = &ibdev->iboe;
d487ee77 1631
82373701 1632 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1633 if ((netif_is_bond_master(real_dev) &&
1634 (real_dev == iboe->masters[port - 1])) ||
1635 (!netif_is_bond_master(real_dev) &&
1636 (real_dev == iboe->netdevs[port - 1])))
1637 break;
1638
82373701 1639 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1640 return 0;
1641 else
1642 return port;
fa417f7b
EC		 1643}
1644
d487ee77
MS		 1645static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1646 void *ptr)
fa417f7b 1647{
d487ee77
MS		 1648 struct mlx4_ib_dev *ibdev;
1649 struct in_ifaddr *ifa = ptr;
1650 union ib_gid gid;
1651 struct net_device *event_netdev = ifa->ifa_dev->dev;
1652
1653 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1654
1655 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1656
1657 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1658 return NOTIFY_DONE;
fa417f7b
EC		 1659}
1660
27cdef63 1661#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1662static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1663 void *ptr)
1664{
fa417f7b 1665 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1666 struct inet6_ifaddr *ifa = ptr;
1667 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1668 struct net_device *event_netdev = ifa->idev->dev;
1669
1670 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1671
1672 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1673 return NOTIFY_DONE;
1674}
1675#endif
1676
9433c188
MB		 1677#define MLX4_IB_INVALID_MAC ((u64)-1)
1678static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1679 struct net_device *dev,
1680 int port)
1681{
1682 u64 new_smac = 0;
1683 u64 release_mac = MLX4_IB_INVALID_MAC;
1684 struct mlx4_ib_qp *qp;
1685
1686 read_lock(&dev_base_lock);
1687 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1688 read_unlock(&dev_base_lock);
1689
3e0629cb
JM		 1690 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1691
d24d9f43
JM		 1692 /* no need for update QP1 and mac registration in non-SRIOV */
1693 if (!mlx4_is_mfunc(ibdev->dev))
1694 return;
1695
9433c188
MB		 1696 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1697 qp = ibdev->qp1_proxy[port - 1];
1698 if (qp) {
1699 int new_smac_index;
25476b02 1700 u64 old_smac;
9433c188
MB		 1701 struct mlx4_update_qp_params update_params;
1702
25476b02
JM		 1703 mutex_lock(&qp->mutex);
1704 old_smac = qp->pri.smac;
9433c188
MB		 1705 if (new_smac == old_smac)
1706 goto unlock;
1707
1708 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1709
1710 if (new_smac_index < 0)
1711 goto unlock;
1712
1713 update_params.smac_index = new_smac_index;
09e05c3f 1714 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1715 &update_params)) {
1716 release_mac = new_smac;
1717 goto unlock;
1718 }
25476b02
JM		 1719 /* if old port was zero, no mac was yet registered for this QP */
1720 if (qp->pri.smac_port)
1721 release_mac = old_smac;
9433c188 1722 qp->pri.smac = new_smac;
25476b02 1723 qp->pri.smac_port = port;
9433c188 1724 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1725 }
1726
1727unlock:
9433c188
MB		 1728 if (release_mac != MLX4_IB_INVALID_MAC)
1729 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1730 if (qp)
1731 mutex_unlock(&qp->mutex);
1732 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1733}
1734
d487ee77
MS		 1735static void mlx4_ib_get_dev_addr(struct net_device *dev,
1736 struct mlx4_ib_dev *ibdev, u8 port)
1737{
1738 struct in_device *in_dev;
27cdef63 1739#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1740 struct inet6_dev *in6_dev;
1741 union ib_gid *pgid;
1742 struct inet6_ifaddr *ifp;
f5c4834d 1743 union ib_gid default_gid;
d487ee77
MS		 1744#endif
1745 union ib_gid gid;
1746
1747
82373701 1748 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1749 return;
1750
1751 /* IPv4 gids */
1752 in_dev = in_dev_get(dev);
1753 if (in_dev) {
1754 for_ifa(in_dev) {
1755 /*ifa->ifa_address;*/
1756 ipv6_addr_set_v4mapped(ifa->ifa_address,
1757 (struct in6_addr *)&gid);
acc4fccf 1758 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1759 }
1760 endfor_ifa(in_dev);
1761 in_dev_put(in_dev);
1762 }
27cdef63 1763#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1764 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1765 /* IPv6 gids */
1766 in6_dev = in6_dev_get(dev);
1767 if (in6_dev) {
1768 read_lock_bh(&in6_dev->lock);
1769 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1770 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1771 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1772 continue;
acc4fccf 1773 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1774 }
1775 read_unlock_bh(&in6_dev->lock);
1776 in6_dev_put(in6_dev);
1777 }
1778#endif
1779}
1780
acc4fccf
MS		 1781static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1782 struct net_device *dev, u8 port)
1783{
1784 union ib_gid gid;
1785 mlx4_make_default_gid(dev, &gid);
1786 update_gid_table(ibdev, port, &gid, 0, 1);
1787}
1788
d487ee77
MS		 1789static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1790{
1791 struct net_device *dev;
ddf8bd34 1792 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1793 int i;
655b2aae 1794 int err = 0;
d487ee77 1795
655b2aae
MS		 1796 for (i = 1; i <= ibdev->num_ports; ++i) {
1797 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1798 IB_LINK_LAYER_ETHERNET) {
1799 err = reset_gid_table(ibdev, i);
1800 if (err)
1801 goto out;
1802 }
1803 }
d487ee77
MS		 1804
1805 read_lock(&dev_base_lock);
dba3ad2a 1806 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1807
1808 for_each_netdev(&init_net, dev) {
1809 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1810 /* port will be non-zero only for ETH ports */
1811 if (port) {
1812 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1813 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1814 }
d487ee77
MS		 1815 }
1816
dba3ad2a 1817 spin_unlock_bh(&iboe->lock);
d487ee77 1818 read_unlock(&dev_base_lock);
655b2aae
MS		 1819out:
1820 return err;
d487ee77
MS		 1821}
1822
9433c188
MB		 1823static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1824 struct net_device *dev,
1825 unsigned long event)
1826
d487ee77 1827{
fa417f7b 1828 struct mlx4_ib_iboe *iboe;
9433c188 1829 int update_qps_port = -1;
fa417f7b
EC		 1830 int port;
1831
fa417f7b
EC		 1832 iboe = &ibdev->iboe;
1833
dba3ad2a 1834 spin_lock_bh(&iboe->lock);
fa417f7b 1835 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1836 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1837 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1838 struct net_device *curr_netdev;
d487ee77 1839 struct net_device *curr_master;
ad4885d2 1840
fa417f7b 1841 iboe->netdevs[port - 1] =
0345584e 1842 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1843 if (iboe->netdevs[port - 1])
1844 mlx4_ib_set_default_gid(ibdev,
1845 iboe->netdevs[port - 1], port);
ad4885d2 1846 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1847
1848 if (iboe->netdevs[port - 1] &&
1849 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1850 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1851 iboe->netdevs[port - 1]);
ad4885d2
MS		 1852 } else {
1853 iboe->masters[port - 1] = NULL;
fa417f7b 1854 }
d487ee77 1855 curr_master = iboe->masters[port - 1];
fa417f7b 1856
9433c188
MB		 1857 if (dev == iboe->netdevs[port - 1] &&
1858 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1859 event == NETDEV_UP || event == NETDEV_CHANGE))
1860 update_qps_port = port;
1861
ad4885d2
MS		 1862 if (curr_netdev) {
1863 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1864 IB_PORT_ACTIVE : IB_PORT_DOWN;
1865 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1866 if (curr_master) {
1867 /* if using bonding/team and a slave port is down, we
1868 * don't want the bond IP based gids in the table since
1869 * flows that select port by gid may get the down port.
1870 */
1871 if (port_state == IB_PORT_DOWN) {
1872 reset_gid_table(ibdev, port);
1873 mlx4_ib_set_default_gid(ibdev,
1874 curr_netdev,
1875 port);
1876 } else {
1877 /* gids from the upper dev (bond/team)
1878 * should appear in port's gid table
1879 */
1880 mlx4_ib_get_dev_addr(curr_master,
1881 ibdev, port);
1882 }
e381835c
MS		 1883 }
1884 /* if bonding is used it is possible that we add it to
1885 * masters only after IP address is assigned to the
1886 * net bonding interface.
1887 */
1888 if (curr_master && (old_master != curr_master)) {
1889 reset_gid_table(ibdev, port);
1890 mlx4_ib_set_default_gid(ibdev,
1891 curr_netdev, port);
1892 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1893 }
ad4885d2 1894
e381835c
MS		 1895 if (!curr_master && (old_master != curr_master)) {
1896 reset_gid_table(ibdev, port);
1897 mlx4_ib_set_default_gid(ibdev,
1898 curr_netdev, port);
1899 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1900 }
1901 } else {
ad4885d2 1902 reset_gid_table(ibdev, port);
ad4885d2 1903 }
d487ee77 1904 }
fa417f7b 1905
dba3ad2a 1906 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1907
1908 if (update_qps_port > 0)
1909 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 1910}
1911
1912static int mlx4_ib_netdev_event(struct notifier_block *this,
1913 unsigned long event, void *ptr)
1914{
1915 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1916 struct mlx4_ib_dev *ibdev;
1917
1918 if (!net_eq(dev_net(dev), &init_net))
1919 return NOTIFY_DONE;
1920
1921 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 1922 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 1923
1924 return NOTIFY_DONE;
1925}
1926
54679e14
JM		 1927static void init_pkeys(struct mlx4_ib_dev *ibdev)
1928{
1929 int port;
1930 int slave;
1931 int i;
1932
1933 if (mlx4_is_master(ibdev->dev)) {
1934 for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
1935 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1936 for (i = 0;
1937 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1938 ++i) {
1939 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
1940 /* master has the identity virt2phys pkey mapping */
1941 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
1942 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
1943 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
1944 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
1945 }
1946 }
1947 }
1948 /* initialize pkey cache */
1949 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1950 for (i = 0;
1951 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1952 ++i)
1953 ibdev->pkeys.phys_pkey_cache[port-1][i] =
1954 (i) ? 0 : 0xFFFF;
1955 }
1956 }
1957}
1958
e605b743
SP		 1959static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1960{
4661bd79 1961 char name[80];
e605b743
SP		 1962 int eq_per_port = 0;
1963 int added_eqs = 0;
1964 int total_eqs = 0;
1965 int i, j, eq;
1966
3aac6ff1
SP		 1967 /* Legacy mode or comp_pool is not large enough */
1968 if (dev->caps.comp_pool == 0 ||
1969 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 1970 return;
1971
1972 eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
1973 dev->caps.num_ports);
1974
1975 /* Init eq table */
1976 added_eqs = 0;
1977 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
1978 added_eqs += eq_per_port;
1979
1980 total_eqs = dev->caps.num_comp_vectors + added_eqs;
1981
1982 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
1983 if (!ibdev->eq_table)
1984 return;
1985
1986 ibdev->eq_added = added_eqs;
1987
1988 eq = 0;
1989 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
1990 for (j = 0; j < eq_per_port; j++) {
4661bd79
DC		 1991 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
1992 i, j, dev->pdev->bus->name);
e605b743 1993 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 1994 if (mlx4_assign_eq(dev, name, NULL,
1995 &ibdev->eq_table[eq])) {
e605b743
SP		 1996 /* Use legacy (same as mlx4_en driver) */
1997 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
1998 ibdev->eq_table[eq] =
1999 (eq % dev->caps.num_comp_vectors);
2000 }
2001 eq++;
2002 }
2003 }
2004
2005 /* Fill the reset of the vector with legacy EQ */
2006 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2007 ibdev->eq_table[eq++] = i;
2008
2009 /* Advertise the new number of EQs to clients */
2010 ibdev->ib_dev.num_comp_vectors = total_eqs;
2011}
2012
2013static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2014{
2015 int i;
3aac6ff1
SP		 2016
2017 /* no additional eqs were added */
2018 if (!ibdev->eq_table)
2019 return;
e605b743
SP		 2020
2021 /* Reset the advertised EQ number */
2022 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2023
2024 /* Free only the added eqs */
2025 for (i = 0; i < ibdev->eq_added; i++) {
2026 /* Don't free legacy eqs if used */
2027 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2028 continue;
2029 mlx4_release_eq(dev, ibdev->eq_table[i]);
2030 }
2031
e605b743 2032 kfree(ibdev->eq_table);
e605b743
SP		 2033}
2034
225c7b1f
RD		 2035static void *mlx4_ib_add(struct mlx4_dev *dev)
2036{
2037 struct mlx4_ib_dev *ibdev;
22e7ef9c 2038 int num_ports = 0;
035b1032 2039 int i, j;
fa417f7b
EC		 2040 int err;
2041 struct mlx4_ib_iboe *iboe;
4196670b 2042 int ib_num_ports = 0;
225c7b1f 2043
987c8f8f 2044 pr_info_once("%s", mlx4_ib_version);
68f3948d 2045
026149cb 2046 num_ports = 0;
fa417f7b 2047 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2048 num_ports++;
2049
2050 /* No point in registering a device with no ports... */
2051 if (num_ports == 0)
2052 return NULL;
2053
225c7b1f
RD		 2054 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2055 if (!ibdev) {
2056 dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
2057 return NULL;
2058 }
2059
fa417f7b
EC		 2060 iboe = &ibdev->iboe;
2061
225c7b1f
RD		 2062 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2063 goto err_dealloc;
2064
2065 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2066 goto err_pd;
2067
4979d18f
RD		 2068 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2069 PAGE_SIZE);
225c7b1f
RD		 2070 if (!ibdev->uar_map)
2071 goto err_uar;
26c6bc7b 2072 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2073
225c7b1f
RD		 2074 ibdev->dev = dev;
2075
2076 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2077 ibdev->ib_dev.owner = THIS_MODULE;
2078 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2079 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2080 ibdev->num_ports = num_ports;
7ff93f8b 2081 ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
b8dd786f 2082 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
225c7b1f
RD		 2083 ibdev->ib_dev.dma_device = &dev->pdev->dev;
2084
08ff3235
OG		 2085 if (dev->caps.userspace_caps)
2086 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2087 else
2088 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2089
225c7b1f
RD		 2090 ibdev->ib_dev.uverbs_cmd_mask =
2091 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2092 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2093 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2094 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2095 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2096 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2097 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2098 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2099 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2100 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2101 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2102 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2103 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2104 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2105 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2106 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2107 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2108 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2109 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2110 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2111 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2112 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2113 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2114 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2115
2116 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2117 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2118 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2119 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2120 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2121 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2122 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2123 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2124 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2125 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2126 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2127 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2128 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2129 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2130 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2131 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2132 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2133 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2134 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2135 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2136 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2137 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2138 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2139 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2140 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2141 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2142 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2143 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2144 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2145 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2146 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2147 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2148 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2149 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2150 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2151 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2152 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2153 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2154 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2155 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2156 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2157 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2158
992e8e6e
JM		 2159 if (!mlx4_is_slave(ibdev->dev)) {
2160 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2161 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2162 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2163 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2164 }
8ad11fb6 2165
b425388d
SM		 2166 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2167 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2168 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2169 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2170 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2171
2172 ibdev->ib_dev.uverbs_cmd_mask |=
2173 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2174 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2175 }
2176
012a8ff5
SH		 2177 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2178 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2179 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2180 ibdev->ib_dev.uverbs_cmd_mask |=
2181 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2182 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2183 }
2184
f77c0162 2185 if (check_flow_steering_support(dev)) {
0a9b7d59 2186 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2187 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2188 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2189
f21519b2
YD		 2190 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2191 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2192 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2193 }
2194
e605b743
SP		 2195 mlx4_ib_alloc_eqs(dev, ibdev);
2196
fa417f7b
EC		 2197 spin_lock_init(&iboe->lock);
2198
225c7b1f
RD		 2199 if (init_node_data(ibdev))
2200 goto err_map;
2201
cfcde11c 2202 for (i = 0; i < ibdev->num_ports; ++i) {
9433c188 2203 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2204 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2205 IB_LINK_LAYER_ETHERNET) {
2206 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2207 if (err)
2208 ibdev->counters[i] = -1;
3839d8ac
DC		 2209 } else {
2210 ibdev->counters[i] = -1;
2211 }
cfcde11c
OG		 2212 }
2213
4196670b
MB		 2214 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2215 ib_num_ports++;
2216
225c7b1f
RD		 2217 spin_lock_init(&ibdev->sm_lock);
2218 mutex_init(&ibdev->cap_mask_mutex);
2219
4196670b
MB		 2220 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2221 ib_num_ports) {
c1c98501
MB		 2222 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2223 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2224 MLX4_IB_UC_STEER_QPN_ALIGN,
2225 &ibdev->steer_qpn_base);
2226 if (err)
2227 goto err_counter;
2228
2229 ibdev->ib_uc_qpns_bitmap =
2230 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2231 sizeof(long),
2232 GFP_KERNEL);
2233 if (!ibdev->ib_uc_qpns_bitmap) {
2234 dev_err(&dev->pdev->dev, "bit map alloc failed\n");
2235 goto err_steer_qp_release;
2236 }
2237
2238 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2239
2240 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2241 dev, ibdev->steer_qpn_base,
2242 ibdev->steer_qpn_base +
2243 ibdev->steer_qpn_count - 1);
2244 if (err)
2245 goto err_steer_free_bitmap;
2246 }
2247
3e0629cb
JM		 2248 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2249 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2250
9a6edb60 2251 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2252 goto err_steer_free_bitmap;
225c7b1f
RD		 2253
2254 if (mlx4_ib_mad_init(ibdev))
2255 goto err_reg;
2256
fc06573d
JM		 2257 if (mlx4_ib_init_sriov(ibdev))
2258 goto err_mad;
2259
d487ee77
MS		 2260 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2261 if (!iboe->nb.notifier_call) {
2262 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2263 err = register_netdevice_notifier(&iboe->nb);
2264 if (err) {
2265 iboe->nb.notifier_call = NULL;
2266 goto err_notif;
2267 }
2268 }
2269 if (!iboe->nb_inet.notifier_call) {
2270 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2271 err = register_inetaddr_notifier(&iboe->nb_inet);
2272 if (err) {
2273 iboe->nb_inet.notifier_call = NULL;
2274 goto err_notif;
2275 }
2276 }
27cdef63 2277#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2278 if (!iboe->nb_inet6.notifier_call) {
2279 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2280 err = register_inet6addr_notifier(&iboe->nb_inet6);
2281 if (err) {
2282 iboe->nb_inet6.notifier_call = NULL;
2283 goto err_notif;
2284 }
2285 }
2286#endif
655b2aae
MS		 2287 if (mlx4_ib_init_gid_table(ibdev))
2288 goto err_notif;
fa417f7b
EC		 2289 }
2290
035b1032 2291 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2292 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2293 mlx4_class_attributes[j]))
fa417f7b 2294 goto err_notif;
cd9281d8
JM		 2295 }
2296
3b4a8cd5
JM		 2297 ibdev->ib_active = true;
2298
54679e14
JM		 2299 if (mlx4_is_mfunc(ibdev->dev))
2300 init_pkeys(ibdev);
2301
3806d08c
JM		 2302 /* create paravirt contexts for any VFs which are active */
2303 if (mlx4_is_master(ibdev->dev)) {
2304 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2305 if (j == mlx4_master_func_num(ibdev->dev))
2306 continue;
2307 if (mlx4_is_slave_active(ibdev->dev, j))
2308 do_slave_init(ibdev, j, 1);
2309 }
2310 }
225c7b1f
RD		 2311 return ibdev;
2312
fa417f7b 2313err_notif:
d487ee77
MS		 2314 if (ibdev->iboe.nb.notifier_call) {
2315 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2316 pr_warn("failure unregistering notifier\n");
2317 ibdev->iboe.nb.notifier_call = NULL;
2318 }
2319 if (ibdev->iboe.nb_inet.notifier_call) {
2320 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2321 pr_warn("failure unregistering notifier\n");
2322 ibdev->iboe.nb_inet.notifier_call = NULL;
2323 }
27cdef63 2324#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2325 if (ibdev->iboe.nb_inet6.notifier_call) {
2326 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2327 pr_warn("failure unregistering notifier\n");
2328 ibdev->iboe.nb_inet6.notifier_call = NULL;
2329 }
2330#endif
fa417f7b
EC		 2331 flush_workqueue(wq);
2332
fc06573d
JM		 2333 mlx4_ib_close_sriov(ibdev);
2334
2335err_mad:
2336 mlx4_ib_mad_cleanup(ibdev);
2337
225c7b1f
RD		 2338err_reg:
2339 ib_unregister_device(&ibdev->ib_dev);
2340
c1c98501
MB		 2341err_steer_free_bitmap:
2342 kfree(ibdev->ib_uc_qpns_bitmap);
2343
2344err_steer_qp_release:
2345 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2346 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2347 ibdev->steer_qpn_count);
cfcde11c
OG		 2348err_counter:
2349 for (; i; --i)
4af3ce0d
RD		 2350 if (ibdev->counters[i - 1] != -1)
2351 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2352
225c7b1f
RD		 2353err_map:
2354 iounmap(ibdev->uar_map);
2355
2356err_uar:
2357 mlx4_uar_free(dev, &ibdev->priv_uar);
2358
2359err_pd:
2360 mlx4_pd_free(dev, ibdev->priv_pdn);
2361
2362err_dealloc:
2363 ib_dealloc_device(&ibdev->ib_dev);
2364
2365 return NULL;
2366}
2367
c1c98501
MB		 2368int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2369{
2370 int offset;
2371
2372 WARN_ON(!dev->ib_uc_qpns_bitmap);
2373
2374 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2375 dev->steer_qpn_count,
2376 get_count_order(count));
2377 if (offset < 0)
2378 return offset;
2379
2380 *qpn = dev->steer_qpn_base + offset;
2381 return 0;
2382}
2383
2384void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2385{
2386 if (!qpn ||
2387 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2388 return;
2389
2390 BUG_ON(qpn < dev->steer_qpn_base);
2391
2392 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2393 qpn - dev->steer_qpn_base,
2394 get_count_order(count));
2395}
2396
2397int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2398 int is_attach)
2399{
2400 int err;
2401 size_t flow_size;
2402 struct ib_flow_attr *flow = NULL;
2403 struct ib_flow_spec_ib *ib_spec;
2404
2405 if (is_attach) {
2406 flow_size = sizeof(struct ib_flow_attr) +
2407 sizeof(struct ib_flow_spec_ib);
2408 flow = kzalloc(flow_size, GFP_KERNEL);
2409 if (!flow)
2410 return -ENOMEM;
2411 flow->port = mqp->port;
2412 flow->num_of_specs = 1;
2413 flow->size = flow_size;
2414 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2415 ib_spec->type = IB_FLOW_SPEC_IB;
2416 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2417 /* Add an empty rule for IB L2 */
2418 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2419
2420 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2421 IB_FLOW_DOMAIN_NIC,
2422 MLX4_FS_REGULAR,
2423 &mqp->reg_id);
2424 } else {
2425 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2426 }
2427 kfree(flow);
2428 return err;
2429}
2430
225c7b1f
RD		 2431static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2432{
2433 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2434 int p;
2435
4bf9715f
MS		 2436 ibdev->ib_active = false;
2437 flush_workqueue(wq);
2438
fc06573d 2439 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2440 mlx4_ib_mad_cleanup(ibdev);
2441 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2442 if (ibdev->iboe.nb.notifier_call) {
2443 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2444 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2445 ibdev->iboe.nb.notifier_call = NULL;
2446 }
c1c98501
MB		 2447
2448 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2449 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2450 ibdev->steer_qpn_count);
2451 kfree(ibdev->ib_uc_qpns_bitmap);
2452 }
2453
d487ee77
MS		 2454 if (ibdev->iboe.nb_inet.notifier_call) {
2455 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2456 pr_warn("failure unregistering notifier\n");
2457 ibdev->iboe.nb_inet.notifier_call = NULL;
2458 }
27cdef63 2459#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2460 if (ibdev->iboe.nb_inet6.notifier_call) {
2461 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2462 pr_warn("failure unregistering notifier\n");
2463 ibdev->iboe.nb_inet6.notifier_call = NULL;
2464 }
2465#endif
fb1b5034 2466
fa417f7b 2467 iounmap(ibdev->uar_map);
cfcde11c 2468 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2469 if (ibdev->counters[p] != -1)
2470 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2471 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2472 mlx4_CLOSE_PORT(dev, p);
2473
e605b743
SP		 2474 mlx4_ib_free_eqs(dev, ibdev);
2475
225c7b1f
RD		 2476 mlx4_uar_free(dev, &ibdev->priv_uar);
2477 mlx4_pd_free(dev, ibdev->priv_pdn);
2478 ib_dealloc_device(&ibdev->ib_dev);
2479}
2480
fc06573d
JM		 2481static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2482{
2483 struct mlx4_ib_demux_work **dm = NULL;
2484 struct mlx4_dev *dev = ibdev->dev;
2485 int i;
2486 unsigned long flags;
449fc488
MB		 2487 struct mlx4_active_ports actv_ports;
2488 unsigned int ports;
2489 unsigned int first_port;
fc06573d
JM		 2490
2491 if (!mlx4_is_master(dev))
2492 return;
2493
449fc488
MB		 2494 actv_ports = mlx4_get_active_ports(dev, slave);
2495 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2496 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2497
2498 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2499 if (!dm) {
2500 pr_err("failed to allocate memory for tunneling qp update\n");
2501 goto out;
2502 }
2503
449fc488 2504 for (i = 0; i < ports; i++) {
fc06573d
JM		 2505 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2506 if (!dm[i]) {
2507 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2508 for (i = 0; i < dev->caps.num_ports; i++) {
2509 if (dm[i])
2510 kfree(dm[i]);
2511 }
2512 goto out;
2513 }
2514 }
2515 /* initialize or tear down tunnel QPs for the slave */
449fc488 2516 for (i = 0; i < ports; i++) {
fc06573d 2517 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2518 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2519 dm[i]->slave = slave;
2520 dm[i]->do_init = do_init;
2521 dm[i]->dev = ibdev;
2522 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2523 if (!ibdev->sriov.is_going_down)
2524 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2525 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2526 }
2527out:
c89d1271 2528 kfree(dm);
fc06573d
JM		 2529 return;
2530}
2531
225c7b1f 2532static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2533 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2534{
2535 struct ib_event ibev;
7ff93f8b 2536 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2537 struct mlx4_eqe *eqe = NULL;
2538 struct ib_event_work *ew;
fc06573d 2539 int p = 0;
00f5ce99
JM		 2540
2541 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2542 eqe = (struct mlx4_eqe *)param;
2543 else
fc06573d 2544 p = (int) param;
225c7b1f
RD		 2545
2546 switch (event) {
37608eea 2547 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2548 if (p > ibdev->num_ports)
2549 return;
a0c64a17
JM		 2550 if (mlx4_is_master(dev) &&
2551 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2552 IB_LINK_LAYER_INFINIBAND) {
2553 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2554 }
37608eea 2555 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2556 break;
2557
37608eea 2558 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2559 if (p > ibdev->num_ports)
2560 return;
37608eea
RD		 2561 ibev.event = IB_EVENT_PORT_ERR;
2562 break;
2563
2564 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2565 ibdev->ib_active = false;
225c7b1f
RD		 2566 ibev.event = IB_EVENT_DEVICE_FATAL;
2567 break;
2568
00f5ce99
JM		 2569 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2570 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2571 if (!ew) {
2572 pr_err("failed to allocate memory for events work\n");
2573 break;
2574 }
2575
2576 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2577 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2578 ew->ib_dev = ibdev;
992e8e6e
JM		 2579 /* need to queue only for port owner, which uses GEN_EQE */
2580 if (mlx4_is_master(dev))
2581 queue_work(wq, &ew->work);
2582 else
2583 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2584 return;
2585
fc06573d
JM		 2586 case MLX4_DEV_EVENT_SLAVE_INIT:
2587 /* here, p is the slave id */
2588 do_slave_init(ibdev, p, 1);
2589 return;
2590
2591 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2592 /* here, p is the slave id */
2593 do_slave_init(ibdev, p, 0);
2594 return;
2595
225c7b1f
RD		 2596 default:
2597 return;
2598 }
2599
2600 ibev.device = ibdev_ptr;
fc06573d 2601 ibev.element.port_num = (u8) p;
225c7b1f
RD		 2602
2603 ib_dispatch_event(&ibev);
2604}
2605
2606static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2607 .add = mlx4_ib_add,
2608 .remove = mlx4_ib_remove,
2609 .event = mlx4_ib_event,
0345584e 2610 .protocol = MLX4_PROT_IB_IPV6
225c7b1f
RD		 2611};
2612
2613static int __init mlx4_ib_init(void)
2614{
fa417f7b
EC		 2615 int err;
2616
2617 wq = create_singlethread_workqueue("mlx4_ib");
2618 if (!wq)
2619 return -ENOMEM;
2620
b9c5d6a6
OD		 2621 err = mlx4_ib_mcg_init();
2622 if (err)
2623 goto clean_wq;
2624
fa417f7b 2625 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2626 if (err)
2627 goto clean_mcg;
fa417f7b
EC		 2628
2629 return 0;
b9c5d6a6
OD		 2630
2631clean_mcg:
2632 mlx4_ib_mcg_destroy();
2633
2634clean_wq:
2635 destroy_workqueue(wq);
2636 return err;
225c7b1f
RD		 2637}
2638
2639static void __exit mlx4_ib_cleanup(void)
2640{
2641 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2642 mlx4_ib_mcg_destroy();
fa417f7b 2643 destroy_workqueue(wq);
225c7b1f
RD		 2644}
2645
2646module_init(mlx4_ib_init);
2647module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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