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net/mlx4_core: Add UPDATE_QP SRIOV wrapper support
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
51
52#include "mlx4_ib.h"
53#include "user.h"
54
b1d8eb5a 55#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 56#define DRV_VERSION "2.2-1"
57#define DRV_RELDATE "Feb 2014"
225c7b1f 58
f77c0162 59#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 60#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
f77c0162 61
225c7b1f
RD		 62MODULE_AUTHOR("Roland Dreier");
63MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
64MODULE_LICENSE("Dual BSD/GPL");
65MODULE_VERSION(DRV_VERSION);
66
a0c64a17
JM		 67int mlx4_ib_sm_guid_assign = 1;
68module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
69MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
70
68f3948d 71static const char mlx4_ib_version[] =
225c7b1f
RD		 72 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
73 DRV_VERSION " (" DRV_RELDATE ")\n";
74
fa417f7b
EC		 75struct update_gid_work {
76 struct work_struct work;
77 union ib_gid gids[128];
78 struct mlx4_ib_dev *dev;
79 int port;
80};
81
3806d08c
JM		 82static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83
fa417f7b
EC		 84static struct workqueue_struct *wq;
85
225c7b1f
RD		 86static void init_query_mad(struct ib_smp *mad)
87{
88 mad->base_version = 1;
89 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
90 mad->class_version = 1;
91 mad->method = IB_MGMT_METHOD_GET;
92}
93
4c3eb3ca
EC		 94static union ib_gid zgid;
95
f77c0162
HHZ		 96static int check_flow_steering_support(struct mlx4_dev *dev)
97{
0a9b7d59 98 int eth_num_ports = 0;
f77c0162 99 int ib_num_ports = 0;
f77c0162 100
0a9b7d59
MB		 101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
102
103 if (dmfs) {
104 int i;
105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
106 eth_num_ports++;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
108 ib_num_ports++;
109 dmfs &= (!ib_num_ports ||
110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
111 (!eth_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
113 if (ib_num_ports && mlx4_is_mfunc(dev)) {
114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
115 dmfs = 0;
f77c0162 116 }
f77c0162 117 }
0a9b7d59 118 return dmfs;
f77c0162
HHZ		 119}
120
225c7b1f
RD		 121static int mlx4_ib_query_device(struct ib_device *ibdev,
122 struct ib_device_attr *props)
123{
124 struct mlx4_ib_dev *dev = to_mdev(ibdev);
125 struct ib_smp *in_mad = NULL;
126 struct ib_smp *out_mad = NULL;
127 int err = -ENOMEM;
128
129 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
130 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
131 if (!in_mad || !out_mad)
132 goto out;
133
134 init_query_mad(in_mad);
135 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
136
0a9a0188
JM		 137 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
138 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 139 if (err)
140 goto out;
141
142 memset(props, 0, sizeof *props);
143
144 props->fw_ver = dev->dev->caps.fw_ver;
145 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
146 IB_DEVICE_PORT_ACTIVE_EVENT |
147 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 148 IB_DEVICE_RC_RNR_NAK_GEN |
149 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 150 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
151 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
152 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
153 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
154 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
155 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
156 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
157 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 158 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
159 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
417608c2 160 if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
b832be1e 161 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 162 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
163 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
164 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
165 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
166 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
167 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
169 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
171 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
172 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
173 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
174 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
175 else
176 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 177 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 178 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 179 }
225c7b1f
RD		 180
181 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
182 0xffffff;
992e8e6e 183 props->vendor_part_id = dev->dev->pdev->device;
225c7b1f
RD		 184 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
185 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
186
187 props->max_mr_size = ~0ull;
188 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 189 props->max_qp = dev->dev->quotas.qp;
fc2d0044 190 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 191 props->max_sge = min(dev->dev->caps.max_sq_sg,
192 dev->dev->caps.max_rq_sg);
5a0d0a61 193 props->max_cq = dev->dev->quotas.cq;
225c7b1f 194 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 195 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 196 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
197 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
198 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
199 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 200 props->max_srq = dev->dev->quotas.srq;
c8681f14 201 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 202 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 203 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 204 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
205 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
206 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 207 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 208 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 209 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
210 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
211 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
212 props->max_mcast_grp;
a5bbe892 213 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 214
215out:
216 kfree(in_mad);
217 kfree(out_mad);
218
219 return err;
220}
221
fa417f7b
EC		 222static enum rdma_link_layer
223mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 224{
fa417f7b 225 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 226
65dab25d 227 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 228 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
229}
225c7b1f 230
fa417f7b 231static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 232 struct ib_port_attr *props, int netw_view)
fa417f7b 233{
a9c766bb
OG		 234 struct ib_smp *in_mad = NULL;
235 struct ib_smp *out_mad = NULL;
a5e12dff 236 int ext_active_speed;
0a9a0188 237 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 238 int err = -ENOMEM;
239
240 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
241 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
242 if (!in_mad || !out_mad)
243 goto out;
244
245 init_query_mad(in_mad);
246 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
247 in_mad->attr_mod = cpu_to_be32(port);
248
0a9a0188
JM		 249 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
250 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
251
252 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 253 in_mad, out_mad);
254 if (err)
255 goto out;
256
a5e12dff 257
225c7b1f
RD		 258 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
259 props->lmc = out_mad->data[34] & 0x7;
260 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
261 props->sm_sl = out_mad->data[36] & 0xf;
262 props->state = out_mad->data[32] & 0xf;
263 props->phys_state = out_mad->data[33] >> 4;
264 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 265 if (netw_view)
266 props->gid_tbl_len = out_mad->data[50];
267 else
268 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 269 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 270 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 271 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
272 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
273 props->active_width = out_mad->data[31] & 0xf;
274 props->active_speed = out_mad->data[35] >> 4;
275 props->max_mtu = out_mad->data[41] & 0xf;
276 props->active_mtu = out_mad->data[36] >> 4;
277 props->subnet_timeout = out_mad->data[51] & 0x1f;
278 props->max_vl_num = out_mad->data[37] >> 4;
279 props->init_type_reply = out_mad->data[41] >> 4;
280
a5e12dff
MA		 281 /* Check if extended speeds (EDR/FDR/...) are supported */
282 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
283 ext_active_speed = out_mad->data[62] >> 4;
284
285 switch (ext_active_speed) {
286 case 1:
2e96691c 287 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 288 break;
289 case 2:
2e96691c 290 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 291 break;
292 }
293 }
294
295 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 296 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 297 init_query_mad(in_mad);
298 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
299 in_mad->attr_mod = cpu_to_be32(port);
300
0a9a0188 301 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 302 NULL, NULL, in_mad, out_mad);
303 if (err)
bf6b47de 304 goto out;
8154c07f
OG		 305
306 /* Checking LinkSpeedActive for FDR-10 */
307 if (out_mad->data[15] & 0x1)
308 props->active_speed = IB_SPEED_FDR10;
a5e12dff 309 }
d2ef4068
OG		 310
311 /* Avoid wrong speed value returned by FW if the IB link is down. */
312 if (props->state == IB_PORT_DOWN)
313 props->active_speed = IB_SPEED_SDR;
314
a9c766bb
OG		 315out:
316 kfree(in_mad);
317 kfree(out_mad);
318 return err;
fa417f7b
EC		 319}
320
321static u8 state_to_phys_state(enum ib_port_state state)
322{
323 return state == IB_PORT_ACTIVE ? 5 : 3;
324}
325
326static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 327 struct ib_port_attr *props, int netw_view)
fa417f7b 328{
a9c766bb
OG		 329
330 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
331 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 332 struct net_device *ndev;
333 enum ib_mtu tmp;
a9c766bb
OG		 334 struct mlx4_cmd_mailbox *mailbox;
335 int err = 0;
336
337 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
338 if (IS_ERR(mailbox))
339 return PTR_ERR(mailbox);
fa417f7b 340
a9c766bb
OG		 341 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
342 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
343 MLX4_CMD_WRAPPED);
344 if (err)
345 goto out;
346
347 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
348 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 349 props->active_speed = IB_SPEED_QDR;
b4a26a27 350 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 351 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
352 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 353 props->pkey_tbl_len = 1;
bcacb897 354 props->max_mtu = IB_MTU_4096;
a9c766bb 355 props->max_vl_num = 2;
fa417f7b
EC		 356 props->state = IB_PORT_DOWN;
357 props->phys_state = state_to_phys_state(props->state);
358 props->active_mtu = IB_MTU_256;
359 spin_lock(&iboe->lock);
360 ndev = iboe->netdevs[port - 1];
361 if (!ndev)
a9c766bb 362 goto out_unlock;
fa417f7b
EC		 363
364 tmp = iboe_get_mtu(ndev->mtu);
365 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
366
21d60609 367 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 368 IB_PORT_ACTIVE : IB_PORT_DOWN;
369 props->phys_state = state_to_phys_state(props->state);
a9c766bb 370out_unlock:
fa417f7b 371 spin_unlock(&iboe->lock);
a9c766bb
OG		 372out:
373 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
374 return err;
fa417f7b
EC		 375}
376
0a9a0188
JM		 377int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
378 struct ib_port_attr *props, int netw_view)
fa417f7b 379{
a9c766bb 380 int err;
fa417f7b
EC		 381
382 memset(props, 0, sizeof *props);
383
fa417f7b 384 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 385 ib_link_query_port(ibdev, port, props, netw_view) :
386 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 387
388 return err;
389}
390
0a9a0188
JM		 391static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
392 struct ib_port_attr *props)
393{
394 /* returns host view */
395 return __mlx4_ib_query_port(ibdev, port, props, 0);
396}
397
a0c64a17
JM		 398int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
399 union ib_gid *gid, int netw_view)
225c7b1f
RD		 400{
401 struct ib_smp *in_mad = NULL;
402 struct ib_smp *out_mad = NULL;
403 int err = -ENOMEM;
a0c64a17
JM		 404 struct mlx4_ib_dev *dev = to_mdev(ibdev);
405 int clear = 0;
406 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 407
408 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
409 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
410 if (!in_mad || !out_mad)
411 goto out;
412
413 init_query_mad(in_mad);
414 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
415 in_mad->attr_mod = cpu_to_be32(port);
416
a0c64a17
JM		 417 if (mlx4_is_mfunc(dev->dev) && netw_view)
418 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
419
420 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 421 if (err)
422 goto out;
423
424 memcpy(gid->raw, out_mad->data + 8, 8);
425
a0c64a17
JM		 426 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
427 if (index) {
428 /* For any index > 0, return the null guid */
429 err = 0;
430 clear = 1;
431 goto out;
432 }
433 }
434
225c7b1f
RD		 435 init_query_mad(in_mad);
436 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
437 in_mad->attr_mod = cpu_to_be32(index / 8);
438
a0c64a17 439 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 440 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 441 if (err)
442 goto out;
443
444 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
445
446out:
a0c64a17
JM		 447 if (clear)
448 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 449 kfree(in_mad);
450 kfree(out_mad);
451 return err;
452}
453
fa417f7b
EC		 454static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
455 union ib_gid *gid)
456{
457 struct mlx4_ib_dev *dev = to_mdev(ibdev);
458
459 *gid = dev->iboe.gid_table[port - 1][index];
460
461 return 0;
462}
463
464static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
465 union ib_gid *gid)
466{
467 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 468 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 469 else
470 return iboe_query_gid(ibdev, port, index, gid);
471}
472
0a9a0188
JM		 473int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
474 u16 *pkey, int netw_view)
225c7b1f
RD		 475{
476 struct ib_smp *in_mad = NULL;
477 struct ib_smp *out_mad = NULL;
0a9a0188 478 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 479 int err = -ENOMEM;
480
481 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
482 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
483 if (!in_mad || !out_mad)
484 goto out;
485
486 init_query_mad(in_mad);
487 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
488 in_mad->attr_mod = cpu_to_be32(index / 32);
489
0a9a0188
JM		 490 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
491 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
492
493 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
494 in_mad, out_mad);
225c7b1f
RD		 495 if (err)
496 goto out;
497
498 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
499
500out:
501 kfree(in_mad);
502 kfree(out_mad);
503 return err;
504}
505
0a9a0188
JM		 506static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
507{
508 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
509}
510
225c7b1f
RD		 511static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
512 struct ib_device_modify *props)
513{
d0d68b86 514 struct mlx4_cmd_mailbox *mailbox;
df7fba66 515 unsigned long flags;
d0d68b86 516
225c7b1f
RD		 517 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
518 return -EOPNOTSUPP;
519
d0d68b86
JM		 520 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
521 return 0;
522
992e8e6e
JM		 523 if (mlx4_is_slave(to_mdev(ibdev)->dev))
524 return -EOPNOTSUPP;
525
df7fba66 526 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 527 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 528 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 529
530 /*
531 * If possible, pass node desc to FW, so it can generate
532 * a 144 trap. If cmd fails, just ignore.
533 */
534 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
535 if (IS_ERR(mailbox))
536 return 0;
537
d0d68b86
JM		 538 memcpy(mailbox->buf, props->node_desc, 64);
539 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 540 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 541
542 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 543
544 return 0;
545}
546
547static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
548 u32 cap_mask)
549{
550 struct mlx4_cmd_mailbox *mailbox;
551 int err;
fa417f7b 552 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 553
554 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
555 if (IS_ERR(mailbox))
556 return PTR_ERR(mailbox);
557
5ae2a7a8
RD		 558 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
559 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
560 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
561 } else {
562 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
563 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
564 }
225c7b1f 565
fa417f7b 566 err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
f9baff50 567 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
225c7b1f
RD		 568
569 mlx4_free_cmd_mailbox(dev->dev, mailbox);
570 return err;
571}
572
573static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
574 struct ib_port_modify *props)
575{
576 struct ib_port_attr attr;
577 u32 cap_mask;
578 int err;
579
580 mutex_lock(&to_mdev(ibdev)->cap_mask_mutex);
581
582 err = mlx4_ib_query_port(ibdev, port, &attr);
583 if (err)
584 goto out;
585
586 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
587 ~props->clr_port_cap_mask;
588
589 err = mlx4_SET_PORT(to_mdev(ibdev), port,
590 !!(mask & IB_PORT_RESET_QKEY_CNTR),
591 cap_mask);
592
593out:
594 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
595 return err;
596}
597
598static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
599 struct ib_udata *udata)
600{
601 struct mlx4_ib_dev *dev = to_mdev(ibdev);
602 struct mlx4_ib_ucontext *context;
08ff3235 603 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 604 struct mlx4_ib_alloc_ucontext_resp resp;
605 int err;
606
3b4a8cd5
JM		 607 if (!dev->ib_active)
608 return ERR_PTR(-EAGAIN);
609
08ff3235
OG		 610 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
611 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
612 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
613 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
614 } else {
615 resp.dev_caps = dev->dev->caps.userspace_caps;
616 resp.qp_tab_size = dev->dev->caps.num_qps;
617 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
618 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
619 resp.cqe_size = dev->dev->caps.cqe_size;
620 }
225c7b1f
RD		 621
622 context = kmalloc(sizeof *context, GFP_KERNEL);
623 if (!context)
624 return ERR_PTR(-ENOMEM);
625
626 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
627 if (err) {
628 kfree(context);
629 return ERR_PTR(err);
630 }
631
632 INIT_LIST_HEAD(&context->db_page_list);
633 mutex_init(&context->db_page_mutex);
634
08ff3235
OG		 635 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
636 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
637 else
638 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
639
225c7b1f
RD		 640 if (err) {
641 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
642 kfree(context);
643 return ERR_PTR(-EFAULT);
644 }
645
646 return &context->ibucontext;
647}
648
649static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
650{
651 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
652
653 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
654 kfree(context);
655
656 return 0;
657}
658
659static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
660{
661 struct mlx4_ib_dev *dev = to_mdev(context->device);
662
663 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
664 return -EINVAL;
665
666 if (vma->vm_pgoff == 0) {
667 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
668
669 if (io_remap_pfn_range(vma, vma->vm_start,
670 to_mucontext(context)->uar.pfn,
671 PAGE_SIZE, vma->vm_page_prot))
672 return -EAGAIN;
673 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 674 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 675
676 if (io_remap_pfn_range(vma, vma->vm_start,
677 to_mucontext(context)->uar.pfn +
678 dev->dev->caps.num_uars,
679 PAGE_SIZE, vma->vm_page_prot))
680 return -EAGAIN;
681 } else
682 return -EINVAL;
683
684 return 0;
685}
686
687static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
688 struct ib_ucontext *context,
689 struct ib_udata *udata)
690{
691 struct mlx4_ib_pd *pd;
692 int err;
693
694 pd = kmalloc(sizeof *pd, GFP_KERNEL);
695 if (!pd)
696 return ERR_PTR(-ENOMEM);
697
698 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
699 if (err) {
700 kfree(pd);
701 return ERR_PTR(err);
702 }
703
704 if (context)
705 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
706 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
707 kfree(pd);
708 return ERR_PTR(-EFAULT);
709 }
710
711 return &pd->ibpd;
712}
713
714static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
715{
716 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
717 kfree(pd);
718
719 return 0;
720}
721
012a8ff5
SH		 722static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
723 struct ib_ucontext *context,
724 struct ib_udata *udata)
725{
726 struct mlx4_ib_xrcd *xrcd;
727 int err;
728
729 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
730 return ERR_PTR(-ENOSYS);
731
732 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
733 if (!xrcd)
734 return ERR_PTR(-ENOMEM);
735
736 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
737 if (err)
738 goto err1;
739
740 xrcd->pd = ib_alloc_pd(ibdev);
741 if (IS_ERR(xrcd->pd)) {
742 err = PTR_ERR(xrcd->pd);
743 goto err2;
744 }
745
746 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
747 if (IS_ERR(xrcd->cq)) {
748 err = PTR_ERR(xrcd->cq);
749 goto err3;
750 }
751
752 return &xrcd->ibxrcd;
753
754err3:
755 ib_dealloc_pd(xrcd->pd);
756err2:
757 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
758err1:
759 kfree(xrcd);
760 return ERR_PTR(err);
761}
762
763static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
764{
765 ib_destroy_cq(to_mxrcd(xrcd)->cq);
766 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
767 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
768 kfree(xrcd);
769
770 return 0;
771}
772
fa417f7b
EC		 773static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
774{
775 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
776 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
777 struct mlx4_ib_gid_entry *ge;
778
779 ge = kzalloc(sizeof *ge, GFP_KERNEL);
780 if (!ge)
781 return -ENOMEM;
782
783 ge->gid = *gid;
784 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
785 ge->port = mqp->port;
786 ge->added = 1;
787 }
788
789 mutex_lock(&mqp->mutex);
790 list_add_tail(&ge->list, &mqp->gid_list);
791 mutex_unlock(&mqp->mutex);
792
793 return 0;
794}
795
796int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
797 union ib_gid *gid)
798{
fa417f7b
EC		 799 struct net_device *ndev;
800 int ret = 0;
801
802 if (!mqp->port)
803 return 0;
804
805 spin_lock(&mdev->iboe.lock);
806 ndev = mdev->iboe.netdevs[mqp->port - 1];
807 if (ndev)
808 dev_hold(ndev);
809 spin_unlock(&mdev->iboe.lock);
810
811 if (ndev) {
fa417f7b 812 ret = 1;
fa417f7b
EC		 813 dev_put(ndev);
814 }
815
816 return ret;
817}
818
0ff1fb65
HHZ		 819struct mlx4_ib_steering {
820 struct list_head list;
821 u64 reg_id;
822 union ib_gid gid;
823};
824
f77c0162 825static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 826 u32 qp_num,
f77c0162
HHZ		 827 union ib_flow_spec *ib_spec,
828 struct _rule_hw *mlx4_spec)
829{
830 enum mlx4_net_trans_rule_id type;
831
832 switch (ib_spec->type) {
833 case IB_FLOW_SPEC_ETH:
834 type = MLX4_NET_TRANS_RULE_ID_ETH;
835 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
836 ETH_ALEN);
837 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
838 ETH_ALEN);
839 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
840 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
841 break;
a37a1a42
MB		 842 case IB_FLOW_SPEC_IB:
843 type = MLX4_NET_TRANS_RULE_ID_IB;
844 mlx4_spec->ib.l3_qpn =
845 cpu_to_be32(qp_num);
846 mlx4_spec->ib.qpn_mask =
847 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
848 break;
849
f77c0162
HHZ		 850
851 case IB_FLOW_SPEC_IPV4:
852 type = MLX4_NET_TRANS_RULE_ID_IPV4;
853 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
854 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
855 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
856 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
857 break;
858
859 case IB_FLOW_SPEC_TCP:
860 case IB_FLOW_SPEC_UDP:
861 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
862 MLX4_NET_TRANS_RULE_ID_TCP :
863 MLX4_NET_TRANS_RULE_ID_UDP;
864 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
865 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
866 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
867 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
868 break;
869
870 default:
871 return -EINVAL;
872 }
873 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
874 mlx4_hw_rule_sz(dev, type) < 0)
875 return -EINVAL;
876 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
877 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
878 return mlx4_hw_rule_sz(dev, type);
879}
880
a37a1a42
MB		 881struct default_rules {
882 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
883 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
884 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
885 __u8 link_layer;
886};
887static const struct default_rules default_table[] = {
888 {
889 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
890 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
891 .rules_create_list = {IB_FLOW_SPEC_IB},
892 .link_layer = IB_LINK_LAYER_INFINIBAND
893 }
894};
895
896static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
897 struct ib_flow_attr *flow_attr)
898{
899 int i, j, k;
900 void *ib_flow;
901 const struct default_rules *pdefault_rules = default_table;
902 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
903
904 for (i = 0; i < sizeof(default_table)/sizeof(default_table[0]); i++,
905 pdefault_rules++) {
906 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
907 memset(&field_types, 0, sizeof(field_types));
908
909 if (link_layer != pdefault_rules->link_layer)
910 continue;
911
912 ib_flow = flow_attr + 1;
913 /* we assume the specs are sorted */
914 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
915 j < flow_attr->num_of_specs; k++) {
916 union ib_flow_spec *current_flow =
917 (union ib_flow_spec *)ib_flow;
918
919 /* same layer but different type */
920 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
921 (pdefault_rules->mandatory_fields[k] &
922 IB_FLOW_SPEC_LAYER_MASK)) &&
923 (current_flow->type !=
924 pdefault_rules->mandatory_fields[k]))
925 goto out;
926
927 /* same layer, try match next one */
928 if (current_flow->type ==
929 pdefault_rules->mandatory_fields[k]) {
930 j++;
931 ib_flow +=
932 ((union ib_flow_spec *)ib_flow)->size;
933 }
934 }
935
936 ib_flow = flow_attr + 1;
937 for (j = 0; j < flow_attr->num_of_specs;
938 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
939 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
940 /* same layer and same type */
941 if (((union ib_flow_spec *)ib_flow)->type ==
942 pdefault_rules->mandatory_not_fields[k])
943 goto out;
944
945 return i;
946 }
947out:
948 return -1;
949}
950
951static int __mlx4_ib_create_default_rules(
952 struct mlx4_ib_dev *mdev,
953 struct ib_qp *qp,
954 const struct default_rules *pdefault_rules,
955 struct _rule_hw *mlx4_spec) {
956 int size = 0;
957 int i;
958
959 for (i = 0; i < sizeof(pdefault_rules->rules_create_list)/
960 sizeof(pdefault_rules->rules_create_list[0]); i++) {
961 int ret;
962 union ib_flow_spec ib_spec;
963 switch (pdefault_rules->rules_create_list[i]) {
964 case 0:
965 /* no rule */
966 continue;
967 case IB_FLOW_SPEC_IB:
968 ib_spec.type = IB_FLOW_SPEC_IB;
969 ib_spec.size = sizeof(struct ib_flow_spec_ib);
970
971 break;
972 default:
973 /* invalid rule */
974 return -EINVAL;
975 }
976 /* We must put empty rule, qpn is being ignored */
977 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
978 mlx4_spec);
979 if (ret < 0) {
980 pr_info("invalid parsing\n");
981 return -EINVAL;
982 }
983
984 mlx4_spec = (void *)mlx4_spec + ret;
985 size += ret;
986 }
987 return size;
988}
989
f77c0162
HHZ		 990static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
991 int domain,
992 enum mlx4_net_trans_promisc_mode flow_type,
993 u64 *reg_id)
994{
995 int ret, i;
996 int size = 0;
997 void *ib_flow;
998 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
999 struct mlx4_cmd_mailbox *mailbox;
1000 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1001 int default_flow;
f77c0162
HHZ		 1002
1003 static const u16 __mlx4_domain[] = {
1004 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1005 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1006 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1007 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1008 };
1009
1010 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1011 pr_err("Invalid priority value %d\n", flow_attr->priority);
1012 return -EINVAL;
1013 }
1014
1015 if (domain >= IB_FLOW_DOMAIN_NUM) {
1016 pr_err("Invalid domain value %d\n", domain);
1017 return -EINVAL;
1018 }
1019
1020 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1021 return -EINVAL;
1022
1023 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1024 if (IS_ERR(mailbox))
1025 return PTR_ERR(mailbox);
f77c0162
HHZ		 1026 ctrl = mailbox->buf;
1027
1028 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1029 flow_attr->priority);
1030 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1031 ctrl->port = flow_attr->port;
1032 ctrl->qpn = cpu_to_be32(qp->qp_num);
1033
1034 ib_flow = flow_attr + 1;
1035 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1036 /* Add default flows */
1037 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1038 if (default_flow >= 0) {
1039 ret = __mlx4_ib_create_default_rules(
1040 mdev, qp, default_table + default_flow,
1041 mailbox->buf + size);
1042 if (ret < 0) {
1043 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1044 return -EINVAL;
1045 }
1046 size += ret;
1047 }
f77c0162 1048 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1049 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1050 mailbox->buf + size);
f77c0162
HHZ		 1051 if (ret < 0) {
1052 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1053 return -EINVAL;
1054 }
1055 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1056 size += ret;
1057 }
1058
1059 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1060 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1061 MLX4_CMD_NATIVE);
1062 if (ret == -ENOMEM)
1063 pr_err("mcg table is full. Fail to register network rule.\n");
1064 else if (ret == -ENXIO)
1065 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1066 else if (ret)
1067 pr_err("Invalid argumant. Fail to register network rule.\n");
1068
1069 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1070 return ret;
1071}
1072
1073static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1074{
1075 int err;
1076 err = mlx4_cmd(dev, reg_id, 0, 0,
1077 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1078 MLX4_CMD_NATIVE);
1079 if (err)
1080 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1081 reg_id);
1082 return err;
1083}
1084
1085static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1086 struct ib_flow_attr *flow_attr,
1087 int domain)
1088{
1089 int err = 0, i = 0;
1090 struct mlx4_ib_flow *mflow;
1091 enum mlx4_net_trans_promisc_mode type[2];
1092
1093 memset(type, 0, sizeof(type));
1094
1095 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1096 if (!mflow) {
1097 err = -ENOMEM;
1098 goto err_free;
1099 }
1100
1101 switch (flow_attr->type) {
1102 case IB_FLOW_ATTR_NORMAL:
1103 type[0] = MLX4_FS_REGULAR;
1104 break;
1105
1106 case IB_FLOW_ATTR_ALL_DEFAULT:
1107 type[0] = MLX4_FS_ALL_DEFAULT;
1108 break;
1109
1110 case IB_FLOW_ATTR_MC_DEFAULT:
1111 type[0] = MLX4_FS_MC_DEFAULT;
1112 break;
1113
1114 case IB_FLOW_ATTR_SNIFFER:
1115 type[0] = MLX4_FS_UC_SNIFFER;
1116 type[1] = MLX4_FS_MC_SNIFFER;
1117 break;
1118
1119 default:
1120 err = -EINVAL;
1121 goto err_free;
1122 }
1123
1124 while (i < ARRAY_SIZE(type) && type[i]) {
1125 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1126 &mflow->reg_id[i]);
1127 if (err)
1128 goto err_free;
1129 i++;
1130 }
1131
1132 return &mflow->ibflow;
1133
1134err_free:
1135 kfree(mflow);
1136 return ERR_PTR(err);
1137}
1138
1139static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1140{
1141 int err, ret = 0;
1142 int i = 0;
1143 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1144 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1145
1146 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
1147 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
1148 if (err)
1149 ret = err;
1150 i++;
1151 }
1152
1153 kfree(mflow);
1154 return ret;
1155}
1156
225c7b1f
RD		 1157static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1158{
fa417f7b
EC		 1159 int err;
1160 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1161 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65
HHZ		 1162 u64 reg_id;
1163 struct mlx4_ib_steering *ib_steering = NULL;
d487ee77
MS		 1164 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1165 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1166
1167 if (mdev->dev->caps.steering_mode ==
1168 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1169 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1170 if (!ib_steering)
1171 return -ENOMEM;
1172 }
fa417f7b 1173
0ff1fb65
HHZ		 1174 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1175 !!(mqp->flags &
1176 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
d487ee77 1177 prot, &reg_id);
fa417f7b 1178 if (err)
0ff1fb65 1179 goto err_malloc;
fa417f7b
EC		 1180
1181 err = add_gid_entry(ibqp, gid);
1182 if (err)
1183 goto err_add;
1184
0ff1fb65
HHZ		 1185 if (ib_steering) {
1186 memcpy(ib_steering->gid.raw, gid->raw, 16);
1187 ib_steering->reg_id = reg_id;
1188 mutex_lock(&mqp->mutex);
1189 list_add(&ib_steering->list, &mqp->steering_rules);
1190 mutex_unlock(&mqp->mutex);
1191 }
fa417f7b
EC		 1192 return 0;
1193
1194err_add:
0ff1fb65 1195 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1196 prot, reg_id);
0ff1fb65
HHZ		 1197err_malloc:
1198 kfree(ib_steering);
1199
fa417f7b
EC		 1200 return err;
1201}
1202
1203static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1204{
1205 struct mlx4_ib_gid_entry *ge;
1206 struct mlx4_ib_gid_entry *tmp;
1207 struct mlx4_ib_gid_entry *ret = NULL;
1208
1209 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1210 if (!memcmp(raw, ge->gid.raw, 16)) {
1211 ret = ge;
1212 break;
1213 }
1214 }
1215
1216 return ret;
225c7b1f
RD		 1217}
1218
1219static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1220{
fa417f7b
EC		 1221 int err;
1222 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1223 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1224 struct net_device *ndev;
1225 struct mlx4_ib_gid_entry *ge;
0ff1fb65 1226 u64 reg_id = 0;
d487ee77
MS		 1227 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1228 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1229
1230 if (mdev->dev->caps.steering_mode ==
1231 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1232 struct mlx4_ib_steering *ib_steering;
1233
1234 mutex_lock(&mqp->mutex);
1235 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1236 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1237 list_del(&ib_steering->list);
1238 break;
1239 }
1240 }
1241 mutex_unlock(&mqp->mutex);
1242 if (&ib_steering->list == &mqp->steering_rules) {
1243 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1244 return -EINVAL;
1245 }
1246 reg_id = ib_steering->reg_id;
1247 kfree(ib_steering);
1248 }
fa417f7b 1249
0ff1fb65 1250 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1251 prot, reg_id);
fa417f7b
EC		 1252 if (err)
1253 return err;
1254
1255 mutex_lock(&mqp->mutex);
1256 ge = find_gid_entry(mqp, gid->raw);
1257 if (ge) {
1258 spin_lock(&mdev->iboe.lock);
1259 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1260 if (ndev)
1261 dev_hold(ndev);
1262 spin_unlock(&mdev->iboe.lock);
d487ee77 1263 if (ndev)
fa417f7b 1264 dev_put(ndev);
fa417f7b
EC		 1265 list_del(&ge->list);
1266 kfree(ge);
1267 } else
987c8f8f 1268 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1269
1270 mutex_unlock(&mqp->mutex);
1271
1272 return 0;
225c7b1f
RD		 1273}
1274
1275static int init_node_data(struct mlx4_ib_dev *dev)
1276{
1277 struct ib_smp *in_mad = NULL;
1278 struct ib_smp *out_mad = NULL;
0a9a0188 1279 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1280 int err = -ENOMEM;
1281
1282 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1283 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1284 if (!in_mad || !out_mad)
1285 goto out;
1286
1287 init_query_mad(in_mad);
1288 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1289 if (mlx4_is_master(dev->dev))
1290 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1291
0a9a0188 1292 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1293 if (err)
1294 goto out;
1295
1296 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1297
1298 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1299
0a9a0188 1300 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1301 if (err)
1302 goto out;
1303
992e8e6e 1304 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1305 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1306
1307out:
1308 kfree(in_mad);
1309 kfree(out_mad);
1310 return err;
1311}
1312
f4e91eb4
TJ		 1313static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1314 char *buf)
cd9281d8 1315{
f4e91eb4
TJ		 1316 struct mlx4_ib_dev *dev =
1317 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1318 return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
1319}
1320
f4e91eb4
TJ		 1321static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1322 char *buf)
cd9281d8 1323{
f4e91eb4
TJ		 1324 struct mlx4_ib_dev *dev =
1325 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1326 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1327 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1328 (int) dev->dev->caps.fw_ver & 0xffff);
1329}
1330
f4e91eb4
TJ		 1331static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1332 char *buf)
cd9281d8 1333{
f4e91eb4
TJ		 1334 struct mlx4_ib_dev *dev =
1335 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1336 return sprintf(buf, "%x\n", dev->dev->rev_id);
1337}
1338
f4e91eb4
TJ		 1339static ssize_t show_board(struct device *device, struct device_attribute *attr,
1340 char *buf)
cd9281d8 1341{
f4e91eb4
TJ		 1342 struct mlx4_ib_dev *dev =
1343 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1344 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1345 dev->dev->board_id);
cd9281d8
JM		 1346}
1347
f4e91eb4
TJ		 1348static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1349static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1350static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1351static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1352
f4e91eb4
TJ		 1353static struct device_attribute *mlx4_class_attributes[] = {
1354 &dev_attr_hw_rev,
1355 &dev_attr_fw_ver,
1356 &dev_attr_hca_type,
1357 &dev_attr_board_id
cd9281d8
JM		 1358};
1359
acc4fccf
MS		 1360static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1361 struct net_device *dev)
1362{
1363 memcpy(eui, dev->dev_addr, 3);
1364 memcpy(eui + 5, dev->dev_addr + 3, 3);
1365 if (vlan_id < 0x1000) {
1366 eui[3] = vlan_id >> 8;
1367 eui[4] = vlan_id & 0xff;
1368 } else {
1369 eui[3] = 0xff;
1370 eui[4] = 0xfe;
1371 }
1372 eui[0] ^= 2;
1373}
1374
fa417f7b
EC		 1375static void update_gids_task(struct work_struct *work)
1376{
1377 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1378 struct mlx4_cmd_mailbox *mailbox;
1379 union ib_gid *gids;
1380 int err;
1381 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b
EC		 1382
1383 mailbox = mlx4_alloc_cmd_mailbox(dev);
1384 if (IS_ERR(mailbox)) {
987c8f8f 1385 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1386 return;
1387 }
1388
1389 gids = mailbox->buf;
1390 memcpy(gids, gw->gids, sizeof gw->gids);
1391
1392 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
f9baff50 1393 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
992e8e6e 1394 MLX4_CMD_WRAPPED);
fa417f7b 1395 if (err)
987c8f8f 1396 pr_warn("set port command failed\n");
d487ee77 1397 else
00f5ce99 1398 mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1399
1400 mlx4_free_cmd_mailbox(dev, mailbox);
1401 kfree(gw);
1402}
1403
d487ee77 1404static void reset_gids_task(struct work_struct *work)
fa417f7b 1405{
d487ee77
MS		 1406 struct update_gid_work *gw =
1407 container_of(work, struct update_gid_work, work);
1408 struct mlx4_cmd_mailbox *mailbox;
1409 union ib_gid *gids;
1410 int err;
d487ee77 1411 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1412
d487ee77
MS		 1413 mailbox = mlx4_alloc_cmd_mailbox(dev);
1414 if (IS_ERR(mailbox)) {
1415 pr_warn("reset gid table failed\n");
1416 goto free;
1417 }
fa417f7b 1418
d487ee77
MS		 1419 gids = mailbox->buf;
1420 memcpy(gids, gw->gids, sizeof(gw->gids));
1421
5071456f
MS		 1422 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1423 IB_LINK_LAYER_ETHERNET) {
1424 err = mlx4_cmd(dev, mailbox->dma,
1425 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1426 1, MLX4_CMD_SET_PORT,
1427 MLX4_CMD_TIME_CLASS_B,
1428 MLX4_CMD_WRAPPED);
1429 if (err)
1430 pr_warn(KERN_WARNING
1431 "set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1432 }
1433
d487ee77
MS		 1434 mlx4_free_cmd_mailbox(dev, mailbox);
1435free:
1436 kfree(gw);
1437}
4c3eb3ca 1438
d487ee77 1439static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1440 union ib_gid *gid, int clear,
1441 int default_gid)
d487ee77
MS		 1442{
1443 struct update_gid_work *work;
1444 int i;
1445 int need_update = 0;
1446 int free = -1;
1447 int found = -1;
1448 int max_gids;
1449
acc4fccf
MS		 1450 if (default_gid) {
1451 free = 0;
1452 } else {
1453 max_gids = dev->dev->caps.gid_table_len[port];
1454 for (i = 1; i < max_gids; ++i) {
1455 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1456 sizeof(*gid)))
acc4fccf
MS		 1457 found = i;
1458
1459 if (clear) {
1460 if (found >= 0) {
1461 need_update = 1;
1462 dev->iboe.gid_table[port - 1][found] =
1463 zgid;
1464 break;
1465 }
1466 } else {
1467 if (found >= 0)
1468 break;
1469
1470 if (free < 0 &&
1471 !memcmp(&dev->iboe.gid_table[port - 1][i],
1472 &zgid, sizeof(*gid)))
1473 free = i;
1474 }
4c3eb3ca 1475 }
fa417f7b 1476 }
4c3eb3ca 1477
d487ee77
MS		 1478 if (found == -1 && !clear && free >= 0) {
1479 dev->iboe.gid_table[port - 1][free] = *gid;
1480 need_update = 1;
1481 }
fa417f7b 1482
d487ee77
MS		 1483 if (!need_update)
1484 return 0;
1485
1486 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1487 if (!work)
1488 return -ENOMEM;
1489
1490 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1491 INIT_WORK(&work->work, update_gids_task);
1492 work->port = port;
1493 work->dev = dev;
1494 queue_work(wq, &work->work);
fa417f7b
EC		 1495
1496 return 0;
d487ee77 1497}
4c3eb3ca 1498
acc4fccf 1499static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1500{
acc4fccf
MS		 1501 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1502 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1503}
1504
d487ee77 1505
5071456f 1506static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1507{
1508 struct update_gid_work *work;
d487ee77
MS		 1509
1510 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1511 if (!work)
1512 return -ENOMEM;
5071456f
MS		 1513
1514 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1515 memset(work->gids, 0, sizeof(work->gids));
1516 INIT_WORK(&work->work, reset_gids_task);
1517 work->dev = dev;
5071456f 1518 work->port = port;
d487ee77
MS		 1519 queue_work(wq, &work->work);
1520 return 0;
fa417f7b
EC		 1521}
1522
d487ee77
MS		 1523static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1524 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1525{
d487ee77
MS		 1526 struct mlx4_ib_iboe *iboe;
1527 int port = 0;
1528 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1529 rdma_vlan_dev_real_dev(event_netdev) :
1530 event_netdev;
acc4fccf
MS		 1531 union ib_gid default_gid;
1532
1533 mlx4_make_default_gid(real_dev, &default_gid);
1534
1535 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1536 return 0;
d487ee77
MS		 1537
1538 if (event != NETDEV_DOWN && event != NETDEV_UP)
1539 return 0;
1540
1541 if ((real_dev != event_netdev) &&
1542 (event == NETDEV_DOWN) &&
1543 rdma_link_local_addr((struct in6_addr *)gid))
1544 return 0;
1545
1546 iboe = &ibdev->iboe;
1547 spin_lock(&iboe->lock);
1548
82373701 1549 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1550 if ((netif_is_bond_master(real_dev) &&
1551 (real_dev == iboe->masters[port - 1])) ||
1552 (!netif_is_bond_master(real_dev) &&
1553 (real_dev == iboe->netdevs[port - 1])))
1554 update_gid_table(ibdev, port, gid,
acc4fccf 1555 event == NETDEV_DOWN, 0);
d487ee77
MS		 1556
1557 spin_unlock(&iboe->lock);
1558 return 0;
fa417f7b 1559
fa417f7b
EC		 1560}
1561
d487ee77
MS		 1562static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1563 struct mlx4_ib_dev *ibdev)
fa417f7b 1564{
d487ee77
MS		 1565 u8 port = 0;
1566 struct mlx4_ib_iboe *iboe;
1567 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1568 rdma_vlan_dev_real_dev(dev) : dev;
1569
1570 iboe = &ibdev->iboe;
d487ee77 1571
82373701 1572 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1573 if ((netif_is_bond_master(real_dev) &&
1574 (real_dev == iboe->masters[port - 1])) ||
1575 (!netif_is_bond_master(real_dev) &&
1576 (real_dev == iboe->netdevs[port - 1])))
1577 break;
1578
82373701 1579 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1580 return 0;
1581 else
1582 return port;
fa417f7b
EC		 1583}
1584
d487ee77
MS		 1585static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1586 void *ptr)
fa417f7b 1587{
d487ee77
MS		 1588 struct mlx4_ib_dev *ibdev;
1589 struct in_ifaddr *ifa = ptr;
1590 union ib_gid gid;
1591 struct net_device *event_netdev = ifa->ifa_dev->dev;
1592
1593 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1594
1595 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1596
1597 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1598 return NOTIFY_DONE;
fa417f7b
EC		 1599}
1600
27cdef63 1601#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1602static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1603 void *ptr)
1604{
fa417f7b 1605 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1606 struct inet6_ifaddr *ifa = ptr;
1607 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1608 struct net_device *event_netdev = ifa->idev->dev;
1609
1610 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1611
1612 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1613 return NOTIFY_DONE;
1614}
1615#endif
1616
1617static void mlx4_ib_get_dev_addr(struct net_device *dev,
1618 struct mlx4_ib_dev *ibdev, u8 port)
1619{
1620 struct in_device *in_dev;
27cdef63 1621#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1622 struct inet6_dev *in6_dev;
1623 union ib_gid *pgid;
1624 struct inet6_ifaddr *ifp;
1625#endif
1626 union ib_gid gid;
1627
1628
82373701 1629 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1630 return;
1631
1632 /* IPv4 gids */
1633 in_dev = in_dev_get(dev);
1634 if (in_dev) {
1635 for_ifa(in_dev) {
1636 /*ifa->ifa_address;*/
1637 ipv6_addr_set_v4mapped(ifa->ifa_address,
1638 (struct in6_addr *)&gid);
acc4fccf 1639 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1640 }
1641 endfor_ifa(in_dev);
1642 in_dev_put(in_dev);
1643 }
27cdef63 1644#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1645 /* IPv6 gids */
1646 in6_dev = in6_dev_get(dev);
1647 if (in6_dev) {
1648 read_lock_bh(&in6_dev->lock);
1649 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1650 pgid = (union ib_gid *)&ifp->addr;
acc4fccf 1651 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1652 }
1653 read_unlock_bh(&in6_dev->lock);
1654 in6_dev_put(in6_dev);
1655 }
1656#endif
1657}
1658
acc4fccf
MS		 1659static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1660 struct net_device *dev, u8 port)
1661{
1662 union ib_gid gid;
1663 mlx4_make_default_gid(dev, &gid);
1664 update_gid_table(ibdev, port, &gid, 0, 1);
1665}
1666
d487ee77
MS		 1667static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1668{
1669 struct net_device *dev;
ddf8bd34 1670 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1671 int i;
d487ee77 1672
5071456f
MS		 1673 for (i = 1; i <= ibdev->num_ports; ++i)
1674 if (reset_gid_table(ibdev, i))
1675 return -1;
d487ee77
MS		 1676
1677 read_lock(&dev_base_lock);
ddf8bd34 1678 spin_lock(&iboe->lock);
d487ee77
MS		 1679
1680 for_each_netdev(&init_net, dev) {
1681 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
1682 if (port)
1683 mlx4_ib_get_dev_addr(dev, ibdev, port);
1684 }
1685
ddf8bd34 1686 spin_unlock(&iboe->lock);
d487ee77
MS		 1687 read_unlock(&dev_base_lock);
1688
1689 return 0;
1690}
1691
1692static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev)
1693{
fa417f7b
EC		 1694 struct mlx4_ib_iboe *iboe;
1695 int port;
1696
fa417f7b
EC		 1697 iboe = &ibdev->iboe;
1698
1699 spin_lock(&iboe->lock);
1700 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1701 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1702 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1703 struct net_device *curr_netdev;
d487ee77 1704 struct net_device *curr_master;
ad4885d2 1705
fa417f7b 1706 iboe->netdevs[port - 1] =
0345584e 1707 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1708 if (iboe->netdevs[port - 1])
1709 mlx4_ib_set_default_gid(ibdev,
1710 iboe->netdevs[port - 1], port);
ad4885d2 1711 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1712
1713 if (iboe->netdevs[port - 1] &&
1714 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1715 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1716 iboe->netdevs[port - 1]);
ad4885d2
MS		 1717 } else {
1718 iboe->masters[port - 1] = NULL;
fa417f7b 1719 }
d487ee77 1720 curr_master = iboe->masters[port - 1];
fa417f7b 1721
ad4885d2
MS		 1722 if (curr_netdev) {
1723 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1724 IB_PORT_ACTIVE : IB_PORT_DOWN;
1725 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
1726 } else {
1727 reset_gid_table(ibdev, port);
1728 }
1729 /* if using bonding/team and a slave port is down, we don't the bond IP
1730 * based gids in the table since flows that select port by gid may get
1731 * the down port.
1732 */
1733 if (curr_master && (port_state == IB_PORT_DOWN)) {
1734 reset_gid_table(ibdev, port);
1735 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
1736 }
d487ee77 1737 /* if bonding is used it is possible that we add it to masters
ad4885d2
MS		 1738 * only after IP address is assigned to the net bonding
1739 * interface.
1740 */
1741 if (curr_master && (old_master != curr_master)) {
1742 reset_gid_table(ibdev, port);
1743 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
d487ee77 1744 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
ad4885d2
MS		 1745 }
1746
1747 if (!curr_master && (old_master != curr_master)) {
1748 reset_gid_table(ibdev, port);
1749 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
1750 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1751 }
d487ee77 1752 }
fa417f7b
EC		 1753
1754 spin_unlock(&iboe->lock);
d487ee77
MS		 1755}
1756
1757static int mlx4_ib_netdev_event(struct notifier_block *this,
1758 unsigned long event, void *ptr)
1759{
1760 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1761 struct mlx4_ib_dev *ibdev;
1762
1763 if (!net_eq(dev_net(dev), &init_net))
1764 return NOTIFY_DONE;
1765
1766 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
1767 mlx4_ib_scan_netdevs(ibdev);
fa417f7b
EC		 1768
1769 return NOTIFY_DONE;
1770}
1771
54679e14
JM		 1772static void init_pkeys(struct mlx4_ib_dev *ibdev)
1773{
1774 int port;
1775 int slave;
1776 int i;
1777
1778 if (mlx4_is_master(ibdev->dev)) {
1779 for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
1780 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1781 for (i = 0;
1782 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1783 ++i) {
1784 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
1785 /* master has the identity virt2phys pkey mapping */
1786 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
1787 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
1788 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
1789 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
1790 }
1791 }
1792 }
1793 /* initialize pkey cache */
1794 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1795 for (i = 0;
1796 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1797 ++i)
1798 ibdev->pkeys.phys_pkey_cache[port-1][i] =
1799 (i) ? 0 : 0xFFFF;
1800 }
1801 }
1802}
1803
e605b743
SP		 1804static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1805{
4661bd79 1806 char name[80];
e605b743
SP		 1807 int eq_per_port = 0;
1808 int added_eqs = 0;
1809 int total_eqs = 0;
1810 int i, j, eq;
1811
3aac6ff1
SP		 1812 /* Legacy mode or comp_pool is not large enough */
1813 if (dev->caps.comp_pool == 0 ||
1814 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 1815 return;
1816
1817 eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
1818 dev->caps.num_ports);
1819
1820 /* Init eq table */
1821 added_eqs = 0;
1822 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
1823 added_eqs += eq_per_port;
1824
1825 total_eqs = dev->caps.num_comp_vectors + added_eqs;
1826
1827 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
1828 if (!ibdev->eq_table)
1829 return;
1830
1831 ibdev->eq_added = added_eqs;
1832
1833 eq = 0;
1834 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
1835 for (j = 0; j < eq_per_port; j++) {
4661bd79
DC		 1836 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
1837 i, j, dev->pdev->bus->name);
e605b743 1838 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 1839 if (mlx4_assign_eq(dev, name, NULL,
1840 &ibdev->eq_table[eq])) {
e605b743
SP		 1841 /* Use legacy (same as mlx4_en driver) */
1842 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
1843 ibdev->eq_table[eq] =
1844 (eq % dev->caps.num_comp_vectors);
1845 }
1846 eq++;
1847 }
1848 }
1849
1850 /* Fill the reset of the vector with legacy EQ */
1851 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
1852 ibdev->eq_table[eq++] = i;
1853
1854 /* Advertise the new number of EQs to clients */
1855 ibdev->ib_dev.num_comp_vectors = total_eqs;
1856}
1857
1858static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1859{
1860 int i;
3aac6ff1
SP		 1861
1862 /* no additional eqs were added */
1863 if (!ibdev->eq_table)
1864 return;
e605b743
SP		 1865
1866 /* Reset the advertised EQ number */
1867 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
1868
1869 /* Free only the added eqs */
1870 for (i = 0; i < ibdev->eq_added; i++) {
1871 /* Don't free legacy eqs if used */
1872 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
1873 continue;
1874 mlx4_release_eq(dev, ibdev->eq_table[i]);
1875 }
1876
e605b743 1877 kfree(ibdev->eq_table);
e605b743
SP		 1878}
1879
225c7b1f
RD		 1880static void *mlx4_ib_add(struct mlx4_dev *dev)
1881{
1882 struct mlx4_ib_dev *ibdev;
22e7ef9c 1883 int num_ports = 0;
035b1032 1884 int i, j;
fa417f7b
EC		 1885 int err;
1886 struct mlx4_ib_iboe *iboe;
4196670b 1887 int ib_num_ports = 0;
225c7b1f 1888
987c8f8f 1889 pr_info_once("%s", mlx4_ib_version);
68f3948d 1890
026149cb 1891 num_ports = 0;
fa417f7b 1892 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 1893 num_ports++;
1894
1895 /* No point in registering a device with no ports... */
1896 if (num_ports == 0)
1897 return NULL;
1898
225c7b1f
RD		 1899 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
1900 if (!ibdev) {
1901 dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
1902 return NULL;
1903 }
1904
fa417f7b
EC		 1905 iboe = &ibdev->iboe;
1906
225c7b1f
RD		 1907 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
1908 goto err_dealloc;
1909
1910 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
1911 goto err_pd;
1912
4979d18f
RD		 1913 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
1914 PAGE_SIZE);
225c7b1f
RD		 1915 if (!ibdev->uar_map)
1916 goto err_uar;
26c6bc7b 1917 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 1918
225c7b1f
RD		 1919 ibdev->dev = dev;
1920
1921 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
1922 ibdev->ib_dev.owner = THIS_MODULE;
1923 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 1924 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 1925 ibdev->num_ports = num_ports;
7ff93f8b 1926 ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
b8dd786f 1927 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
225c7b1f
RD		 1928 ibdev->ib_dev.dma_device = &dev->pdev->dev;
1929
08ff3235
OG		 1930 if (dev->caps.userspace_caps)
1931 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
1932 else
1933 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
1934
225c7b1f
RD		 1935 ibdev->ib_dev.uverbs_cmd_mask =
1936 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1937 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1938 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1939 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1940 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1941 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1942 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1943 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1944 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 1945 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 1946 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1947 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1948 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 1949 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 1950 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1951 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1952 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1953 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1954 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 1955 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 1956 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 1957 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1958 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 1959
1960 ibdev->ib_dev.query_device = mlx4_ib_query_device;
1961 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 1962 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 1963 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
1964 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
1965 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
1966 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
1967 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
1968 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
1969 ibdev->ib_dev.mmap = mlx4_ib_mmap;
1970 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
1971 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
1972 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
1973 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
1974 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
1975 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
1976 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 1977 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 1978 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
1979 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
1980 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
1981 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 1982 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 1983 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
1984 ibdev->ib_dev.post_send = mlx4_ib_post_send;
1985 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
1986 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 1987 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 1988 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 1989 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
1990 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
1991 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
1992 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
1993 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
1994 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 1995 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
1996 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
1997 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 1998 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
1999 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2000 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2001
992e8e6e
JM		 2002 if (!mlx4_is_slave(ibdev->dev)) {
2003 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2004 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2005 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2006 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2007 }
8ad11fb6 2008
b425388d
SM		 2009 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2010 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2011 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2012 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2013 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2014
2015 ibdev->ib_dev.uverbs_cmd_mask |=
2016 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2017 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2018 }
2019
012a8ff5
SH		 2020 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2021 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2022 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2023 ibdev->ib_dev.uverbs_cmd_mask |=
2024 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2025 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2026 }
2027
f77c0162 2028 if (check_flow_steering_support(dev)) {
0a9b7d59 2029 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2030 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2031 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2032
f21519b2
YD		 2033 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2034 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2035 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2036 }
2037
e605b743
SP		 2038 mlx4_ib_alloc_eqs(dev, ibdev);
2039
fa417f7b
EC		 2040 spin_lock_init(&iboe->lock);
2041
225c7b1f
RD		 2042 if (init_node_data(ibdev))
2043 goto err_map;
2044
cfcde11c
OG		 2045 for (i = 0; i < ibdev->num_ports; ++i) {
2046 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2047 IB_LINK_LAYER_ETHERNET) {
2048 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2049 if (err)
2050 ibdev->counters[i] = -1;
3839d8ac
DC		 2051 } else {
2052 ibdev->counters[i] = -1;
2053 }
cfcde11c
OG		 2054 }
2055
4196670b
MB		 2056 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2057 ib_num_ports++;
2058
225c7b1f
RD		 2059 spin_lock_init(&ibdev->sm_lock);
2060 mutex_init(&ibdev->cap_mask_mutex);
2061
4196670b
MB		 2062 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2063 ib_num_ports) {
c1c98501
MB		 2064 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2065 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2066 MLX4_IB_UC_STEER_QPN_ALIGN,
2067 &ibdev->steer_qpn_base);
2068 if (err)
2069 goto err_counter;
2070
2071 ibdev->ib_uc_qpns_bitmap =
2072 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2073 sizeof(long),
2074 GFP_KERNEL);
2075 if (!ibdev->ib_uc_qpns_bitmap) {
2076 dev_err(&dev->pdev->dev, "bit map alloc failed\n");
2077 goto err_steer_qp_release;
2078 }
2079
2080 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2081
2082 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2083 dev, ibdev->steer_qpn_base,
2084 ibdev->steer_qpn_base +
2085 ibdev->steer_qpn_count - 1);
2086 if (err)
2087 goto err_steer_free_bitmap;
2088 }
2089
9a6edb60 2090 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2091 goto err_steer_free_bitmap;
225c7b1f
RD		 2092
2093 if (mlx4_ib_mad_init(ibdev))
2094 goto err_reg;
2095
fc06573d
JM		 2096 if (mlx4_ib_init_sriov(ibdev))
2097 goto err_mad;
2098
d487ee77
MS		 2099 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2100 if (!iboe->nb.notifier_call) {
2101 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2102 err = register_netdevice_notifier(&iboe->nb);
2103 if (err) {
2104 iboe->nb.notifier_call = NULL;
2105 goto err_notif;
2106 }
2107 }
2108 if (!iboe->nb_inet.notifier_call) {
2109 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2110 err = register_inetaddr_notifier(&iboe->nb_inet);
2111 if (err) {
2112 iboe->nb_inet.notifier_call = NULL;
2113 goto err_notif;
2114 }
2115 }
27cdef63 2116#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2117 if (!iboe->nb_inet6.notifier_call) {
2118 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2119 err = register_inet6addr_notifier(&iboe->nb_inet6);
2120 if (err) {
2121 iboe->nb_inet6.notifier_call = NULL;
2122 goto err_notif;
2123 }
2124 }
2125#endif
ad4885d2
MS		 2126 for (i = 1 ; i <= ibdev->num_ports ; ++i)
2127 reset_gid_table(ibdev, i);
4ce5a574 2128 rtnl_lock();
d487ee77 2129 mlx4_ib_scan_netdevs(ibdev);
4ce5a574 2130 rtnl_unlock();
d487ee77 2131 mlx4_ib_init_gid_table(ibdev);
fa417f7b
EC		 2132 }
2133
035b1032 2134 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2135 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2136 mlx4_class_attributes[j]))
fa417f7b 2137 goto err_notif;
cd9281d8
JM		 2138 }
2139
3b4a8cd5
JM		 2140 ibdev->ib_active = true;
2141
54679e14
JM		 2142 if (mlx4_is_mfunc(ibdev->dev))
2143 init_pkeys(ibdev);
2144
3806d08c
JM		 2145 /* create paravirt contexts for any VFs which are active */
2146 if (mlx4_is_master(ibdev->dev)) {
2147 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2148 if (j == mlx4_master_func_num(ibdev->dev))
2149 continue;
2150 if (mlx4_is_slave_active(ibdev->dev, j))
2151 do_slave_init(ibdev, j, 1);
2152 }
2153 }
225c7b1f
RD		 2154 return ibdev;
2155
fa417f7b 2156err_notif:
d487ee77
MS		 2157 if (ibdev->iboe.nb.notifier_call) {
2158 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2159 pr_warn("failure unregistering notifier\n");
2160 ibdev->iboe.nb.notifier_call = NULL;
2161 }
2162 if (ibdev->iboe.nb_inet.notifier_call) {
2163 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2164 pr_warn("failure unregistering notifier\n");
2165 ibdev->iboe.nb_inet.notifier_call = NULL;
2166 }
27cdef63 2167#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2168 if (ibdev->iboe.nb_inet6.notifier_call) {
2169 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2170 pr_warn("failure unregistering notifier\n");
2171 ibdev->iboe.nb_inet6.notifier_call = NULL;
2172 }
2173#endif
fa417f7b
EC		 2174 flush_workqueue(wq);
2175
fc06573d
JM		 2176 mlx4_ib_close_sriov(ibdev);
2177
2178err_mad:
2179 mlx4_ib_mad_cleanup(ibdev);
2180
225c7b1f
RD		 2181err_reg:
2182 ib_unregister_device(&ibdev->ib_dev);
2183
c1c98501
MB		 2184err_steer_free_bitmap:
2185 kfree(ibdev->ib_uc_qpns_bitmap);
2186
2187err_steer_qp_release:
2188 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2189 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2190 ibdev->steer_qpn_count);
cfcde11c
OG		 2191err_counter:
2192 for (; i; --i)
4af3ce0d
RD		 2193 if (ibdev->counters[i - 1] != -1)
2194 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2195
225c7b1f
RD		 2196err_map:
2197 iounmap(ibdev->uar_map);
2198
2199err_uar:
2200 mlx4_uar_free(dev, &ibdev->priv_uar);
2201
2202err_pd:
2203 mlx4_pd_free(dev, ibdev->priv_pdn);
2204
2205err_dealloc:
2206 ib_dealloc_device(&ibdev->ib_dev);
2207
2208 return NULL;
2209}
2210
c1c98501
MB		 2211int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2212{
2213 int offset;
2214
2215 WARN_ON(!dev->ib_uc_qpns_bitmap);
2216
2217 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2218 dev->steer_qpn_count,
2219 get_count_order(count));
2220 if (offset < 0)
2221 return offset;
2222
2223 *qpn = dev->steer_qpn_base + offset;
2224 return 0;
2225}
2226
2227void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2228{
2229 if (!qpn ||
2230 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2231 return;
2232
2233 BUG_ON(qpn < dev->steer_qpn_base);
2234
2235 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2236 qpn - dev->steer_qpn_base,
2237 get_count_order(count));
2238}
2239
2240int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2241 int is_attach)
2242{
2243 int err;
2244 size_t flow_size;
2245 struct ib_flow_attr *flow = NULL;
2246 struct ib_flow_spec_ib *ib_spec;
2247
2248 if (is_attach) {
2249 flow_size = sizeof(struct ib_flow_attr) +
2250 sizeof(struct ib_flow_spec_ib);
2251 flow = kzalloc(flow_size, GFP_KERNEL);
2252 if (!flow)
2253 return -ENOMEM;
2254 flow->port = mqp->port;
2255 flow->num_of_specs = 1;
2256 flow->size = flow_size;
2257 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2258 ib_spec->type = IB_FLOW_SPEC_IB;
2259 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2260 /* Add an empty rule for IB L2 */
2261 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2262
2263 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2264 IB_FLOW_DOMAIN_NIC,
2265 MLX4_FS_REGULAR,
2266 &mqp->reg_id);
2267 } else {
2268 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2269 }
2270 kfree(flow);
2271 return err;
2272}
2273
225c7b1f
RD		 2274static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2275{
2276 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2277 int p;
2278
fc06573d 2279 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2280 mlx4_ib_mad_cleanup(ibdev);
2281 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2282 if (ibdev->iboe.nb.notifier_call) {
2283 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2284 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2285 ibdev->iboe.nb.notifier_call = NULL;
2286 }
c1c98501
MB		 2287
2288 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2289 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2290 ibdev->steer_qpn_count);
2291 kfree(ibdev->ib_uc_qpns_bitmap);
2292 }
2293
d487ee77
MS		 2294 if (ibdev->iboe.nb_inet.notifier_call) {
2295 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2296 pr_warn("failure unregistering notifier\n");
2297 ibdev->iboe.nb_inet.notifier_call = NULL;
2298 }
27cdef63 2299#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2300 if (ibdev->iboe.nb_inet6.notifier_call) {
2301 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2302 pr_warn("failure unregistering notifier\n");
2303 ibdev->iboe.nb_inet6.notifier_call = NULL;
2304 }
2305#endif
fb1b5034 2306
fa417f7b 2307 iounmap(ibdev->uar_map);
cfcde11c 2308 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2309 if (ibdev->counters[p] != -1)
2310 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2311 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2312 mlx4_CLOSE_PORT(dev, p);
2313
e605b743
SP		 2314 mlx4_ib_free_eqs(dev, ibdev);
2315
225c7b1f
RD		 2316 mlx4_uar_free(dev, &ibdev->priv_uar);
2317 mlx4_pd_free(dev, ibdev->priv_pdn);
2318 ib_dealloc_device(&ibdev->ib_dev);
2319}
2320
fc06573d
JM		 2321static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2322{
2323 struct mlx4_ib_demux_work **dm = NULL;
2324 struct mlx4_dev *dev = ibdev->dev;
2325 int i;
2326 unsigned long flags;
449fc488
MB		 2327 struct mlx4_active_ports actv_ports;
2328 unsigned int ports;
2329 unsigned int first_port;
fc06573d
JM		 2330
2331 if (!mlx4_is_master(dev))
2332 return;
2333
449fc488
MB		 2334 actv_ports = mlx4_get_active_ports(dev, slave);
2335 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2336 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2337
2338 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2339 if (!dm) {
2340 pr_err("failed to allocate memory for tunneling qp update\n");
2341 goto out;
2342 }
2343
449fc488 2344 for (i = 0; i < ports; i++) {
fc06573d
JM		 2345 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2346 if (!dm[i]) {
2347 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2348 for (i = 0; i < dev->caps.num_ports; i++) {
2349 if (dm[i])
2350 kfree(dm[i]);
2351 }
2352 goto out;
2353 }
2354 }
2355 /* initialize or tear down tunnel QPs for the slave */
449fc488 2356 for (i = 0; i < ports; i++) {
fc06573d 2357 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2358 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2359 dm[i]->slave = slave;
2360 dm[i]->do_init = do_init;
2361 dm[i]->dev = ibdev;
2362 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2363 if (!ibdev->sriov.is_going_down)
2364 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2365 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2366 }
2367out:
c89d1271 2368 kfree(dm);
fc06573d
JM		 2369 return;
2370}
2371
225c7b1f 2372static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2373 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2374{
2375 struct ib_event ibev;
7ff93f8b 2376 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2377 struct mlx4_eqe *eqe = NULL;
2378 struct ib_event_work *ew;
fc06573d 2379 int p = 0;
00f5ce99
JM		 2380
2381 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2382 eqe = (struct mlx4_eqe *)param;
2383 else
fc06573d 2384 p = (int) param;
225c7b1f
RD		 2385
2386 switch (event) {
37608eea 2387 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2388 if (p > ibdev->num_ports)
2389 return;
a0c64a17
JM		 2390 if (mlx4_is_master(dev) &&
2391 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2392 IB_LINK_LAYER_INFINIBAND) {
2393 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2394 }
37608eea 2395 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2396 break;
2397
37608eea 2398 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2399 if (p > ibdev->num_ports)
2400 return;
37608eea
RD		 2401 ibev.event = IB_EVENT_PORT_ERR;
2402 break;
2403
2404 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2405 ibdev->ib_active = false;
225c7b1f
RD		 2406 ibev.event = IB_EVENT_DEVICE_FATAL;
2407 break;
2408
00f5ce99
JM		 2409 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2410 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2411 if (!ew) {
2412 pr_err("failed to allocate memory for events work\n");
2413 break;
2414 }
2415
2416 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2417 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2418 ew->ib_dev = ibdev;
992e8e6e
JM		 2419 /* need to queue only for port owner, which uses GEN_EQE */
2420 if (mlx4_is_master(dev))
2421 queue_work(wq, &ew->work);
2422 else
2423 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2424 return;
2425
fc06573d
JM		 2426 case MLX4_DEV_EVENT_SLAVE_INIT:
2427 /* here, p is the slave id */
2428 do_slave_init(ibdev, p, 1);
2429 return;
2430
2431 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2432 /* here, p is the slave id */
2433 do_slave_init(ibdev, p, 0);
2434 return;
2435
225c7b1f
RD		 2436 default:
2437 return;
2438 }
2439
2440 ibev.device = ibdev_ptr;
fc06573d 2441 ibev.element.port_num = (u8) p;
225c7b1f
RD		 2442
2443 ib_dispatch_event(&ibev);
2444}
2445
2446static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2447 .add = mlx4_ib_add,
2448 .remove = mlx4_ib_remove,
2449 .event = mlx4_ib_event,
0345584e 2450 .protocol = MLX4_PROT_IB_IPV6
225c7b1f
RD		 2451};
2452
2453static int __init mlx4_ib_init(void)
2454{
fa417f7b
EC		 2455 int err;
2456
2457 wq = create_singlethread_workqueue("mlx4_ib");
2458 if (!wq)
2459 return -ENOMEM;
2460
b9c5d6a6
OD		 2461 err = mlx4_ib_mcg_init();
2462 if (err)
2463 goto clean_wq;
2464
fa417f7b 2465 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2466 if (err)
2467 goto clean_mcg;
fa417f7b
EC		 2468
2469 return 0;
b9c5d6a6
OD		 2470
2471clean_mcg:
2472 mlx4_ib_mcg_destroy();
2473
2474clean_wq:
2475 destroy_workqueue(wq);
2476 return err;
225c7b1f
RD		 2477}
2478
2479static void __exit mlx4_ib_cleanup(void)
2480{
2481 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2482 mlx4_ib_mcg_destroy();
fa417f7b 2483 destroy_workqueue(wq);
225c7b1f
RD		 2484}
2485
2486module_init(mlx4_ib_init);
2487module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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