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IB/mlx4: Use IBoE (RoCE) IP based GIDs in the port GID table
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
51
52#include "mlx4_ib.h"
53#include "user.h"
54
b1d8eb5a 55#define DRV_NAME MLX4_IB_DRV_NAME
068c4ea1
JM		 56#define DRV_VERSION "1.0"
57#define DRV_RELDATE "April 4, 2008"
225c7b1f 58
f77c0162
HHZ		 59#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
60
225c7b1f
RD		 61MODULE_AUTHOR("Roland Dreier");
62MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
63MODULE_LICENSE("Dual BSD/GPL");
64MODULE_VERSION(DRV_VERSION);
65
a0c64a17
JM		 66int mlx4_ib_sm_guid_assign = 1;
67module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
68MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
69
68f3948d 70static const char mlx4_ib_version[] =
225c7b1f
RD		 71 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
72 DRV_VERSION " (" DRV_RELDATE ")\n";
73
fa417f7b
EC		 74struct update_gid_work {
75 struct work_struct work;
76 union ib_gid gids[128];
77 struct mlx4_ib_dev *dev;
78 int port;
79};
80
3806d08c
JM		 81static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
82
fa417f7b
EC		 83static struct workqueue_struct *wq;
84
225c7b1f
RD		 85static void init_query_mad(struct ib_smp *mad)
86{
87 mad->base_version = 1;
88 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
89 mad->class_version = 1;
90 mad->method = IB_MGMT_METHOD_GET;
91}
92
4c3eb3ca
EC		 93static union ib_gid zgid;
94
f77c0162
HHZ		 95static int check_flow_steering_support(struct mlx4_dev *dev)
96{
97 int ib_num_ports = 0;
98 int i;
99
100 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
101 ib_num_ports++;
102
103 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
104 if (ib_num_ports || mlx4_is_mfunc(dev)) {
105 pr_warn("Device managed flow steering is unavailable "
106 "for IB ports or in multifunction env.\n");
107 return 0;
108 }
109 return 1;
110 }
111 return 0;
112}
113
225c7b1f
RD		 114static int mlx4_ib_query_device(struct ib_device *ibdev,
115 struct ib_device_attr *props)
116{
117 struct mlx4_ib_dev *dev = to_mdev(ibdev);
118 struct ib_smp *in_mad = NULL;
119 struct ib_smp *out_mad = NULL;
120 int err = -ENOMEM;
121
122 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
123 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
124 if (!in_mad || !out_mad)
125 goto out;
126
127 init_query_mad(in_mad);
128 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
129
0a9a0188
JM		 130 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
131 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 132 if (err)
133 goto out;
134
135 memset(props, 0, sizeof *props);
136
137 props->fw_ver = dev->dev->caps.fw_ver;
138 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
139 IB_DEVICE_PORT_ACTIVE_EVENT |
140 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 141 IB_DEVICE_RC_RNR_NAK_GEN |
142 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 143 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
144 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
145 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
146 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
147 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
148 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
149 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
150 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 151 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
152 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
417608c2 153 if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
b832be1e 154 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 155 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
156 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
157 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
158 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
159 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
160 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 161 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
162 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 163 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
164 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
165 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
166 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
167 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
168 else
169 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
f77c0162
HHZ		 170 if (check_flow_steering_support(dev->dev))
171 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 172 }
225c7b1f
RD		 173
174 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
175 0xffffff;
992e8e6e 176 props->vendor_part_id = dev->dev->pdev->device;
225c7b1f
RD		 177 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
178 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
179
180 props->max_mr_size = ~0ull;
181 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 182 props->max_qp = dev->dev->quotas.qp;
fc2d0044 183 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 184 props->max_sge = min(dev->dev->caps.max_sq_sg,
185 dev->dev->caps.max_rq_sg);
5a0d0a61 186 props->max_cq = dev->dev->quotas.cq;
225c7b1f 187 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 188 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 189 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
190 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
191 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
192 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 193 props->max_srq = dev->dev->quotas.srq;
c8681f14 194 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 195 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 196 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 197 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
198 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
199 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 200 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 201 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 202 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
203 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
204 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
205 props->max_mcast_grp;
a5bbe892 206 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 207
208out:
209 kfree(in_mad);
210 kfree(out_mad);
211
212 return err;
213}
214
fa417f7b
EC		 215static enum rdma_link_layer
216mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 217{
fa417f7b 218 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 219
65dab25d 220 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 221 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
222}
225c7b1f 223
fa417f7b 224static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 225 struct ib_port_attr *props, int netw_view)
fa417f7b 226{
a9c766bb
OG		 227 struct ib_smp *in_mad = NULL;
228 struct ib_smp *out_mad = NULL;
a5e12dff 229 int ext_active_speed;
0a9a0188 230 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 231 int err = -ENOMEM;
232
233 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
234 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
235 if (!in_mad || !out_mad)
236 goto out;
237
238 init_query_mad(in_mad);
239 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
240 in_mad->attr_mod = cpu_to_be32(port);
241
0a9a0188
JM		 242 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
243 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
244
245 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 246 in_mad, out_mad);
247 if (err)
248 goto out;
249
a5e12dff 250
225c7b1f
RD		 251 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
252 props->lmc = out_mad->data[34] & 0x7;
253 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
254 props->sm_sl = out_mad->data[36] & 0xf;
255 props->state = out_mad->data[32] & 0xf;
256 props->phys_state = out_mad->data[33] >> 4;
257 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 258 if (netw_view)
259 props->gid_tbl_len = out_mad->data[50];
260 else
261 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 262 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 263 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 264 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
265 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
266 props->active_width = out_mad->data[31] & 0xf;
267 props->active_speed = out_mad->data[35] >> 4;
268 props->max_mtu = out_mad->data[41] & 0xf;
269 props->active_mtu = out_mad->data[36] >> 4;
270 props->subnet_timeout = out_mad->data[51] & 0x1f;
271 props->max_vl_num = out_mad->data[37] >> 4;
272 props->init_type_reply = out_mad->data[41] >> 4;
273
a5e12dff
MA		 274 /* Check if extended speeds (EDR/FDR/...) are supported */
275 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
276 ext_active_speed = out_mad->data[62] >> 4;
277
278 switch (ext_active_speed) {
279 case 1:
2e96691c 280 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 281 break;
282 case 2:
2e96691c 283 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 284 break;
285 }
286 }
287
288 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 289 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 290 init_query_mad(in_mad);
291 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
292 in_mad->attr_mod = cpu_to_be32(port);
293
0a9a0188 294 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 295 NULL, NULL, in_mad, out_mad);
296 if (err)
bf6b47de 297 goto out;
8154c07f
OG		 298
299 /* Checking LinkSpeedActive for FDR-10 */
300 if (out_mad->data[15] & 0x1)
301 props->active_speed = IB_SPEED_FDR10;
a5e12dff 302 }
d2ef4068
OG		 303
304 /* Avoid wrong speed value returned by FW if the IB link is down. */
305 if (props->state == IB_PORT_DOWN)
306 props->active_speed = IB_SPEED_SDR;
307
a9c766bb
OG		 308out:
309 kfree(in_mad);
310 kfree(out_mad);
311 return err;
fa417f7b
EC		 312}
313
314static u8 state_to_phys_state(enum ib_port_state state)
315{
316 return state == IB_PORT_ACTIVE ? 5 : 3;
317}
318
319static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 320 struct ib_port_attr *props, int netw_view)
fa417f7b 321{
a9c766bb
OG		 322
323 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
324 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 325 struct net_device *ndev;
326 enum ib_mtu tmp;
a9c766bb
OG		 327 struct mlx4_cmd_mailbox *mailbox;
328 int err = 0;
329
330 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
331 if (IS_ERR(mailbox))
332 return PTR_ERR(mailbox);
fa417f7b 333
a9c766bb
OG		 334 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
335 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
336 MLX4_CMD_WRAPPED);
337 if (err)
338 goto out;
339
340 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
341 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 342 props->active_speed = IB_SPEED_QDR;
fa417f7b 343 props->port_cap_flags = IB_PORT_CM_SUP;
a9c766bb
OG		 344 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
345 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 346 props->pkey_tbl_len = 1;
bcacb897 347 props->max_mtu = IB_MTU_4096;
a9c766bb 348 props->max_vl_num = 2;
fa417f7b
EC		 349 props->state = IB_PORT_DOWN;
350 props->phys_state = state_to_phys_state(props->state);
351 props->active_mtu = IB_MTU_256;
352 spin_lock(&iboe->lock);
353 ndev = iboe->netdevs[port - 1];
354 if (!ndev)
a9c766bb 355 goto out_unlock;
fa417f7b
EC		 356
357 tmp = iboe_get_mtu(ndev->mtu);
358 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
359
21d60609 360 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 361 IB_PORT_ACTIVE : IB_PORT_DOWN;
362 props->phys_state = state_to_phys_state(props->state);
a9c766bb 363out_unlock:
fa417f7b 364 spin_unlock(&iboe->lock);
a9c766bb
OG		 365out:
366 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
367 return err;
fa417f7b
EC		 368}
369
0a9a0188
JM		 370int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
371 struct ib_port_attr *props, int netw_view)
fa417f7b 372{
a9c766bb 373 int err;
fa417f7b
EC		 374
375 memset(props, 0, sizeof *props);
376
fa417f7b 377 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 378 ib_link_query_port(ibdev, port, props, netw_view) :
379 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 380
381 return err;
382}
383
0a9a0188
JM		 384static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
385 struct ib_port_attr *props)
386{
387 /* returns host view */
388 return __mlx4_ib_query_port(ibdev, port, props, 0);
389}
390
a0c64a17
JM		 391int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
392 union ib_gid *gid, int netw_view)
225c7b1f
RD		 393{
394 struct ib_smp *in_mad = NULL;
395 struct ib_smp *out_mad = NULL;
396 int err = -ENOMEM;
a0c64a17
JM		 397 struct mlx4_ib_dev *dev = to_mdev(ibdev);
398 int clear = 0;
399 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 400
401 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
402 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
403 if (!in_mad || !out_mad)
404 goto out;
405
406 init_query_mad(in_mad);
407 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
408 in_mad->attr_mod = cpu_to_be32(port);
409
a0c64a17
JM		 410 if (mlx4_is_mfunc(dev->dev) && netw_view)
411 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
412
413 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 414 if (err)
415 goto out;
416
417 memcpy(gid->raw, out_mad->data + 8, 8);
418
a0c64a17
JM		 419 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
420 if (index) {
421 /* For any index > 0, return the null guid */
422 err = 0;
423 clear = 1;
424 goto out;
425 }
426 }
427
225c7b1f
RD		 428 init_query_mad(in_mad);
429 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
430 in_mad->attr_mod = cpu_to_be32(index / 8);
431
a0c64a17 432 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 433 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 434 if (err)
435 goto out;
436
437 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
438
439out:
a0c64a17
JM		 440 if (clear)
441 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 442 kfree(in_mad);
443 kfree(out_mad);
444 return err;
445}
446
fa417f7b
EC		 447static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
448 union ib_gid *gid)
449{
450 struct mlx4_ib_dev *dev = to_mdev(ibdev);
451
452 *gid = dev->iboe.gid_table[port - 1][index];
453
454 return 0;
455}
456
457static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
458 union ib_gid *gid)
459{
460 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 461 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 462 else
463 return iboe_query_gid(ibdev, port, index, gid);
464}
465
0a9a0188
JM		 466int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
467 u16 *pkey, int netw_view)
225c7b1f
RD		 468{
469 struct ib_smp *in_mad = NULL;
470 struct ib_smp *out_mad = NULL;
0a9a0188 471 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 472 int err = -ENOMEM;
473
474 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
475 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
476 if (!in_mad || !out_mad)
477 goto out;
478
479 init_query_mad(in_mad);
480 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
481 in_mad->attr_mod = cpu_to_be32(index / 32);
482
0a9a0188
JM		 483 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
484 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
485
486 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
487 in_mad, out_mad);
225c7b1f
RD		 488 if (err)
489 goto out;
490
491 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
492
493out:
494 kfree(in_mad);
495 kfree(out_mad);
496 return err;
497}
498
0a9a0188
JM		 499static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
500{
501 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
502}
503
225c7b1f
RD		 504static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
505 struct ib_device_modify *props)
506{
d0d68b86 507 struct mlx4_cmd_mailbox *mailbox;
df7fba66 508 unsigned long flags;
d0d68b86 509
225c7b1f
RD		 510 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
511 return -EOPNOTSUPP;
512
d0d68b86
JM		 513 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
514 return 0;
515
992e8e6e
JM		 516 if (mlx4_is_slave(to_mdev(ibdev)->dev))
517 return -EOPNOTSUPP;
518
df7fba66 519 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 520 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 521 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 522
523 /*
524 * If possible, pass node desc to FW, so it can generate
525 * a 144 trap. If cmd fails, just ignore.
526 */
527 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
528 if (IS_ERR(mailbox))
529 return 0;
530
d0d68b86
JM		 531 memcpy(mailbox->buf, props->node_desc, 64);
532 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 533 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 534
535 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 536
537 return 0;
538}
539
540static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
541 u32 cap_mask)
542{
543 struct mlx4_cmd_mailbox *mailbox;
544 int err;
fa417f7b 545 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 546
547 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
548 if (IS_ERR(mailbox))
549 return PTR_ERR(mailbox);
550
5ae2a7a8
RD		 551 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
552 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
553 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
554 } else {
555 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
556 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
557 }
225c7b1f 558
fa417f7b 559 err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
f9baff50 560 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
225c7b1f
RD		 561
562 mlx4_free_cmd_mailbox(dev->dev, mailbox);
563 return err;
564}
565
566static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
567 struct ib_port_modify *props)
568{
569 struct ib_port_attr attr;
570 u32 cap_mask;
571 int err;
572
573 mutex_lock(&to_mdev(ibdev)->cap_mask_mutex);
574
575 err = mlx4_ib_query_port(ibdev, port, &attr);
576 if (err)
577 goto out;
578
579 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
580 ~props->clr_port_cap_mask;
581
582 err = mlx4_SET_PORT(to_mdev(ibdev), port,
583 !!(mask & IB_PORT_RESET_QKEY_CNTR),
584 cap_mask);
585
586out:
587 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
588 return err;
589}
590
591static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
592 struct ib_udata *udata)
593{
594 struct mlx4_ib_dev *dev = to_mdev(ibdev);
595 struct mlx4_ib_ucontext *context;
08ff3235 596 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 597 struct mlx4_ib_alloc_ucontext_resp resp;
598 int err;
599
3b4a8cd5
JM		 600 if (!dev->ib_active)
601 return ERR_PTR(-EAGAIN);
602
08ff3235
OG		 603 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
604 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
605 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
606 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
607 } else {
608 resp.dev_caps = dev->dev->caps.userspace_caps;
609 resp.qp_tab_size = dev->dev->caps.num_qps;
610 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
611 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
612 resp.cqe_size = dev->dev->caps.cqe_size;
613 }
225c7b1f
RD		 614
615 context = kmalloc(sizeof *context, GFP_KERNEL);
616 if (!context)
617 return ERR_PTR(-ENOMEM);
618
619 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
620 if (err) {
621 kfree(context);
622 return ERR_PTR(err);
623 }
624
625 INIT_LIST_HEAD(&context->db_page_list);
626 mutex_init(&context->db_page_mutex);
627
08ff3235
OG		 628 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
629 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
630 else
631 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
632
225c7b1f
RD		 633 if (err) {
634 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
635 kfree(context);
636 return ERR_PTR(-EFAULT);
637 }
638
639 return &context->ibucontext;
640}
641
642static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
643{
644 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
645
646 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
647 kfree(context);
648
649 return 0;
650}
651
652static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
653{
654 struct mlx4_ib_dev *dev = to_mdev(context->device);
655
656 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
657 return -EINVAL;
658
659 if (vma->vm_pgoff == 0) {
660 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
661
662 if (io_remap_pfn_range(vma, vma->vm_start,
663 to_mucontext(context)->uar.pfn,
664 PAGE_SIZE, vma->vm_page_prot))
665 return -EAGAIN;
666 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 667 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 668
669 if (io_remap_pfn_range(vma, vma->vm_start,
670 to_mucontext(context)->uar.pfn +
671 dev->dev->caps.num_uars,
672 PAGE_SIZE, vma->vm_page_prot))
673 return -EAGAIN;
674 } else
675 return -EINVAL;
676
677 return 0;
678}
679
680static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
681 struct ib_ucontext *context,
682 struct ib_udata *udata)
683{
684 struct mlx4_ib_pd *pd;
685 int err;
686
687 pd = kmalloc(sizeof *pd, GFP_KERNEL);
688 if (!pd)
689 return ERR_PTR(-ENOMEM);
690
691 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
692 if (err) {
693 kfree(pd);
694 return ERR_PTR(err);
695 }
696
697 if (context)
698 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
699 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
700 kfree(pd);
701 return ERR_PTR(-EFAULT);
702 }
703
704 return &pd->ibpd;
705}
706
707static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
708{
709 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
710 kfree(pd);
711
712 return 0;
713}
714
012a8ff5
SH		 715static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
716 struct ib_ucontext *context,
717 struct ib_udata *udata)
718{
719 struct mlx4_ib_xrcd *xrcd;
720 int err;
721
722 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
723 return ERR_PTR(-ENOSYS);
724
725 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
726 if (!xrcd)
727 return ERR_PTR(-ENOMEM);
728
729 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
730 if (err)
731 goto err1;
732
733 xrcd->pd = ib_alloc_pd(ibdev);
734 if (IS_ERR(xrcd->pd)) {
735 err = PTR_ERR(xrcd->pd);
736 goto err2;
737 }
738
739 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
740 if (IS_ERR(xrcd->cq)) {
741 err = PTR_ERR(xrcd->cq);
742 goto err3;
743 }
744
745 return &xrcd->ibxrcd;
746
747err3:
748 ib_dealloc_pd(xrcd->pd);
749err2:
750 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
751err1:
752 kfree(xrcd);
753 return ERR_PTR(err);
754}
755
756static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
757{
758 ib_destroy_cq(to_mxrcd(xrcd)->cq);
759 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
760 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
761 kfree(xrcd);
762
763 return 0;
764}
765
fa417f7b
EC		 766static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
767{
768 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
769 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
770 struct mlx4_ib_gid_entry *ge;
771
772 ge = kzalloc(sizeof *ge, GFP_KERNEL);
773 if (!ge)
774 return -ENOMEM;
775
776 ge->gid = *gid;
777 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
778 ge->port = mqp->port;
779 ge->added = 1;
780 }
781
782 mutex_lock(&mqp->mutex);
783 list_add_tail(&ge->list, &mqp->gid_list);
784 mutex_unlock(&mqp->mutex);
785
786 return 0;
787}
788
789int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
790 union ib_gid *gid)
791{
fa417f7b
EC		 792 struct net_device *ndev;
793 int ret = 0;
794
795 if (!mqp->port)
796 return 0;
797
798 spin_lock(&mdev->iboe.lock);
799 ndev = mdev->iboe.netdevs[mqp->port - 1];
800 if (ndev)
801 dev_hold(ndev);
802 spin_unlock(&mdev->iboe.lock);
803
804 if (ndev) {
fa417f7b 805 ret = 1;
fa417f7b
EC		 806 dev_put(ndev);
807 }
808
809 return ret;
810}
811
0ff1fb65
HHZ		 812struct mlx4_ib_steering {
813 struct list_head list;
814 u64 reg_id;
815 union ib_gid gid;
816};
817
f77c0162
HHZ		 818static int parse_flow_attr(struct mlx4_dev *dev,
819 union ib_flow_spec *ib_spec,
820 struct _rule_hw *mlx4_spec)
821{
822 enum mlx4_net_trans_rule_id type;
823
824 switch (ib_spec->type) {
825 case IB_FLOW_SPEC_ETH:
826 type = MLX4_NET_TRANS_RULE_ID_ETH;
827 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
828 ETH_ALEN);
829 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
830 ETH_ALEN);
831 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
832 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
833 break;
834
835 case IB_FLOW_SPEC_IPV4:
836 type = MLX4_NET_TRANS_RULE_ID_IPV4;
837 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
838 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
839 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
840 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
841 break;
842
843 case IB_FLOW_SPEC_TCP:
844 case IB_FLOW_SPEC_UDP:
845 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
846 MLX4_NET_TRANS_RULE_ID_TCP :
847 MLX4_NET_TRANS_RULE_ID_UDP;
848 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
849 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
850 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
851 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
852 break;
853
854 default:
855 return -EINVAL;
856 }
857 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
858 mlx4_hw_rule_sz(dev, type) < 0)
859 return -EINVAL;
860 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
861 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
862 return mlx4_hw_rule_sz(dev, type);
863}
864
865static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
866 int domain,
867 enum mlx4_net_trans_promisc_mode flow_type,
868 u64 *reg_id)
869{
870 int ret, i;
871 int size = 0;
872 void *ib_flow;
873 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
874 struct mlx4_cmd_mailbox *mailbox;
875 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
f77c0162
HHZ		 876
877 static const u16 __mlx4_domain[] = {
878 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
879 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
880 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
881 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
882 };
883
884 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
885 pr_err("Invalid priority value %d\n", flow_attr->priority);
886 return -EINVAL;
887 }
888
889 if (domain >= IB_FLOW_DOMAIN_NUM) {
890 pr_err("Invalid domain value %d\n", domain);
891 return -EINVAL;
892 }
893
894 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
895 return -EINVAL;
896
897 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
898 if (IS_ERR(mailbox))
899 return PTR_ERR(mailbox);
f77c0162
HHZ		 900 ctrl = mailbox->buf;
901
902 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
903 flow_attr->priority);
904 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
905 ctrl->port = flow_attr->port;
906 ctrl->qpn = cpu_to_be32(qp->qp_num);
907
908 ib_flow = flow_attr + 1;
909 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
910 for (i = 0; i < flow_attr->num_of_specs; i++) {
911 ret = parse_flow_attr(mdev->dev, ib_flow, mailbox->buf + size);
912 if (ret < 0) {
913 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
914 return -EINVAL;
915 }
916 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
917 size += ret;
918 }
919
920 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
921 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
922 MLX4_CMD_NATIVE);
923 if (ret == -ENOMEM)
924 pr_err("mcg table is full. Fail to register network rule.\n");
925 else if (ret == -ENXIO)
926 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
927 else if (ret)
928 pr_err("Invalid argumant. Fail to register network rule.\n");
929
930 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
931 return ret;
932}
933
934static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
935{
936 int err;
937 err = mlx4_cmd(dev, reg_id, 0, 0,
938 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
939 MLX4_CMD_NATIVE);
940 if (err)
941 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
942 reg_id);
943 return err;
944}
945
946static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
947 struct ib_flow_attr *flow_attr,
948 int domain)
949{
950 int err = 0, i = 0;
951 struct mlx4_ib_flow *mflow;
952 enum mlx4_net_trans_promisc_mode type[2];
953
954 memset(type, 0, sizeof(type));
955
956 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
957 if (!mflow) {
958 err = -ENOMEM;
959 goto err_free;
960 }
961
962 switch (flow_attr->type) {
963 case IB_FLOW_ATTR_NORMAL:
964 type[0] = MLX4_FS_REGULAR;
965 break;
966
967 case IB_FLOW_ATTR_ALL_DEFAULT:
968 type[0] = MLX4_FS_ALL_DEFAULT;
969 break;
970
971 case IB_FLOW_ATTR_MC_DEFAULT:
972 type[0] = MLX4_FS_MC_DEFAULT;
973 break;
974
975 case IB_FLOW_ATTR_SNIFFER:
976 type[0] = MLX4_FS_UC_SNIFFER;
977 type[1] = MLX4_FS_MC_SNIFFER;
978 break;
979
980 default:
981 err = -EINVAL;
982 goto err_free;
983 }
984
985 while (i < ARRAY_SIZE(type) && type[i]) {
986 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
987 &mflow->reg_id[i]);
988 if (err)
989 goto err_free;
990 i++;
991 }
992
993 return &mflow->ibflow;
994
995err_free:
996 kfree(mflow);
997 return ERR_PTR(err);
998}
999
1000static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1001{
1002 int err, ret = 0;
1003 int i = 0;
1004 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1005 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1006
1007 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
1008 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
1009 if (err)
1010 ret = err;
1011 i++;
1012 }
1013
1014 kfree(mflow);
1015 return ret;
1016}
1017
225c7b1f
RD		 1018static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1019{
fa417f7b
EC		 1020 int err;
1021 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1022 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65
HHZ		 1023 u64 reg_id;
1024 struct mlx4_ib_steering *ib_steering = NULL;
d487ee77
MS		 1025 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1026 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1027
1028 if (mdev->dev->caps.steering_mode ==
1029 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1030 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1031 if (!ib_steering)
1032 return -ENOMEM;
1033 }
fa417f7b 1034
0ff1fb65
HHZ		 1035 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1036 !!(mqp->flags &
1037 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
d487ee77 1038 prot, &reg_id);
fa417f7b 1039 if (err)
0ff1fb65 1040 goto err_malloc;
fa417f7b
EC		 1041
1042 err = add_gid_entry(ibqp, gid);
1043 if (err)
1044 goto err_add;
1045
0ff1fb65
HHZ		 1046 if (ib_steering) {
1047 memcpy(ib_steering->gid.raw, gid->raw, 16);
1048 ib_steering->reg_id = reg_id;
1049 mutex_lock(&mqp->mutex);
1050 list_add(&ib_steering->list, &mqp->steering_rules);
1051 mutex_unlock(&mqp->mutex);
1052 }
fa417f7b
EC		 1053 return 0;
1054
1055err_add:
0ff1fb65 1056 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1057 prot, reg_id);
0ff1fb65
HHZ		 1058err_malloc:
1059 kfree(ib_steering);
1060
fa417f7b
EC		 1061 return err;
1062}
1063
1064static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1065{
1066 struct mlx4_ib_gid_entry *ge;
1067 struct mlx4_ib_gid_entry *tmp;
1068 struct mlx4_ib_gid_entry *ret = NULL;
1069
1070 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1071 if (!memcmp(raw, ge->gid.raw, 16)) {
1072 ret = ge;
1073 break;
1074 }
1075 }
1076
1077 return ret;
225c7b1f
RD		 1078}
1079
1080static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1081{
fa417f7b
EC		 1082 int err;
1083 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1084 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1085 struct net_device *ndev;
1086 struct mlx4_ib_gid_entry *ge;
0ff1fb65 1087 u64 reg_id = 0;
d487ee77
MS		 1088 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1089 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1090
1091 if (mdev->dev->caps.steering_mode ==
1092 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1093 struct mlx4_ib_steering *ib_steering;
1094
1095 mutex_lock(&mqp->mutex);
1096 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1097 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1098 list_del(&ib_steering->list);
1099 break;
1100 }
1101 }
1102 mutex_unlock(&mqp->mutex);
1103 if (&ib_steering->list == &mqp->steering_rules) {
1104 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1105 return -EINVAL;
1106 }
1107 reg_id = ib_steering->reg_id;
1108 kfree(ib_steering);
1109 }
fa417f7b 1110
0ff1fb65 1111 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
d487ee77 1112 prot, reg_id);
fa417f7b
EC		 1113 if (err)
1114 return err;
1115
1116 mutex_lock(&mqp->mutex);
1117 ge = find_gid_entry(mqp, gid->raw);
1118 if (ge) {
1119 spin_lock(&mdev->iboe.lock);
1120 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1121 if (ndev)
1122 dev_hold(ndev);
1123 spin_unlock(&mdev->iboe.lock);
d487ee77 1124 if (ndev)
fa417f7b 1125 dev_put(ndev);
fa417f7b
EC		 1126 list_del(&ge->list);
1127 kfree(ge);
1128 } else
987c8f8f 1129 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1130
1131 mutex_unlock(&mqp->mutex);
1132
1133 return 0;
225c7b1f
RD		 1134}
1135
1136static int init_node_data(struct mlx4_ib_dev *dev)
1137{
1138 struct ib_smp *in_mad = NULL;
1139 struct ib_smp *out_mad = NULL;
0a9a0188 1140 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1141 int err = -ENOMEM;
1142
1143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1145 if (!in_mad || !out_mad)
1146 goto out;
1147
1148 init_query_mad(in_mad);
1149 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1150 if (mlx4_is_master(dev->dev))
1151 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1152
0a9a0188 1153 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1154 if (err)
1155 goto out;
1156
1157 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1158
1159 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1160
0a9a0188 1161 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1162 if (err)
1163 goto out;
1164
992e8e6e 1165 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1166 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1167
1168out:
1169 kfree(in_mad);
1170 kfree(out_mad);
1171 return err;
1172}
1173
f4e91eb4
TJ		 1174static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1175 char *buf)
cd9281d8 1176{
f4e91eb4
TJ		 1177 struct mlx4_ib_dev *dev =
1178 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1179 return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
1180}
1181
f4e91eb4
TJ		 1182static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1183 char *buf)
cd9281d8 1184{
f4e91eb4
TJ		 1185 struct mlx4_ib_dev *dev =
1186 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1187 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1188 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1189 (int) dev->dev->caps.fw_ver & 0xffff);
1190}
1191
f4e91eb4
TJ		 1192static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1193 char *buf)
cd9281d8 1194{
f4e91eb4
TJ		 1195 struct mlx4_ib_dev *dev =
1196 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1197 return sprintf(buf, "%x\n", dev->dev->rev_id);
1198}
1199
f4e91eb4
TJ		 1200static ssize_t show_board(struct device *device, struct device_attribute *attr,
1201 char *buf)
cd9281d8 1202{
f4e91eb4
TJ		 1203 struct mlx4_ib_dev *dev =
1204 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1205 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1206 dev->dev->board_id);
cd9281d8
JM		 1207}
1208
f4e91eb4
TJ		 1209static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1210static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1211static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1212static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1213
f4e91eb4
TJ		 1214static struct device_attribute *mlx4_class_attributes[] = {
1215 &dev_attr_hw_rev,
1216 &dev_attr_fw_ver,
1217 &dev_attr_hca_type,
1218 &dev_attr_board_id
cd9281d8
JM		 1219};
1220
fa417f7b
EC		 1221static void update_gids_task(struct work_struct *work)
1222{
1223 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1224 struct mlx4_cmd_mailbox *mailbox;
1225 union ib_gid *gids;
1226 int err;
1227 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b
EC		 1228
1229 mailbox = mlx4_alloc_cmd_mailbox(dev);
1230 if (IS_ERR(mailbox)) {
987c8f8f 1231 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1232 return;
1233 }
1234
1235 gids = mailbox->buf;
1236 memcpy(gids, gw->gids, sizeof gw->gids);
1237
1238 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
f9baff50 1239 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
992e8e6e 1240 MLX4_CMD_WRAPPED);
fa417f7b 1241 if (err)
987c8f8f 1242 pr_warn("set port command failed\n");
d487ee77 1243 else
00f5ce99 1244 mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1245
1246 mlx4_free_cmd_mailbox(dev, mailbox);
1247 kfree(gw);
1248}
1249
d487ee77 1250static void reset_gids_task(struct work_struct *work)
fa417f7b 1251{
d487ee77
MS		 1252 struct update_gid_work *gw =
1253 container_of(work, struct update_gid_work, work);
1254 struct mlx4_cmd_mailbox *mailbox;
1255 union ib_gid *gids;
1256 int err;
4c3eb3ca 1257 int i;
d487ee77 1258 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1259
d487ee77
MS		 1260 mailbox = mlx4_alloc_cmd_mailbox(dev);
1261 if (IS_ERR(mailbox)) {
1262 pr_warn("reset gid table failed\n");
1263 goto free;
1264 }
fa417f7b 1265
d487ee77
MS		 1266 gids = mailbox->buf;
1267 memcpy(gids, gw->gids, sizeof(gw->gids));
1268
1269 for (i = 1; i < gw->dev->num_ports + 1; i++) {
1270 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, i) ==
1271 IB_LINK_LAYER_ETHERNET) {
1272 err = mlx4_cmd(dev, mailbox->dma,
1273 MLX4_SET_PORT_GID_TABLE << 8 | i,
1274 1, MLX4_CMD_SET_PORT,
1275 MLX4_CMD_TIME_CLASS_B,
1276 MLX4_CMD_WRAPPED);
1277 if (err)
1278 pr_warn(KERN_WARNING
1279 "set port %d command failed\n", i);
1280 }
4c3eb3ca
EC		 1281 }
1282
d487ee77
MS		 1283 mlx4_free_cmd_mailbox(dev, mailbox);
1284free:
1285 kfree(gw);
1286}
4c3eb3ca 1287
d487ee77
MS		 1288static int update_gid_table(struct mlx4_ib_dev *dev, int port,
1289 union ib_gid *gid, int clear)
1290{
1291 struct update_gid_work *work;
1292 int i;
1293 int need_update = 0;
1294 int free = -1;
1295 int found = -1;
1296 int max_gids;
1297
1298 max_gids = dev->dev->caps.gid_table_len[port];
1299 for (i = 0; i < max_gids; ++i) {
1300 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
1301 sizeof(*gid)))
1302 found = i;
1303
1304 if (clear) {
1305 if (found >= 0) {
1306 need_update = 1;
1307 dev->iboe.gid_table[port - 1][found] = zgid;
1308 break;
4c3eb3ca 1309 }
d487ee77
MS		 1310 } else {
1311 if (found >= 0)
1312 break;
1313
1314 if (free < 0 &&
1315 !memcmp(&dev->iboe.gid_table[port - 1][i], &zgid,
1316 sizeof(*gid)))
1317 free = i;
4c3eb3ca 1318 }
fa417f7b 1319 }
4c3eb3ca 1320
d487ee77
MS		 1321 if (found == -1 && !clear && free >= 0) {
1322 dev->iboe.gid_table[port - 1][free] = *gid;
1323 need_update = 1;
1324 }
fa417f7b 1325
d487ee77
MS		 1326 if (!need_update)
1327 return 0;
1328
1329 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1330 if (!work)
1331 return -ENOMEM;
1332
1333 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1334 INIT_WORK(&work->work, update_gids_task);
1335 work->port = port;
1336 work->dev = dev;
1337 queue_work(wq, &work->work);
fa417f7b
EC		 1338
1339 return 0;
d487ee77 1340}
4c3eb3ca 1341
d487ee77
MS		 1342static int reset_gid_table(struct mlx4_ib_dev *dev)
1343{
1344 struct update_gid_work *work;
1345
1346
1347 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1348 if (!work)
1349 return -ENOMEM;
1350 memset(dev->iboe.gid_table, 0, sizeof(dev->iboe.gid_table));
1351 memset(work->gids, 0, sizeof(work->gids));
1352 INIT_WORK(&work->work, reset_gids_task);
1353 work->dev = dev;
1354 queue_work(wq, &work->work);
1355 return 0;
fa417f7b
EC		 1356}
1357
d487ee77
MS		 1358static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1359 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1360{
d487ee77
MS		 1361 struct mlx4_ib_iboe *iboe;
1362 int port = 0;
1363 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1364 rdma_vlan_dev_real_dev(event_netdev) :
1365 event_netdev;
1366
1367 if (event != NETDEV_DOWN && event != NETDEV_UP)
1368 return 0;
1369
1370 if ((real_dev != event_netdev) &&
1371 (event == NETDEV_DOWN) &&
1372 rdma_link_local_addr((struct in6_addr *)gid))
1373 return 0;
1374
1375 iboe = &ibdev->iboe;
1376 spin_lock(&iboe->lock);
1377
1378 for (port = 1; port <= MLX4_MAX_PORTS; ++port)
1379 if ((netif_is_bond_master(real_dev) &&
1380 (real_dev == iboe->masters[port - 1])) ||
1381 (!netif_is_bond_master(real_dev) &&
1382 (real_dev == iboe->netdevs[port - 1])))
1383 update_gid_table(ibdev, port, gid,
1384 event == NETDEV_DOWN);
1385
1386 spin_unlock(&iboe->lock);
1387 return 0;
fa417f7b 1388
fa417f7b
EC		 1389}
1390
d487ee77
MS		 1391static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1392 struct mlx4_ib_dev *ibdev)
fa417f7b 1393{
d487ee77
MS		 1394 u8 port = 0;
1395 struct mlx4_ib_iboe *iboe;
1396 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1397 rdma_vlan_dev_real_dev(dev) : dev;
1398
1399 iboe = &ibdev->iboe;
1400 spin_lock(&iboe->lock);
1401
1402 for (port = 1; port <= MLX4_MAX_PORTS; ++port)
1403 if ((netif_is_bond_master(real_dev) &&
1404 (real_dev == iboe->masters[port - 1])) ||
1405 (!netif_is_bond_master(real_dev) &&
1406 (real_dev == iboe->netdevs[port - 1])))
1407 break;
1408
1409 spin_unlock(&iboe->lock);
1410
1411 if ((port == 0) || (port > MLX4_MAX_PORTS))
1412 return 0;
1413 else
1414 return port;
fa417f7b
EC		 1415}
1416
d487ee77
MS		 1417static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1418 void *ptr)
fa417f7b 1419{
d487ee77
MS		 1420 struct mlx4_ib_dev *ibdev;
1421 struct in_ifaddr *ifa = ptr;
1422 union ib_gid gid;
1423 struct net_device *event_netdev = ifa->ifa_dev->dev;
1424
1425 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1426
1427 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1428
1429 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1430 return NOTIFY_DONE;
fa417f7b
EC		 1431}
1432
d487ee77
MS		 1433#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1434static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1435 void *ptr)
1436{
fa417f7b 1437 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1438 struct inet6_ifaddr *ifa = ptr;
1439 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1440 struct net_device *event_netdev = ifa->idev->dev;
1441
1442 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1443
1444 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1445 return NOTIFY_DONE;
1446}
1447#endif
1448
1449static void mlx4_ib_get_dev_addr(struct net_device *dev,
1450 struct mlx4_ib_dev *ibdev, u8 port)
1451{
1452 struct in_device *in_dev;
1453#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1454 struct inet6_dev *in6_dev;
1455 union ib_gid *pgid;
1456 struct inet6_ifaddr *ifp;
1457#endif
1458 union ib_gid gid;
1459
1460
1461 if ((port == 0) || (port > MLX4_MAX_PORTS))
1462 return;
1463
1464 /* IPv4 gids */
1465 in_dev = in_dev_get(dev);
1466 if (in_dev) {
1467 for_ifa(in_dev) {
1468 /*ifa->ifa_address;*/
1469 ipv6_addr_set_v4mapped(ifa->ifa_address,
1470 (struct in6_addr *)&gid);
1471 update_gid_table(ibdev, port, &gid, 0);
1472 }
1473 endfor_ifa(in_dev);
1474 in_dev_put(in_dev);
1475 }
1476#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1477 /* IPv6 gids */
1478 in6_dev = in6_dev_get(dev);
1479 if (in6_dev) {
1480 read_lock_bh(&in6_dev->lock);
1481 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1482 pgid = (union ib_gid *)&ifp->addr;
1483 update_gid_table(ibdev, port, pgid, 0);
1484 }
1485 read_unlock_bh(&in6_dev->lock);
1486 in6_dev_put(in6_dev);
1487 }
1488#endif
1489}
1490
1491static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1492{
1493 struct net_device *dev;
1494
1495 if (reset_gid_table(ibdev))
1496 return -1;
1497
1498 read_lock(&dev_base_lock);
1499
1500 for_each_netdev(&init_net, dev) {
1501 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
1502 if (port)
1503 mlx4_ib_get_dev_addr(dev, ibdev, port);
1504 }
1505
1506 read_unlock(&dev_base_lock);
1507
1508 return 0;
1509}
1510
1511static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev)
1512{
fa417f7b
EC		 1513 struct mlx4_ib_iboe *iboe;
1514 int port;
1515
fa417f7b
EC		 1516 iboe = &ibdev->iboe;
1517
1518 spin_lock(&iboe->lock);
1519 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
d487ee77
MS		 1520 struct net_device *old_master = iboe->masters[port - 1];
1521 struct net_device *curr_master;
fa417f7b 1522 iboe->netdevs[port - 1] =
0345584e 1523 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
d487ee77
MS		 1524
1525 if (iboe->netdevs[port - 1] &&
1526 netif_is_bond_slave(iboe->netdevs[port - 1])) {
1527 rtnl_lock();
1528 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1529 iboe->netdevs[port - 1]);
1530 rtnl_unlock();
fa417f7b 1531 }
d487ee77 1532 curr_master = iboe->masters[port - 1];
fa417f7b 1533
d487ee77
MS		 1534 /* if bonding is used it is possible that we add it to masters
1535 only after IP address is assigned to the net bonding
1536 interface */
1537 if (curr_master && (old_master != curr_master))
1538 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1539 }
fa417f7b
EC		 1540
1541 spin_unlock(&iboe->lock);
d487ee77
MS		 1542}
1543
1544static int mlx4_ib_netdev_event(struct notifier_block *this,
1545 unsigned long event, void *ptr)
1546{
1547 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1548 struct mlx4_ib_dev *ibdev;
1549
1550 if (!net_eq(dev_net(dev), &init_net))
1551 return NOTIFY_DONE;
1552
1553 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
1554 mlx4_ib_scan_netdevs(ibdev);
fa417f7b
EC		 1555
1556 return NOTIFY_DONE;
1557}
1558
54679e14
JM		 1559static void init_pkeys(struct mlx4_ib_dev *ibdev)
1560{
1561 int port;
1562 int slave;
1563 int i;
1564
1565 if (mlx4_is_master(ibdev->dev)) {
1566 for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
1567 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1568 for (i = 0;
1569 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1570 ++i) {
1571 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
1572 /* master has the identity virt2phys pkey mapping */
1573 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
1574 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
1575 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
1576 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
1577 }
1578 }
1579 }
1580 /* initialize pkey cache */
1581 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
1582 for (i = 0;
1583 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
1584 ++i)
1585 ibdev->pkeys.phys_pkey_cache[port-1][i] =
1586 (i) ? 0 : 0xFFFF;
1587 }
1588 }
1589}
1590
e605b743
SP		 1591static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1592{
1593 char name[32];
1594 int eq_per_port = 0;
1595 int added_eqs = 0;
1596 int total_eqs = 0;
1597 int i, j, eq;
1598
3aac6ff1
SP		 1599 /* Legacy mode or comp_pool is not large enough */
1600 if (dev->caps.comp_pool == 0 ||
1601 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 1602 return;
1603
1604 eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
1605 dev->caps.num_ports);
1606
1607 /* Init eq table */
1608 added_eqs = 0;
1609 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
1610 added_eqs += eq_per_port;
1611
1612 total_eqs = dev->caps.num_comp_vectors + added_eqs;
1613
1614 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
1615 if (!ibdev->eq_table)
1616 return;
1617
1618 ibdev->eq_added = added_eqs;
1619
1620 eq = 0;
1621 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
1622 for (j = 0; j < eq_per_port; j++) {
1623 sprintf(name, "mlx4-ib-%d-%d@%s",
1624 i, j, dev->pdev->bus->name);
1625 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 1626 if (mlx4_assign_eq(dev, name, NULL,
1627 &ibdev->eq_table[eq])) {
e605b743
SP		 1628 /* Use legacy (same as mlx4_en driver) */
1629 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
1630 ibdev->eq_table[eq] =
1631 (eq % dev->caps.num_comp_vectors);
1632 }
1633 eq++;
1634 }
1635 }
1636
1637 /* Fill the reset of the vector with legacy EQ */
1638 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
1639 ibdev->eq_table[eq++] = i;
1640
1641 /* Advertise the new number of EQs to clients */
1642 ibdev->ib_dev.num_comp_vectors = total_eqs;
1643}
1644
1645static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
1646{
1647 int i;
3aac6ff1
SP		 1648
1649 /* no additional eqs were added */
1650 if (!ibdev->eq_table)
1651 return;
e605b743
SP		 1652
1653 /* Reset the advertised EQ number */
1654 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
1655
1656 /* Free only the added eqs */
1657 for (i = 0; i < ibdev->eq_added; i++) {
1658 /* Don't free legacy eqs if used */
1659 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
1660 continue;
1661 mlx4_release_eq(dev, ibdev->eq_table[i]);
1662 }
1663
e605b743 1664 kfree(ibdev->eq_table);
e605b743
SP		 1665}
1666
225c7b1f
RD		 1667static void *mlx4_ib_add(struct mlx4_dev *dev)
1668{
1669 struct mlx4_ib_dev *ibdev;
22e7ef9c 1670 int num_ports = 0;
035b1032 1671 int i, j;
fa417f7b
EC		 1672 int err;
1673 struct mlx4_ib_iboe *iboe;
225c7b1f 1674
987c8f8f 1675 pr_info_once("%s", mlx4_ib_version);
68f3948d 1676
026149cb
JM		 1677 mlx4_foreach_non_ib_transport_port(i, dev)
1678 num_ports++;
1679
1680 if (mlx4_is_mfunc(dev) && num_ports) {
1681 dev_err(&dev->pdev->dev, "RoCE is not supported over SRIOV as yet\n");
8e59d254
JM		 1682 return NULL;
1683 }
1684
026149cb 1685 num_ports = 0;
fa417f7b 1686 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 1687 num_ports++;
1688
1689 /* No point in registering a device with no ports... */
1690 if (num_ports == 0)
1691 return NULL;
1692
225c7b1f
RD		 1693 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
1694 if (!ibdev) {
1695 dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
1696 return NULL;
1697 }
1698
fa417f7b
EC		 1699 iboe = &ibdev->iboe;
1700
225c7b1f
RD		 1701 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
1702 goto err_dealloc;
1703
1704 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
1705 goto err_pd;
1706
4979d18f
RD		 1707 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
1708 PAGE_SIZE);
225c7b1f
RD		 1709 if (!ibdev->uar_map)
1710 goto err_uar;
26c6bc7b 1711 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 1712
225c7b1f
RD		 1713 ibdev->dev = dev;
1714
1715 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
1716 ibdev->ib_dev.owner = THIS_MODULE;
1717 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 1718 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 1719 ibdev->num_ports = num_ports;
7ff93f8b 1720 ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
b8dd786f 1721 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
225c7b1f
RD		 1722 ibdev->ib_dev.dma_device = &dev->pdev->dev;
1723
08ff3235
OG		 1724 if (dev->caps.userspace_caps)
1725 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
1726 else
1727 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
1728
225c7b1f
RD		 1729 ibdev->ib_dev.uverbs_cmd_mask =
1730 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1731 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1732 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1733 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1734 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1735 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1736 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1737 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1738 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 1739 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 1740 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1741 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1742 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 1743 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 1744 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1745 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1746 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1747 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1748 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 1749 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 1750 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 1751 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1752 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 1753
1754 ibdev->ib_dev.query_device = mlx4_ib_query_device;
1755 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 1756 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 1757 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
1758 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
1759 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
1760 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
1761 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
1762 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
1763 ibdev->ib_dev.mmap = mlx4_ib_mmap;
1764 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
1765 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
1766 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
1767 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
1768 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
1769 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
1770 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 1771 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 1772 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
1773 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
1774 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
1775 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 1776 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 1777 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
1778 ibdev->ib_dev.post_send = mlx4_ib_post_send;
1779 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
1780 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 1781 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 1782 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 1783 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
1784 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
1785 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
1786 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
1787 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
1788 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 1789 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
1790 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
1791 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 1792 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
1793 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
1794 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
1795
992e8e6e
JM		 1796 if (!mlx4_is_slave(ibdev->dev)) {
1797 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
1798 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
1799 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
1800 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
1801 }
8ad11fb6 1802
b425388d
SM		 1803 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
1804 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
1805 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
1806 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
1807 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
1808
1809 ibdev->ib_dev.uverbs_cmd_mask |=
1810 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
1811 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
1812 }
1813
012a8ff5
SH		 1814 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
1815 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
1816 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
1817 ibdev->ib_dev.uverbs_cmd_mask |=
1818 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1819 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1820 }
1821
f77c0162
HHZ		 1822 if (check_flow_steering_support(dev)) {
1823 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
1824 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
1825
f21519b2
YD		 1826 ibdev->ib_dev.uverbs_ex_cmd_mask |=
1827 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
1828 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 1829 }
1830
e605b743
SP		 1831 mlx4_ib_alloc_eqs(dev, ibdev);
1832
fa417f7b
EC		 1833 spin_lock_init(&iboe->lock);
1834
225c7b1f
RD		 1835 if (init_node_data(ibdev))
1836 goto err_map;
1837
cfcde11c
OG		 1838 for (i = 0; i < ibdev->num_ports; ++i) {
1839 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
1840 IB_LINK_LAYER_ETHERNET) {
1841 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
1842 if (err)
1843 ibdev->counters[i] = -1;
1844 } else
1845 ibdev->counters[i] = -1;
1846 }
1847
225c7b1f
RD		 1848 spin_lock_init(&ibdev->sm_lock);
1849 mutex_init(&ibdev->cap_mask_mutex);
1850
9a6edb60 1851 if (ib_register_device(&ibdev->ib_dev, NULL))
cfcde11c 1852 goto err_counter;
225c7b1f
RD		 1853
1854 if (mlx4_ib_mad_init(ibdev))
1855 goto err_reg;
1856
fc06573d
JM		 1857 if (mlx4_ib_init_sriov(ibdev))
1858 goto err_mad;
1859
d487ee77
MS		 1860 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
1861 if (!iboe->nb.notifier_call) {
1862 iboe->nb.notifier_call = mlx4_ib_netdev_event;
1863 err = register_netdevice_notifier(&iboe->nb);
1864 if (err) {
1865 iboe->nb.notifier_call = NULL;
1866 goto err_notif;
1867 }
1868 }
1869 if (!iboe->nb_inet.notifier_call) {
1870 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
1871 err = register_inetaddr_notifier(&iboe->nb_inet);
1872 if (err) {
1873 iboe->nb_inet.notifier_call = NULL;
1874 goto err_notif;
1875 }
1876 }
1877#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1878 if (!iboe->nb_inet6.notifier_call) {
1879 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
1880 err = register_inet6addr_notifier(&iboe->nb_inet6);
1881 if (err) {
1882 iboe->nb_inet6.notifier_call = NULL;
1883 goto err_notif;
1884 }
1885 }
1886#endif
1887 mlx4_ib_scan_netdevs(ibdev);
1888 mlx4_ib_init_gid_table(ibdev);
fa417f7b
EC		 1889 }
1890
035b1032 1891 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 1892 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 1893 mlx4_class_attributes[j]))
fa417f7b 1894 goto err_notif;
cd9281d8
JM		 1895 }
1896
3b4a8cd5
JM		 1897 ibdev->ib_active = true;
1898
54679e14
JM		 1899 if (mlx4_is_mfunc(ibdev->dev))
1900 init_pkeys(ibdev);
1901
3806d08c
JM		 1902 /* create paravirt contexts for any VFs which are active */
1903 if (mlx4_is_master(ibdev->dev)) {
1904 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
1905 if (j == mlx4_master_func_num(ibdev->dev))
1906 continue;
1907 if (mlx4_is_slave_active(ibdev->dev, j))
1908 do_slave_init(ibdev, j, 1);
1909 }
1910 }
225c7b1f
RD		 1911 return ibdev;
1912
fa417f7b 1913err_notif:
d487ee77
MS		 1914 if (ibdev->iboe.nb.notifier_call) {
1915 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
1916 pr_warn("failure unregistering notifier\n");
1917 ibdev->iboe.nb.notifier_call = NULL;
1918 }
1919 if (ibdev->iboe.nb_inet.notifier_call) {
1920 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
1921 pr_warn("failure unregistering notifier\n");
1922 ibdev->iboe.nb_inet.notifier_call = NULL;
1923 }
1924#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1925 if (ibdev->iboe.nb_inet6.notifier_call) {
1926 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
1927 pr_warn("failure unregistering notifier\n");
1928 ibdev->iboe.nb_inet6.notifier_call = NULL;
1929 }
1930#endif
fa417f7b
EC		 1931 flush_workqueue(wq);
1932
fc06573d
JM		 1933 mlx4_ib_close_sriov(ibdev);
1934
1935err_mad:
1936 mlx4_ib_mad_cleanup(ibdev);
1937
225c7b1f
RD		 1938err_reg:
1939 ib_unregister_device(&ibdev->ib_dev);
1940
cfcde11c
OG		 1941err_counter:
1942 for (; i; --i)
4af3ce0d
RD		 1943 if (ibdev->counters[i - 1] != -1)
1944 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 1945
225c7b1f
RD		 1946err_map:
1947 iounmap(ibdev->uar_map);
1948
1949err_uar:
1950 mlx4_uar_free(dev, &ibdev->priv_uar);
1951
1952err_pd:
1953 mlx4_pd_free(dev, ibdev->priv_pdn);
1954
1955err_dealloc:
1956 ib_dealloc_device(&ibdev->ib_dev);
1957
1958 return NULL;
1959}
1960
1961static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
1962{
1963 struct mlx4_ib_dev *ibdev = ibdev_ptr;
1964 int p;
1965
fc06573d 1966 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 1967 mlx4_ib_mad_cleanup(ibdev);
1968 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 1969 if (ibdev->iboe.nb.notifier_call) {
1970 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 1971 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 1972 ibdev->iboe.nb.notifier_call = NULL;
1973 }
d487ee77
MS		 1974 if (ibdev->iboe.nb_inet.notifier_call) {
1975 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
1976 pr_warn("failure unregistering notifier\n");
1977 ibdev->iboe.nb_inet.notifier_call = NULL;
1978 }
1979#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
1980 if (ibdev->iboe.nb_inet6.notifier_call) {
1981 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
1982 pr_warn("failure unregistering notifier\n");
1983 ibdev->iboe.nb_inet6.notifier_call = NULL;
1984 }
1985#endif
fa417f7b 1986 iounmap(ibdev->uar_map);
cfcde11c 1987 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 1988 if (ibdev->counters[p] != -1)
1989 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 1990 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 1991 mlx4_CLOSE_PORT(dev, p);
1992
e605b743
SP		 1993 mlx4_ib_free_eqs(dev, ibdev);
1994
225c7b1f
RD		 1995 mlx4_uar_free(dev, &ibdev->priv_uar);
1996 mlx4_pd_free(dev, ibdev->priv_pdn);
1997 ib_dealloc_device(&ibdev->ib_dev);
1998}
1999
fc06573d
JM		 2000static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2001{
2002 struct mlx4_ib_demux_work **dm = NULL;
2003 struct mlx4_dev *dev = ibdev->dev;
2004 int i;
2005 unsigned long flags;
2006
2007 if (!mlx4_is_master(dev))
2008 return;
2009
2010 dm = kcalloc(dev->caps.num_ports, sizeof *dm, GFP_ATOMIC);
2011 if (!dm) {
2012 pr_err("failed to allocate memory for tunneling qp update\n");
2013 goto out;
2014 }
2015
2016 for (i = 0; i < dev->caps.num_ports; i++) {
2017 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2018 if (!dm[i]) {
2019 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2020 for (i = 0; i < dev->caps.num_ports; i++) {
2021 if (dm[i])
2022 kfree(dm[i]);
2023 }
2024 goto out;
2025 }
2026 }
2027 /* initialize or tear down tunnel QPs for the slave */
2028 for (i = 0; i < dev->caps.num_ports; i++) {
2029 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
2030 dm[i]->port = i + 1;
2031 dm[i]->slave = slave;
2032 dm[i]->do_init = do_init;
2033 dm[i]->dev = ibdev;
2034 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2035 if (!ibdev->sriov.is_going_down)
2036 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2037 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2038 }
2039out:
c89d1271 2040 kfree(dm);
fc06573d
JM		 2041 return;
2042}
2043
225c7b1f 2044static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2045 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2046{
2047 struct ib_event ibev;
7ff93f8b 2048 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2049 struct mlx4_eqe *eqe = NULL;
2050 struct ib_event_work *ew;
fc06573d 2051 int p = 0;
00f5ce99
JM		 2052
2053 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2054 eqe = (struct mlx4_eqe *)param;
2055 else
fc06573d 2056 p = (int) param;
225c7b1f
RD		 2057
2058 switch (event) {
37608eea 2059 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2060 if (p > ibdev->num_ports)
2061 return;
a0c64a17
JM		 2062 if (mlx4_is_master(dev) &&
2063 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2064 IB_LINK_LAYER_INFINIBAND) {
2065 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2066 }
37608eea 2067 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2068 break;
2069
37608eea 2070 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2071 if (p > ibdev->num_ports)
2072 return;
37608eea
RD		 2073 ibev.event = IB_EVENT_PORT_ERR;
2074 break;
2075
2076 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2077 ibdev->ib_active = false;
225c7b1f
RD		 2078 ibev.event = IB_EVENT_DEVICE_FATAL;
2079 break;
2080
00f5ce99
JM		 2081 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2082 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2083 if (!ew) {
2084 pr_err("failed to allocate memory for events work\n");
2085 break;
2086 }
2087
2088 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2089 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2090 ew->ib_dev = ibdev;
992e8e6e
JM		 2091 /* need to queue only for port owner, which uses GEN_EQE */
2092 if (mlx4_is_master(dev))
2093 queue_work(wq, &ew->work);
2094 else
2095 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2096 return;
2097
fc06573d
JM		 2098 case MLX4_DEV_EVENT_SLAVE_INIT:
2099 /* here, p is the slave id */
2100 do_slave_init(ibdev, p, 1);
2101 return;
2102
2103 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2104 /* here, p is the slave id */
2105 do_slave_init(ibdev, p, 0);
2106 return;
2107
225c7b1f
RD		 2108 default:
2109 return;
2110 }
2111
2112 ibev.device = ibdev_ptr;
fc06573d 2113 ibev.element.port_num = (u8) p;
225c7b1f
RD		 2114
2115 ib_dispatch_event(&ibev);
2116}
2117
2118static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2119 .add = mlx4_ib_add,
2120 .remove = mlx4_ib_remove,
2121 .event = mlx4_ib_event,
0345584e 2122 .protocol = MLX4_PROT_IB_IPV6
225c7b1f
RD		 2123};
2124
2125static int __init mlx4_ib_init(void)
2126{
fa417f7b
EC		 2127 int err;
2128
2129 wq = create_singlethread_workqueue("mlx4_ib");
2130 if (!wq)
2131 return -ENOMEM;
2132
b9c5d6a6
OD		 2133 err = mlx4_ib_mcg_init();
2134 if (err)
2135 goto clean_wq;
2136
fa417f7b 2137 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2138 if (err)
2139 goto clean_mcg;
fa417f7b
EC		 2140
2141 return 0;
b9c5d6a6
OD		 2142
2143clean_mcg:
2144 mlx4_ib_mcg_destroy();
2145
2146clean_wq:
2147 destroy_workqueue(wq);
2148 return err;
225c7b1f
RD		 2149}
2150
2151static void __exit mlx4_ib_cleanup(void)
2152{
2153 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2154 mlx4_ib_mcg_destroy();
fa417f7b 2155 destroy_workqueue(wq);
225c7b1f
RD		 2156}
2157
2158module_init(mlx4_ib_init);
2159module_exit(mlx4_ib_cleanup);
Linux kernel - Deliverables
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