net/mlx4: Postpone the registration of net_device
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h
CommitLineData
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1/*
2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef MLX4_IB_H
35#define MLX4_IB_H
36
37#include <linux/compiler.h>
38#include <linux/list.h>
63019d93 39#include <linux/mutex.h>
b9c5d6a6 40#include <linux/idr.h>
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41
42#include <rdma/ib_verbs.h>
43#include <rdma/ib_umem.h>
b9c5d6a6 44#include <rdma/ib_mad.h>
a0c64a17 45#include <rdma/ib_sa.h>
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46
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/doorbell.h>
49
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JM
50#define MLX4_IB_DRV_NAME "mlx4_ib"
51
52#ifdef pr_fmt
53#undef pr_fmt
54#endif
55#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
56
57#define mlx4_ib_warn(ibdev, format, arg...) \
58 dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
59
fc2d0044
SG
60enum {
61 MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
62 MLX4_IB_MAX_HEADROOM = 2048
63};
64
65#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
66#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
67
a0c64a17
JM
68/*module param to indicate if SM assigns the alias_GUID*/
69extern int mlx4_ib_sm_guid_assign;
70
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71#define MLX4_IB_UC_STEER_QPN_ALIGN 1
72#define MLX4_IB_UC_MAX_NUM_QPS 256
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73struct mlx4_ib_ucontext {
74 struct ib_ucontext ibucontext;
75 struct mlx4_uar uar;
76 struct list_head db_page_list;
77 struct mutex db_page_mutex;
78};
79
80struct mlx4_ib_pd {
81 struct ib_pd ibpd;
82 u32 pdn;
83};
84
012a8ff5
SH
85struct mlx4_ib_xrcd {
86 struct ib_xrcd ibxrcd;
87 u32 xrcdn;
88 struct ib_pd *pd;
89 struct ib_cq *cq;
90};
91
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92struct mlx4_ib_cq_buf {
93 struct mlx4_buf buf;
94 struct mlx4_mtt mtt;
08ff3235 95 int entry_size;
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96};
97
bbf8eed1
VS
98struct mlx4_ib_cq_resize {
99 struct mlx4_ib_cq_buf buf;
100 int cqe;
101};
102
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103struct mlx4_ib_cq {
104 struct ib_cq ibcq;
105 struct mlx4_cq mcq;
106 struct mlx4_ib_cq_buf buf;
bbf8eed1 107 struct mlx4_ib_cq_resize *resize_buf;
6296883c 108 struct mlx4_db db;
225c7b1f 109 spinlock_t lock;
bbf8eed1 110 struct mutex resize_mutex;
225c7b1f 111 struct ib_umem *umem;
bbf8eed1 112 struct ib_umem *resize_umem;
4b664c43 113 int create_flags;
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YH
114 /* List of qps that it serves.*/
115 struct list_head send_qp_list;
116 struct list_head recv_qp_list;
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117};
118
119struct mlx4_ib_mr {
120 struct ib_mr ibmr;
121 struct mlx4_mr mmr;
122 struct ib_umem *umem;
123};
124
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125struct mlx4_ib_mw {
126 struct ib_mw ibmw;
127 struct mlx4_mw mmw;
128};
129
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130struct mlx4_ib_fast_reg_page_list {
131 struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b 132 __be64 *mapped_page_list;
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133 dma_addr_t map;
134};
135
8ad11fb6
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136struct mlx4_ib_fmr {
137 struct ib_fmr ibfmr;
138 struct mlx4_fmr mfmr;
139};
140
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MS
141#define MAX_REGS_PER_FLOW 2
142
143struct mlx4_flow_reg_id {
144 u64 id;
145 u64 mirror;
146};
147
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148struct mlx4_ib_flow {
149 struct ib_flow ibflow;
150 /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
146d6e19 151 struct mlx4_flow_reg_id reg_id[MAX_REGS_PER_FLOW];
f77c0162
HHZ
152};
153
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154struct mlx4_ib_wq {
155 u64 *wrid;
156 spinlock_t lock;
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157 int wqe_cnt;
158 int max_post;
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159 int max_gs;
160 int offset;
161 int wqe_shift;
162 unsigned head;
163 unsigned tail;
164};
165
b832be1e 166enum mlx4_ib_qp_flags {
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JM
167 MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
168 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
c1c98501 169 MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
40f2287b 170 MLX4_IB_QP_CREATE_USE_GFP_NOIO = IB_QP_CREATE_USE_GFP_NOIO,
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171 MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
172 MLX4_IB_SRIOV_SQP = 1 << 31,
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EC
173};
174
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EC
175struct mlx4_ib_gid_entry {
176 struct list_head list;
177 union ib_gid gid;
178 int added;
179 u8 port;
180};
181
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182enum mlx4_ib_qp_type {
183 /*
184 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
185 * here (and in that order) since the MAD layer uses them as
186 * indices into a 2-entry table.
187 */
188 MLX4_IB_QPT_SMI = IB_QPT_SMI,
189 MLX4_IB_QPT_GSI = IB_QPT_GSI,
190
191 MLX4_IB_QPT_RC = IB_QPT_RC,
192 MLX4_IB_QPT_UC = IB_QPT_UC,
193 MLX4_IB_QPT_UD = IB_QPT_UD,
194 MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
195 MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
196 MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
197 MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
198 MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
199
200 MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
201 MLX4_IB_QPT_PROXY_SMI = 1 << 17,
202 MLX4_IB_QPT_PROXY_GSI = 1 << 18,
203 MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
204 MLX4_IB_QPT_TUN_SMI = 1 << 20,
205 MLX4_IB_QPT_TUN_GSI = 1 << 21,
206};
207
208#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
209 MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
210 MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
211
0a9a0188
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212enum mlx4_ib_mad_ifc_flags {
213 MLX4_MAD_IFC_IGNORE_MKEY = 1,
214 MLX4_MAD_IFC_IGNORE_BKEY = 2,
215 MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
216 MLX4_MAD_IFC_IGNORE_BKEY),
217 MLX4_MAD_IFC_NET_VIEW = 4,
218};
219
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220enum {
221 MLX4_NUM_TUNNEL_BUFS = 256,
222};
223
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JM
224struct mlx4_ib_tunnel_header {
225 struct mlx4_av av;
226 __be32 remote_qpn;
227 __be32 qkey;
228 __be16 vlan;
229 u8 mac[6];
230 __be16 pkey_index;
231 u8 reserved[6];
232};
233
234struct mlx4_ib_buf {
235 void *addr;
236 dma_addr_t map;
237};
238
239struct mlx4_rcv_tunnel_hdr {
240 __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
241 * 0x0 - no vlan was in the packet
242 * 0x01 - C-VLAN was in the packet */
243 u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
244 u8 reserved;
245 __be16 pkey_index;
246 __be16 sl_vid;
247 __be16 slid_mac_47_32;
248 __be32 mac_31_0;
249};
250
251struct mlx4_ib_proxy_sqp_hdr {
252 struct ib_grh grh;
253 struct mlx4_rcv_tunnel_hdr tun;
254} __packed;
255
2f5bb473
JM
256struct mlx4_roce_smac_vlan_info {
257 u64 smac;
258 int smac_index;
259 int smac_port;
260 u64 candidate_smac;
261 int candidate_smac_index;
262 int candidate_smac_port;
263 u16 vid;
264 int vlan_index;
265 int vlan_port;
266 u16 candidate_vid;
267 int candidate_vlan_index;
268 int candidate_vlan_port;
269 int update_vid;
270};
271
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272struct mlx4_ib_qp {
273 struct ib_qp ibqp;
274 struct mlx4_qp mqp;
275 struct mlx4_buf buf;
276
6296883c 277 struct mlx4_db db;
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278 struct mlx4_ib_wq rq;
279
280 u32 doorbell_qpn;
281 __be32 sq_signal_bits;
ea54b10c
JM
282 unsigned sq_next_wqe;
283 int sq_max_wqes_per_wr;
0e6e7416 284 int sq_spare_wqes;
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285 struct mlx4_ib_wq sq;
286
1ffeb2eb 287 enum mlx4_ib_qp_type mlx4_ib_qp_type;
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288 struct ib_umem *umem;
289 struct mlx4_mtt mtt;
290 int buf_size;
291 struct mutex mutex;
0a1405da 292 u16 xrcdn;
b832be1e 293 u32 flags;
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294 u8 port;
295 u8 alt_port;
296 u8 atomic_rd_en;
297 u8 resp_depth;
0e6e7416 298 u8 sq_no_prefetch;
225c7b1f 299 u8 state;
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EC
300 int mlx_type;
301 struct list_head gid_list;
0ff1fb65 302 struct list_head steering_rules;
1ffeb2eb 303 struct mlx4_ib_buf *sqp_proxy_rcv;
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JM
304 struct mlx4_roce_smac_vlan_info pri;
305 struct mlx4_roce_smac_vlan_info alt;
c1c98501 306 u64 reg_id;
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YH
307 struct list_head qps_list;
308 struct list_head cq_recv_list;
309 struct list_head cq_send_list;
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310};
311
312struct mlx4_ib_srq {
313 struct ib_srq ibsrq;
314 struct mlx4_srq msrq;
315 struct mlx4_buf buf;
6296883c 316 struct mlx4_db db;
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317 u64 *wrid;
318 spinlock_t lock;
319 int head;
320 int tail;
321 u16 wqe_ctr;
322 struct ib_umem *umem;
323 struct mlx4_mtt mtt;
324 struct mutex mutex;
325};
326
327struct mlx4_ib_ah {
328 struct ib_ah ibah;
fa417f7b
EC
329 union mlx4_ext_av av;
330};
331
a0c64a17
JM
332/****************************************/
333/* alias guid support */
334/****************************************/
335#define NUM_PORT_ALIAS_GUID 2
336#define NUM_ALIAS_GUID_IN_REC 8
337#define NUM_ALIAS_GUID_REC_IN_PORT 16
338#define GUID_REC_SIZE 8
339#define NUM_ALIAS_GUID_PER_PORT 128
340#define MLX4_NOT_SET_GUID (0x00LL)
341#define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
342
343enum mlx4_guid_alias_rec_status {
344 MLX4_GUID_INFO_STATUS_IDLE,
345 MLX4_GUID_INFO_STATUS_SET,
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346};
347
f5479601 348#define GUID_STATE_NEED_PORT_INIT 0x01
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349
350enum mlx4_guid_alias_rec_method {
351 MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
352 MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
353};
354
355struct mlx4_sriov_alias_guid_info_rec_det {
356 u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
357 ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
358 enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
99ee4df6
YH
359 unsigned int guids_retry_schedule[NUM_ALIAS_GUID_IN_REC];
360 u64 time_to_run;
a0c64a17
JM
361};
362
363struct mlx4_sriov_alias_guid_port_rec_det {
364 struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
365 struct workqueue_struct *wq;
366 struct delayed_work alias_guid_work;
367 u8 port;
f5479601 368 u32 state_flags;
a0c64a17
JM
369 struct mlx4_sriov_alias_guid *parent;
370 struct list_head cb_list;
371};
372
373struct mlx4_sriov_alias_guid {
374 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
375 spinlock_t ag_work_lock;
376 struct ib_sa_client *sa_client;
377};
378
fc06573d
JM
379struct mlx4_ib_demux_work {
380 struct work_struct work;
381 struct mlx4_ib_dev *dev;
382 int slave;
383 int do_init;
384 u8 port;
385
386};
387
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JM
388struct mlx4_ib_tun_tx_buf {
389 struct mlx4_ib_buf buf;
390 struct ib_ah *ah;
391};
392
393struct mlx4_ib_demux_pv_qp {
394 struct ib_qp *qp;
395 enum ib_qp_type proxy_qpt;
396 struct mlx4_ib_buf *ring;
397 struct mlx4_ib_tun_tx_buf *tx_ring;
398 spinlock_t tx_lock;
399 unsigned tx_ix_head;
400 unsigned tx_ix_tail;
401};
402
fc06573d
JM
403enum mlx4_ib_demux_pv_state {
404 DEMUX_PV_STATE_DOWN,
405 DEMUX_PV_STATE_STARTING,
406 DEMUX_PV_STATE_ACTIVE,
407 DEMUX_PV_STATE_DOWNING,
408};
409
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410struct mlx4_ib_demux_pv_ctx {
411 int port;
412 int slave;
fc06573d 413 enum mlx4_ib_demux_pv_state state;
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JM
414 int has_smi;
415 struct ib_device *ib_dev;
416 struct ib_cq *cq;
417 struct ib_pd *pd;
418 struct ib_mr *mr;
419 struct work_struct work;
420 struct workqueue_struct *wq;
421 struct mlx4_ib_demux_pv_qp qp[2];
422};
423
424struct mlx4_ib_demux_ctx {
425 struct ib_device *ib_dev;
426 int port;
427 struct workqueue_struct *wq;
428 struct workqueue_struct *ud_wq;
429 spinlock_t ud_lock;
430 __be64 subnet_prefix;
431 __be64 guid_cache[128];
432 struct mlx4_ib_dev *dev;
b9c5d6a6
OD
433 /* the following lock protects both mcg_table and mcg_mgid0_list */
434 struct mutex mcg_table_lock;
435 struct rb_root mcg_table;
436 struct list_head mcg_mgid0_list;
437 struct workqueue_struct *mcg_wq;
1ffeb2eb 438 struct mlx4_ib_demux_pv_ctx **tun;
b9c5d6a6
OD
439 atomic_t tid;
440 int flushing; /* flushing the work queue */
1ffeb2eb
JM
441};
442
443struct mlx4_ib_sriov {
444 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
445 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
446 /* when using this spinlock you should use "irq" because
447 * it may be called from interrupt context.*/
448 spinlock_t going_down_lock;
449 int is_going_down;
3cf69cc8 450
a0c64a17
JM
451 struct mlx4_sriov_alias_guid alias_guid;
452
3cf69cc8
AV
453 /* CM paravirtualization fields */
454 struct list_head cm_list;
455 spinlock_t id_map_lock;
456 struct rb_root sl_id_map;
457 struct idr pv_id_table;
1ffeb2eb
JM
458};
459
fa417f7b
EC
460struct mlx4_ib_iboe {
461 spinlock_t lock;
462 struct net_device *netdevs[MLX4_MAX_PORTS];
d487ee77 463 struct net_device *masters[MLX4_MAX_PORTS];
3e0629cb 464 atomic64_t mac[MLX4_MAX_PORTS];
fa417f7b 465 struct notifier_block nb;
d487ee77
MS
466 struct notifier_block nb_inet;
467 struct notifier_block nb_inet6;
fa417f7b 468 union ib_gid gid_table[MLX4_MAX_PORTS][128];
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RD
469};
470
fc06573d
JM
471struct pkey_mgt {
472 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
473 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
474 struct list_head pkey_port_list[MLX4_MFUNC_MAX];
475 struct kobject *device_parent[MLX4_MFUNC_MAX];
476};
477
c1e7e466
JM
478struct mlx4_ib_iov_sysfs_attr {
479 void *ctx;
480 struct kobject *kobj;
481 unsigned long data;
482 u32 entry_num;
483 char name[15];
484 struct device_attribute dentry;
485 struct device *dev;
486};
487
488struct mlx4_ib_iov_sysfs_attr_ar {
489 struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
490};
491
492struct mlx4_ib_iov_port {
493 char name[100];
494 u8 num;
495 struct mlx4_ib_dev *dev;
496 struct list_head list;
497 struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
498 struct ib_port_attr attr;
499 struct kobject *cur_port;
500 struct kobject *admin_alias_parent;
501 struct kobject *gids_parent;
502 struct kobject *pkeys_parent;
503 struct kobject *mcgs_parent;
504 struct mlx4_ib_iov_sysfs_attr mcg_dentry;
505};
506
c3abb51b
EBE
507struct counter_index {
508 u32 index;
509 u8 allocated;
510};
511
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RD
512struct mlx4_ib_dev {
513 struct ib_device ib_dev;
514 struct mlx4_dev *dev;
7ff93f8b 515 int num_ports;
225c7b1f
RD
516 void __iomem *uar_map;
517
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RD
518 struct mlx4_uar priv_uar;
519 u32 priv_pdn;
520 MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
521
522 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
523 struct ib_ah *sm_ah[MLX4_MAX_PORTS];
524 spinlock_t sm_lock;
1ffeb2eb 525 struct mlx4_ib_sriov sriov;
225c7b1f
RD
526
527 struct mutex cap_mask_mutex;
3b4a8cd5 528 bool ib_active;
fa417f7b 529 struct mlx4_ib_iboe iboe;
c3abb51b 530 struct counter_index counters[MLX4_MAX_PORTS];
e605b743 531 int *eq_table;
c1e7e466
JM
532 struct kobject *iov_parent;
533 struct kobject *ports_parent;
534 struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
535 struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
fc06573d 536 struct pkey_mgt pkeys;
c1c98501
MB
537 unsigned long *ib_uc_qpns_bitmap;
538 int steer_qpn_count;
539 int steer_qpn_base;
0a9b7d59 540 int steering_support;
9433c188
MB
541 struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
542 /* lock when destroying qp1_proxy and getting netdev events */
543 struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
c6215745 544 u8 bond_next_port;
35f05dab
YH
545 /* protect resources needed as part of reset flow */
546 spinlock_t reset_flow_resource_lock;
547 struct list_head qp_list;
225c7b1f
RD
548};
549
00f5ce99
JM
550struct ib_event_work {
551 struct work_struct work;
552 struct mlx4_ib_dev *ib_dev;
553 struct mlx4_eqe ib_eqe;
554};
555
1ffeb2eb
JM
556struct mlx4_ib_qp_tunnel_init_attr {
557 struct ib_qp_init_attr init_attr;
558 int slave;
559 enum ib_qp_type proxy_qp_type;
560 u8 port;
561};
562
4b664c43
MB
563struct mlx4_uverbs_ex_query_device {
564 __u32 comp_mask;
565 __u32 reserved;
566};
567
568enum query_device_resp_mask {
569 QUERY_DEVICE_RESP_MASK_TIMESTAMP = 1UL << 0,
570};
571
572struct mlx4_uverbs_ex_query_device_resp {
573 __u32 comp_mask;
574 __u32 response_length;
575 __u64 hca_core_clock_offset;
576};
577
225c7b1f
RD
578static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
579{
580 return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
581}
582
583static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
584{
585 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
586}
587
588static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
589{
590 return container_of(ibpd, struct mlx4_ib_pd, ibpd);
591}
592
012a8ff5
SH
593static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
594{
595 return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
596}
597
225c7b1f
RD
598static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
599{
600 return container_of(ibcq, struct mlx4_ib_cq, ibcq);
601}
602
603static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
604{
605 return container_of(mcq, struct mlx4_ib_cq, mcq);
606}
607
608static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
609{
610 return container_of(ibmr, struct mlx4_ib_mr, ibmr);
611}
612
804d6a89
SM
613static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
614{
615 return container_of(ibmw, struct mlx4_ib_mw, ibmw);
616}
617
95d04f07
RD
618static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
619{
620 return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
621}
622
8ad11fb6
JM
623static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
624{
625 return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
626}
f77c0162
HHZ
627
628static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
629{
630 return container_of(ibflow, struct mlx4_ib_flow, ibflow);
631}
632
225c7b1f
RD
633static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
634{
635 return container_of(ibqp, struct mlx4_ib_qp, ibqp);
636}
637
638static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
639{
640 return container_of(mqp, struct mlx4_ib_qp, mqp);
641}
642
643static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
644{
645 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
646}
647
648static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
649{
650 return container_of(msrq, struct mlx4_ib_srq, msrq);
651}
652
653static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
654{
655 return container_of(ibah, struct mlx4_ib_ah, ibah);
656}
657
c6215745
MS
658static inline u8 mlx4_ib_bond_next_port(struct mlx4_ib_dev *dev)
659{
660 dev->bond_next_port = (dev->bond_next_port + 1) % dev->num_ports;
661
662 return dev->bond_next_port + 1;
663}
664
fc06573d
JM
665int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
666void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
667
225c7b1f 668int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c
YP
669 struct mlx4_db *db);
670void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
225c7b1f
RD
671
672struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
673int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
674 struct ib_umem *umem);
675struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
676 u64 virt_addr, int access_flags,
677 struct ib_udata *udata);
678int mlx4_ib_dereg_mr(struct ib_mr *mr);
804d6a89 679struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
6ff63e19
SM
680int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
681 struct ib_mw_bind *mw_bind);
804d6a89 682int mlx4_ib_dealloc_mw(struct ib_mw *mw);
679e34d1
SG
683struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
684 enum ib_mr_type mr_type,
685 u32 max_num_sg);
95d04f07
RD
686struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
687 int page_list_len);
688void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f 689
3fdcb97f 690int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1 691int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
bcf4c1ea
MB
692struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev,
693 const struct ib_cq_init_attr *attr,
225c7b1f
RD
694 struct ib_ucontext *context,
695 struct ib_udata *udata);
696int mlx4_ib_destroy_cq(struct ib_cq *cq);
697int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
698int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
699void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
700void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
701
702struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
703int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
704int mlx4_ib_destroy_ah(struct ib_ah *ah);
705
706struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
707 struct ib_srq_init_attr *init_attr,
708 struct ib_udata *udata);
709int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
710 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7 711int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
225c7b1f
RD
712int mlx4_ib_destroy_srq(struct ib_srq *srq);
713void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
714int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
715 struct ib_recv_wr **bad_wr);
716
717struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
718 struct ib_qp_init_attr *init_attr,
719 struct ib_udata *udata);
720int mlx4_ib_destroy_qp(struct ib_qp *qp);
721int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
722 int attr_mask, struct ib_udata *udata);
6a775e2b
JM
723int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
724 struct ib_qp_init_attr *qp_init_attr);
225c7b1f
RD
725int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
726 struct ib_send_wr **bad_wr);
727int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
728 struct ib_recv_wr **bad_wr);
729
0a9a0188 730int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
a97e2d86
IW
731 int port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
732 const void *in_mad, void *response_mad);
225c7b1f 733int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
a97e2d86 734 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
4cd7c947
IW
735 const struct ib_mad_hdr *in, size_t in_mad_size,
736 struct ib_mad_hdr *out, size_t *out_mad_size,
737 u16 *out_mad_pkey_index);
225c7b1f
RD
738int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
739void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
740
8ad11fb6
JM
741struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
742 struct ib_fmr_attr *fmr_attr);
743int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
744 u64 iova);
745int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
746int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188
JM
747int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
748 struct ib_port_attr *props, int netw_view);
749int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
750 u16 *pkey, int netw_view);
8ad11fb6 751
a0c64a17
JM
752int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
753 union ib_gid *gid, int netw_view);
754
a29bec12 755static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f 756{
fa417f7b
EC
757 u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
758
759 if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
a29bec12 760 return true;
fa417f7b
EC
761
762 return !!(ah->av.ib.g_slid & 0x80);
225c7b1f
RD
763}
764
b9c5d6a6
OD
765int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
766void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
767void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
768int mlx4_ib_mcg_init(void);
769void mlx4_ib_mcg_destroy(void);
770
771int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
772
773int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
774 struct ib_sa_mad *sa_mad);
775int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
776 struct ib_sa_mad *mad);
777
fa417f7b
EC
778int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
779 union ib_gid *gid);
780
00f5ce99
JM
781void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
782 enum ib_event_type type);
783
fc06573d
JM
784void mlx4_ib_tunnels_update_work(struct work_struct *work);
785
b9c5d6a6
OD
786int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
787 enum ib_qp_type qpt, struct ib_wc *wc,
788 struct ib_grh *grh, struct ib_mad *mad);
5ea8bbfc 789
b9c5d6a6
OD
790int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
791 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
5ea8bbfc
JM
792 u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
793 struct ib_mad *mad);
794
b9c5d6a6
OD
795__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
796
3cf69cc8
AV
797int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
798 struct ib_mad *mad);
799
800int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
801 struct ib_mad *mad);
802
803void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
804void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
805
a0c64a17
JM
806/* alias guid support */
807void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
808int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
809void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
810void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
811
812void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
813 int block_num,
814 u8 port_num, u8 *p_data);
815
816void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
817 int block_num, u8 port_num,
818 u8 *p_data);
819
c1e7e466
JM
820int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
821 struct attribute *attr);
822void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
823 struct attribute *attr);
824ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
ee59fa0d
YH
825void mlx4_ib_slave_alias_guid_event(struct mlx4_ib_dev *dev, int slave,
826 int port, int slave_init);
c1e7e466
JM
827
828int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
829
830void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
831
afa8fd1d
JM
832__be64 mlx4_ib_gen_node_guid(void);
833
c1c98501
MB
834int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
835void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
836int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
837 int is_attach);
9376932d
MB
838int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
839 u64 start, u64 length, u64 virt_addr,
840 int mr_access_flags, struct ib_pd *pd,
841 struct ib_udata *udata);
afa8fd1d 842
225c7b1f 843#endif /* MLX4_IB_H */
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