[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h

/*
 * Copyright (c) 2006, 2007 Cisco Systems.  All rights reserved.
 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef MLX4_IB_H
#define MLX4_IB_H

#include <linux/compiler.h>
#include <linux/list.h>
#include <linux/mutex.h>

#include <rdma/ib_verbs.h>
#include <rdma/ib_umem.h>

#include <linux/mlx4/device.h>
#include <linux/mlx4/doorbell.h>

#define MLX4_IB_DRV_NAME	"mlx4_ib"

#ifdef pr_fmt
#undef pr_fmt
#endif
#define pr_fmt(fmt)	"<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__

#define mlx4_ib_warn(ibdev, format, arg...) \
	dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)

enum {
	MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
	MLX4_IB_MAX_HEADROOM	 = 2048
};

#define MLX4_IB_SQ_HEADROOM(shift)	((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
#define MLX4_IB_SQ_MAX_SPARE		(MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))

struct mlx4_ib_ucontext {
	struct ib_ucontext	ibucontext;
	struct mlx4_uar		uar;
	struct list_head	db_page_list;
	struct mutex		db_page_mutex;
};

struct mlx4_ib_pd {
	struct ib_pd		ibpd;
	u32			pdn;
};

struct mlx4_ib_xrcd {
	struct ib_xrcd		ibxrcd;
	u32			xrcdn;
	struct ib_pd	       *pd;
	struct ib_cq	       *cq;
};

struct mlx4_ib_cq_buf {
	struct mlx4_buf		buf;
	struct mlx4_mtt		mtt;
};

struct mlx4_ib_cq_resize {
	struct mlx4_ib_cq_buf	buf;
	int			cqe;
};

struct mlx4_ib_cq {
	struct ib_cq		ibcq;
	struct mlx4_cq		mcq;
	struct mlx4_ib_cq_buf	buf;
	struct mlx4_ib_cq_resize *resize_buf;
	struct mlx4_db		db;
	spinlock_t		lock;
	struct mutex		resize_mutex;
	struct ib_umem	       *umem;
	struct ib_umem	       *resize_umem;
};

struct mlx4_ib_mr {
	struct ib_mr		ibmr;
	struct mlx4_mr		mmr;
	struct ib_umem	       *umem;
};

struct mlx4_ib_fast_reg_page_list {
	struct ib_fast_reg_page_list	ibfrpl;
	__be64			       *mapped_page_list;
	dma_addr_t			map;
};

struct mlx4_ib_fmr {
	struct ib_fmr           ibfmr;
	struct mlx4_fmr         mfmr;
};

struct mlx4_ib_wq {
	u64		       *wrid;
	spinlock_t		lock;
	int			wqe_cnt;
	int			max_post;
	int			max_gs;
	int			offset;
	int			wqe_shift;
	unsigned		head;
	unsigned		tail;
};

enum mlx4_ib_qp_flags {
	MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
	MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
	MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
	MLX4_IB_SRIOV_SQP = 1 << 31,
};

struct mlx4_ib_gid_entry {
	struct list_head	list;
	union ib_gid		gid;
	int			added;
	u8			port;
};

enum mlx4_ib_qp_type {
	/*
	 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
	 * here (and in that order) since the MAD layer uses them as
	 * indices into a 2-entry table.
	 */
	MLX4_IB_QPT_SMI = IB_QPT_SMI,
	MLX4_IB_QPT_GSI = IB_QPT_GSI,

	MLX4_IB_QPT_RC = IB_QPT_RC,
	MLX4_IB_QPT_UC = IB_QPT_UC,
	MLX4_IB_QPT_UD = IB_QPT_UD,
	MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
	MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
	MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
	MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
	MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,

	MLX4_IB_QPT_PROXY_SMI_OWNER	= 1 << 16,
	MLX4_IB_QPT_PROXY_SMI		= 1 << 17,
	MLX4_IB_QPT_PROXY_GSI		= 1 << 18,
	MLX4_IB_QPT_TUN_SMI_OWNER	= 1 << 19,
	MLX4_IB_QPT_TUN_SMI		= 1 << 20,
	MLX4_IB_QPT_TUN_GSI		= 1 << 21,
};

#define MLX4_IB_QPT_ANY_SRIOV	(MLX4_IB_QPT_PROXY_SMI_OWNER | \
	MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
	MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)

enum mlx4_ib_mad_ifc_flags {
	MLX4_MAD_IFC_IGNORE_MKEY	= 1,
	MLX4_MAD_IFC_IGNORE_BKEY	= 2,
	MLX4_MAD_IFC_IGNORE_KEYS	= (MLX4_MAD_IFC_IGNORE_MKEY |
					   MLX4_MAD_IFC_IGNORE_BKEY),
	MLX4_MAD_IFC_NET_VIEW		= 4,
};

enum {
	MLX4_NUM_TUNNEL_BUFS		= 256,
};

struct mlx4_ib_tunnel_header {
	struct mlx4_av av;
	__be32 remote_qpn;
	__be32 qkey;
	__be16 vlan;
	u8 mac[6];
	__be16 pkey_index;
	u8 reserved[6];
};

struct mlx4_ib_buf {
	void *addr;
	dma_addr_t map;
};

struct mlx4_rcv_tunnel_hdr {
	__be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
			      * 0x0 - no vlan was in the packet
			      * 0x01 - C-VLAN was in the packet */
	u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
	u8 reserved;
	__be16 pkey_index;
	__be16 sl_vid;
	__be16 slid_mac_47_32;
	__be32 mac_31_0;
};

struct mlx4_ib_proxy_sqp_hdr {
	struct ib_grh grh;
	struct mlx4_rcv_tunnel_hdr tun;
}  __packed;

struct mlx4_ib_qp {
	struct ib_qp		ibqp;
	struct mlx4_qp		mqp;
	struct mlx4_buf		buf;

	struct mlx4_db		db;
	struct mlx4_ib_wq	rq;

	u32			doorbell_qpn;
	__be32			sq_signal_bits;
	unsigned		sq_next_wqe;
	int			sq_max_wqes_per_wr;
	int			sq_spare_wqes;
	struct mlx4_ib_wq	sq;

	enum mlx4_ib_qp_type	mlx4_ib_qp_type;
	struct ib_umem	       *umem;
	struct mlx4_mtt		mtt;
	int			buf_size;
	struct mutex		mutex;
	u16			xrcdn;
	u32			flags;
	u8			port;
	u8			alt_port;
	u8			atomic_rd_en;
	u8			resp_depth;
	u8			sq_no_prefetch;
	u8			state;
	int			mlx_type;
	struct list_head	gid_list;
	struct list_head	steering_rules;
	struct mlx4_ib_buf	*sqp_proxy_rcv;

};

struct mlx4_ib_srq {
	struct ib_srq		ibsrq;
	struct mlx4_srq		msrq;
	struct mlx4_buf		buf;
	struct mlx4_db		db;
	u64		       *wrid;
	spinlock_t		lock;
	int			head;
	int			tail;
	u16			wqe_ctr;
	struct ib_umem	       *umem;
	struct mlx4_mtt		mtt;
	struct mutex		mutex;
};

struct mlx4_ib_ah {
	struct ib_ah		ibah;
	union mlx4_ext_av       av;
};

struct mlx4_ib_demux_work {
	struct work_struct	work;
	struct mlx4_ib_dev     *dev;
	int			slave;
	int			do_init;
	u8			port;

};

struct mlx4_ib_tun_tx_buf {
	struct mlx4_ib_buf buf;
	struct ib_ah *ah;
};

struct mlx4_ib_demux_pv_qp {
	struct ib_qp *qp;
	enum ib_qp_type proxy_qpt;
	struct mlx4_ib_buf *ring;
	struct mlx4_ib_tun_tx_buf *tx_ring;
	spinlock_t tx_lock;
	unsigned tx_ix_head;
	unsigned tx_ix_tail;
};

enum mlx4_ib_demux_pv_state {
	DEMUX_PV_STATE_DOWN,
	DEMUX_PV_STATE_STARTING,
	DEMUX_PV_STATE_ACTIVE,
	DEMUX_PV_STATE_DOWNING,
};

struct mlx4_ib_demux_pv_ctx {
	int port;
	int slave;
	enum mlx4_ib_demux_pv_state state;
	int has_smi;
	struct ib_device *ib_dev;
	struct ib_cq *cq;
	struct ib_pd *pd;
	struct ib_mr *mr;
	struct work_struct work;
	struct workqueue_struct *wq;
	struct mlx4_ib_demux_pv_qp qp[2];
};

struct mlx4_ib_demux_ctx {
	struct ib_device *ib_dev;
	int port;
	struct workqueue_struct *wq;
	struct workqueue_struct *ud_wq;
	spinlock_t ud_lock;
	__be64 subnet_prefix;
	__be64 guid_cache[128];
	struct mlx4_ib_dev *dev;
	struct mlx4_ib_demux_pv_ctx **tun;
};

struct mlx4_ib_sriov {
	struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
	struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
	/* when using this spinlock you should use "irq" because
	 * it may be called from interrupt context.*/
	spinlock_t going_down_lock;
	int is_going_down;
};

struct mlx4_ib_iboe {
	spinlock_t		lock;
	struct net_device      *netdevs[MLX4_MAX_PORTS];
	struct notifier_block 	nb;
	union ib_gid		gid_table[MLX4_MAX_PORTS][128];
};

struct pkey_mgt {
	u8			virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	u16			phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	struct list_head	pkey_port_list[MLX4_MFUNC_MAX];
	struct kobject	       *device_parent[MLX4_MFUNC_MAX];
};

struct mlx4_ib_dev {
	struct ib_device	ib_dev;
	struct mlx4_dev	       *dev;
	int			num_ports;
	void __iomem	       *uar_map;

	struct mlx4_uar		priv_uar;
	u32			priv_pdn;
	MLX4_DECLARE_DOORBELL_LOCK(uar_lock);

	struct ib_mad_agent    *send_agent[MLX4_MAX_PORTS][2];
	struct ib_ah	       *sm_ah[MLX4_MAX_PORTS];
	spinlock_t		sm_lock;
	struct mlx4_ib_sriov	sriov;

	struct mutex		cap_mask_mutex;
	bool			ib_active;
	struct mlx4_ib_iboe	iboe;
	int			counters[MLX4_MAX_PORTS];
	int		       *eq_table;
	int			eq_added;
	struct pkey_mgt		pkeys;
};

struct ib_event_work {
	struct work_struct	work;
	struct mlx4_ib_dev	*ib_dev;
	struct mlx4_eqe		ib_eqe;
};

struct mlx4_ib_qp_tunnel_init_attr {
	struct ib_qp_init_attr init_attr;
	int slave;
	enum ib_qp_type proxy_qp_type;
	u8 port;
};

static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
{
	return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
}

static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
{
	return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
}

static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
{
	return container_of(ibpd, struct mlx4_ib_pd, ibpd);
}

static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
{
	return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
}

static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
{
	return container_of(ibcq, struct mlx4_ib_cq, ibcq);
}

static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
{
	return container_of(mcq, struct mlx4_ib_cq, mcq);
}

static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
{
	return container_of(ibmr, struct mlx4_ib_mr, ibmr);
}

static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
{
	return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
}

static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
{
	return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
}
static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
{
	return container_of(ibqp, struct mlx4_ib_qp, ibqp);
}

static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
{
	return container_of(mqp, struct mlx4_ib_qp, mqp);
}

static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
{
	return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
}

static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
{
	return container_of(msrq, struct mlx4_ib_srq, msrq);
}

static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
{
	return container_of(ibah, struct mlx4_ib_ah, ibah);
}

int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);

int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
			struct mlx4_db *db);
void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);

struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
			   struct ib_umem *umem);
struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
				  u64 virt_addr, int access_flags,
				  struct ib_udata *udata);
int mlx4_ib_dereg_mr(struct ib_mr *mr);
struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
					int max_page_list_len);
struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
							       int page_list_len);
void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);

int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
				struct ib_ucontext *context,
				struct ib_udata *udata);
int mlx4_ib_destroy_cq(struct ib_cq *cq);
int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);

struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
int mlx4_ib_destroy_ah(struct ib_ah *ah);

struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
				  struct ib_srq_init_attr *init_attr,
				  struct ib_udata *udata);
int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
		       enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
int mlx4_ib_destroy_srq(struct ib_srq *srq);
void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
			  struct ib_recv_wr **bad_wr);

struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
				struct ib_qp_init_attr *init_attr,
				struct ib_udata *udata);
int mlx4_ib_destroy_qp(struct ib_qp *qp);
int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
		      int attr_mask, struct ib_udata *udata);
int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
		     struct ib_qp_init_attr *qp_init_attr);
int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
		      struct ib_send_wr **bad_wr);
int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
		      struct ib_recv_wr **bad_wr);

int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
		 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
		 void *in_mad, void *response_mad);
int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags,	u8 port_num,
			struct ib_wc *in_wc, struct ib_grh *in_grh,
			struct ib_mad *in_mad, struct ib_mad *out_mad);
int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);

struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
				  struct ib_fmr_attr *fmr_attr);
int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
			 u64 iova);
int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
			 struct ib_port_attr *props, int netw_view);
int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
			 u16 *pkey, int netw_view);

int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr,
			u8 *mac, int *is_mcast, u8 port);

static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
{
	u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;

	if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
		return 1;

	return !!(ah->av.ib.g_slid & 0x80);
}

int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
		   union ib_gid *gid);

void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
			    enum ib_event_type type);

void mlx4_ib_tunnels_update_work(struct work_struct *work);

#endif /* MLX4_IB_H */
Commit	Line	Data
225c7b1f RD	1	/*
225c7b1f RD	2	* Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0	3	* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
	34	#ifndef MLX4_IB_H
	35	#define MLX4_IB_H
	36
	37	#include <linux/compiler.h>
	38	#include <linux/list.h>
63019d93	39	#include <linux/mutex.h>
225c7b1f RD	40
	41	#include <rdma/ib_verbs.h>
	42	#include <rdma/ib_umem.h>
	43
	44	#include <linux/mlx4/device.h>
	45	#include <linux/mlx4/doorbell.h>
	46
b1d8eb5a JM	47	#define MLX4_IB_DRV_NAME "mlx4_ib"
	48
	49	#ifdef pr_fmt
	50	#undef pr_fmt
	51	#endif
	52	#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
	53
	54	#define mlx4_ib_warn(ibdev, format, arg...) \
	55	dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
	56
fc2d0044 SG	57	enum {
	58	MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
	59	MLX4_IB_MAX_HEADROOM = 2048
	60	};
	61
	62	#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
	63	#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
	64
225c7b1f RD	65	struct mlx4_ib_ucontext {
	66	struct ib_ucontext ibucontext;
	67	struct mlx4_uar uar;
	68	struct list_head db_page_list;
	69	struct mutex db_page_mutex;
	70	};
	71
	72	struct mlx4_ib_pd {
	73	struct ib_pd ibpd;
	74	u32 pdn;
	75	};
	76
012a8ff5 SH	77	struct mlx4_ib_xrcd {
	78	struct ib_xrcd ibxrcd;
	79	u32 xrcdn;
	80	struct ib_pd *pd;
	81	struct ib_cq *cq;
	82	};
	83
225c7b1f RD	84	struct mlx4_ib_cq_buf {
	85	struct mlx4_buf buf;
	86	struct mlx4_mtt mtt;
	87	};
	88
bbf8eed1 VS	89	struct mlx4_ib_cq_resize {
	90	struct mlx4_ib_cq_buf buf;
	91	int cqe;
	92	};
	93
225c7b1f RD	94	struct mlx4_ib_cq {
	95	struct ib_cq ibcq;
	96	struct mlx4_cq mcq;
	97	struct mlx4_ib_cq_buf buf;
bbf8eed1	98	struct mlx4_ib_cq_resize *resize_buf;
6296883c	99	struct mlx4_db db;
225c7b1f	100	spinlock_t lock;
bbf8eed1	101	struct mutex resize_mutex;
225c7b1f	102	struct ib_umem *umem;
bbf8eed1	103	struct ib_umem *resize_umem;
225c7b1f RD	104	};
	105
	106	struct mlx4_ib_mr {
	107	struct ib_mr ibmr;
	108	struct mlx4_mr mmr;
	109	struct ib_umem *umem;
	110	};
	111
95d04f07 RD	112	struct mlx4_ib_fast_reg_page_list {
95d04f07 RD	113	struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b	114	__be64 *mapped_page_list;
95d04f07 RD	115	dma_addr_t map;
	116	};
	117
8ad11fb6 JM	118	struct mlx4_ib_fmr {
	119	struct ib_fmr ibfmr;
	120	struct mlx4_fmr mfmr;
	121	};
	122
225c7b1f RD	123	struct mlx4_ib_wq {
	124	u64 *wrid;
	125	spinlock_t lock;
0e6e7416 RD	126	int wqe_cnt;
0e6e7416 RD	127	int max_post;
225c7b1f RD	128	int max_gs;
	129	int offset;
	130	int wqe_shift;
	131	unsigned head;
	132	unsigned tail;
	133	};
	134
b832be1e	135	enum mlx4_ib_qp_flags {
1ffeb2eb JM	136	MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
	137	MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
	138	MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
	139	MLX4_IB_SRIOV_SQP = 1 << 31,
b832be1e EC	140	};
b832be1e EC	141
fa417f7b EC	142	struct mlx4_ib_gid_entry {
	143	struct list_head list;
	144	union ib_gid gid;
	145	int added;
	146	u8 port;
	147	};
	148
1ffeb2eb JM	149	enum mlx4_ib_qp_type {
	150	/*
	151	* IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
	152	* here (and in that order) since the MAD layer uses them as
	153	* indices into a 2-entry table.
	154	*/
	155	MLX4_IB_QPT_SMI = IB_QPT_SMI,
	156	MLX4_IB_QPT_GSI = IB_QPT_GSI,
	157
	158	MLX4_IB_QPT_RC = IB_QPT_RC,
	159	MLX4_IB_QPT_UC = IB_QPT_UC,
	160	MLX4_IB_QPT_UD = IB_QPT_UD,
	161	MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
	162	MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
	163	MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
	164	MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
	165	MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
	166
	167	MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
	168	MLX4_IB_QPT_PROXY_SMI = 1 << 17,
	169	MLX4_IB_QPT_PROXY_GSI = 1 << 18,
	170	MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
	171	MLX4_IB_QPT_TUN_SMI = 1 << 20,
	172	MLX4_IB_QPT_TUN_GSI = 1 << 21,
	173	};
	174
	175	#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER \| \
	176	MLX4_IB_QPT_PROXY_SMI \| MLX4_IB_QPT_PROXY_GSI \| MLX4_IB_QPT_TUN_SMI_OWNER \| \
	177	MLX4_IB_QPT_TUN_SMI \| MLX4_IB_QPT_TUN_GSI)
	178
0a9a0188 JM	179	enum mlx4_ib_mad_ifc_flags {
	180	MLX4_MAD_IFC_IGNORE_MKEY = 1,
	181	MLX4_MAD_IFC_IGNORE_BKEY = 2,
	182	MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY \|
	183	MLX4_MAD_IFC_IGNORE_BKEY),
	184	MLX4_MAD_IFC_NET_VIEW = 4,
	185	};
	186
fc06573d JM	187	enum {
	188	MLX4_NUM_TUNNEL_BUFS = 256,
	189	};
	190
1ffeb2eb JM	191	struct mlx4_ib_tunnel_header {
	192	struct mlx4_av av;
	193	__be32 remote_qpn;
	194	__be32 qkey;
	195	__be16 vlan;
	196	u8 mac[6];
	197	__be16 pkey_index;
	198	u8 reserved[6];
	199	};
	200
	201	struct mlx4_ib_buf {
	202	void *addr;
	203	dma_addr_t map;
	204	};
	205
	206	struct mlx4_rcv_tunnel_hdr {
	207	__be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
	208	* 0x0 - no vlan was in the packet
	209	* 0x01 - C-VLAN was in the packet */
	210	u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
	211	u8 reserved;
	212	__be16 pkey_index;
	213	__be16 sl_vid;
	214	__be16 slid_mac_47_32;
	215	__be32 mac_31_0;
	216	};
	217
	218	struct mlx4_ib_proxy_sqp_hdr {
	219	struct ib_grh grh;
	220	struct mlx4_rcv_tunnel_hdr tun;
	221	} __packed;
	222
225c7b1f RD	223	struct mlx4_ib_qp {
	224	struct ib_qp ibqp;
	225	struct mlx4_qp mqp;
	226	struct mlx4_buf buf;
	227
6296883c	228	struct mlx4_db db;
225c7b1f RD	229	struct mlx4_ib_wq rq;
	230
	231	u32 doorbell_qpn;
	232	__be32 sq_signal_bits;
ea54b10c JM	233	unsigned sq_next_wqe;
ea54b10c JM	234	int sq_max_wqes_per_wr;
0e6e7416	235	int sq_spare_wqes;
225c7b1f RD	236	struct mlx4_ib_wq sq;
225c7b1f RD	237
1ffeb2eb	238	enum mlx4_ib_qp_type mlx4_ib_qp_type;
225c7b1f RD	239	struct ib_umem *umem;
	240	struct mlx4_mtt mtt;
	241	int buf_size;
	242	struct mutex mutex;
0a1405da	243	u16 xrcdn;
b832be1e	244	u32 flags;
225c7b1f RD	245	u8 port;
	246	u8 alt_port;
	247	u8 atomic_rd_en;
	248	u8 resp_depth;
0e6e7416	249	u8 sq_no_prefetch;
225c7b1f	250	u8 state;
fa417f7b EC	251	int mlx_type;
fa417f7b EC	252	struct list_head gid_list;
0ff1fb65	253	struct list_head steering_rules;
1ffeb2eb JM	254	struct mlx4_ib_buf *sqp_proxy_rcv;
1ffeb2eb JM	255
225c7b1f RD	256	};
	257
	258	struct mlx4_ib_srq {
	259	struct ib_srq ibsrq;
	260	struct mlx4_srq msrq;
	261	struct mlx4_buf buf;
6296883c	262	struct mlx4_db db;
225c7b1f RD	263	u64 *wrid;
	264	spinlock_t lock;
	265	int head;
	266	int tail;
	267	u16 wqe_ctr;
	268	struct ib_umem *umem;
	269	struct mlx4_mtt mtt;
	270	struct mutex mutex;
	271	};
	272
	273	struct mlx4_ib_ah {
	274	struct ib_ah ibah;
fa417f7b EC	275	union mlx4_ext_av av;
	276	};
	277
fc06573d JM	278	struct mlx4_ib_demux_work {
	279	struct work_struct work;
	280	struct mlx4_ib_dev *dev;
	281	int slave;
	282	int do_init;
	283	u8 port;
	284
	285	};
	286
1ffeb2eb JM	287	struct mlx4_ib_tun_tx_buf {
	288	struct mlx4_ib_buf buf;
	289	struct ib_ah *ah;
	290	};
	291
	292	struct mlx4_ib_demux_pv_qp {
	293	struct ib_qp *qp;
	294	enum ib_qp_type proxy_qpt;
	295	struct mlx4_ib_buf *ring;
	296	struct mlx4_ib_tun_tx_buf *tx_ring;
	297	spinlock_t tx_lock;
	298	unsigned tx_ix_head;
	299	unsigned tx_ix_tail;
	300	};
	301
fc06573d JM	302	enum mlx4_ib_demux_pv_state {
	303	DEMUX_PV_STATE_DOWN,
	304	DEMUX_PV_STATE_STARTING,
	305	DEMUX_PV_STATE_ACTIVE,
	306	DEMUX_PV_STATE_DOWNING,
	307	};
	308
1ffeb2eb JM	309	struct mlx4_ib_demux_pv_ctx {
	310	int port;
	311	int slave;
fc06573d	312	enum mlx4_ib_demux_pv_state state;
1ffeb2eb JM	313	int has_smi;
	314	struct ib_device *ib_dev;
	315	struct ib_cq *cq;
	316	struct ib_pd *pd;
	317	struct ib_mr *mr;
	318	struct work_struct work;
	319	struct workqueue_struct *wq;
	320	struct mlx4_ib_demux_pv_qp qp[2];
	321	};
	322
	323	struct mlx4_ib_demux_ctx {
	324	struct ib_device *ib_dev;
	325	int port;
	326	struct workqueue_struct *wq;
	327	struct workqueue_struct *ud_wq;
	328	spinlock_t ud_lock;
	329	__be64 subnet_prefix;
	330	__be64 guid_cache[128];
	331	struct mlx4_ib_dev *dev;
	332	struct mlx4_ib_demux_pv_ctx **tun;
	333	};
	334
	335	struct mlx4_ib_sriov {
	336	struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
	337	struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
	338	/* when using this spinlock you should use "irq" because
	339	* it may be called from interrupt context.*/
	340	spinlock_t going_down_lock;
	341	int is_going_down;
	342	};
	343
fa417f7b EC	344	struct mlx4_ib_iboe {
	345	spinlock_t lock;
	346	struct net_device *netdevs[MLX4_MAX_PORTS];
	347	struct notifier_block nb;
	348	union ib_gid gid_table[MLX4_MAX_PORTS][128];
225c7b1f RD	349	};
225c7b1f RD	350
fc06573d JM	351	struct pkey_mgt {
	352	u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	353	u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	354	struct list_head pkey_port_list[MLX4_MFUNC_MAX];
	355	struct kobject *device_parent[MLX4_MFUNC_MAX];
	356	};
	357
225c7b1f RD	358	struct mlx4_ib_dev {
	359	struct ib_device ib_dev;
	360	struct mlx4_dev *dev;
7ff93f8b	361	int num_ports;
225c7b1f RD	362	void __iomem *uar_map;
225c7b1f RD	363
225c7b1f RD	364	struct mlx4_uar priv_uar;
	365	u32 priv_pdn;
	366	MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
	367
	368	struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
	369	struct ib_ah *sm_ah[MLX4_MAX_PORTS];
	370	spinlock_t sm_lock;
1ffeb2eb	371	struct mlx4_ib_sriov sriov;
225c7b1f RD	372
225c7b1f RD	373	struct mutex cap_mask_mutex;
3b4a8cd5	374	bool ib_active;
fa417f7b	375	struct mlx4_ib_iboe iboe;
cfcde11c	376	int counters[MLX4_MAX_PORTS];
e605b743 SP	377	int *eq_table;
e605b743 SP	378	int eq_added;
fc06573d	379	struct pkey_mgt pkeys;
225c7b1f RD	380	};
225c7b1f RD	381
00f5ce99 JM	382	struct ib_event_work {
	383	struct work_struct work;
	384	struct mlx4_ib_dev *ib_dev;
	385	struct mlx4_eqe ib_eqe;
	386	};
	387
1ffeb2eb JM	388	struct mlx4_ib_qp_tunnel_init_attr {
	389	struct ib_qp_init_attr init_attr;
	390	int slave;
	391	enum ib_qp_type proxy_qp_type;
	392	u8 port;
	393	};
	394
225c7b1f RD	395	static inline struct mlx4_ib_dev to_mdev(struct ib_device ibdev)
	396	{
	397	return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
	398	}
	399
	400	static inline struct mlx4_ib_ucontext to_mucontext(struct ib_ucontext ibucontext)
	401	{
	402	return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
	403	}
	404
	405	static inline struct mlx4_ib_pd to_mpd(struct ib_pd ibpd)
	406	{
	407	return container_of(ibpd, struct mlx4_ib_pd, ibpd);
	408	}
	409
012a8ff5 SH	410	static inline struct mlx4_ib_xrcd to_mxrcd(struct ib_xrcd ibxrcd)
	411	{
	412	return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
	413	}
	414
225c7b1f RD	415	static inline struct mlx4_ib_cq to_mcq(struct ib_cq ibcq)
	416	{
	417	return container_of(ibcq, struct mlx4_ib_cq, ibcq);
	418	}
	419
	420	static inline struct mlx4_ib_cq to_mibcq(struct mlx4_cq mcq)
	421	{
	422	return container_of(mcq, struct mlx4_ib_cq, mcq);
	423	}
	424
	425	static inline struct mlx4_ib_mr to_mmr(struct ib_mr ibmr)
	426	{
	427	return container_of(ibmr, struct mlx4_ib_mr, ibmr);
	428	}
	429
95d04f07 RD	430	static inline struct mlx4_ib_fast_reg_page_list to_mfrpl(struct ib_fast_reg_page_list ibfrpl)
	431	{
	432	return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
	433	}
	434
8ad11fb6 JM	435	static inline struct mlx4_ib_fmr to_mfmr(struct ib_fmr ibfmr)
	436	{
	437	return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
	438	}
225c7b1f RD	439	static inline struct mlx4_ib_qp to_mqp(struct ib_qp ibqp)
	440	{
	441	return container_of(ibqp, struct mlx4_ib_qp, ibqp);
	442	}
	443
	444	static inline struct mlx4_ib_qp to_mibqp(struct mlx4_qp mqp)
	445	{
	446	return container_of(mqp, struct mlx4_ib_qp, mqp);
	447	}
	448
	449	static inline struct mlx4_ib_srq to_msrq(struct ib_srq ibsrq)
	450	{
	451	return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
	452	}
	453
	454	static inline struct mlx4_ib_srq to_mibsrq(struct mlx4_srq msrq)
	455	{
	456	return container_of(msrq, struct mlx4_ib_srq, msrq);
	457	}
	458
	459	static inline struct mlx4_ib_ah to_mah(struct ib_ah ibah)
	460	{
	461	return container_of(ibah, struct mlx4_ib_ah, ibah);
	462	}
	463
fc06573d JM	464	int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
	465	void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
	466
225c7b1f	467	int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c YP	468	struct mlx4_db *db);
6296883c YP	469	void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext context, struct mlx4_db db);
225c7b1f RD	470
	471	struct ib_mr mlx4_ib_get_dma_mr(struct ib_pd pd, int acc);
	472	int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev dev, struct mlx4_mtt mtt,
	473	struct ib_umem *umem);
	474	struct ib_mr mlx4_ib_reg_user_mr(struct ib_pd pd, u64 start, u64 length,
	475	u64 virt_addr, int access_flags,
	476	struct ib_udata *udata);
	477	int mlx4_ib_dereg_mr(struct ib_mr *mr);
95d04f07 RD	478	struct ib_mr mlx4_ib_alloc_fast_reg_mr(struct ib_pd pd,
	479	int max_page_list_len);
	480	struct ib_fast_reg_page_list mlx4_ib_alloc_fast_reg_page_list(struct ib_device ibdev,
	481	int page_list_len);
	482	void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f	483
3fdcb97f	484	int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1	485	int mlx4_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata);
225c7b1f RD	486	struct ib_cq mlx4_ib_create_cq(struct ib_device ibdev, int entries, int vector,
	487	struct ib_ucontext *context,
	488	struct ib_udata *udata);
	489	int mlx4_ib_destroy_cq(struct ib_cq *cq);
	490	int mlx4_ib_poll_cq(struct ib_cq ibcq, int num_entries, struct ib_wc wc);
	491	int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
	492	void __mlx4_ib_cq_clean(struct mlx4_ib_cq cq, u32 qpn, struct mlx4_ib_srq srq);
	493	void mlx4_ib_cq_clean(struct mlx4_ib_cq cq, u32 qpn, struct mlx4_ib_srq srq);
	494
	495	struct ib_ah mlx4_ib_create_ah(struct ib_pd pd, struct ib_ah_attr *ah_attr);
	496	int mlx4_ib_query_ah(struct ib_ah ibah, struct ib_ah_attr ah_attr);
	497	int mlx4_ib_destroy_ah(struct ib_ah *ah);
	498
	499	struct ib_srq mlx4_ib_create_srq(struct ib_pd pd,
	500	struct ib_srq_init_attr *init_attr,
	501	struct ib_udata *udata);
	502	int mlx4_ib_modify_srq(struct ib_srq ibsrq, struct ib_srq_attr attr,
	503	enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7	504	int mlx4_ib_query_srq(struct ib_srq srq, struct ib_srq_attr srq_attr);
225c7b1f RD	505	int mlx4_ib_destroy_srq(struct ib_srq *srq);
	506	void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
	507	int mlx4_ib_post_srq_recv(struct ib_srq ibsrq, struct ib_recv_wr wr,
	508	struct ib_recv_wr **bad_wr);
	509
	510	struct ib_qp mlx4_ib_create_qp(struct ib_pd pd,
	511	struct ib_qp_init_attr *init_attr,
	512	struct ib_udata *udata);
	513	int mlx4_ib_destroy_qp(struct ib_qp *qp);
	514	int mlx4_ib_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr,
	515	int attr_mask, struct ib_udata *udata);
6a775e2b JM	516	int mlx4_ib_query_qp(struct ib_qp ibqp, struct ib_qp_attr qp_attr, int qp_attr_mask,
6a775e2b JM	517	struct ib_qp_init_attr *qp_init_attr);
225c7b1f RD	518	int mlx4_ib_post_send(struct ib_qp ibqp, struct ib_send_wr wr,
	519	struct ib_send_wr **bad_wr);
	520	int mlx4_ib_post_recv(struct ib_qp ibqp, struct ib_recv_wr wr,
	521	struct ib_recv_wr **bad_wr);
	522
0a9a0188	523	int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
225c7b1f RD	524	int port, struct ib_wc in_wc, struct ib_grh in_grh,
	525	void in_mad, void response_mad);
	526	int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
	527	struct ib_wc in_wc, struct ib_grh in_grh,
	528	struct ib_mad in_mad, struct ib_mad out_mad);
	529	int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
	530	void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
	531
8ad11fb6 JM	532	struct ib_fmr mlx4_ib_fmr_alloc(struct ib_pd pd, int mr_access_flags,
	533	struct ib_fmr_attr *fmr_attr);
	534	int mlx4_ib_map_phys_fmr(struct ib_fmr ibfmr, u64 page_list, int npages,
	535	u64 iova);
	536	int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
	537	int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188 JM	538	int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
	539	struct ib_port_attr *props, int netw_view);
	540	int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
	541	u16 *pkey, int netw_view);
8ad11fb6	542
fa417f7b EC	543	int mlx4_ib_resolve_grh(struct mlx4_ib_dev dev, const struct ib_ah_attr ah_attr,
	544	u8 mac, int is_mcast, u8 port);
	545
225c7b1f RD	546	static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f RD	547	{
fa417f7b EC	548	u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
	549
	550	if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
	551	return 1;
	552
	553	return !!(ah->av.ib.g_slid & 0x80);
225c7b1f RD	554	}
225c7b1f RD	555
fa417f7b EC	556	int mlx4_ib_add_mc(struct mlx4_ib_dev mdev, struct mlx4_ib_qp mqp,
	557	union ib_gid *gid);
	558
00f5ce99 JM	559	void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
	560	enum ib_event_type type);
	561
fc06573d JM	562	void mlx4_ib_tunnels_update_work(struct work_struct *work);
fc06573d JM	563
225c7b1f	564	#endif /* MLX4_IB_H */