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mlx4: Implement IP based gids support for RoCE/SRIOV
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef MLX4_IB_H
35#define MLX4_IB_H
36
37#include <linux/compiler.h>
38#include <linux/list.h>
63019d93 39#include <linux/mutex.h>
b9c5d6a6 40#include <linux/idr.h>
225c7b1f
RD		 41
42#include <rdma/ib_verbs.h>
43#include <rdma/ib_umem.h>
b9c5d6a6 44#include <rdma/ib_mad.h>
a0c64a17 45#include <rdma/ib_sa.h>
225c7b1f
RD		 46
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/doorbell.h>
49
b1d8eb5a
JM		 50#define MLX4_IB_DRV_NAME "mlx4_ib"
51
52#ifdef pr_fmt
53#undef pr_fmt
54#endif
55#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
56
57#define mlx4_ib_warn(ibdev, format, arg...) \
58 dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
59
fc2d0044
SG		 60enum {
61 MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
62 MLX4_IB_MAX_HEADROOM = 2048
63};
64
65#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
66#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
67
a0c64a17
JM		 68/*module param to indicate if SM assigns the alias_GUID*/
69extern int mlx4_ib_sm_guid_assign;
70
c1c98501
MB		 71#define MLX4_IB_UC_STEER_QPN_ALIGN 1
72#define MLX4_IB_UC_MAX_NUM_QPS 256
225c7b1f
RD		 73struct mlx4_ib_ucontext {
74 struct ib_ucontext ibucontext;
75 struct mlx4_uar uar;
76 struct list_head db_page_list;
77 struct mutex db_page_mutex;
78};
79
80struct mlx4_ib_pd {
81 struct ib_pd ibpd;
82 u32 pdn;
83};
84
012a8ff5
SH		 85struct mlx4_ib_xrcd {
86 struct ib_xrcd ibxrcd;
87 u32 xrcdn;
88 struct ib_pd *pd;
89 struct ib_cq *cq;
90};
91
225c7b1f
RD		 92struct mlx4_ib_cq_buf {
93 struct mlx4_buf buf;
94 struct mlx4_mtt mtt;
08ff3235 95 int entry_size;
225c7b1f
RD		 96};
97
bbf8eed1
VS		 98struct mlx4_ib_cq_resize {
99 struct mlx4_ib_cq_buf buf;
100 int cqe;
101};
102
225c7b1f
RD		 103struct mlx4_ib_cq {
104 struct ib_cq ibcq;
105 struct mlx4_cq mcq;
106 struct mlx4_ib_cq_buf buf;
bbf8eed1 107 struct mlx4_ib_cq_resize *resize_buf;
6296883c 108 struct mlx4_db db;
225c7b1f 109 spinlock_t lock;
bbf8eed1 110 struct mutex resize_mutex;
225c7b1f 111 struct ib_umem *umem;
bbf8eed1 112 struct ib_umem *resize_umem;
225c7b1f
RD		 113};
114
115struct mlx4_ib_mr {
116 struct ib_mr ibmr;
117 struct mlx4_mr mmr;
118 struct ib_umem *umem;
119};
120
804d6a89
SM		 121struct mlx4_ib_mw {
122 struct ib_mw ibmw;
123 struct mlx4_mw mmw;
124};
125
95d04f07
RD		 126struct mlx4_ib_fast_reg_page_list {
127 struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b 128 __be64 *mapped_page_list;
95d04f07
RD		 129 dma_addr_t map;
130};
131
8ad11fb6
JM		 132struct mlx4_ib_fmr {
133 struct ib_fmr ibfmr;
134 struct mlx4_fmr mfmr;
135};
136
f77c0162
HHZ		 137struct mlx4_ib_flow {
138 struct ib_flow ibflow;
139 /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
140 u64 reg_id[2];
141};
142
225c7b1f
RD		 143struct mlx4_ib_wq {
144 u64 *wrid;
145 spinlock_t lock;
0e6e7416
RD		 146 int wqe_cnt;
147 int max_post;
225c7b1f
RD		 148 int max_gs;
149 int offset;
150 int wqe_shift;
151 unsigned head;
152 unsigned tail;
153};
154
b832be1e 155enum mlx4_ib_qp_flags {
1ffeb2eb
JM		 156 MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
157 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
c1c98501 158 MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
1ffeb2eb
JM		 159 MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
160 MLX4_IB_SRIOV_SQP = 1 << 31,
b832be1e
EC		 161};
162
fa417f7b
EC		 163struct mlx4_ib_gid_entry {
164 struct list_head list;
165 union ib_gid gid;
166 int added;
167 u8 port;
168};
169
1ffeb2eb
JM		 170enum mlx4_ib_qp_type {
171 /*
172 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
173 * here (and in that order) since the MAD layer uses them as
174 * indices into a 2-entry table.
175 */
176 MLX4_IB_QPT_SMI = IB_QPT_SMI,
177 MLX4_IB_QPT_GSI = IB_QPT_GSI,
178
179 MLX4_IB_QPT_RC = IB_QPT_RC,
180 MLX4_IB_QPT_UC = IB_QPT_UC,
181 MLX4_IB_QPT_UD = IB_QPT_UD,
182 MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
183 MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
184 MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
185 MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
186 MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
187
188 MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
189 MLX4_IB_QPT_PROXY_SMI = 1 << 17,
190 MLX4_IB_QPT_PROXY_GSI = 1 << 18,
191 MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
192 MLX4_IB_QPT_TUN_SMI = 1 << 20,
193 MLX4_IB_QPT_TUN_GSI = 1 << 21,
194};
195
196#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
197 MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
198 MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
199
0a9a0188
JM		 200enum mlx4_ib_mad_ifc_flags {
201 MLX4_MAD_IFC_IGNORE_MKEY = 1,
202 MLX4_MAD_IFC_IGNORE_BKEY = 2,
203 MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
204 MLX4_MAD_IFC_IGNORE_BKEY),
205 MLX4_MAD_IFC_NET_VIEW = 4,
206};
207
fc06573d
JM		 208enum {
209 MLX4_NUM_TUNNEL_BUFS = 256,
210};
211
1ffeb2eb
JM		 212struct mlx4_ib_tunnel_header {
213 struct mlx4_av av;
214 __be32 remote_qpn;
215 __be32 qkey;
216 __be16 vlan;
217 u8 mac[6];
218 __be16 pkey_index;
219 u8 reserved[6];
220};
221
222struct mlx4_ib_buf {
223 void *addr;
224 dma_addr_t map;
225};
226
227struct mlx4_rcv_tunnel_hdr {
228 __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
229 * 0x0 - no vlan was in the packet
230 * 0x01 - C-VLAN was in the packet */
231 u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
232 u8 reserved;
233 __be16 pkey_index;
234 __be16 sl_vid;
235 __be16 slid_mac_47_32;
236 __be32 mac_31_0;
237};
238
239struct mlx4_ib_proxy_sqp_hdr {
240 struct ib_grh grh;
241 struct mlx4_rcv_tunnel_hdr tun;
242} __packed;
243
2f5bb473
JM		 244struct mlx4_roce_smac_vlan_info {
245 u64 smac;
246 int smac_index;
247 int smac_port;
248 u64 candidate_smac;
249 int candidate_smac_index;
250 int candidate_smac_port;
251 u16 vid;
252 int vlan_index;
253 int vlan_port;
254 u16 candidate_vid;
255 int candidate_vlan_index;
256 int candidate_vlan_port;
257 int update_vid;
258};
259
225c7b1f
RD		 260struct mlx4_ib_qp {
261 struct ib_qp ibqp;
262 struct mlx4_qp mqp;
263 struct mlx4_buf buf;
264
6296883c 265 struct mlx4_db db;
225c7b1f
RD		 266 struct mlx4_ib_wq rq;
267
268 u32 doorbell_qpn;
269 __be32 sq_signal_bits;
ea54b10c
JM		 270 unsigned sq_next_wqe;
271 int sq_max_wqes_per_wr;
0e6e7416 272 int sq_spare_wqes;
225c7b1f
RD		 273 struct mlx4_ib_wq sq;
274
1ffeb2eb 275 enum mlx4_ib_qp_type mlx4_ib_qp_type;
225c7b1f
RD		 276 struct ib_umem *umem;
277 struct mlx4_mtt mtt;
278 int buf_size;
279 struct mutex mutex;
0a1405da 280 u16 xrcdn;
b832be1e 281 u32 flags;
225c7b1f
RD		 282 u8 port;
283 u8 alt_port;
284 u8 atomic_rd_en;
285 u8 resp_depth;
0e6e7416 286 u8 sq_no_prefetch;
225c7b1f 287 u8 state;
fa417f7b
EC		 288 int mlx_type;
289 struct list_head gid_list;
0ff1fb65 290 struct list_head steering_rules;
1ffeb2eb 291 struct mlx4_ib_buf *sqp_proxy_rcv;
2f5bb473
JM		 292 struct mlx4_roce_smac_vlan_info pri;
293 struct mlx4_roce_smac_vlan_info alt;
c1c98501 294 u64 reg_id;
225c7b1f
RD		 295};
296
297struct mlx4_ib_srq {
298 struct ib_srq ibsrq;
299 struct mlx4_srq msrq;
300 struct mlx4_buf buf;
6296883c 301 struct mlx4_db db;
225c7b1f
RD		 302 u64 *wrid;
303 spinlock_t lock;
304 int head;
305 int tail;
306 u16 wqe_ctr;
307 struct ib_umem *umem;
308 struct mlx4_mtt mtt;
309 struct mutex mutex;
310};
311
312struct mlx4_ib_ah {
313 struct ib_ah ibah;
fa417f7b
EC		 314 union mlx4_ext_av av;
315};
316
a0c64a17
JM		 317/****************************************/
318/* alias guid support */
319/****************************************/
320#define NUM_PORT_ALIAS_GUID 2
321#define NUM_ALIAS_GUID_IN_REC 8
322#define NUM_ALIAS_GUID_REC_IN_PORT 16
323#define GUID_REC_SIZE 8
324#define NUM_ALIAS_GUID_PER_PORT 128
325#define MLX4_NOT_SET_GUID (0x00LL)
326#define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
327
328enum mlx4_guid_alias_rec_status {
329 MLX4_GUID_INFO_STATUS_IDLE,
330 MLX4_GUID_INFO_STATUS_SET,
331 MLX4_GUID_INFO_STATUS_PENDING,
332};
333
334enum mlx4_guid_alias_rec_ownership {
335 MLX4_GUID_DRIVER_ASSIGN,
336 MLX4_GUID_SYSADMIN_ASSIGN,
337 MLX4_GUID_NONE_ASSIGN, /*init state of each record*/
338};
339
340enum mlx4_guid_alias_rec_method {
341 MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
342 MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
343};
344
345struct mlx4_sriov_alias_guid_info_rec_det {
346 u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
347 ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
348 enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
349 u8 method; /*set or delete*/
350 enum mlx4_guid_alias_rec_ownership ownership; /*indicates who assign that alias_guid record*/
351};
352
353struct mlx4_sriov_alias_guid_port_rec_det {
354 struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
355 struct workqueue_struct *wq;
356 struct delayed_work alias_guid_work;
357 u8 port;
358 struct mlx4_sriov_alias_guid *parent;
359 struct list_head cb_list;
360};
361
362struct mlx4_sriov_alias_guid {
363 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
364 spinlock_t ag_work_lock;
365 struct ib_sa_client *sa_client;
366};
367
fc06573d
JM		 368struct mlx4_ib_demux_work {
369 struct work_struct work;
370 struct mlx4_ib_dev *dev;
371 int slave;
372 int do_init;
373 u8 port;
374
375};
376
1ffeb2eb
JM		 377struct mlx4_ib_tun_tx_buf {
378 struct mlx4_ib_buf buf;
379 struct ib_ah *ah;
380};
381
382struct mlx4_ib_demux_pv_qp {
383 struct ib_qp *qp;
384 enum ib_qp_type proxy_qpt;
385 struct mlx4_ib_buf *ring;
386 struct mlx4_ib_tun_tx_buf *tx_ring;
387 spinlock_t tx_lock;
388 unsigned tx_ix_head;
389 unsigned tx_ix_tail;
390};
391
fc06573d
JM		 392enum mlx4_ib_demux_pv_state {
393 DEMUX_PV_STATE_DOWN,
394 DEMUX_PV_STATE_STARTING,
395 DEMUX_PV_STATE_ACTIVE,
396 DEMUX_PV_STATE_DOWNING,
397};
398
1ffeb2eb
JM		 399struct mlx4_ib_demux_pv_ctx {
400 int port;
401 int slave;
fc06573d 402 enum mlx4_ib_demux_pv_state state;
1ffeb2eb
JM		 403 int has_smi;
404 struct ib_device *ib_dev;
405 struct ib_cq *cq;
406 struct ib_pd *pd;
407 struct ib_mr *mr;
408 struct work_struct work;
409 struct workqueue_struct *wq;
410 struct mlx4_ib_demux_pv_qp qp[2];
411};
412
413struct mlx4_ib_demux_ctx {
414 struct ib_device *ib_dev;
415 int port;
416 struct workqueue_struct *wq;
417 struct workqueue_struct *ud_wq;
418 spinlock_t ud_lock;
419 __be64 subnet_prefix;
420 __be64 guid_cache[128];
421 struct mlx4_ib_dev *dev;
b9c5d6a6
OD		 422 /* the following lock protects both mcg_table and mcg_mgid0_list */
423 struct mutex mcg_table_lock;
424 struct rb_root mcg_table;
425 struct list_head mcg_mgid0_list;
426 struct workqueue_struct *mcg_wq;
1ffeb2eb 427 struct mlx4_ib_demux_pv_ctx **tun;
b9c5d6a6
OD		 428 atomic_t tid;
429 int flushing; /* flushing the work queue */
1ffeb2eb
JM		 430};
431
432struct mlx4_ib_sriov {
433 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
434 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
435 /* when using this spinlock you should use "irq" because
436 * it may be called from interrupt context.*/
437 spinlock_t going_down_lock;
438 int is_going_down;
3cf69cc8 439
a0c64a17
JM		 440 struct mlx4_sriov_alias_guid alias_guid;
441
3cf69cc8
AV		 442 /* CM paravirtualization fields */
443 struct list_head cm_list;
444 spinlock_t id_map_lock;
445 struct rb_root sl_id_map;
446 struct idr pv_id_table;
1ffeb2eb
JM		 447};
448
fa417f7b
EC		 449struct mlx4_ib_iboe {
450 spinlock_t lock;
451 struct net_device *netdevs[MLX4_MAX_PORTS];
d487ee77 452 struct net_device *masters[MLX4_MAX_PORTS];
fa417f7b 453 struct notifier_block nb;
d487ee77
MS		 454 struct notifier_block nb_inet;
455 struct notifier_block nb_inet6;
fa417f7b 456 union ib_gid gid_table[MLX4_MAX_PORTS][128];
225c7b1f
RD		 457};
458
fc06573d
JM		 459struct pkey_mgt {
460 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
461 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
462 struct list_head pkey_port_list[MLX4_MFUNC_MAX];
463 struct kobject *device_parent[MLX4_MFUNC_MAX];
464};
465
c1e7e466
JM		 466struct mlx4_ib_iov_sysfs_attr {
467 void *ctx;
468 struct kobject *kobj;
469 unsigned long data;
470 u32 entry_num;
471 char name[15];
472 struct device_attribute dentry;
473 struct device *dev;
474};
475
476struct mlx4_ib_iov_sysfs_attr_ar {
477 struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
478};
479
480struct mlx4_ib_iov_port {
481 char name[100];
482 u8 num;
483 struct mlx4_ib_dev *dev;
484 struct list_head list;
485 struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
486 struct ib_port_attr attr;
487 struct kobject *cur_port;
488 struct kobject *admin_alias_parent;
489 struct kobject *gids_parent;
490 struct kobject *pkeys_parent;
491 struct kobject *mcgs_parent;
492 struct mlx4_ib_iov_sysfs_attr mcg_dentry;
493};
494
225c7b1f
RD		 495struct mlx4_ib_dev {
496 struct ib_device ib_dev;
497 struct mlx4_dev *dev;
7ff93f8b 498 int num_ports;
225c7b1f
RD		 499 void __iomem *uar_map;
500
225c7b1f
RD		 501 struct mlx4_uar priv_uar;
502 u32 priv_pdn;
503 MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
504
505 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
506 struct ib_ah *sm_ah[MLX4_MAX_PORTS];
507 spinlock_t sm_lock;
1ffeb2eb 508 struct mlx4_ib_sriov sriov;
225c7b1f
RD		 509
510 struct mutex cap_mask_mutex;
3b4a8cd5 511 bool ib_active;
fa417f7b 512 struct mlx4_ib_iboe iboe;
cfcde11c 513 int counters[MLX4_MAX_PORTS];
e605b743
SP		 514 int *eq_table;
515 int eq_added;
c1e7e466
JM		 516 struct kobject *iov_parent;
517 struct kobject *ports_parent;
518 struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
519 struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
fc06573d 520 struct pkey_mgt pkeys;
c1c98501
MB		 521 unsigned long *ib_uc_qpns_bitmap;
522 int steer_qpn_count;
523 int steer_qpn_base;
0a9b7d59 524 int steering_support;
225c7b1f
RD		 525};
526
00f5ce99
JM		 527struct ib_event_work {
528 struct work_struct work;
529 struct mlx4_ib_dev *ib_dev;
530 struct mlx4_eqe ib_eqe;
531};
532
1ffeb2eb
JM		 533struct mlx4_ib_qp_tunnel_init_attr {
534 struct ib_qp_init_attr init_attr;
535 int slave;
536 enum ib_qp_type proxy_qp_type;
537 u8 port;
538};
539
225c7b1f
RD		 540static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
541{
542 return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
543}
544
545static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
546{
547 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
548}
549
550static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
551{
552 return container_of(ibpd, struct mlx4_ib_pd, ibpd);
553}
554
012a8ff5
SH		 555static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
556{
557 return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
558}
559
225c7b1f
RD		 560static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
561{
562 return container_of(ibcq, struct mlx4_ib_cq, ibcq);
563}
564
565static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
566{
567 return container_of(mcq, struct mlx4_ib_cq, mcq);
568}
569
570static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
571{
572 return container_of(ibmr, struct mlx4_ib_mr, ibmr);
573}
574
804d6a89
SM		 575static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
576{
577 return container_of(ibmw, struct mlx4_ib_mw, ibmw);
578}
579
95d04f07
RD		 580static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
581{
582 return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
583}
584
8ad11fb6
JM		 585static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
586{
587 return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
588}
f77c0162
HHZ		 589
590static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
591{
592 return container_of(ibflow, struct mlx4_ib_flow, ibflow);
593}
594
225c7b1f
RD		 595static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
596{
597 return container_of(ibqp, struct mlx4_ib_qp, ibqp);
598}
599
600static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
601{
602 return container_of(mqp, struct mlx4_ib_qp, mqp);
603}
604
605static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
606{
607 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
608}
609
610static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
611{
612 return container_of(msrq, struct mlx4_ib_srq, msrq);
613}
614
615static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
616{
617 return container_of(ibah, struct mlx4_ib_ah, ibah);
618}
619
fc06573d
JM		 620int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
621void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
622
225c7b1f 623int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c
YP		 624 struct mlx4_db *db);
625void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
225c7b1f
RD		 626
627struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
628int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
629 struct ib_umem *umem);
630struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
631 u64 virt_addr, int access_flags,
632 struct ib_udata *udata);
633int mlx4_ib_dereg_mr(struct ib_mr *mr);
804d6a89 634struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
6ff63e19
SM		 635int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
636 struct ib_mw_bind *mw_bind);
804d6a89 637int mlx4_ib_dealloc_mw(struct ib_mw *mw);
95d04f07
RD		 638struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
639 int max_page_list_len);
640struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
641 int page_list_len);
642void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f 643
3fdcb97f 644int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1 645int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
225c7b1f
RD		 646struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
647 struct ib_ucontext *context,
648 struct ib_udata *udata);
649int mlx4_ib_destroy_cq(struct ib_cq *cq);
650int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
651int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
652void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
653void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
654
655struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
656int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
657int mlx4_ib_destroy_ah(struct ib_ah *ah);
658
659struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
660 struct ib_srq_init_attr *init_attr,
661 struct ib_udata *udata);
662int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
663 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7 664int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
225c7b1f
RD		 665int mlx4_ib_destroy_srq(struct ib_srq *srq);
666void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
667int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
668 struct ib_recv_wr **bad_wr);
669
670struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
671 struct ib_qp_init_attr *init_attr,
672 struct ib_udata *udata);
673int mlx4_ib_destroy_qp(struct ib_qp *qp);
674int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
675 int attr_mask, struct ib_udata *udata);
6a775e2b
JM		 676int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
677 struct ib_qp_init_attr *qp_init_attr);
225c7b1f
RD		 678int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
679 struct ib_send_wr **bad_wr);
680int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
681 struct ib_recv_wr **bad_wr);
682
0a9a0188 683int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
225c7b1f
RD		 684 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
685 void *in_mad, void *response_mad);
686int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
687 struct ib_wc *in_wc, struct ib_grh *in_grh,
688 struct ib_mad *in_mad, struct ib_mad *out_mad);
689int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
690void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
691
8ad11fb6
JM		 692struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
693 struct ib_fmr_attr *fmr_attr);
694int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
695 u64 iova);
696int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
697int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188
JM		 698int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
699 struct ib_port_attr *props, int netw_view);
700int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
701 u16 *pkey, int netw_view);
8ad11fb6 702
a0c64a17
JM		 703int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
704 union ib_gid *gid, int netw_view);
705
a29bec12 706static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f 707{
fa417f7b
EC		 708 u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
709
710 if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
a29bec12 711 return true;
fa417f7b
EC		 712
713 return !!(ah->av.ib.g_slid & 0x80);
225c7b1f
RD		 714}
715
b9c5d6a6
OD		 716int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
717void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
718void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
719int mlx4_ib_mcg_init(void);
720void mlx4_ib_mcg_destroy(void);
721
722int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
723
724int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
725 struct ib_sa_mad *sa_mad);
726int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
727 struct ib_sa_mad *mad);
728
fa417f7b
EC		 729int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
730 union ib_gid *gid);
731
00f5ce99
JM		 732void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
733 enum ib_event_type type);
734
fc06573d
JM		 735void mlx4_ib_tunnels_update_work(struct work_struct *work);
736
b9c5d6a6
OD		 737int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
738 enum ib_qp_type qpt, struct ib_wc *wc,
739 struct ib_grh *grh, struct ib_mad *mad);
5ea8bbfc 740
b9c5d6a6
OD		 741int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
742 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
5ea8bbfc
JM		 743 u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
744 struct ib_mad *mad);
745
b9c5d6a6
OD		 746__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
747
3cf69cc8
AV		 748int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
749 struct ib_mad *mad);
750
751int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
752 struct ib_mad *mad);
753
754void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
755void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
756
a0c64a17
JM		 757/* alias guid support */
758void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
759int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
760void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
761void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
762
763void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
764 int block_num,
765 u8 port_num, u8 *p_data);
766
767void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
768 int block_num, u8 port_num,
769 u8 *p_data);
770
c1e7e466
JM		 771int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
772 struct attribute *attr);
773void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
774 struct attribute *attr);
775ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
776
777int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
778
779void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
780
afa8fd1d
JM		 781__be64 mlx4_ib_gen_node_guid(void);
782
c1c98501
MB		 783int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
784void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
785int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
786 int is_attach);
afa8fd1d 787
225c7b1f 788#endif /* MLX4_IB_H */
Linux kernel - Deliverables
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