IB/cma: IBoE (RoCE) IP-based GID addressing
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h
CommitLineData
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1/*
2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef MLX4_IB_H
35#define MLX4_IB_H
36
37#include <linux/compiler.h>
38#include <linux/list.h>
63019d93 39#include <linux/mutex.h>
b9c5d6a6 40#include <linux/idr.h>
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41
42#include <rdma/ib_verbs.h>
43#include <rdma/ib_umem.h>
b9c5d6a6 44#include <rdma/ib_mad.h>
a0c64a17 45#include <rdma/ib_sa.h>
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46
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/doorbell.h>
49
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50#define MLX4_IB_DRV_NAME "mlx4_ib"
51
52#ifdef pr_fmt
53#undef pr_fmt
54#endif
55#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
56
57#define mlx4_ib_warn(ibdev, format, arg...) \
58 dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
59
fc2d0044
SG
60enum {
61 MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
62 MLX4_IB_MAX_HEADROOM = 2048
63};
64
65#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
66#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
67
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68/*module param to indicate if SM assigns the alias_GUID*/
69extern int mlx4_ib_sm_guid_assign;
70
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71struct mlx4_ib_ucontext {
72 struct ib_ucontext ibucontext;
73 struct mlx4_uar uar;
74 struct list_head db_page_list;
75 struct mutex db_page_mutex;
76};
77
78struct mlx4_ib_pd {
79 struct ib_pd ibpd;
80 u32 pdn;
81};
82
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83struct mlx4_ib_xrcd {
84 struct ib_xrcd ibxrcd;
85 u32 xrcdn;
86 struct ib_pd *pd;
87 struct ib_cq *cq;
88};
89
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90struct mlx4_ib_cq_buf {
91 struct mlx4_buf buf;
92 struct mlx4_mtt mtt;
08ff3235 93 int entry_size;
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94};
95
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96struct mlx4_ib_cq_resize {
97 struct mlx4_ib_cq_buf buf;
98 int cqe;
99};
100
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101struct mlx4_ib_cq {
102 struct ib_cq ibcq;
103 struct mlx4_cq mcq;
104 struct mlx4_ib_cq_buf buf;
bbf8eed1 105 struct mlx4_ib_cq_resize *resize_buf;
6296883c 106 struct mlx4_db db;
225c7b1f 107 spinlock_t lock;
bbf8eed1 108 struct mutex resize_mutex;
225c7b1f 109 struct ib_umem *umem;
bbf8eed1 110 struct ib_umem *resize_umem;
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111};
112
113struct mlx4_ib_mr {
114 struct ib_mr ibmr;
115 struct mlx4_mr mmr;
116 struct ib_umem *umem;
117};
118
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119struct mlx4_ib_mw {
120 struct ib_mw ibmw;
121 struct mlx4_mw mmw;
122};
123
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124struct mlx4_ib_fast_reg_page_list {
125 struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b 126 __be64 *mapped_page_list;
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127 dma_addr_t map;
128};
129
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130struct mlx4_ib_fmr {
131 struct ib_fmr ibfmr;
132 struct mlx4_fmr mfmr;
133};
134
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135struct mlx4_ib_flow {
136 struct ib_flow ibflow;
137 /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
138 u64 reg_id[2];
139};
140
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141struct mlx4_ib_wq {
142 u64 *wrid;
143 spinlock_t lock;
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144 int wqe_cnt;
145 int max_post;
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146 int max_gs;
147 int offset;
148 int wqe_shift;
149 unsigned head;
150 unsigned tail;
151};
152
b832be1e 153enum mlx4_ib_qp_flags {
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154 MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
155 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
156 MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
157 MLX4_IB_SRIOV_SQP = 1 << 31,
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158};
159
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160struct mlx4_ib_gid_entry {
161 struct list_head list;
162 union ib_gid gid;
163 int added;
164 u8 port;
165};
166
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167enum mlx4_ib_qp_type {
168 /*
169 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
170 * here (and in that order) since the MAD layer uses them as
171 * indices into a 2-entry table.
172 */
173 MLX4_IB_QPT_SMI = IB_QPT_SMI,
174 MLX4_IB_QPT_GSI = IB_QPT_GSI,
175
176 MLX4_IB_QPT_RC = IB_QPT_RC,
177 MLX4_IB_QPT_UC = IB_QPT_UC,
178 MLX4_IB_QPT_UD = IB_QPT_UD,
179 MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
180 MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
181 MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
182 MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
183 MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
184
185 MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
186 MLX4_IB_QPT_PROXY_SMI = 1 << 17,
187 MLX4_IB_QPT_PROXY_GSI = 1 << 18,
188 MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
189 MLX4_IB_QPT_TUN_SMI = 1 << 20,
190 MLX4_IB_QPT_TUN_GSI = 1 << 21,
191};
192
193#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
194 MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
195 MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
196
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197enum mlx4_ib_mad_ifc_flags {
198 MLX4_MAD_IFC_IGNORE_MKEY = 1,
199 MLX4_MAD_IFC_IGNORE_BKEY = 2,
200 MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
201 MLX4_MAD_IFC_IGNORE_BKEY),
202 MLX4_MAD_IFC_NET_VIEW = 4,
203};
204
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205enum {
206 MLX4_NUM_TUNNEL_BUFS = 256,
207};
208
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209struct mlx4_ib_tunnel_header {
210 struct mlx4_av av;
211 __be32 remote_qpn;
212 __be32 qkey;
213 __be16 vlan;
214 u8 mac[6];
215 __be16 pkey_index;
216 u8 reserved[6];
217};
218
219struct mlx4_ib_buf {
220 void *addr;
221 dma_addr_t map;
222};
223
224struct mlx4_rcv_tunnel_hdr {
225 __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
226 * 0x0 - no vlan was in the packet
227 * 0x01 - C-VLAN was in the packet */
228 u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
229 u8 reserved;
230 __be16 pkey_index;
231 __be16 sl_vid;
232 __be16 slid_mac_47_32;
233 __be32 mac_31_0;
234};
235
236struct mlx4_ib_proxy_sqp_hdr {
237 struct ib_grh grh;
238 struct mlx4_rcv_tunnel_hdr tun;
239} __packed;
240
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241struct mlx4_ib_qp {
242 struct ib_qp ibqp;
243 struct mlx4_qp mqp;
244 struct mlx4_buf buf;
245
6296883c 246 struct mlx4_db db;
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247 struct mlx4_ib_wq rq;
248
249 u32 doorbell_qpn;
250 __be32 sq_signal_bits;
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251 unsigned sq_next_wqe;
252 int sq_max_wqes_per_wr;
0e6e7416 253 int sq_spare_wqes;
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254 struct mlx4_ib_wq sq;
255
1ffeb2eb 256 enum mlx4_ib_qp_type mlx4_ib_qp_type;
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257 struct ib_umem *umem;
258 struct mlx4_mtt mtt;
259 int buf_size;
260 struct mutex mutex;
0a1405da 261 u16 xrcdn;
b832be1e 262 u32 flags;
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263 u8 port;
264 u8 alt_port;
265 u8 atomic_rd_en;
266 u8 resp_depth;
0e6e7416 267 u8 sq_no_prefetch;
225c7b1f 268 u8 state;
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269 int mlx_type;
270 struct list_head gid_list;
0ff1fb65 271 struct list_head steering_rules;
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272 struct mlx4_ib_buf *sqp_proxy_rcv;
273
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274};
275
276struct mlx4_ib_srq {
277 struct ib_srq ibsrq;
278 struct mlx4_srq msrq;
279 struct mlx4_buf buf;
6296883c 280 struct mlx4_db db;
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281 u64 *wrid;
282 spinlock_t lock;
283 int head;
284 int tail;
285 u16 wqe_ctr;
286 struct ib_umem *umem;
287 struct mlx4_mtt mtt;
288 struct mutex mutex;
289};
290
291struct mlx4_ib_ah {
292 struct ib_ah ibah;
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293 union mlx4_ext_av av;
294};
295
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296/****************************************/
297/* alias guid support */
298/****************************************/
299#define NUM_PORT_ALIAS_GUID 2
300#define NUM_ALIAS_GUID_IN_REC 8
301#define NUM_ALIAS_GUID_REC_IN_PORT 16
302#define GUID_REC_SIZE 8
303#define NUM_ALIAS_GUID_PER_PORT 128
304#define MLX4_NOT_SET_GUID (0x00LL)
305#define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
306
307enum mlx4_guid_alias_rec_status {
308 MLX4_GUID_INFO_STATUS_IDLE,
309 MLX4_GUID_INFO_STATUS_SET,
310 MLX4_GUID_INFO_STATUS_PENDING,
311};
312
313enum mlx4_guid_alias_rec_ownership {
314 MLX4_GUID_DRIVER_ASSIGN,
315 MLX4_GUID_SYSADMIN_ASSIGN,
316 MLX4_GUID_NONE_ASSIGN, /*init state of each record*/
317};
318
319enum mlx4_guid_alias_rec_method {
320 MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
321 MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
322};
323
324struct mlx4_sriov_alias_guid_info_rec_det {
325 u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
326 ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
327 enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
328 u8 method; /*set or delete*/
329 enum mlx4_guid_alias_rec_ownership ownership; /*indicates who assign that alias_guid record*/
330};
331
332struct mlx4_sriov_alias_guid_port_rec_det {
333 struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
334 struct workqueue_struct *wq;
335 struct delayed_work alias_guid_work;
336 u8 port;
337 struct mlx4_sriov_alias_guid *parent;
338 struct list_head cb_list;
339};
340
341struct mlx4_sriov_alias_guid {
342 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
343 spinlock_t ag_work_lock;
344 struct ib_sa_client *sa_client;
345};
346
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347struct mlx4_ib_demux_work {
348 struct work_struct work;
349 struct mlx4_ib_dev *dev;
350 int slave;
351 int do_init;
352 u8 port;
353
354};
355
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356struct mlx4_ib_tun_tx_buf {
357 struct mlx4_ib_buf buf;
358 struct ib_ah *ah;
359};
360
361struct mlx4_ib_demux_pv_qp {
362 struct ib_qp *qp;
363 enum ib_qp_type proxy_qpt;
364 struct mlx4_ib_buf *ring;
365 struct mlx4_ib_tun_tx_buf *tx_ring;
366 spinlock_t tx_lock;
367 unsigned tx_ix_head;
368 unsigned tx_ix_tail;
369};
370
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371enum mlx4_ib_demux_pv_state {
372 DEMUX_PV_STATE_DOWN,
373 DEMUX_PV_STATE_STARTING,
374 DEMUX_PV_STATE_ACTIVE,
375 DEMUX_PV_STATE_DOWNING,
376};
377
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378struct mlx4_ib_demux_pv_ctx {
379 int port;
380 int slave;
fc06573d 381 enum mlx4_ib_demux_pv_state state;
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382 int has_smi;
383 struct ib_device *ib_dev;
384 struct ib_cq *cq;
385 struct ib_pd *pd;
386 struct ib_mr *mr;
387 struct work_struct work;
388 struct workqueue_struct *wq;
389 struct mlx4_ib_demux_pv_qp qp[2];
390};
391
392struct mlx4_ib_demux_ctx {
393 struct ib_device *ib_dev;
394 int port;
395 struct workqueue_struct *wq;
396 struct workqueue_struct *ud_wq;
397 spinlock_t ud_lock;
398 __be64 subnet_prefix;
399 __be64 guid_cache[128];
400 struct mlx4_ib_dev *dev;
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OD
401 /* the following lock protects both mcg_table and mcg_mgid0_list */
402 struct mutex mcg_table_lock;
403 struct rb_root mcg_table;
404 struct list_head mcg_mgid0_list;
405 struct workqueue_struct *mcg_wq;
1ffeb2eb 406 struct mlx4_ib_demux_pv_ctx **tun;
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407 atomic_t tid;
408 int flushing; /* flushing the work queue */
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409};
410
411struct mlx4_ib_sriov {
412 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
413 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
414 /* when using this spinlock you should use "irq" because
415 * it may be called from interrupt context.*/
416 spinlock_t going_down_lock;
417 int is_going_down;
3cf69cc8 418
a0c64a17
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419 struct mlx4_sriov_alias_guid alias_guid;
420
3cf69cc8
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421 /* CM paravirtualization fields */
422 struct list_head cm_list;
423 spinlock_t id_map_lock;
424 struct rb_root sl_id_map;
425 struct idr pv_id_table;
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426};
427
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428struct mlx4_ib_iboe {
429 spinlock_t lock;
430 struct net_device *netdevs[MLX4_MAX_PORTS];
431 struct notifier_block nb;
432 union ib_gid gid_table[MLX4_MAX_PORTS][128];
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433};
434
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435struct pkey_mgt {
436 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
437 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
438 struct list_head pkey_port_list[MLX4_MFUNC_MAX];
439 struct kobject *device_parent[MLX4_MFUNC_MAX];
440};
441
c1e7e466
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442struct mlx4_ib_iov_sysfs_attr {
443 void *ctx;
444 struct kobject *kobj;
445 unsigned long data;
446 u32 entry_num;
447 char name[15];
448 struct device_attribute dentry;
449 struct device *dev;
450};
451
452struct mlx4_ib_iov_sysfs_attr_ar {
453 struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
454};
455
456struct mlx4_ib_iov_port {
457 char name[100];
458 u8 num;
459 struct mlx4_ib_dev *dev;
460 struct list_head list;
461 struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
462 struct ib_port_attr attr;
463 struct kobject *cur_port;
464 struct kobject *admin_alias_parent;
465 struct kobject *gids_parent;
466 struct kobject *pkeys_parent;
467 struct kobject *mcgs_parent;
468 struct mlx4_ib_iov_sysfs_attr mcg_dentry;
469};
470
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471struct mlx4_ib_dev {
472 struct ib_device ib_dev;
473 struct mlx4_dev *dev;
7ff93f8b 474 int num_ports;
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475 void __iomem *uar_map;
476
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477 struct mlx4_uar priv_uar;
478 u32 priv_pdn;
479 MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
480
481 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
482 struct ib_ah *sm_ah[MLX4_MAX_PORTS];
483 spinlock_t sm_lock;
1ffeb2eb 484 struct mlx4_ib_sriov sriov;
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485
486 struct mutex cap_mask_mutex;
3b4a8cd5 487 bool ib_active;
fa417f7b 488 struct mlx4_ib_iboe iboe;
cfcde11c 489 int counters[MLX4_MAX_PORTS];
e605b743
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490 int *eq_table;
491 int eq_added;
c1e7e466
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492 struct kobject *iov_parent;
493 struct kobject *ports_parent;
494 struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
495 struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
fc06573d 496 struct pkey_mgt pkeys;
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497};
498
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499struct ib_event_work {
500 struct work_struct work;
501 struct mlx4_ib_dev *ib_dev;
502 struct mlx4_eqe ib_eqe;
503};
504
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505struct mlx4_ib_qp_tunnel_init_attr {
506 struct ib_qp_init_attr init_attr;
507 int slave;
508 enum ib_qp_type proxy_qp_type;
509 u8 port;
510};
511
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512static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
513{
514 return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
515}
516
517static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
518{
519 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
520}
521
522static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
523{
524 return container_of(ibpd, struct mlx4_ib_pd, ibpd);
525}
526
012a8ff5
SH
527static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
528{
529 return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
530}
531
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532static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
533{
534 return container_of(ibcq, struct mlx4_ib_cq, ibcq);
535}
536
537static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
538{
539 return container_of(mcq, struct mlx4_ib_cq, mcq);
540}
541
542static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
543{
544 return container_of(ibmr, struct mlx4_ib_mr, ibmr);
545}
546
804d6a89
SM
547static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
548{
549 return container_of(ibmw, struct mlx4_ib_mw, ibmw);
550}
551
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552static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
553{
554 return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
555}
556
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557static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
558{
559 return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
560}
f77c0162
HHZ
561
562static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
563{
564 return container_of(ibflow, struct mlx4_ib_flow, ibflow);
565}
566
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567static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
568{
569 return container_of(ibqp, struct mlx4_ib_qp, ibqp);
570}
571
572static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
573{
574 return container_of(mqp, struct mlx4_ib_qp, mqp);
575}
576
577static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
578{
579 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
580}
581
582static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
583{
584 return container_of(msrq, struct mlx4_ib_srq, msrq);
585}
586
587static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
588{
589 return container_of(ibah, struct mlx4_ib_ah, ibah);
590}
591
fc06573d
JM
592int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
593void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
594
225c7b1f 595int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c
YP
596 struct mlx4_db *db);
597void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
225c7b1f
RD
598
599struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
600int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
601 struct ib_umem *umem);
602struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
603 u64 virt_addr, int access_flags,
604 struct ib_udata *udata);
605int mlx4_ib_dereg_mr(struct ib_mr *mr);
804d6a89 606struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
6ff63e19
SM
607int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
608 struct ib_mw_bind *mw_bind);
804d6a89 609int mlx4_ib_dealloc_mw(struct ib_mw *mw);
95d04f07
RD
610struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
611 int max_page_list_len);
612struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
613 int page_list_len);
614void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f 615
3fdcb97f 616int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1 617int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
225c7b1f
RD
618struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
619 struct ib_ucontext *context,
620 struct ib_udata *udata);
621int mlx4_ib_destroy_cq(struct ib_cq *cq);
622int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
623int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
624void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
625void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
626
627struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
628int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
629int mlx4_ib_destroy_ah(struct ib_ah *ah);
630
631struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
632 struct ib_srq_init_attr *init_attr,
633 struct ib_udata *udata);
634int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
635 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7 636int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
225c7b1f
RD
637int mlx4_ib_destroy_srq(struct ib_srq *srq);
638void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
639int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
640 struct ib_recv_wr **bad_wr);
641
642struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
643 struct ib_qp_init_attr *init_attr,
644 struct ib_udata *udata);
645int mlx4_ib_destroy_qp(struct ib_qp *qp);
646int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
647 int attr_mask, struct ib_udata *udata);
6a775e2b
JM
648int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
649 struct ib_qp_init_attr *qp_init_attr);
225c7b1f
RD
650int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
651 struct ib_send_wr **bad_wr);
652int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
653 struct ib_recv_wr **bad_wr);
654
0a9a0188 655int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
225c7b1f
RD
656 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
657 void *in_mad, void *response_mad);
658int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
659 struct ib_wc *in_wc, struct ib_grh *in_grh,
660 struct ib_mad *in_mad, struct ib_mad *out_mad);
661int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
662void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
663
8ad11fb6
JM
664struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
665 struct ib_fmr_attr *fmr_attr);
666int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
667 u64 iova);
668int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
669int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188
JM
670int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
671 struct ib_port_attr *props, int netw_view);
672int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
673 u16 *pkey, int netw_view);
8ad11fb6 674
a0c64a17
JM
675int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
676 union ib_gid *gid, int netw_view);
677
fa417f7b
EC
678int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr,
679 u8 *mac, int *is_mcast, u8 port);
680
a29bec12 681static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f 682{
fa417f7b
EC
683 u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
684
685 if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
a29bec12 686 return true;
fa417f7b
EC
687
688 return !!(ah->av.ib.g_slid & 0x80);
225c7b1f
RD
689}
690
b9c5d6a6
OD
691int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
692void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
693void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
694int mlx4_ib_mcg_init(void);
695void mlx4_ib_mcg_destroy(void);
696
697int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
698
699int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
700 struct ib_sa_mad *sa_mad);
701int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
702 struct ib_sa_mad *mad);
703
fa417f7b
EC
704int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
705 union ib_gid *gid);
706
00f5ce99
JM
707void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
708 enum ib_event_type type);
709
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JM
710void mlx4_ib_tunnels_update_work(struct work_struct *work);
711
b9c5d6a6
OD
712int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
713 enum ib_qp_type qpt, struct ib_wc *wc,
714 struct ib_grh *grh, struct ib_mad *mad);
715int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
716 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
717 u32 qkey, struct ib_ah_attr *attr, struct ib_mad *mad);
718__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
719
3cf69cc8
AV
720int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
721 struct ib_mad *mad);
722
723int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
724 struct ib_mad *mad);
725
726void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
727void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
728
a0c64a17
JM
729/* alias guid support */
730void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
731int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
732void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
733void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
734
735void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
736 int block_num,
737 u8 port_num, u8 *p_data);
738
739void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
740 int block_num, u8 port_num,
741 u8 *p_data);
742
c1e7e466
JM
743int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
744 struct attribute *attr);
745void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
746 struct attribute *attr);
747ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
748
749int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
750
751void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
752
afa8fd1d
JM
753__be64 mlx4_ib_gen_node_guid(void);
754
755
225c7b1f 756#endif /* MLX4_IB_H */
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