[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h

/*
 * Copyright (c) 2006, 2007 Cisco Systems.  All rights reserved.
 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef MLX4_IB_H
#define MLX4_IB_H

#include <linux/compiler.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/idr.h>

#include <rdma/ib_verbs.h>
#include <rdma/ib_umem.h>
#include <rdma/ib_mad.h>

#include <linux/mlx4/device.h>
#include <linux/mlx4/doorbell.h>

#define MLX4_IB_DRV_NAME	"mlx4_ib"

#ifdef pr_fmt
#undef pr_fmt
#endif
#define pr_fmt(fmt)	"<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__

#define mlx4_ib_warn(ibdev, format, arg...) \
	dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)

enum {
	MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
	MLX4_IB_MAX_HEADROOM	 = 2048
};

#define MLX4_IB_SQ_HEADROOM(shift)	((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
#define MLX4_IB_SQ_MAX_SPARE		(MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))

struct mlx4_ib_ucontext {
	struct ib_ucontext	ibucontext;
	struct mlx4_uar		uar;
	struct list_head	db_page_list;
	struct mutex		db_page_mutex;
};

struct mlx4_ib_pd {
	struct ib_pd		ibpd;
	u32			pdn;
};

struct mlx4_ib_xrcd {
	struct ib_xrcd		ibxrcd;
	u32			xrcdn;
	struct ib_pd	       *pd;
	struct ib_cq	       *cq;
};

struct mlx4_ib_cq_buf {
	struct mlx4_buf		buf;
	struct mlx4_mtt		mtt;
};

struct mlx4_ib_cq_resize {
	struct mlx4_ib_cq_buf	buf;
	int			cqe;
};

struct mlx4_ib_cq {
	struct ib_cq		ibcq;
	struct mlx4_cq		mcq;
	struct mlx4_ib_cq_buf	buf;
	struct mlx4_ib_cq_resize *resize_buf;
	struct mlx4_db		db;
	spinlock_t		lock;
	struct mutex		resize_mutex;
	struct ib_umem	       *umem;
	struct ib_umem	       *resize_umem;
};

struct mlx4_ib_mr {
	struct ib_mr		ibmr;
	struct mlx4_mr		mmr;
	struct ib_umem	       *umem;
};

struct mlx4_ib_fast_reg_page_list {
	struct ib_fast_reg_page_list	ibfrpl;
	__be64			       *mapped_page_list;
	dma_addr_t			map;
};

struct mlx4_ib_fmr {
	struct ib_fmr           ibfmr;
	struct mlx4_fmr         mfmr;
};

struct mlx4_ib_wq {
	u64		       *wrid;
	spinlock_t		lock;
	int			wqe_cnt;
	int			max_post;
	int			max_gs;
	int			offset;
	int			wqe_shift;
	unsigned		head;
	unsigned		tail;
};

enum mlx4_ib_qp_flags {
	MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
	MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
	MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
	MLX4_IB_SRIOV_SQP = 1 << 31,
};

struct mlx4_ib_gid_entry {
	struct list_head	list;
	union ib_gid		gid;
	int			added;
	u8			port;
};

enum mlx4_ib_qp_type {
	/*
	 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
	 * here (and in that order) since the MAD layer uses them as
	 * indices into a 2-entry table.
	 */
	MLX4_IB_QPT_SMI = IB_QPT_SMI,
	MLX4_IB_QPT_GSI = IB_QPT_GSI,

	MLX4_IB_QPT_RC = IB_QPT_RC,
	MLX4_IB_QPT_UC = IB_QPT_UC,
	MLX4_IB_QPT_UD = IB_QPT_UD,
	MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
	MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
	MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
	MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
	MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,

	MLX4_IB_QPT_PROXY_SMI_OWNER	= 1 << 16,
	MLX4_IB_QPT_PROXY_SMI		= 1 << 17,
	MLX4_IB_QPT_PROXY_GSI		= 1 << 18,
	MLX4_IB_QPT_TUN_SMI_OWNER	= 1 << 19,
	MLX4_IB_QPT_TUN_SMI		= 1 << 20,
	MLX4_IB_QPT_TUN_GSI		= 1 << 21,
};

#define MLX4_IB_QPT_ANY_SRIOV	(MLX4_IB_QPT_PROXY_SMI_OWNER | \
	MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
	MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)

enum mlx4_ib_mad_ifc_flags {
	MLX4_MAD_IFC_IGNORE_MKEY	= 1,
	MLX4_MAD_IFC_IGNORE_BKEY	= 2,
	MLX4_MAD_IFC_IGNORE_KEYS	= (MLX4_MAD_IFC_IGNORE_MKEY |
					   MLX4_MAD_IFC_IGNORE_BKEY),
	MLX4_MAD_IFC_NET_VIEW		= 4,
};

enum {
	MLX4_NUM_TUNNEL_BUFS		= 256,
};

struct mlx4_ib_tunnel_header {
	struct mlx4_av av;
	__be32 remote_qpn;
	__be32 qkey;
	__be16 vlan;
	u8 mac[6];
	__be16 pkey_index;
	u8 reserved[6];
};

struct mlx4_ib_buf {
	void *addr;
	dma_addr_t map;
};

struct mlx4_rcv_tunnel_hdr {
	__be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
			      * 0x0 - no vlan was in the packet
			      * 0x01 - C-VLAN was in the packet */
	u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
	u8 reserved;
	__be16 pkey_index;
	__be16 sl_vid;
	__be16 slid_mac_47_32;
	__be32 mac_31_0;
};

struct mlx4_ib_proxy_sqp_hdr {
	struct ib_grh grh;
	struct mlx4_rcv_tunnel_hdr tun;
}  __packed;

struct mlx4_ib_qp {
	struct ib_qp		ibqp;
	struct mlx4_qp		mqp;
	struct mlx4_buf		buf;

	struct mlx4_db		db;
	struct mlx4_ib_wq	rq;

	u32			doorbell_qpn;
	__be32			sq_signal_bits;
	unsigned		sq_next_wqe;
	int			sq_max_wqes_per_wr;
	int			sq_spare_wqes;
	struct mlx4_ib_wq	sq;

	enum mlx4_ib_qp_type	mlx4_ib_qp_type;
	struct ib_umem	       *umem;
	struct mlx4_mtt		mtt;
	int			buf_size;
	struct mutex		mutex;
	u16			xrcdn;
	u32			flags;
	u8			port;
	u8			alt_port;
	u8			atomic_rd_en;
	u8			resp_depth;
	u8			sq_no_prefetch;
	u8			state;
	int			mlx_type;
	struct list_head	gid_list;
	struct list_head	steering_rules;
	struct mlx4_ib_buf	*sqp_proxy_rcv;

};

struct mlx4_ib_srq {
	struct ib_srq		ibsrq;
	struct mlx4_srq		msrq;
	struct mlx4_buf		buf;
	struct mlx4_db		db;
	u64		       *wrid;
	spinlock_t		lock;
	int			head;
	int			tail;
	u16			wqe_ctr;
	struct ib_umem	       *umem;
	struct mlx4_mtt		mtt;
	struct mutex		mutex;
};

struct mlx4_ib_ah {
	struct ib_ah		ibah;
	union mlx4_ext_av       av;
};

struct mlx4_ib_demux_work {
	struct work_struct	work;
	struct mlx4_ib_dev     *dev;
	int			slave;
	int			do_init;
	u8			port;

};

struct mlx4_ib_tun_tx_buf {
	struct mlx4_ib_buf buf;
	struct ib_ah *ah;
};

struct mlx4_ib_demux_pv_qp {
	struct ib_qp *qp;
	enum ib_qp_type proxy_qpt;
	struct mlx4_ib_buf *ring;
	struct mlx4_ib_tun_tx_buf *tx_ring;
	spinlock_t tx_lock;
	unsigned tx_ix_head;
	unsigned tx_ix_tail;
};

enum mlx4_ib_demux_pv_state {
	DEMUX_PV_STATE_DOWN,
	DEMUX_PV_STATE_STARTING,
	DEMUX_PV_STATE_ACTIVE,
	DEMUX_PV_STATE_DOWNING,
};

struct mlx4_ib_demux_pv_ctx {
	int port;
	int slave;
	enum mlx4_ib_demux_pv_state state;
	int has_smi;
	struct ib_device *ib_dev;
	struct ib_cq *cq;
	struct ib_pd *pd;
	struct ib_mr *mr;
	struct work_struct work;
	struct workqueue_struct *wq;
	struct mlx4_ib_demux_pv_qp qp[2];
};

struct mlx4_ib_demux_ctx {
	struct ib_device *ib_dev;
	int port;
	struct workqueue_struct *wq;
	struct workqueue_struct *ud_wq;
	spinlock_t ud_lock;
	__be64 subnet_prefix;
	__be64 guid_cache[128];
	struct mlx4_ib_dev *dev;
	/* the following lock protects both mcg_table and mcg_mgid0_list */
	struct mutex		mcg_table_lock;
	struct rb_root		mcg_table;
	struct list_head	mcg_mgid0_list;
	struct workqueue_struct	*mcg_wq;
	struct mlx4_ib_demux_pv_ctx **tun;
	atomic_t tid;
	int    flushing; /* flushing the work queue */
};

struct mlx4_ib_sriov {
	struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
	struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
	/* when using this spinlock you should use "irq" because
	 * it may be called from interrupt context.*/
	spinlock_t going_down_lock;
	int is_going_down;
};

struct mlx4_ib_iboe {
	spinlock_t		lock;
	struct net_device      *netdevs[MLX4_MAX_PORTS];
	struct notifier_block 	nb;
	union ib_gid		gid_table[MLX4_MAX_PORTS][128];
};

struct pkey_mgt {
	u8			virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	u16			phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	struct list_head	pkey_port_list[MLX4_MFUNC_MAX];
	struct kobject	       *device_parent[MLX4_MFUNC_MAX];
};

struct mlx4_ib_dev {
	struct ib_device	ib_dev;
	struct mlx4_dev	       *dev;
	int			num_ports;
	void __iomem	       *uar_map;

	struct mlx4_uar		priv_uar;
	u32			priv_pdn;
	MLX4_DECLARE_DOORBELL_LOCK(uar_lock);

	struct ib_mad_agent    *send_agent[MLX4_MAX_PORTS][2];
	struct ib_ah	       *sm_ah[MLX4_MAX_PORTS];
	spinlock_t		sm_lock;
	struct mlx4_ib_sriov	sriov;

	struct mutex		cap_mask_mutex;
	bool			ib_active;
	struct mlx4_ib_iboe	iboe;
	int			counters[MLX4_MAX_PORTS];
	int		       *eq_table;
	int			eq_added;
	struct pkey_mgt		pkeys;
};

struct ib_event_work {
	struct work_struct	work;
	struct mlx4_ib_dev	*ib_dev;
	struct mlx4_eqe		ib_eqe;
};

struct mlx4_ib_qp_tunnel_init_attr {
	struct ib_qp_init_attr init_attr;
	int slave;
	enum ib_qp_type proxy_qp_type;
	u8 port;
};

static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
{
	return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
}

static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
{
	return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
}

static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
{
	return container_of(ibpd, struct mlx4_ib_pd, ibpd);
}

static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
{
	return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
}

static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
{
	return container_of(ibcq, struct mlx4_ib_cq, ibcq);
}

static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
{
	return container_of(mcq, struct mlx4_ib_cq, mcq);
}

static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
{
	return container_of(ibmr, struct mlx4_ib_mr, ibmr);
}

static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
{
	return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
}

static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
{
	return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
}
static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
{
	return container_of(ibqp, struct mlx4_ib_qp, ibqp);
}

static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
{
	return container_of(mqp, struct mlx4_ib_qp, mqp);
}

static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
{
	return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
}

static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
{
	return container_of(msrq, struct mlx4_ib_srq, msrq);
}

static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
{
	return container_of(ibah, struct mlx4_ib_ah, ibah);
}

int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);

int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
			struct mlx4_db *db);
void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);

struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
			   struct ib_umem *umem);
struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
				  u64 virt_addr, int access_flags,
				  struct ib_udata *udata);
int mlx4_ib_dereg_mr(struct ib_mr *mr);
struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
					int max_page_list_len);
struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
							       int page_list_len);
void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);

int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
				struct ib_ucontext *context,
				struct ib_udata *udata);
int mlx4_ib_destroy_cq(struct ib_cq *cq);
int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);

struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
int mlx4_ib_destroy_ah(struct ib_ah *ah);

struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
				  struct ib_srq_init_attr *init_attr,
				  struct ib_udata *udata);
int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
		       enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
int mlx4_ib_destroy_srq(struct ib_srq *srq);
void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
			  struct ib_recv_wr **bad_wr);

struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
				struct ib_qp_init_attr *init_attr,
				struct ib_udata *udata);
int mlx4_ib_destroy_qp(struct ib_qp *qp);
int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
		      int attr_mask, struct ib_udata *udata);
int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
		     struct ib_qp_init_attr *qp_init_attr);
int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
		      struct ib_send_wr **bad_wr);
int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
		      struct ib_recv_wr **bad_wr);

int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
		 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
		 void *in_mad, void *response_mad);
int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags,	u8 port_num,
			struct ib_wc *in_wc, struct ib_grh *in_grh,
			struct ib_mad *in_mad, struct ib_mad *out_mad);
int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);

struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
				  struct ib_fmr_attr *fmr_attr);
int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
			 u64 iova);
int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
			 struct ib_port_attr *props, int netw_view);
int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
			 u16 *pkey, int netw_view);

int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr,
			u8 *mac, int *is_mcast, u8 port);

static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
{
	u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;

	if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
		return 1;

	return !!(ah->av.ib.g_slid & 0x80);
}

int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
int mlx4_ib_mcg_init(void);
void mlx4_ib_mcg_destroy(void);

int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);

int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
				  struct ib_sa_mad *sa_mad);
int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
			      struct ib_sa_mad *mad);

int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
		   union ib_gid *gid);

void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
			    enum ib_event_type type);

void mlx4_ib_tunnels_update_work(struct work_struct *work);

int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
			  enum ib_qp_type qpt, struct ib_wc *wc,
			  struct ib_grh *grh, struct ib_mad *mad);
int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
			 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
			 u32 qkey, struct ib_ah_attr *attr, struct ib_mad *mad);
__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);

#endif /* MLX4_IB_H */
Commit	Line	Data
225c7b1f RD	1	/*
225c7b1f RD	2	* Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0	3	* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
	34	#ifndef MLX4_IB_H
	35	#define MLX4_IB_H
	36
	37	#include <linux/compiler.h>
	38	#include <linux/list.h>
63019d93	39	#include <linux/mutex.h>
b9c5d6a6	40	#include <linux/idr.h>
225c7b1f RD	41
	42	#include <rdma/ib_verbs.h>
	43	#include <rdma/ib_umem.h>
b9c5d6a6	44	#include <rdma/ib_mad.h>
225c7b1f RD	45
	46	#include <linux/mlx4/device.h>
	47	#include <linux/mlx4/doorbell.h>
	48
b1d8eb5a JM	49	#define MLX4_IB_DRV_NAME "mlx4_ib"
	50
	51	#ifdef pr_fmt
	52	#undef pr_fmt
	53	#endif
	54	#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
	55
	56	#define mlx4_ib_warn(ibdev, format, arg...) \
	57	dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
	58
fc2d0044 SG	59	enum {
	60	MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
	61	MLX4_IB_MAX_HEADROOM = 2048
	62	};
	63
	64	#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
	65	#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
	66
225c7b1f RD	67	struct mlx4_ib_ucontext {
	68	struct ib_ucontext ibucontext;
	69	struct mlx4_uar uar;
	70	struct list_head db_page_list;
	71	struct mutex db_page_mutex;
	72	};
	73
	74	struct mlx4_ib_pd {
	75	struct ib_pd ibpd;
	76	u32 pdn;
	77	};
	78
012a8ff5 SH	79	struct mlx4_ib_xrcd {
	80	struct ib_xrcd ibxrcd;
	81	u32 xrcdn;
	82	struct ib_pd *pd;
	83	struct ib_cq *cq;
	84	};
	85
225c7b1f RD	86	struct mlx4_ib_cq_buf {
	87	struct mlx4_buf buf;
	88	struct mlx4_mtt mtt;
	89	};
	90
bbf8eed1 VS	91	struct mlx4_ib_cq_resize {
	92	struct mlx4_ib_cq_buf buf;
	93	int cqe;
	94	};
	95
225c7b1f RD	96	struct mlx4_ib_cq {
	97	struct ib_cq ibcq;
	98	struct mlx4_cq mcq;
	99	struct mlx4_ib_cq_buf buf;
bbf8eed1	100	struct mlx4_ib_cq_resize *resize_buf;
6296883c	101	struct mlx4_db db;
225c7b1f	102	spinlock_t lock;
bbf8eed1	103	struct mutex resize_mutex;
225c7b1f	104	struct ib_umem *umem;
bbf8eed1	105	struct ib_umem *resize_umem;
225c7b1f RD	106	};
	107
	108	struct mlx4_ib_mr {
	109	struct ib_mr ibmr;
	110	struct mlx4_mr mmr;
	111	struct ib_umem *umem;
	112	};
	113
95d04f07 RD	114	struct mlx4_ib_fast_reg_page_list {
95d04f07 RD	115	struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b	116	__be64 *mapped_page_list;
95d04f07 RD	117	dma_addr_t map;
	118	};
	119
8ad11fb6 JM	120	struct mlx4_ib_fmr {
	121	struct ib_fmr ibfmr;
	122	struct mlx4_fmr mfmr;
	123	};
	124
225c7b1f RD	125	struct mlx4_ib_wq {
	126	u64 *wrid;
	127	spinlock_t lock;
0e6e7416 RD	128	int wqe_cnt;
0e6e7416 RD	129	int max_post;
225c7b1f RD	130	int max_gs;
	131	int offset;
	132	int wqe_shift;
	133	unsigned head;
	134	unsigned tail;
	135	};
	136
b832be1e	137	enum mlx4_ib_qp_flags {
1ffeb2eb JM	138	MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
	139	MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
	140	MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
	141	MLX4_IB_SRIOV_SQP = 1 << 31,
b832be1e EC	142	};
b832be1e EC	143
fa417f7b EC	144	struct mlx4_ib_gid_entry {
	145	struct list_head list;
	146	union ib_gid gid;
	147	int added;
	148	u8 port;
	149	};
	150
1ffeb2eb JM	151	enum mlx4_ib_qp_type {
	152	/*
	153	* IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
	154	* here (and in that order) since the MAD layer uses them as
	155	* indices into a 2-entry table.
	156	*/
	157	MLX4_IB_QPT_SMI = IB_QPT_SMI,
	158	MLX4_IB_QPT_GSI = IB_QPT_GSI,
	159
	160	MLX4_IB_QPT_RC = IB_QPT_RC,
	161	MLX4_IB_QPT_UC = IB_QPT_UC,
	162	MLX4_IB_QPT_UD = IB_QPT_UD,
	163	MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
	164	MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
	165	MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
	166	MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
	167	MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
	168
	169	MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
	170	MLX4_IB_QPT_PROXY_SMI = 1 << 17,
	171	MLX4_IB_QPT_PROXY_GSI = 1 << 18,
	172	MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
	173	MLX4_IB_QPT_TUN_SMI = 1 << 20,
	174	MLX4_IB_QPT_TUN_GSI = 1 << 21,
	175	};
	176
	177	#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER \| \
	178	MLX4_IB_QPT_PROXY_SMI \| MLX4_IB_QPT_PROXY_GSI \| MLX4_IB_QPT_TUN_SMI_OWNER \| \
	179	MLX4_IB_QPT_TUN_SMI \| MLX4_IB_QPT_TUN_GSI)
	180
0a9a0188 JM	181	enum mlx4_ib_mad_ifc_flags {
	182	MLX4_MAD_IFC_IGNORE_MKEY = 1,
	183	MLX4_MAD_IFC_IGNORE_BKEY = 2,
	184	MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY \|
	185	MLX4_MAD_IFC_IGNORE_BKEY),
	186	MLX4_MAD_IFC_NET_VIEW = 4,
	187	};
	188
fc06573d JM	189	enum {
	190	MLX4_NUM_TUNNEL_BUFS = 256,
	191	};
	192
1ffeb2eb JM	193	struct mlx4_ib_tunnel_header {
	194	struct mlx4_av av;
	195	__be32 remote_qpn;
	196	__be32 qkey;
	197	__be16 vlan;
	198	u8 mac[6];
	199	__be16 pkey_index;
	200	u8 reserved[6];
	201	};
	202
	203	struct mlx4_ib_buf {
	204	void *addr;
	205	dma_addr_t map;
	206	};
	207
	208	struct mlx4_rcv_tunnel_hdr {
	209	__be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
	210	* 0x0 - no vlan was in the packet
	211	* 0x01 - C-VLAN was in the packet */
	212	u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
	213	u8 reserved;
	214	__be16 pkey_index;
	215	__be16 sl_vid;
	216	__be16 slid_mac_47_32;
	217	__be32 mac_31_0;
	218	};
	219
	220	struct mlx4_ib_proxy_sqp_hdr {
	221	struct ib_grh grh;
	222	struct mlx4_rcv_tunnel_hdr tun;
	223	} __packed;
	224
225c7b1f RD	225	struct mlx4_ib_qp {
	226	struct ib_qp ibqp;
	227	struct mlx4_qp mqp;
	228	struct mlx4_buf buf;
	229
6296883c	230	struct mlx4_db db;
225c7b1f RD	231	struct mlx4_ib_wq rq;
	232
	233	u32 doorbell_qpn;
	234	__be32 sq_signal_bits;
ea54b10c JM	235	unsigned sq_next_wqe;
ea54b10c JM	236	int sq_max_wqes_per_wr;
0e6e7416	237	int sq_spare_wqes;
225c7b1f RD	238	struct mlx4_ib_wq sq;
225c7b1f RD	239
1ffeb2eb	240	enum mlx4_ib_qp_type mlx4_ib_qp_type;
225c7b1f RD	241	struct ib_umem *umem;
	242	struct mlx4_mtt mtt;
	243	int buf_size;
	244	struct mutex mutex;
0a1405da	245	u16 xrcdn;
b832be1e	246	u32 flags;
225c7b1f RD	247	u8 port;
	248	u8 alt_port;
	249	u8 atomic_rd_en;
	250	u8 resp_depth;
0e6e7416	251	u8 sq_no_prefetch;
225c7b1f	252	u8 state;
fa417f7b EC	253	int mlx_type;
fa417f7b EC	254	struct list_head gid_list;
0ff1fb65	255	struct list_head steering_rules;
1ffeb2eb JM	256	struct mlx4_ib_buf *sqp_proxy_rcv;
1ffeb2eb JM	257
225c7b1f RD	258	};
	259
	260	struct mlx4_ib_srq {
	261	struct ib_srq ibsrq;
	262	struct mlx4_srq msrq;
	263	struct mlx4_buf buf;
6296883c	264	struct mlx4_db db;
225c7b1f RD	265	u64 *wrid;
	266	spinlock_t lock;
	267	int head;
	268	int tail;
	269	u16 wqe_ctr;
	270	struct ib_umem *umem;
	271	struct mlx4_mtt mtt;
	272	struct mutex mutex;
	273	};
	274
	275	struct mlx4_ib_ah {
	276	struct ib_ah ibah;
fa417f7b EC	277	union mlx4_ext_av av;
	278	};
	279
fc06573d JM	280	struct mlx4_ib_demux_work {
	281	struct work_struct work;
	282	struct mlx4_ib_dev *dev;
	283	int slave;
	284	int do_init;
	285	u8 port;
	286
	287	};
	288
1ffeb2eb JM	289	struct mlx4_ib_tun_tx_buf {
	290	struct mlx4_ib_buf buf;
	291	struct ib_ah *ah;
	292	};
	293
	294	struct mlx4_ib_demux_pv_qp {
	295	struct ib_qp *qp;
	296	enum ib_qp_type proxy_qpt;
	297	struct mlx4_ib_buf *ring;
	298	struct mlx4_ib_tun_tx_buf *tx_ring;
	299	spinlock_t tx_lock;
	300	unsigned tx_ix_head;
	301	unsigned tx_ix_tail;
	302	};
	303
fc06573d JM	304	enum mlx4_ib_demux_pv_state {
	305	DEMUX_PV_STATE_DOWN,
	306	DEMUX_PV_STATE_STARTING,
	307	DEMUX_PV_STATE_ACTIVE,
	308	DEMUX_PV_STATE_DOWNING,
	309	};
	310
1ffeb2eb JM	311	struct mlx4_ib_demux_pv_ctx {
	312	int port;
	313	int slave;
fc06573d	314	enum mlx4_ib_demux_pv_state state;
1ffeb2eb JM	315	int has_smi;
	316	struct ib_device *ib_dev;
	317	struct ib_cq *cq;
	318	struct ib_pd *pd;
	319	struct ib_mr *mr;
	320	struct work_struct work;
	321	struct workqueue_struct *wq;
	322	struct mlx4_ib_demux_pv_qp qp[2];
	323	};
	324
	325	struct mlx4_ib_demux_ctx {
	326	struct ib_device *ib_dev;
	327	int port;
	328	struct workqueue_struct *wq;
	329	struct workqueue_struct *ud_wq;
	330	spinlock_t ud_lock;
	331	__be64 subnet_prefix;
	332	__be64 guid_cache[128];
	333	struct mlx4_ib_dev *dev;
b9c5d6a6 OD	334	/* the following lock protects both mcg_table and mcg_mgid0_list */
	335	struct mutex mcg_table_lock;
	336	struct rb_root mcg_table;
	337	struct list_head mcg_mgid0_list;
	338	struct workqueue_struct *mcg_wq;
1ffeb2eb	339	struct mlx4_ib_demux_pv_ctx **tun;
b9c5d6a6 OD	340	atomic_t tid;
b9c5d6a6 OD	341	int flushing; /* flushing the work queue */
1ffeb2eb JM	342	};
	343
	344	struct mlx4_ib_sriov {
	345	struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
	346	struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
	347	/* when using this spinlock you should use "irq" because
	348	* it may be called from interrupt context.*/
	349	spinlock_t going_down_lock;
	350	int is_going_down;
	351	};
	352
fa417f7b EC	353	struct mlx4_ib_iboe {
	354	spinlock_t lock;
	355	struct net_device *netdevs[MLX4_MAX_PORTS];
	356	struct notifier_block nb;
	357	union ib_gid gid_table[MLX4_MAX_PORTS][128];
225c7b1f RD	358	};
225c7b1f RD	359
fc06573d JM	360	struct pkey_mgt {
	361	u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	362	u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
	363	struct list_head pkey_port_list[MLX4_MFUNC_MAX];
	364	struct kobject *device_parent[MLX4_MFUNC_MAX];
	365	};
	366
225c7b1f RD	367	struct mlx4_ib_dev {
	368	struct ib_device ib_dev;
	369	struct mlx4_dev *dev;
7ff93f8b	370	int num_ports;
225c7b1f RD	371	void __iomem *uar_map;
225c7b1f RD	372
225c7b1f RD	373	struct mlx4_uar priv_uar;
	374	u32 priv_pdn;
	375	MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
	376
	377	struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
	378	struct ib_ah *sm_ah[MLX4_MAX_PORTS];
	379	spinlock_t sm_lock;
1ffeb2eb	380	struct mlx4_ib_sriov sriov;
225c7b1f RD	381
225c7b1f RD	382	struct mutex cap_mask_mutex;
3b4a8cd5	383	bool ib_active;
fa417f7b	384	struct mlx4_ib_iboe iboe;
cfcde11c	385	int counters[MLX4_MAX_PORTS];
e605b743 SP	386	int *eq_table;
e605b743 SP	387	int eq_added;
fc06573d	388	struct pkey_mgt pkeys;
225c7b1f RD	389	};
225c7b1f RD	390
00f5ce99 JM	391	struct ib_event_work {
	392	struct work_struct work;
	393	struct mlx4_ib_dev *ib_dev;
	394	struct mlx4_eqe ib_eqe;
	395	};
	396
1ffeb2eb JM	397	struct mlx4_ib_qp_tunnel_init_attr {
	398	struct ib_qp_init_attr init_attr;
	399	int slave;
	400	enum ib_qp_type proxy_qp_type;
	401	u8 port;
	402	};
	403
225c7b1f RD	404	static inline struct mlx4_ib_dev to_mdev(struct ib_device ibdev)
	405	{
	406	return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
	407	}
	408
	409	static inline struct mlx4_ib_ucontext to_mucontext(struct ib_ucontext ibucontext)
	410	{
	411	return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
	412	}
	413
	414	static inline struct mlx4_ib_pd to_mpd(struct ib_pd ibpd)
	415	{
	416	return container_of(ibpd, struct mlx4_ib_pd, ibpd);
	417	}
	418
012a8ff5 SH	419	static inline struct mlx4_ib_xrcd to_mxrcd(struct ib_xrcd ibxrcd)
	420	{
	421	return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
	422	}
	423
225c7b1f RD	424	static inline struct mlx4_ib_cq to_mcq(struct ib_cq ibcq)
	425	{
	426	return container_of(ibcq, struct mlx4_ib_cq, ibcq);
	427	}
	428
	429	static inline struct mlx4_ib_cq to_mibcq(struct mlx4_cq mcq)
	430	{
	431	return container_of(mcq, struct mlx4_ib_cq, mcq);
	432	}
	433
	434	static inline struct mlx4_ib_mr to_mmr(struct ib_mr ibmr)
	435	{
	436	return container_of(ibmr, struct mlx4_ib_mr, ibmr);
	437	}
	438
95d04f07 RD	439	static inline struct mlx4_ib_fast_reg_page_list to_mfrpl(struct ib_fast_reg_page_list ibfrpl)
	440	{
	441	return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
	442	}
	443
8ad11fb6 JM	444	static inline struct mlx4_ib_fmr to_mfmr(struct ib_fmr ibfmr)
	445	{
	446	return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
	447	}
225c7b1f RD	448	static inline struct mlx4_ib_qp to_mqp(struct ib_qp ibqp)
	449	{
	450	return container_of(ibqp, struct mlx4_ib_qp, ibqp);
	451	}
	452
	453	static inline struct mlx4_ib_qp to_mibqp(struct mlx4_qp mqp)
	454	{
	455	return container_of(mqp, struct mlx4_ib_qp, mqp);
	456	}
	457
	458	static inline struct mlx4_ib_srq to_msrq(struct ib_srq ibsrq)
	459	{
	460	return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
	461	}
	462
	463	static inline struct mlx4_ib_srq to_mibsrq(struct mlx4_srq msrq)
	464	{
	465	return container_of(msrq, struct mlx4_ib_srq, msrq);
	466	}
	467
	468	static inline struct mlx4_ib_ah to_mah(struct ib_ah ibah)
	469	{
	470	return container_of(ibah, struct mlx4_ib_ah, ibah);
	471	}
	472
fc06573d JM	473	int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
	474	void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
	475
225c7b1f	476	int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c YP	477	struct mlx4_db *db);
6296883c YP	478	void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext context, struct mlx4_db db);
225c7b1f RD	479
	480	struct ib_mr mlx4_ib_get_dma_mr(struct ib_pd pd, int acc);
	481	int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev dev, struct mlx4_mtt mtt,
	482	struct ib_umem *umem);
	483	struct ib_mr mlx4_ib_reg_user_mr(struct ib_pd pd, u64 start, u64 length,
	484	u64 virt_addr, int access_flags,
	485	struct ib_udata *udata);
	486	int mlx4_ib_dereg_mr(struct ib_mr *mr);
95d04f07 RD	487	struct ib_mr mlx4_ib_alloc_fast_reg_mr(struct ib_pd pd,
	488	int max_page_list_len);
	489	struct ib_fast_reg_page_list mlx4_ib_alloc_fast_reg_page_list(struct ib_device ibdev,
	490	int page_list_len);
	491	void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f	492
3fdcb97f	493	int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1	494	int mlx4_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata);
225c7b1f RD	495	struct ib_cq mlx4_ib_create_cq(struct ib_device ibdev, int entries, int vector,
	496	struct ib_ucontext *context,
	497	struct ib_udata *udata);
	498	int mlx4_ib_destroy_cq(struct ib_cq *cq);
	499	int mlx4_ib_poll_cq(struct ib_cq ibcq, int num_entries, struct ib_wc wc);
	500	int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
	501	void __mlx4_ib_cq_clean(struct mlx4_ib_cq cq, u32 qpn, struct mlx4_ib_srq srq);
	502	void mlx4_ib_cq_clean(struct mlx4_ib_cq cq, u32 qpn, struct mlx4_ib_srq srq);
	503
	504	struct ib_ah mlx4_ib_create_ah(struct ib_pd pd, struct ib_ah_attr *ah_attr);
	505	int mlx4_ib_query_ah(struct ib_ah ibah, struct ib_ah_attr ah_attr);
	506	int mlx4_ib_destroy_ah(struct ib_ah *ah);
	507
	508	struct ib_srq mlx4_ib_create_srq(struct ib_pd pd,
	509	struct ib_srq_init_attr *init_attr,
	510	struct ib_udata *udata);
	511	int mlx4_ib_modify_srq(struct ib_srq ibsrq, struct ib_srq_attr attr,
	512	enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7	513	int mlx4_ib_query_srq(struct ib_srq srq, struct ib_srq_attr srq_attr);
225c7b1f RD	514	int mlx4_ib_destroy_srq(struct ib_srq *srq);
	515	void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
	516	int mlx4_ib_post_srq_recv(struct ib_srq ibsrq, struct ib_recv_wr wr,
	517	struct ib_recv_wr **bad_wr);
	518
	519	struct ib_qp mlx4_ib_create_qp(struct ib_pd pd,
	520	struct ib_qp_init_attr *init_attr,
	521	struct ib_udata *udata);
	522	int mlx4_ib_destroy_qp(struct ib_qp *qp);
	523	int mlx4_ib_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr,
	524	int attr_mask, struct ib_udata *udata);
6a775e2b JM	525	int mlx4_ib_query_qp(struct ib_qp ibqp, struct ib_qp_attr qp_attr, int qp_attr_mask,
6a775e2b JM	526	struct ib_qp_init_attr *qp_init_attr);
225c7b1f RD	527	int mlx4_ib_post_send(struct ib_qp ibqp, struct ib_send_wr wr,
	528	struct ib_send_wr **bad_wr);
	529	int mlx4_ib_post_recv(struct ib_qp ibqp, struct ib_recv_wr wr,
	530	struct ib_recv_wr **bad_wr);
	531
0a9a0188	532	int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
225c7b1f RD	533	int port, struct ib_wc in_wc, struct ib_grh in_grh,
	534	void in_mad, void response_mad);
	535	int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
	536	struct ib_wc in_wc, struct ib_grh in_grh,
	537	struct ib_mad in_mad, struct ib_mad out_mad);
	538	int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
	539	void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
	540
8ad11fb6 JM	541	struct ib_fmr mlx4_ib_fmr_alloc(struct ib_pd pd, int mr_access_flags,
	542	struct ib_fmr_attr *fmr_attr);
	543	int mlx4_ib_map_phys_fmr(struct ib_fmr ibfmr, u64 page_list, int npages,
	544	u64 iova);
	545	int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
	546	int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188 JM	547	int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
	548	struct ib_port_attr *props, int netw_view);
	549	int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
	550	u16 *pkey, int netw_view);
8ad11fb6	551
fa417f7b EC	552	int mlx4_ib_resolve_grh(struct mlx4_ib_dev dev, const struct ib_ah_attr ah_attr,
	553	u8 mac, int is_mcast, u8 port);
	554
225c7b1f RD	555	static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f RD	556	{
fa417f7b EC	557	u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
	558
	559	if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
	560	return 1;
	561
	562	return !!(ah->av.ib.g_slid & 0x80);
225c7b1f RD	563	}
225c7b1f RD	564
b9c5d6a6 OD	565	int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
	566	void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
	567	void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
	568	int mlx4_ib_mcg_init(void);
	569	void mlx4_ib_mcg_destroy(void);
	570
	571	int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
	572
	573	int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
	574	struct ib_sa_mad *sa_mad);
	575	int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
	576	struct ib_sa_mad *mad);
	577
fa417f7b EC	578	int mlx4_ib_add_mc(struct mlx4_ib_dev mdev, struct mlx4_ib_qp mqp,
	579	union ib_gid *gid);
	580
00f5ce99 JM	581	void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
	582	enum ib_event_type type);
	583
fc06573d JM	584	void mlx4_ib_tunnels_update_work(struct work_struct *work);
fc06573d JM	585
b9c5d6a6 OD	586	int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
	587	enum ib_qp_type qpt, struct ib_wc *wc,
	588	struct ib_grh grh, struct ib_mad mad);
	589	int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
	590	enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
	591	u32 qkey, struct ib_ah_attr attr, struct ib_mad mad);
	592	__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
	593
225c7b1f	594	#endif /* MLX4_IB_H */