mlx4_core: Add helper functions to support MR re-registration
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h
CommitLineData
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1/*
2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef MLX4_IB_H
35#define MLX4_IB_H
36
37#include <linux/compiler.h>
38#include <linux/list.h>
63019d93 39#include <linux/mutex.h>
b9c5d6a6 40#include <linux/idr.h>
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41
42#include <rdma/ib_verbs.h>
43#include <rdma/ib_umem.h>
b9c5d6a6 44#include <rdma/ib_mad.h>
a0c64a17 45#include <rdma/ib_sa.h>
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46
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/doorbell.h>
49
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50#define MLX4_IB_DRV_NAME "mlx4_ib"
51
52#ifdef pr_fmt
53#undef pr_fmt
54#endif
55#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
56
57#define mlx4_ib_warn(ibdev, format, arg...) \
58 dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
59
fc2d0044
SG
60enum {
61 MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
62 MLX4_IB_MAX_HEADROOM = 2048
63};
64
65#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
66#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
67
a0c64a17
JM
68/*module param to indicate if SM assigns the alias_GUID*/
69extern int mlx4_ib_sm_guid_assign;
70
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71#define MLX4_IB_UC_STEER_QPN_ALIGN 1
72#define MLX4_IB_UC_MAX_NUM_QPS 256
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73struct mlx4_ib_ucontext {
74 struct ib_ucontext ibucontext;
75 struct mlx4_uar uar;
76 struct list_head db_page_list;
77 struct mutex db_page_mutex;
78};
79
80struct mlx4_ib_pd {
81 struct ib_pd ibpd;
82 u32 pdn;
83};
84
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85struct mlx4_ib_xrcd {
86 struct ib_xrcd ibxrcd;
87 u32 xrcdn;
88 struct ib_pd *pd;
89 struct ib_cq *cq;
90};
91
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92struct mlx4_ib_cq_buf {
93 struct mlx4_buf buf;
94 struct mlx4_mtt mtt;
08ff3235 95 int entry_size;
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96};
97
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98struct mlx4_ib_cq_resize {
99 struct mlx4_ib_cq_buf buf;
100 int cqe;
101};
102
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103struct mlx4_ib_cq {
104 struct ib_cq ibcq;
105 struct mlx4_cq mcq;
106 struct mlx4_ib_cq_buf buf;
bbf8eed1 107 struct mlx4_ib_cq_resize *resize_buf;
6296883c 108 struct mlx4_db db;
225c7b1f 109 spinlock_t lock;
bbf8eed1 110 struct mutex resize_mutex;
225c7b1f 111 struct ib_umem *umem;
bbf8eed1 112 struct ib_umem *resize_umem;
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113};
114
115struct mlx4_ib_mr {
116 struct ib_mr ibmr;
117 struct mlx4_mr mmr;
118 struct ib_umem *umem;
119};
120
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121struct mlx4_ib_mw {
122 struct ib_mw ibmw;
123 struct mlx4_mw mmw;
124};
125
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126struct mlx4_ib_fast_reg_page_list {
127 struct ib_fast_reg_page_list ibfrpl;
2b6b7d4b 128 __be64 *mapped_page_list;
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129 dma_addr_t map;
130};
131
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132struct mlx4_ib_fmr {
133 struct ib_fmr ibfmr;
134 struct mlx4_fmr mfmr;
135};
136
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137struct mlx4_ib_flow {
138 struct ib_flow ibflow;
139 /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
140 u64 reg_id[2];
141};
142
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143struct mlx4_ib_wq {
144 u64 *wrid;
145 spinlock_t lock;
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146 int wqe_cnt;
147 int max_post;
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148 int max_gs;
149 int offset;
150 int wqe_shift;
151 unsigned head;
152 unsigned tail;
153};
154
b832be1e 155enum mlx4_ib_qp_flags {
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156 MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
157 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
c1c98501 158 MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
40f2287b 159 MLX4_IB_QP_CREATE_USE_GFP_NOIO = IB_QP_CREATE_USE_GFP_NOIO,
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160 MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
161 MLX4_IB_SRIOV_SQP = 1 << 31,
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162};
163
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164struct mlx4_ib_gid_entry {
165 struct list_head list;
166 union ib_gid gid;
167 int added;
168 u8 port;
169};
170
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171enum mlx4_ib_qp_type {
172 /*
173 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
174 * here (and in that order) since the MAD layer uses them as
175 * indices into a 2-entry table.
176 */
177 MLX4_IB_QPT_SMI = IB_QPT_SMI,
178 MLX4_IB_QPT_GSI = IB_QPT_GSI,
179
180 MLX4_IB_QPT_RC = IB_QPT_RC,
181 MLX4_IB_QPT_UC = IB_QPT_UC,
182 MLX4_IB_QPT_UD = IB_QPT_UD,
183 MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
184 MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
185 MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
186 MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
187 MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
188
189 MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
190 MLX4_IB_QPT_PROXY_SMI = 1 << 17,
191 MLX4_IB_QPT_PROXY_GSI = 1 << 18,
192 MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
193 MLX4_IB_QPT_TUN_SMI = 1 << 20,
194 MLX4_IB_QPT_TUN_GSI = 1 << 21,
195};
196
197#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
198 MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
199 MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
200
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201enum mlx4_ib_mad_ifc_flags {
202 MLX4_MAD_IFC_IGNORE_MKEY = 1,
203 MLX4_MAD_IFC_IGNORE_BKEY = 2,
204 MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
205 MLX4_MAD_IFC_IGNORE_BKEY),
206 MLX4_MAD_IFC_NET_VIEW = 4,
207};
208
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209enum {
210 MLX4_NUM_TUNNEL_BUFS = 256,
211};
212
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213struct mlx4_ib_tunnel_header {
214 struct mlx4_av av;
215 __be32 remote_qpn;
216 __be32 qkey;
217 __be16 vlan;
218 u8 mac[6];
219 __be16 pkey_index;
220 u8 reserved[6];
221};
222
223struct mlx4_ib_buf {
224 void *addr;
225 dma_addr_t map;
226};
227
228struct mlx4_rcv_tunnel_hdr {
229 __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
230 * 0x0 - no vlan was in the packet
231 * 0x01 - C-VLAN was in the packet */
232 u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
233 u8 reserved;
234 __be16 pkey_index;
235 __be16 sl_vid;
236 __be16 slid_mac_47_32;
237 __be32 mac_31_0;
238};
239
240struct mlx4_ib_proxy_sqp_hdr {
241 struct ib_grh grh;
242 struct mlx4_rcv_tunnel_hdr tun;
243} __packed;
244
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245struct mlx4_roce_smac_vlan_info {
246 u64 smac;
247 int smac_index;
248 int smac_port;
249 u64 candidate_smac;
250 int candidate_smac_index;
251 int candidate_smac_port;
252 u16 vid;
253 int vlan_index;
254 int vlan_port;
255 u16 candidate_vid;
256 int candidate_vlan_index;
257 int candidate_vlan_port;
258 int update_vid;
259};
260
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261struct mlx4_ib_qp {
262 struct ib_qp ibqp;
263 struct mlx4_qp mqp;
264 struct mlx4_buf buf;
265
6296883c 266 struct mlx4_db db;
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267 struct mlx4_ib_wq rq;
268
269 u32 doorbell_qpn;
270 __be32 sq_signal_bits;
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271 unsigned sq_next_wqe;
272 int sq_max_wqes_per_wr;
0e6e7416 273 int sq_spare_wqes;
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274 struct mlx4_ib_wq sq;
275
1ffeb2eb 276 enum mlx4_ib_qp_type mlx4_ib_qp_type;
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277 struct ib_umem *umem;
278 struct mlx4_mtt mtt;
279 int buf_size;
280 struct mutex mutex;
0a1405da 281 u16 xrcdn;
b832be1e 282 u32 flags;
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283 u8 port;
284 u8 alt_port;
285 u8 atomic_rd_en;
286 u8 resp_depth;
0e6e7416 287 u8 sq_no_prefetch;
225c7b1f 288 u8 state;
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289 int mlx_type;
290 struct list_head gid_list;
0ff1fb65 291 struct list_head steering_rules;
1ffeb2eb 292 struct mlx4_ib_buf *sqp_proxy_rcv;
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293 struct mlx4_roce_smac_vlan_info pri;
294 struct mlx4_roce_smac_vlan_info alt;
c1c98501 295 u64 reg_id;
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296};
297
298struct mlx4_ib_srq {
299 struct ib_srq ibsrq;
300 struct mlx4_srq msrq;
301 struct mlx4_buf buf;
6296883c 302 struct mlx4_db db;
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303 u64 *wrid;
304 spinlock_t lock;
305 int head;
306 int tail;
307 u16 wqe_ctr;
308 struct ib_umem *umem;
309 struct mlx4_mtt mtt;
310 struct mutex mutex;
311};
312
313struct mlx4_ib_ah {
314 struct ib_ah ibah;
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315 union mlx4_ext_av av;
316};
317
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318/****************************************/
319/* alias guid support */
320/****************************************/
321#define NUM_PORT_ALIAS_GUID 2
322#define NUM_ALIAS_GUID_IN_REC 8
323#define NUM_ALIAS_GUID_REC_IN_PORT 16
324#define GUID_REC_SIZE 8
325#define NUM_ALIAS_GUID_PER_PORT 128
326#define MLX4_NOT_SET_GUID (0x00LL)
327#define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
328
329enum mlx4_guid_alias_rec_status {
330 MLX4_GUID_INFO_STATUS_IDLE,
331 MLX4_GUID_INFO_STATUS_SET,
332 MLX4_GUID_INFO_STATUS_PENDING,
333};
334
335enum mlx4_guid_alias_rec_ownership {
336 MLX4_GUID_DRIVER_ASSIGN,
337 MLX4_GUID_SYSADMIN_ASSIGN,
338 MLX4_GUID_NONE_ASSIGN, /*init state of each record*/
339};
340
341enum mlx4_guid_alias_rec_method {
342 MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
343 MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
344};
345
346struct mlx4_sriov_alias_guid_info_rec_det {
347 u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
348 ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
349 enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
350 u8 method; /*set or delete*/
351 enum mlx4_guid_alias_rec_ownership ownership; /*indicates who assign that alias_guid record*/
352};
353
354struct mlx4_sriov_alias_guid_port_rec_det {
355 struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
356 struct workqueue_struct *wq;
357 struct delayed_work alias_guid_work;
358 u8 port;
359 struct mlx4_sriov_alias_guid *parent;
360 struct list_head cb_list;
361};
362
363struct mlx4_sriov_alias_guid {
364 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
365 spinlock_t ag_work_lock;
366 struct ib_sa_client *sa_client;
367};
368
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369struct mlx4_ib_demux_work {
370 struct work_struct work;
371 struct mlx4_ib_dev *dev;
372 int slave;
373 int do_init;
374 u8 port;
375
376};
377
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378struct mlx4_ib_tun_tx_buf {
379 struct mlx4_ib_buf buf;
380 struct ib_ah *ah;
381};
382
383struct mlx4_ib_demux_pv_qp {
384 struct ib_qp *qp;
385 enum ib_qp_type proxy_qpt;
386 struct mlx4_ib_buf *ring;
387 struct mlx4_ib_tun_tx_buf *tx_ring;
388 spinlock_t tx_lock;
389 unsigned tx_ix_head;
390 unsigned tx_ix_tail;
391};
392
fc06573d
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393enum mlx4_ib_demux_pv_state {
394 DEMUX_PV_STATE_DOWN,
395 DEMUX_PV_STATE_STARTING,
396 DEMUX_PV_STATE_ACTIVE,
397 DEMUX_PV_STATE_DOWNING,
398};
399
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400struct mlx4_ib_demux_pv_ctx {
401 int port;
402 int slave;
fc06573d 403 enum mlx4_ib_demux_pv_state state;
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404 int has_smi;
405 struct ib_device *ib_dev;
406 struct ib_cq *cq;
407 struct ib_pd *pd;
408 struct ib_mr *mr;
409 struct work_struct work;
410 struct workqueue_struct *wq;
411 struct mlx4_ib_demux_pv_qp qp[2];
412};
413
414struct mlx4_ib_demux_ctx {
415 struct ib_device *ib_dev;
416 int port;
417 struct workqueue_struct *wq;
418 struct workqueue_struct *ud_wq;
419 spinlock_t ud_lock;
420 __be64 subnet_prefix;
421 __be64 guid_cache[128];
422 struct mlx4_ib_dev *dev;
b9c5d6a6
OD
423 /* the following lock protects both mcg_table and mcg_mgid0_list */
424 struct mutex mcg_table_lock;
425 struct rb_root mcg_table;
426 struct list_head mcg_mgid0_list;
427 struct workqueue_struct *mcg_wq;
1ffeb2eb 428 struct mlx4_ib_demux_pv_ctx **tun;
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OD
429 atomic_t tid;
430 int flushing; /* flushing the work queue */
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JM
431};
432
433struct mlx4_ib_sriov {
434 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
435 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
436 /* when using this spinlock you should use "irq" because
437 * it may be called from interrupt context.*/
438 spinlock_t going_down_lock;
439 int is_going_down;
3cf69cc8 440
a0c64a17
JM
441 struct mlx4_sriov_alias_guid alias_guid;
442
3cf69cc8
AV
443 /* CM paravirtualization fields */
444 struct list_head cm_list;
445 spinlock_t id_map_lock;
446 struct rb_root sl_id_map;
447 struct idr pv_id_table;
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448};
449
fa417f7b
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450struct mlx4_ib_iboe {
451 spinlock_t lock;
452 struct net_device *netdevs[MLX4_MAX_PORTS];
d487ee77 453 struct net_device *masters[MLX4_MAX_PORTS];
fa417f7b 454 struct notifier_block nb;
d487ee77
MS
455 struct notifier_block nb_inet;
456 struct notifier_block nb_inet6;
fa417f7b 457 union ib_gid gid_table[MLX4_MAX_PORTS][128];
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458};
459
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460struct pkey_mgt {
461 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
462 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
463 struct list_head pkey_port_list[MLX4_MFUNC_MAX];
464 struct kobject *device_parent[MLX4_MFUNC_MAX];
465};
466
c1e7e466
JM
467struct mlx4_ib_iov_sysfs_attr {
468 void *ctx;
469 struct kobject *kobj;
470 unsigned long data;
471 u32 entry_num;
472 char name[15];
473 struct device_attribute dentry;
474 struct device *dev;
475};
476
477struct mlx4_ib_iov_sysfs_attr_ar {
478 struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
479};
480
481struct mlx4_ib_iov_port {
482 char name[100];
483 u8 num;
484 struct mlx4_ib_dev *dev;
485 struct list_head list;
486 struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
487 struct ib_port_attr attr;
488 struct kobject *cur_port;
489 struct kobject *admin_alias_parent;
490 struct kobject *gids_parent;
491 struct kobject *pkeys_parent;
492 struct kobject *mcgs_parent;
493 struct mlx4_ib_iov_sysfs_attr mcg_dentry;
494};
495
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496struct mlx4_ib_dev {
497 struct ib_device ib_dev;
498 struct mlx4_dev *dev;
7ff93f8b 499 int num_ports;
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500 void __iomem *uar_map;
501
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502 struct mlx4_uar priv_uar;
503 u32 priv_pdn;
504 MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
505
506 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
507 struct ib_ah *sm_ah[MLX4_MAX_PORTS];
508 spinlock_t sm_lock;
1ffeb2eb 509 struct mlx4_ib_sriov sriov;
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RD
510
511 struct mutex cap_mask_mutex;
3b4a8cd5 512 bool ib_active;
fa417f7b 513 struct mlx4_ib_iboe iboe;
cfcde11c 514 int counters[MLX4_MAX_PORTS];
e605b743
SP
515 int *eq_table;
516 int eq_added;
c1e7e466
JM
517 struct kobject *iov_parent;
518 struct kobject *ports_parent;
519 struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
520 struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
fc06573d 521 struct pkey_mgt pkeys;
c1c98501
MB
522 unsigned long *ib_uc_qpns_bitmap;
523 int steer_qpn_count;
524 int steer_qpn_base;
0a9b7d59 525 int steering_support;
9433c188
MB
526 struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
527 /* lock when destroying qp1_proxy and getting netdev events */
528 struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
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529};
530
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JM
531struct ib_event_work {
532 struct work_struct work;
533 struct mlx4_ib_dev *ib_dev;
534 struct mlx4_eqe ib_eqe;
535};
536
1ffeb2eb
JM
537struct mlx4_ib_qp_tunnel_init_attr {
538 struct ib_qp_init_attr init_attr;
539 int slave;
540 enum ib_qp_type proxy_qp_type;
541 u8 port;
542};
543
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544static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
545{
546 return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
547}
548
549static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
550{
551 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
552}
553
554static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
555{
556 return container_of(ibpd, struct mlx4_ib_pd, ibpd);
557}
558
012a8ff5
SH
559static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
560{
561 return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
562}
563
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RD
564static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
565{
566 return container_of(ibcq, struct mlx4_ib_cq, ibcq);
567}
568
569static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
570{
571 return container_of(mcq, struct mlx4_ib_cq, mcq);
572}
573
574static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
575{
576 return container_of(ibmr, struct mlx4_ib_mr, ibmr);
577}
578
804d6a89
SM
579static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
580{
581 return container_of(ibmw, struct mlx4_ib_mw, ibmw);
582}
583
95d04f07
RD
584static inline struct mlx4_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
585{
586 return container_of(ibfrpl, struct mlx4_ib_fast_reg_page_list, ibfrpl);
587}
588
8ad11fb6
JM
589static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
590{
591 return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
592}
f77c0162
HHZ
593
594static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
595{
596 return container_of(ibflow, struct mlx4_ib_flow, ibflow);
597}
598
225c7b1f
RD
599static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
600{
601 return container_of(ibqp, struct mlx4_ib_qp, ibqp);
602}
603
604static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
605{
606 return container_of(mqp, struct mlx4_ib_qp, mqp);
607}
608
609static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
610{
611 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
612}
613
614static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
615{
616 return container_of(msrq, struct mlx4_ib_srq, msrq);
617}
618
619static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
620{
621 return container_of(ibah, struct mlx4_ib_ah, ibah);
622}
623
fc06573d
JM
624int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
625void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
626
225c7b1f 627int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
6296883c
YP
628 struct mlx4_db *db);
629void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
225c7b1f
RD
630
631struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
632int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
633 struct ib_umem *umem);
634struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
635 u64 virt_addr, int access_flags,
636 struct ib_udata *udata);
637int mlx4_ib_dereg_mr(struct ib_mr *mr);
804d6a89 638struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
6ff63e19
SM
639int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
640 struct ib_mw_bind *mw_bind);
804d6a89 641int mlx4_ib_dealloc_mw(struct ib_mw *mw);
95d04f07
RD
642struct ib_mr *mlx4_ib_alloc_fast_reg_mr(struct ib_pd *pd,
643 int max_page_list_len);
644struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
645 int page_list_len);
646void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
225c7b1f 647
3fdcb97f 648int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
bbf8eed1 649int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
225c7b1f
RD
650struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
651 struct ib_ucontext *context,
652 struct ib_udata *udata);
653int mlx4_ib_destroy_cq(struct ib_cq *cq);
654int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
655int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
656void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
657void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
658
659struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
660int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
661int mlx4_ib_destroy_ah(struct ib_ah *ah);
662
663struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
664 struct ib_srq_init_attr *init_attr,
665 struct ib_udata *udata);
666int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
667 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
65541cb7 668int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
225c7b1f
RD
669int mlx4_ib_destroy_srq(struct ib_srq *srq);
670void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
671int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
672 struct ib_recv_wr **bad_wr);
673
674struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
675 struct ib_qp_init_attr *init_attr,
676 struct ib_udata *udata);
677int mlx4_ib_destroy_qp(struct ib_qp *qp);
678int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
679 int attr_mask, struct ib_udata *udata);
6a775e2b
JM
680int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
681 struct ib_qp_init_attr *qp_init_attr);
225c7b1f
RD
682int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
683 struct ib_send_wr **bad_wr);
684int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
685 struct ib_recv_wr **bad_wr);
686
0a9a0188 687int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
225c7b1f
RD
688 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
689 void *in_mad, void *response_mad);
690int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
691 struct ib_wc *in_wc, struct ib_grh *in_grh,
692 struct ib_mad *in_mad, struct ib_mad *out_mad);
693int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
694void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
695
8ad11fb6
JM
696struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
697 struct ib_fmr_attr *fmr_attr);
698int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
699 u64 iova);
700int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
701int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
0a9a0188
JM
702int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
703 struct ib_port_attr *props, int netw_view);
704int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
705 u16 *pkey, int netw_view);
8ad11fb6 706
a0c64a17
JM
707int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
708 union ib_gid *gid, int netw_view);
709
a29bec12 710static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
225c7b1f 711{
fa417f7b
EC
712 u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
713
714 if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
a29bec12 715 return true;
fa417f7b
EC
716
717 return !!(ah->av.ib.g_slid & 0x80);
225c7b1f
RD
718}
719
b9c5d6a6
OD
720int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
721void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
722void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
723int mlx4_ib_mcg_init(void);
724void mlx4_ib_mcg_destroy(void);
725
726int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
727
728int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
729 struct ib_sa_mad *sa_mad);
730int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
731 struct ib_sa_mad *mad);
732
fa417f7b
EC
733int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
734 union ib_gid *gid);
735
00f5ce99
JM
736void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
737 enum ib_event_type type);
738
fc06573d
JM
739void mlx4_ib_tunnels_update_work(struct work_struct *work);
740
b9c5d6a6
OD
741int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
742 enum ib_qp_type qpt, struct ib_wc *wc,
743 struct ib_grh *grh, struct ib_mad *mad);
5ea8bbfc 744
b9c5d6a6
OD
745int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
746 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
5ea8bbfc
JM
747 u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
748 struct ib_mad *mad);
749
b9c5d6a6
OD
750__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
751
3cf69cc8
AV
752int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
753 struct ib_mad *mad);
754
755int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
756 struct ib_mad *mad);
757
758void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
759void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
760
a0c64a17
JM
761/* alias guid support */
762void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
763int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
764void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
765void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
766
767void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
768 int block_num,
769 u8 port_num, u8 *p_data);
770
771void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
772 int block_num, u8 port_num,
773 u8 *p_data);
774
c1e7e466
JM
775int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
776 struct attribute *attr);
777void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
778 struct attribute *attr);
779ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
780
781int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
782
783void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
784
afa8fd1d
JM
785__be64 mlx4_ib_gen_node_guid(void);
786
c1c98501
MB
787int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
788void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
789int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
790 int is_attach);
afa8fd1d 791
225c7b1f 792#endif /* MLX4_IB_H */
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