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e126ba97 | 1 | /* |
6cf0a15f | 2 | * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. |
e126ba97 EC |
3 | * |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/kref.h> | |
34 | #include <rdma/ib_umem.h> | |
a8237b32 | 35 | #include <rdma/ib_user_verbs.h> |
b636401f | 36 | #include <rdma/ib_cache.h> |
e126ba97 EC |
37 | #include "mlx5_ib.h" |
38 | #include "user.h" | |
39 | ||
40 | static void mlx5_ib_cq_comp(struct mlx5_core_cq *cq) | |
41 | { | |
42 | struct ib_cq *ibcq = &to_mibcq(cq)->ibcq; | |
43 | ||
44 | ibcq->comp_handler(ibcq, ibcq->cq_context); | |
45 | } | |
46 | ||
47 | static void mlx5_ib_cq_event(struct mlx5_core_cq *mcq, enum mlx5_event type) | |
48 | { | |
49 | struct mlx5_ib_cq *cq = container_of(mcq, struct mlx5_ib_cq, mcq); | |
50 | struct mlx5_ib_dev *dev = to_mdev(cq->ibcq.device); | |
51 | struct ib_cq *ibcq = &cq->ibcq; | |
52 | struct ib_event event; | |
53 | ||
54 | if (type != MLX5_EVENT_TYPE_CQ_ERROR) { | |
55 | mlx5_ib_warn(dev, "Unexpected event type %d on CQ %06x\n", | |
56 | type, mcq->cqn); | |
57 | return; | |
58 | } | |
59 | ||
60 | if (ibcq->event_handler) { | |
61 | event.device = &dev->ib_dev; | |
62 | event.event = IB_EVENT_CQ_ERR; | |
63 | event.element.cq = ibcq; | |
64 | ibcq->event_handler(&event, ibcq->cq_context); | |
65 | } | |
66 | } | |
67 | ||
68 | static void *get_cqe_from_buf(struct mlx5_ib_cq_buf *buf, int n, int size) | |
69 | { | |
70 | return mlx5_buf_offset(&buf->buf, n * size); | |
71 | } | |
72 | ||
73 | static void *get_cqe(struct mlx5_ib_cq *cq, int n) | |
74 | { | |
75 | return get_cqe_from_buf(&cq->buf, n, cq->mcq.cqe_sz); | |
76 | } | |
77 | ||
bde51583 EC |
78 | static u8 sw_ownership_bit(int n, int nent) |
79 | { | |
80 | return (n & nent) ? 1 : 0; | |
81 | } | |
82 | ||
e126ba97 EC |
83 | static void *get_sw_cqe(struct mlx5_ib_cq *cq, int n) |
84 | { | |
85 | void *cqe = get_cqe(cq, n & cq->ibcq.cqe); | |
86 | struct mlx5_cqe64 *cqe64; | |
87 | ||
88 | cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64; | |
bde51583 EC |
89 | |
90 | if (likely((cqe64->op_own) >> 4 != MLX5_CQE_INVALID) && | |
91 | !((cqe64->op_own & MLX5_CQE_OWNER_MASK) ^ !!(n & (cq->ibcq.cqe + 1)))) { | |
92 | return cqe; | |
93 | } else { | |
94 | return NULL; | |
95 | } | |
e126ba97 EC |
96 | } |
97 | ||
98 | static void *next_cqe_sw(struct mlx5_ib_cq *cq) | |
99 | { | |
100 | return get_sw_cqe(cq, cq->mcq.cons_index); | |
101 | } | |
102 | ||
103 | static enum ib_wc_opcode get_umr_comp(struct mlx5_ib_wq *wq, int idx) | |
104 | { | |
105 | switch (wq->wr_data[idx]) { | |
106 | case MLX5_IB_WR_UMR: | |
107 | return 0; | |
108 | ||
109 | case IB_WR_LOCAL_INV: | |
110 | return IB_WC_LOCAL_INV; | |
111 | ||
8a187ee5 SG |
112 | case IB_WR_REG_MR: |
113 | return IB_WC_REG_MR; | |
114 | ||
e126ba97 EC |
115 | default: |
116 | pr_warn("unknown completion status\n"); | |
117 | return 0; | |
118 | } | |
119 | } | |
120 | ||
121 | static void handle_good_req(struct ib_wc *wc, struct mlx5_cqe64 *cqe, | |
122 | struct mlx5_ib_wq *wq, int idx) | |
123 | { | |
124 | wc->wc_flags = 0; | |
125 | switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) { | |
126 | case MLX5_OPCODE_RDMA_WRITE_IMM: | |
127 | wc->wc_flags |= IB_WC_WITH_IMM; | |
128 | case MLX5_OPCODE_RDMA_WRITE: | |
129 | wc->opcode = IB_WC_RDMA_WRITE; | |
130 | break; | |
131 | case MLX5_OPCODE_SEND_IMM: | |
132 | wc->wc_flags |= IB_WC_WITH_IMM; | |
133 | case MLX5_OPCODE_SEND: | |
134 | case MLX5_OPCODE_SEND_INVAL: | |
135 | wc->opcode = IB_WC_SEND; | |
136 | break; | |
137 | case MLX5_OPCODE_RDMA_READ: | |
138 | wc->opcode = IB_WC_RDMA_READ; | |
139 | wc->byte_len = be32_to_cpu(cqe->byte_cnt); | |
140 | break; | |
141 | case MLX5_OPCODE_ATOMIC_CS: | |
142 | wc->opcode = IB_WC_COMP_SWAP; | |
143 | wc->byte_len = 8; | |
144 | break; | |
145 | case MLX5_OPCODE_ATOMIC_FA: | |
146 | wc->opcode = IB_WC_FETCH_ADD; | |
147 | wc->byte_len = 8; | |
148 | break; | |
149 | case MLX5_OPCODE_ATOMIC_MASKED_CS: | |
150 | wc->opcode = IB_WC_MASKED_COMP_SWAP; | |
151 | wc->byte_len = 8; | |
152 | break; | |
153 | case MLX5_OPCODE_ATOMIC_MASKED_FA: | |
154 | wc->opcode = IB_WC_MASKED_FETCH_ADD; | |
155 | wc->byte_len = 8; | |
156 | break; | |
e126ba97 EC |
157 | case MLX5_OPCODE_UMR: |
158 | wc->opcode = get_umr_comp(wq, idx); | |
159 | break; | |
160 | } | |
161 | } | |
162 | ||
163 | enum { | |
164 | MLX5_GRH_IN_BUFFER = 1, | |
165 | MLX5_GRH_IN_CQE = 2, | |
166 | }; | |
167 | ||
168 | static void handle_responder(struct ib_wc *wc, struct mlx5_cqe64 *cqe, | |
169 | struct mlx5_ib_qp *qp) | |
170 | { | |
cb34be6d | 171 | enum rdma_link_layer ll = rdma_port_get_link_layer(qp->ibqp.device, 1); |
e126ba97 EC |
172 | struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); |
173 | struct mlx5_ib_srq *srq; | |
174 | struct mlx5_ib_wq *wq; | |
175 | u16 wqe_ctr; | |
176 | u8 g; | |
177 | ||
178 | if (qp->ibqp.srq || qp->ibqp.xrcd) { | |
179 | struct mlx5_core_srq *msrq = NULL; | |
180 | ||
181 | if (qp->ibqp.xrcd) { | |
9603b61d | 182 | msrq = mlx5_core_get_srq(dev->mdev, |
e126ba97 EC |
183 | be32_to_cpu(cqe->srqn)); |
184 | srq = to_mibsrq(msrq); | |
185 | } else { | |
186 | srq = to_msrq(qp->ibqp.srq); | |
187 | } | |
188 | if (srq) { | |
189 | wqe_ctr = be16_to_cpu(cqe->wqe_counter); | |
190 | wc->wr_id = srq->wrid[wqe_ctr]; | |
191 | mlx5_ib_free_srq_wqe(srq, wqe_ctr); | |
192 | if (msrq && atomic_dec_and_test(&msrq->refcount)) | |
193 | complete(&msrq->free); | |
194 | } | |
195 | } else { | |
196 | wq = &qp->rq; | |
197 | wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; | |
198 | ++wq->tail; | |
199 | } | |
200 | wc->byte_len = be32_to_cpu(cqe->byte_cnt); | |
201 | ||
202 | switch (cqe->op_own >> 4) { | |
203 | case MLX5_CQE_RESP_WR_IMM: | |
204 | wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; | |
205 | wc->wc_flags = IB_WC_WITH_IMM; | |
206 | wc->ex.imm_data = cqe->imm_inval_pkey; | |
207 | break; | |
208 | case MLX5_CQE_RESP_SEND: | |
209 | wc->opcode = IB_WC_RECV; | |
c7ce833b ES |
210 | wc->wc_flags = IB_WC_IP_CSUM_OK; |
211 | if (unlikely(!((cqe->hds_ip_ext & CQE_L3_OK) && | |
212 | (cqe->hds_ip_ext & CQE_L4_OK)))) | |
213 | wc->wc_flags = 0; | |
e126ba97 EC |
214 | break; |
215 | case MLX5_CQE_RESP_SEND_IMM: | |
216 | wc->opcode = IB_WC_RECV; | |
217 | wc->wc_flags = IB_WC_WITH_IMM; | |
218 | wc->ex.imm_data = cqe->imm_inval_pkey; | |
219 | break; | |
220 | case MLX5_CQE_RESP_SEND_INV: | |
221 | wc->opcode = IB_WC_RECV; | |
222 | wc->wc_flags = IB_WC_WITH_INVALIDATE; | |
223 | wc->ex.invalidate_rkey = be32_to_cpu(cqe->imm_inval_pkey); | |
224 | break; | |
225 | } | |
226 | wc->slid = be16_to_cpu(cqe->slid); | |
227 | wc->sl = (be32_to_cpu(cqe->flags_rqpn) >> 24) & 0xf; | |
228 | wc->src_qp = be32_to_cpu(cqe->flags_rqpn) & 0xffffff; | |
229 | wc->dlid_path_bits = cqe->ml_path; | |
230 | g = (be32_to_cpu(cqe->flags_rqpn) >> 28) & 3; | |
231 | wc->wc_flags |= g ? IB_WC_GRH : 0; | |
b636401f SG |
232 | if (unlikely(is_qp1(qp->ibqp.qp_type))) { |
233 | u16 pkey = be32_to_cpu(cqe->imm_inval_pkey) & 0xffff; | |
234 | ||
235 | ib_find_cached_pkey(&dev->ib_dev, qp->port, pkey, | |
236 | &wc->pkey_index); | |
237 | } else { | |
238 | wc->pkey_index = 0; | |
239 | } | |
cb34be6d AS |
240 | |
241 | if (ll != IB_LINK_LAYER_ETHERNET) | |
242 | return; | |
243 | ||
244 | switch (wc->sl & 0x3) { | |
245 | case MLX5_CQE_ROCE_L3_HEADER_TYPE_GRH: | |
246 | wc->network_hdr_type = RDMA_NETWORK_IB; | |
247 | break; | |
248 | case MLX5_CQE_ROCE_L3_HEADER_TYPE_IPV6: | |
249 | wc->network_hdr_type = RDMA_NETWORK_IPV6; | |
250 | break; | |
251 | case MLX5_CQE_ROCE_L3_HEADER_TYPE_IPV4: | |
252 | wc->network_hdr_type = RDMA_NETWORK_IPV4; | |
253 | break; | |
254 | } | |
255 | wc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE; | |
e126ba97 EC |
256 | } |
257 | ||
258 | static void dump_cqe(struct mlx5_ib_dev *dev, struct mlx5_err_cqe *cqe) | |
259 | { | |
260 | __be32 *p = (__be32 *)cqe; | |
261 | int i; | |
262 | ||
263 | mlx5_ib_warn(dev, "dump error cqe\n"); | |
264 | for (i = 0; i < sizeof(*cqe) / 16; i++, p += 4) | |
265 | pr_info("%08x %08x %08x %08x\n", be32_to_cpu(p[0]), | |
266 | be32_to_cpu(p[1]), be32_to_cpu(p[2]), | |
267 | be32_to_cpu(p[3])); | |
268 | } | |
269 | ||
270 | static void mlx5_handle_error_cqe(struct mlx5_ib_dev *dev, | |
271 | struct mlx5_err_cqe *cqe, | |
272 | struct ib_wc *wc) | |
273 | { | |
274 | int dump = 1; | |
275 | ||
276 | switch (cqe->syndrome) { | |
277 | case MLX5_CQE_SYNDROME_LOCAL_LENGTH_ERR: | |
278 | wc->status = IB_WC_LOC_LEN_ERR; | |
279 | break; | |
280 | case MLX5_CQE_SYNDROME_LOCAL_QP_OP_ERR: | |
281 | wc->status = IB_WC_LOC_QP_OP_ERR; | |
282 | break; | |
283 | case MLX5_CQE_SYNDROME_LOCAL_PROT_ERR: | |
284 | wc->status = IB_WC_LOC_PROT_ERR; | |
285 | break; | |
286 | case MLX5_CQE_SYNDROME_WR_FLUSH_ERR: | |
287 | dump = 0; | |
288 | wc->status = IB_WC_WR_FLUSH_ERR; | |
289 | break; | |
290 | case MLX5_CQE_SYNDROME_MW_BIND_ERR: | |
291 | wc->status = IB_WC_MW_BIND_ERR; | |
292 | break; | |
293 | case MLX5_CQE_SYNDROME_BAD_RESP_ERR: | |
294 | wc->status = IB_WC_BAD_RESP_ERR; | |
295 | break; | |
296 | case MLX5_CQE_SYNDROME_LOCAL_ACCESS_ERR: | |
297 | wc->status = IB_WC_LOC_ACCESS_ERR; | |
298 | break; | |
299 | case MLX5_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR: | |
300 | wc->status = IB_WC_REM_INV_REQ_ERR; | |
301 | break; | |
302 | case MLX5_CQE_SYNDROME_REMOTE_ACCESS_ERR: | |
303 | wc->status = IB_WC_REM_ACCESS_ERR; | |
304 | break; | |
305 | case MLX5_CQE_SYNDROME_REMOTE_OP_ERR: | |
306 | wc->status = IB_WC_REM_OP_ERR; | |
307 | break; | |
308 | case MLX5_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR: | |
309 | wc->status = IB_WC_RETRY_EXC_ERR; | |
310 | dump = 0; | |
311 | break; | |
312 | case MLX5_CQE_SYNDROME_RNR_RETRY_EXC_ERR: | |
313 | wc->status = IB_WC_RNR_RETRY_EXC_ERR; | |
314 | dump = 0; | |
315 | break; | |
316 | case MLX5_CQE_SYNDROME_REMOTE_ABORTED_ERR: | |
317 | wc->status = IB_WC_REM_ABORT_ERR; | |
318 | break; | |
319 | default: | |
320 | wc->status = IB_WC_GENERAL_ERR; | |
321 | break; | |
322 | } | |
323 | ||
324 | wc->vendor_err = cqe->vendor_err_synd; | |
325 | if (dump) | |
326 | dump_cqe(dev, cqe); | |
327 | } | |
328 | ||
329 | static int is_atomic_response(struct mlx5_ib_qp *qp, uint16_t idx) | |
330 | { | |
331 | /* TBD: waiting decision | |
332 | */ | |
333 | return 0; | |
334 | } | |
335 | ||
336 | static void *mlx5_get_atomic_laddr(struct mlx5_ib_qp *qp, uint16_t idx) | |
337 | { | |
338 | struct mlx5_wqe_data_seg *dpseg; | |
339 | void *addr; | |
340 | ||
341 | dpseg = mlx5_get_send_wqe(qp, idx) + sizeof(struct mlx5_wqe_ctrl_seg) + | |
342 | sizeof(struct mlx5_wqe_raddr_seg) + | |
343 | sizeof(struct mlx5_wqe_atomic_seg); | |
344 | addr = (void *)(unsigned long)be64_to_cpu(dpseg->addr); | |
345 | return addr; | |
346 | } | |
347 | ||
348 | static void handle_atomic(struct mlx5_ib_qp *qp, struct mlx5_cqe64 *cqe64, | |
349 | uint16_t idx) | |
350 | { | |
351 | void *addr; | |
352 | int byte_count; | |
353 | int i; | |
354 | ||
355 | if (!is_atomic_response(qp, idx)) | |
356 | return; | |
357 | ||
358 | byte_count = be32_to_cpu(cqe64->byte_cnt); | |
359 | addr = mlx5_get_atomic_laddr(qp, idx); | |
360 | ||
361 | if (byte_count == 4) { | |
362 | *(uint32_t *)addr = be32_to_cpu(*((__be32 *)addr)); | |
363 | } else { | |
364 | for (i = 0; i < byte_count; i += 8) { | |
365 | *(uint64_t *)addr = be64_to_cpu(*((__be64 *)addr)); | |
366 | addr += 8; | |
367 | } | |
368 | } | |
369 | ||
370 | return; | |
371 | } | |
372 | ||
373 | static void handle_atomics(struct mlx5_ib_qp *qp, struct mlx5_cqe64 *cqe64, | |
374 | u16 tail, u16 head) | |
375 | { | |
f241e749 | 376 | u16 idx; |
e126ba97 EC |
377 | |
378 | do { | |
379 | idx = tail & (qp->sq.wqe_cnt - 1); | |
380 | handle_atomic(qp, cqe64, idx); | |
381 | if (idx == head) | |
382 | break; | |
383 | ||
384 | tail = qp->sq.w_list[idx].next; | |
385 | } while (1); | |
386 | tail = qp->sq.w_list[idx].next; | |
387 | qp->sq.last_poll = tail; | |
388 | } | |
389 | ||
bde51583 EC |
390 | static void free_cq_buf(struct mlx5_ib_dev *dev, struct mlx5_ib_cq_buf *buf) |
391 | { | |
9603b61d | 392 | mlx5_buf_free(dev->mdev, &buf->buf); |
bde51583 EC |
393 | } |
394 | ||
d5436ba0 SG |
395 | static void get_sig_err_item(struct mlx5_sig_err_cqe *cqe, |
396 | struct ib_sig_err *item) | |
397 | { | |
398 | u16 syndrome = be16_to_cpu(cqe->syndrome); | |
399 | ||
400 | #define GUARD_ERR (1 << 13) | |
401 | #define APPTAG_ERR (1 << 12) | |
402 | #define REFTAG_ERR (1 << 11) | |
403 | ||
404 | if (syndrome & GUARD_ERR) { | |
405 | item->err_type = IB_SIG_BAD_GUARD; | |
406 | item->expected = be32_to_cpu(cqe->expected_trans_sig) >> 16; | |
407 | item->actual = be32_to_cpu(cqe->actual_trans_sig) >> 16; | |
408 | } else | |
409 | if (syndrome & REFTAG_ERR) { | |
410 | item->err_type = IB_SIG_BAD_REFTAG; | |
411 | item->expected = be32_to_cpu(cqe->expected_reftag); | |
412 | item->actual = be32_to_cpu(cqe->actual_reftag); | |
413 | } else | |
414 | if (syndrome & APPTAG_ERR) { | |
415 | item->err_type = IB_SIG_BAD_APPTAG; | |
416 | item->expected = be32_to_cpu(cqe->expected_trans_sig) & 0xffff; | |
417 | item->actual = be32_to_cpu(cqe->actual_trans_sig) & 0xffff; | |
418 | } else { | |
419 | pr_err("Got signature completion error with bad syndrome %04x\n", | |
420 | syndrome); | |
421 | } | |
422 | ||
423 | item->sig_err_offset = be64_to_cpu(cqe->err_offset); | |
424 | item->key = be32_to_cpu(cqe->mkey); | |
425 | } | |
426 | ||
89ea94a7 MG |
427 | static void sw_send_comp(struct mlx5_ib_qp *qp, int num_entries, |
428 | struct ib_wc *wc, int *npolled) | |
429 | { | |
430 | struct mlx5_ib_wq *wq; | |
431 | unsigned int cur; | |
432 | unsigned int idx; | |
433 | int np; | |
434 | int i; | |
435 | ||
436 | wq = &qp->sq; | |
437 | cur = wq->head - wq->tail; | |
438 | np = *npolled; | |
439 | ||
440 | if (cur == 0) | |
441 | return; | |
442 | ||
443 | for (i = 0; i < cur && np < num_entries; i++) { | |
444 | idx = wq->last_poll & (wq->wqe_cnt - 1); | |
445 | wc->wr_id = wq->wrid[idx]; | |
446 | wc->status = IB_WC_WR_FLUSH_ERR; | |
447 | wc->vendor_err = MLX5_CQE_SYNDROME_WR_FLUSH_ERR; | |
448 | wq->tail++; | |
449 | np++; | |
450 | wc->qp = &qp->ibqp; | |
451 | wc++; | |
452 | wq->last_poll = wq->w_list[idx].next; | |
453 | } | |
454 | *npolled = np; | |
455 | } | |
456 | ||
457 | static void sw_recv_comp(struct mlx5_ib_qp *qp, int num_entries, | |
458 | struct ib_wc *wc, int *npolled) | |
459 | { | |
460 | struct mlx5_ib_wq *wq; | |
461 | unsigned int cur; | |
462 | int np; | |
463 | int i; | |
464 | ||
465 | wq = &qp->rq; | |
466 | cur = wq->head - wq->tail; | |
467 | np = *npolled; | |
468 | ||
469 | if (cur == 0) | |
470 | return; | |
471 | ||
472 | for (i = 0; i < cur && np < num_entries; i++) { | |
473 | wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; | |
474 | wc->status = IB_WC_WR_FLUSH_ERR; | |
475 | wc->vendor_err = MLX5_CQE_SYNDROME_WR_FLUSH_ERR; | |
476 | wq->tail++; | |
477 | np++; | |
478 | wc->qp = &qp->ibqp; | |
479 | wc++; | |
480 | } | |
481 | *npolled = np; | |
482 | } | |
483 | ||
484 | static void mlx5_ib_poll_sw_comp(struct mlx5_ib_cq *cq, int num_entries, | |
485 | struct ib_wc *wc, int *npolled) | |
486 | { | |
487 | struct mlx5_ib_qp *qp; | |
488 | ||
489 | *npolled = 0; | |
490 | /* Find uncompleted WQEs belonging to that cq and retrun mmics ones */ | |
491 | list_for_each_entry(qp, &cq->list_send_qp, cq_send_list) { | |
492 | sw_send_comp(qp, num_entries, wc + *npolled, npolled); | |
493 | if (*npolled >= num_entries) | |
494 | return; | |
495 | } | |
496 | ||
497 | list_for_each_entry(qp, &cq->list_recv_qp, cq_recv_list) { | |
498 | sw_recv_comp(qp, num_entries, wc + *npolled, npolled); | |
499 | if (*npolled >= num_entries) | |
500 | return; | |
501 | } | |
502 | } | |
503 | ||
e126ba97 EC |
504 | static int mlx5_poll_one(struct mlx5_ib_cq *cq, |
505 | struct mlx5_ib_qp **cur_qp, | |
506 | struct ib_wc *wc) | |
507 | { | |
508 | struct mlx5_ib_dev *dev = to_mdev(cq->ibcq.device); | |
509 | struct mlx5_err_cqe *err_cqe; | |
510 | struct mlx5_cqe64 *cqe64; | |
511 | struct mlx5_core_qp *mqp; | |
512 | struct mlx5_ib_wq *wq; | |
d5436ba0 | 513 | struct mlx5_sig_err_cqe *sig_err_cqe; |
a606b0f6 | 514 | struct mlx5_core_mkey *mmkey; |
d5436ba0 | 515 | struct mlx5_ib_mr *mr; |
e126ba97 EC |
516 | uint8_t opcode; |
517 | uint32_t qpn; | |
518 | u16 wqe_ctr; | |
519 | void *cqe; | |
520 | int idx; | |
521 | ||
bde51583 | 522 | repoll: |
e126ba97 EC |
523 | cqe = next_cqe_sw(cq); |
524 | if (!cqe) | |
525 | return -EAGAIN; | |
526 | ||
527 | cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64; | |
528 | ||
529 | ++cq->mcq.cons_index; | |
530 | ||
531 | /* Make sure we read CQ entry contents after we've checked the | |
532 | * ownership bit. | |
533 | */ | |
534 | rmb(); | |
535 | ||
bde51583 EC |
536 | opcode = cqe64->op_own >> 4; |
537 | if (unlikely(opcode == MLX5_CQE_RESIZE_CQ)) { | |
538 | if (likely(cq->resize_buf)) { | |
539 | free_cq_buf(dev, &cq->buf); | |
540 | cq->buf = *cq->resize_buf; | |
541 | kfree(cq->resize_buf); | |
542 | cq->resize_buf = NULL; | |
543 | goto repoll; | |
544 | } else { | |
545 | mlx5_ib_warn(dev, "unexpected resize cqe\n"); | |
546 | } | |
547 | } | |
e126ba97 EC |
548 | |
549 | qpn = ntohl(cqe64->sop_drop_qpn) & 0xffffff; | |
550 | if (!*cur_qp || (qpn != (*cur_qp)->ibqp.qp_num)) { | |
551 | /* We do not have to take the QP table lock here, | |
552 | * because CQs will be locked while QPs are removed | |
553 | * from the table. | |
554 | */ | |
9603b61d | 555 | mqp = __mlx5_qp_lookup(dev->mdev, qpn); |
e126ba97 EC |
556 | *cur_qp = to_mibqp(mqp); |
557 | } | |
558 | ||
559 | wc->qp = &(*cur_qp)->ibqp; | |
e126ba97 EC |
560 | switch (opcode) { |
561 | case MLX5_CQE_REQ: | |
562 | wq = &(*cur_qp)->sq; | |
563 | wqe_ctr = be16_to_cpu(cqe64->wqe_counter); | |
564 | idx = wqe_ctr & (wq->wqe_cnt - 1); | |
565 | handle_good_req(wc, cqe64, wq, idx); | |
566 | handle_atomics(*cur_qp, cqe64, wq->last_poll, idx); | |
567 | wc->wr_id = wq->wrid[idx]; | |
568 | wq->tail = wq->wqe_head[idx] + 1; | |
569 | wc->status = IB_WC_SUCCESS; | |
570 | break; | |
571 | case MLX5_CQE_RESP_WR_IMM: | |
572 | case MLX5_CQE_RESP_SEND: | |
573 | case MLX5_CQE_RESP_SEND_IMM: | |
574 | case MLX5_CQE_RESP_SEND_INV: | |
575 | handle_responder(wc, cqe64, *cur_qp); | |
576 | wc->status = IB_WC_SUCCESS; | |
577 | break; | |
578 | case MLX5_CQE_RESIZE_CQ: | |
579 | break; | |
580 | case MLX5_CQE_REQ_ERR: | |
581 | case MLX5_CQE_RESP_ERR: | |
582 | err_cqe = (struct mlx5_err_cqe *)cqe64; | |
583 | mlx5_handle_error_cqe(dev, err_cqe, wc); | |
584 | mlx5_ib_dbg(dev, "%s error cqe on cqn 0x%x:\n", | |
585 | opcode == MLX5_CQE_REQ_ERR ? | |
586 | "Requestor" : "Responder", cq->mcq.cqn); | |
587 | mlx5_ib_dbg(dev, "syndrome 0x%x, vendor syndrome 0x%x\n", | |
588 | err_cqe->syndrome, err_cqe->vendor_err_synd); | |
589 | if (opcode == MLX5_CQE_REQ_ERR) { | |
590 | wq = &(*cur_qp)->sq; | |
591 | wqe_ctr = be16_to_cpu(cqe64->wqe_counter); | |
592 | idx = wqe_ctr & (wq->wqe_cnt - 1); | |
593 | wc->wr_id = wq->wrid[idx]; | |
594 | wq->tail = wq->wqe_head[idx] + 1; | |
595 | } else { | |
596 | struct mlx5_ib_srq *srq; | |
597 | ||
598 | if ((*cur_qp)->ibqp.srq) { | |
599 | srq = to_msrq((*cur_qp)->ibqp.srq); | |
600 | wqe_ctr = be16_to_cpu(cqe64->wqe_counter); | |
601 | wc->wr_id = srq->wrid[wqe_ctr]; | |
602 | mlx5_ib_free_srq_wqe(srq, wqe_ctr); | |
603 | } else { | |
604 | wq = &(*cur_qp)->rq; | |
605 | wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; | |
606 | ++wq->tail; | |
607 | } | |
608 | } | |
609 | break; | |
d5436ba0 SG |
610 | case MLX5_CQE_SIG_ERR: |
611 | sig_err_cqe = (struct mlx5_sig_err_cqe *)cqe64; | |
612 | ||
a606b0f6 MB |
613 | read_lock(&dev->mdev->priv.mkey_table.lock); |
614 | mmkey = __mlx5_mr_lookup(dev->mdev, | |
615 | mlx5_base_mkey(be32_to_cpu(sig_err_cqe->mkey))); | |
a606b0f6 | 616 | mr = to_mibmr(mmkey); |
d5436ba0 SG |
617 | get_sig_err_item(sig_err_cqe, &mr->sig->err_item); |
618 | mr->sig->sig_err_exists = true; | |
619 | mr->sig->sigerr_count++; | |
620 | ||
621 | mlx5_ib_warn(dev, "CQN: 0x%x Got SIGERR on key: 0x%x err_type %x err_offset %llx expected %x actual %x\n", | |
622 | cq->mcq.cqn, mr->sig->err_item.key, | |
623 | mr->sig->err_item.err_type, | |
624 | mr->sig->err_item.sig_err_offset, | |
625 | mr->sig->err_item.expected, | |
626 | mr->sig->err_item.actual); | |
627 | ||
a606b0f6 | 628 | read_unlock(&dev->mdev->priv.mkey_table.lock); |
d5436ba0 | 629 | goto repoll; |
e126ba97 EC |
630 | } |
631 | ||
632 | return 0; | |
633 | } | |
634 | ||
25361e02 HE |
635 | static int poll_soft_wc(struct mlx5_ib_cq *cq, int num_entries, |
636 | struct ib_wc *wc) | |
637 | { | |
638 | struct mlx5_ib_dev *dev = to_mdev(cq->ibcq.device); | |
639 | struct mlx5_ib_wc *soft_wc, *next; | |
640 | int npolled = 0; | |
641 | ||
642 | list_for_each_entry_safe(soft_wc, next, &cq->wc_list, list) { | |
643 | if (npolled >= num_entries) | |
644 | break; | |
645 | ||
646 | mlx5_ib_dbg(dev, "polled software generated completion on CQ 0x%x\n", | |
647 | cq->mcq.cqn); | |
648 | ||
649 | wc[npolled++] = soft_wc->wc; | |
650 | list_del(&soft_wc->list); | |
651 | kfree(soft_wc); | |
652 | } | |
653 | ||
654 | return npolled; | |
655 | } | |
656 | ||
e126ba97 EC |
657 | int mlx5_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) |
658 | { | |
659 | struct mlx5_ib_cq *cq = to_mcq(ibcq); | |
660 | struct mlx5_ib_qp *cur_qp = NULL; | |
89ea94a7 MG |
661 | struct mlx5_ib_dev *dev = to_mdev(cq->ibcq.device); |
662 | struct mlx5_core_dev *mdev = dev->mdev; | |
e126ba97 | 663 | unsigned long flags; |
25361e02 | 664 | int soft_polled = 0; |
e126ba97 | 665 | int npolled; |
e126ba97 EC |
666 | |
667 | spin_lock_irqsave(&cq->lock, flags); | |
89ea94a7 MG |
668 | if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { |
669 | mlx5_ib_poll_sw_comp(cq, num_entries, wc, &npolled); | |
670 | goto out; | |
671 | } | |
e126ba97 | 672 | |
25361e02 HE |
673 | if (unlikely(!list_empty(&cq->wc_list))) |
674 | soft_polled = poll_soft_wc(cq, num_entries, wc); | |
675 | ||
676 | for (npolled = 0; npolled < num_entries - soft_polled; npolled++) { | |
dbdf7d4e | 677 | if (mlx5_poll_one(cq, &cur_qp, wc + soft_polled + npolled)) |
e126ba97 EC |
678 | break; |
679 | } | |
680 | ||
681 | if (npolled) | |
682 | mlx5_cq_set_ci(&cq->mcq); | |
89ea94a7 | 683 | out: |
e126ba97 EC |
684 | spin_unlock_irqrestore(&cq->lock, flags); |
685 | ||
dbdf7d4e | 686 | return soft_polled + npolled; |
e126ba97 EC |
687 | } |
688 | ||
689 | int mlx5_ib_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) | |
690 | { | |
ce0f7509 | 691 | struct mlx5_core_dev *mdev = to_mdev(ibcq->device)->mdev; |
25361e02 | 692 | struct mlx5_ib_cq *cq = to_mcq(ibcq); |
ce0f7509 | 693 | void __iomem *uar_page = mdev->priv.uuari.uars[0].map; |
25361e02 HE |
694 | unsigned long irq_flags; |
695 | int ret = 0; | |
696 | ||
697 | spin_lock_irqsave(&cq->lock, irq_flags); | |
698 | if (cq->notify_flags != IB_CQ_NEXT_COMP) | |
699 | cq->notify_flags = flags & IB_CQ_SOLICITED_MASK; | |
ce0f7509 | 700 | |
25361e02 HE |
701 | if ((flags & IB_CQ_REPORT_MISSED_EVENTS) && !list_empty(&cq->wc_list)) |
702 | ret = 1; | |
703 | spin_unlock_irqrestore(&cq->lock, irq_flags); | |
704 | ||
705 | mlx5_cq_arm(&cq->mcq, | |
e126ba97 EC |
706 | (flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ? |
707 | MLX5_CQ_DB_REQ_NOT_SOL : MLX5_CQ_DB_REQ_NOT, | |
ce0f7509 SM |
708 | uar_page, |
709 | MLX5_GET_DOORBELL_LOCK(&mdev->priv.cq_uar_lock), | |
710 | to_mcq(ibcq)->mcq.cons_index); | |
e126ba97 | 711 | |
25361e02 | 712 | return ret; |
e126ba97 EC |
713 | } |
714 | ||
715 | static int alloc_cq_buf(struct mlx5_ib_dev *dev, struct mlx5_ib_cq_buf *buf, | |
716 | int nent, int cqe_size) | |
717 | { | |
718 | int err; | |
719 | ||
64ffaa21 | 720 | err = mlx5_buf_alloc(dev->mdev, nent * cqe_size, &buf->buf); |
e126ba97 EC |
721 | if (err) |
722 | return err; | |
723 | ||
724 | buf->cqe_size = cqe_size; | |
bde51583 | 725 | buf->nent = nent; |
e126ba97 EC |
726 | |
727 | return 0; | |
728 | } | |
729 | ||
e126ba97 EC |
730 | static int create_cq_user(struct mlx5_ib_dev *dev, struct ib_udata *udata, |
731 | struct ib_ucontext *context, struct mlx5_ib_cq *cq, | |
27827786 | 732 | int entries, u32 **cqb, |
e126ba97 EC |
733 | int *cqe_size, int *index, int *inlen) |
734 | { | |
735 | struct mlx5_ib_create_cq ucmd; | |
a8237b32 | 736 | size_t ucmdlen; |
e126ba97 | 737 | int page_shift; |
27827786 | 738 | __be64 *pas; |
e126ba97 EC |
739 | int npages; |
740 | int ncont; | |
27827786 | 741 | void *cqc; |
e126ba97 EC |
742 | int err; |
743 | ||
a8237b32 YD |
744 | ucmdlen = |
745 | (udata->inlen - sizeof(struct ib_uverbs_cmd_hdr) < | |
746 | sizeof(ucmd)) ? (sizeof(ucmd) - | |
747 | sizeof(ucmd.reserved)) : sizeof(ucmd); | |
748 | ||
749 | if (ib_copy_from_udata(&ucmd, udata, ucmdlen)) | |
e126ba97 EC |
750 | return -EFAULT; |
751 | ||
a8237b32 YD |
752 | if (ucmdlen == sizeof(ucmd) && |
753 | ucmd.reserved != 0) | |
754 | return -EINVAL; | |
755 | ||
e126ba97 EC |
756 | if (ucmd.cqe_size != 64 && ucmd.cqe_size != 128) |
757 | return -EINVAL; | |
758 | ||
759 | *cqe_size = ucmd.cqe_size; | |
760 | ||
761 | cq->buf.umem = ib_umem_get(context, ucmd.buf_addr, | |
762 | entries * ucmd.cqe_size, | |
763 | IB_ACCESS_LOCAL_WRITE, 1); | |
764 | if (IS_ERR(cq->buf.umem)) { | |
765 | err = PTR_ERR(cq->buf.umem); | |
766 | return err; | |
767 | } | |
768 | ||
769 | err = mlx5_ib_db_map_user(to_mucontext(context), ucmd.db_addr, | |
770 | &cq->db); | |
771 | if (err) | |
772 | goto err_umem; | |
773 | ||
774 | mlx5_ib_cont_pages(cq->buf.umem, ucmd.buf_addr, &npages, &page_shift, | |
775 | &ncont, NULL); | |
776 | mlx5_ib_dbg(dev, "addr 0x%llx, size %u, npages %d, page_shift %d, ncont %d\n", | |
777 | ucmd.buf_addr, entries * ucmd.cqe_size, npages, page_shift, ncont); | |
778 | ||
27827786 SM |
779 | *inlen = MLX5_ST_SZ_BYTES(create_cq_in) + |
780 | MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * ncont; | |
e126ba97 EC |
781 | *cqb = mlx5_vzalloc(*inlen); |
782 | if (!*cqb) { | |
783 | err = -ENOMEM; | |
784 | goto err_db; | |
785 | } | |
27827786 SM |
786 | |
787 | pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, *cqb, pas); | |
788 | mlx5_ib_populate_pas(dev, cq->buf.umem, page_shift, pas, 0); | |
789 | ||
790 | cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context); | |
791 | MLX5_SET(cqc, cqc, log_page_size, | |
792 | page_shift - MLX5_ADAPTER_PAGE_SHIFT); | |
e126ba97 EC |
793 | |
794 | *index = to_mucontext(context)->uuari.uars[0].index; | |
795 | ||
796 | return 0; | |
797 | ||
798 | err_db: | |
799 | mlx5_ib_db_unmap_user(to_mucontext(context), &cq->db); | |
800 | ||
801 | err_umem: | |
802 | ib_umem_release(cq->buf.umem); | |
803 | return err; | |
804 | } | |
805 | ||
806 | static void destroy_cq_user(struct mlx5_ib_cq *cq, struct ib_ucontext *context) | |
807 | { | |
808 | mlx5_ib_db_unmap_user(to_mucontext(context), &cq->db); | |
809 | ib_umem_release(cq->buf.umem); | |
810 | } | |
811 | ||
bde51583 | 812 | static void init_cq_buf(struct mlx5_ib_cq *cq, struct mlx5_ib_cq_buf *buf) |
e126ba97 EC |
813 | { |
814 | int i; | |
815 | void *cqe; | |
816 | struct mlx5_cqe64 *cqe64; | |
817 | ||
bde51583 EC |
818 | for (i = 0; i < buf->nent; i++) { |
819 | cqe = get_cqe_from_buf(buf, i, buf->cqe_size); | |
820 | cqe64 = buf->cqe_size == 64 ? cqe : cqe + 64; | |
821 | cqe64->op_own = MLX5_CQE_INVALID << 4; | |
e126ba97 EC |
822 | } |
823 | } | |
824 | ||
825 | static int create_cq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq, | |
826 | int entries, int cqe_size, | |
27827786 | 827 | u32 **cqb, int *index, int *inlen) |
e126ba97 | 828 | { |
27827786 SM |
829 | __be64 *pas; |
830 | void *cqc; | |
e126ba97 EC |
831 | int err; |
832 | ||
9603b61d | 833 | err = mlx5_db_alloc(dev->mdev, &cq->db); |
e126ba97 EC |
834 | if (err) |
835 | return err; | |
836 | ||
837 | cq->mcq.set_ci_db = cq->db.db; | |
838 | cq->mcq.arm_db = cq->db.db + 1; | |
e126ba97 EC |
839 | cq->mcq.cqe_sz = cqe_size; |
840 | ||
841 | err = alloc_cq_buf(dev, &cq->buf, entries, cqe_size); | |
842 | if (err) | |
843 | goto err_db; | |
844 | ||
bde51583 | 845 | init_cq_buf(cq, &cq->buf); |
e126ba97 | 846 | |
27827786 SM |
847 | *inlen = MLX5_ST_SZ_BYTES(create_cq_in) + |
848 | MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * cq->buf.buf.npages; | |
e126ba97 EC |
849 | *cqb = mlx5_vzalloc(*inlen); |
850 | if (!*cqb) { | |
851 | err = -ENOMEM; | |
852 | goto err_buf; | |
853 | } | |
e126ba97 | 854 | |
27827786 SM |
855 | pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, *cqb, pas); |
856 | mlx5_fill_page_array(&cq->buf.buf, pas); | |
857 | ||
858 | cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context); | |
859 | MLX5_SET(cqc, cqc, log_page_size, | |
860 | cq->buf.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); | |
861 | ||
9603b61d | 862 | *index = dev->mdev->priv.uuari.uars[0].index; |
e126ba97 EC |
863 | |
864 | return 0; | |
865 | ||
866 | err_buf: | |
867 | free_cq_buf(dev, &cq->buf); | |
868 | ||
869 | err_db: | |
9603b61d | 870 | mlx5_db_free(dev->mdev, &cq->db); |
e126ba97 EC |
871 | return err; |
872 | } | |
873 | ||
874 | static void destroy_cq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq) | |
875 | { | |
876 | free_cq_buf(dev, &cq->buf); | |
9603b61d | 877 | mlx5_db_free(dev->mdev, &cq->db); |
e126ba97 EC |
878 | } |
879 | ||
25361e02 HE |
880 | static void notify_soft_wc_handler(struct work_struct *work) |
881 | { | |
882 | struct mlx5_ib_cq *cq = container_of(work, struct mlx5_ib_cq, | |
883 | notify_work); | |
884 | ||
885 | cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context); | |
886 | } | |
887 | ||
bcf4c1ea MB |
888 | struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, |
889 | const struct ib_cq_init_attr *attr, | |
890 | struct ib_ucontext *context, | |
e126ba97 EC |
891 | struct ib_udata *udata) |
892 | { | |
bcf4c1ea MB |
893 | int entries = attr->cqe; |
894 | int vector = attr->comp_vector; | |
e126ba97 EC |
895 | struct mlx5_ib_dev *dev = to_mdev(ibdev); |
896 | struct mlx5_ib_cq *cq; | |
897 | int uninitialized_var(index); | |
898 | int uninitialized_var(inlen); | |
27827786 SM |
899 | u32 *cqb = NULL; |
900 | void *cqc; | |
e126ba97 | 901 | int cqe_size; |
0b6e26ce | 902 | unsigned int irqn; |
e126ba97 EC |
903 | int eqn; |
904 | int err; | |
905 | ||
9ea57852 NO |
906 | if (entries < 0 || |
907 | (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))) | |
51ee86a4 EC |
908 | return ERR_PTR(-EINVAL); |
909 | ||
34356f64 | 910 | if (check_cq_create_flags(attr->flags)) |
972ecb82 MB |
911 | return ERR_PTR(-EOPNOTSUPP); |
912 | ||
e126ba97 | 913 | entries = roundup_pow_of_two(entries + 1); |
938fe83c | 914 | if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) |
e126ba97 EC |
915 | return ERR_PTR(-EINVAL); |
916 | ||
917 | cq = kzalloc(sizeof(*cq), GFP_KERNEL); | |
918 | if (!cq) | |
919 | return ERR_PTR(-ENOMEM); | |
920 | ||
921 | cq->ibcq.cqe = entries - 1; | |
922 | mutex_init(&cq->resize_mutex); | |
923 | spin_lock_init(&cq->lock); | |
924 | cq->resize_buf = NULL; | |
925 | cq->resize_umem = NULL; | |
051f2630 | 926 | cq->create_flags = attr->flags; |
89ea94a7 MG |
927 | INIT_LIST_HEAD(&cq->list_send_qp); |
928 | INIT_LIST_HEAD(&cq->list_recv_qp); | |
e126ba97 EC |
929 | |
930 | if (context) { | |
931 | err = create_cq_user(dev, udata, context, cq, entries, | |
932 | &cqb, &cqe_size, &index, &inlen); | |
933 | if (err) | |
934 | goto err_create; | |
935 | } else { | |
936 | /* for now choose 64 bytes till we have a proper interface */ | |
937 | cqe_size = 64; | |
938 | err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb, | |
939 | &index, &inlen); | |
940 | if (err) | |
941 | goto err_create; | |
25361e02 HE |
942 | |
943 | INIT_WORK(&cq->notify_work, notify_soft_wc_handler); | |
e126ba97 EC |
944 | } |
945 | ||
233d05d2 | 946 | err = mlx5_vector2eqn(dev->mdev, vector, &eqn, &irqn); |
e126ba97 EC |
947 | if (err) |
948 | goto err_cqb; | |
949 | ||
27827786 SM |
950 | cq->cqe_size = cqe_size; |
951 | ||
952 | cqc = MLX5_ADDR_OF(create_cq_in, cqb, cq_context); | |
953 | MLX5_SET(cqc, cqc, cqe_sz, cqe_sz_to_mlx_sz(cqe_size)); | |
954 | MLX5_SET(cqc, cqc, log_cq_size, ilog2(entries)); | |
955 | MLX5_SET(cqc, cqc, uar_page, index); | |
956 | MLX5_SET(cqc, cqc, c_eqn, eqn); | |
957 | MLX5_SET64(cqc, cqc, dbr_addr, cq->db.dma); | |
958 | if (cq->create_flags & IB_CQ_FLAGS_IGNORE_OVERRUN) | |
959 | MLX5_SET(cqc, cqc, oi, 1); | |
e126ba97 | 960 | |
9603b61d | 961 | err = mlx5_core_create_cq(dev->mdev, &cq->mcq, cqb, inlen); |
e126ba97 EC |
962 | if (err) |
963 | goto err_cqb; | |
964 | ||
965 | mlx5_ib_dbg(dev, "cqn 0x%x\n", cq->mcq.cqn); | |
966 | cq->mcq.irqn = irqn; | |
c16d2750 MB |
967 | if (context) |
968 | cq->mcq.tasklet_ctx.comp = mlx5_ib_cq_comp; | |
969 | else | |
970 | cq->mcq.comp = mlx5_ib_cq_comp; | |
e126ba97 EC |
971 | cq->mcq.event = mlx5_ib_cq_event; |
972 | ||
25361e02 HE |
973 | INIT_LIST_HEAD(&cq->wc_list); |
974 | ||
e126ba97 EC |
975 | if (context) |
976 | if (ib_copy_to_udata(udata, &cq->mcq.cqn, sizeof(__u32))) { | |
977 | err = -EFAULT; | |
978 | goto err_cmd; | |
979 | } | |
980 | ||
981 | ||
479163f4 | 982 | kvfree(cqb); |
e126ba97 EC |
983 | return &cq->ibcq; |
984 | ||
985 | err_cmd: | |
9603b61d | 986 | mlx5_core_destroy_cq(dev->mdev, &cq->mcq); |
e126ba97 EC |
987 | |
988 | err_cqb: | |
479163f4 | 989 | kvfree(cqb); |
e126ba97 EC |
990 | if (context) |
991 | destroy_cq_user(cq, context); | |
992 | else | |
993 | destroy_cq_kernel(dev, cq); | |
994 | ||
995 | err_create: | |
996 | kfree(cq); | |
997 | ||
998 | return ERR_PTR(err); | |
999 | } | |
1000 | ||
1001 | ||
1002 | int mlx5_ib_destroy_cq(struct ib_cq *cq) | |
1003 | { | |
1004 | struct mlx5_ib_dev *dev = to_mdev(cq->device); | |
1005 | struct mlx5_ib_cq *mcq = to_mcq(cq); | |
1006 | struct ib_ucontext *context = NULL; | |
1007 | ||
1008 | if (cq->uobject) | |
1009 | context = cq->uobject->context; | |
1010 | ||
9603b61d | 1011 | mlx5_core_destroy_cq(dev->mdev, &mcq->mcq); |
e126ba97 EC |
1012 | if (context) |
1013 | destroy_cq_user(mcq, context); | |
1014 | else | |
1015 | destroy_cq_kernel(dev, mcq); | |
1016 | ||
1017 | kfree(mcq); | |
1018 | ||
1019 | return 0; | |
1020 | } | |
1021 | ||
cfd8f1d4 | 1022 | static int is_equal_rsn(struct mlx5_cqe64 *cqe64, u32 rsn) |
e126ba97 | 1023 | { |
cfd8f1d4 | 1024 | return rsn == (ntohl(cqe64->sop_drop_qpn) & 0xffffff); |
e126ba97 EC |
1025 | } |
1026 | ||
1027 | void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 rsn, struct mlx5_ib_srq *srq) | |
1028 | { | |
1029 | struct mlx5_cqe64 *cqe64, *dest64; | |
1030 | void *cqe, *dest; | |
1031 | u32 prod_index; | |
1032 | int nfreed = 0; | |
1033 | u8 owner_bit; | |
1034 | ||
1035 | if (!cq) | |
1036 | return; | |
1037 | ||
1038 | /* First we need to find the current producer index, so we | |
1039 | * know where to start cleaning from. It doesn't matter if HW | |
1040 | * adds new entries after this loop -- the QP we're worried | |
1041 | * about is already in RESET, so the new entries won't come | |
1042 | * from our QP and therefore don't need to be checked. | |
1043 | */ | |
1044 | for (prod_index = cq->mcq.cons_index; get_sw_cqe(cq, prod_index); prod_index++) | |
1045 | if (prod_index == cq->mcq.cons_index + cq->ibcq.cqe) | |
1046 | break; | |
1047 | ||
1048 | /* Now sweep backwards through the CQ, removing CQ entries | |
1049 | * that match our QP by copying older entries on top of them. | |
1050 | */ | |
1051 | while ((int) --prod_index - (int) cq->mcq.cons_index >= 0) { | |
1052 | cqe = get_cqe(cq, prod_index & cq->ibcq.cqe); | |
1053 | cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64; | |
cfd8f1d4 ML |
1054 | if (is_equal_rsn(cqe64, rsn)) { |
1055 | if (srq && (ntohl(cqe64->srqn) & 0xffffff)) | |
e126ba97 EC |
1056 | mlx5_ib_free_srq_wqe(srq, be16_to_cpu(cqe64->wqe_counter)); |
1057 | ++nfreed; | |
1058 | } else if (nfreed) { | |
1059 | dest = get_cqe(cq, (prod_index + nfreed) & cq->ibcq.cqe); | |
1060 | dest64 = (cq->mcq.cqe_sz == 64) ? dest : dest + 64; | |
1061 | owner_bit = dest64->op_own & MLX5_CQE_OWNER_MASK; | |
1062 | memcpy(dest, cqe, cq->mcq.cqe_sz); | |
1063 | dest64->op_own = owner_bit | | |
1064 | (dest64->op_own & ~MLX5_CQE_OWNER_MASK); | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | if (nfreed) { | |
1069 | cq->mcq.cons_index += nfreed; | |
1070 | /* Make sure update of buffer contents is done before | |
1071 | * updating consumer index. | |
1072 | */ | |
1073 | wmb(); | |
1074 | mlx5_cq_set_ci(&cq->mcq); | |
1075 | } | |
1076 | } | |
1077 | ||
1078 | void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq) | |
1079 | { | |
1080 | if (!cq) | |
1081 | return; | |
1082 | ||
1083 | spin_lock_irq(&cq->lock); | |
1084 | __mlx5_ib_cq_clean(cq, qpn, srq); | |
1085 | spin_unlock_irq(&cq->lock); | |
1086 | } | |
1087 | ||
1088 | int mlx5_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) | |
1089 | { | |
3bdb31f6 EC |
1090 | struct mlx5_ib_dev *dev = to_mdev(cq->device); |
1091 | struct mlx5_ib_cq *mcq = to_mcq(cq); | |
1092 | int err; | |
3bdb31f6 | 1093 | |
938fe83c | 1094 | if (!MLX5_CAP_GEN(dev->mdev, cq_moderation)) |
3bdb31f6 EC |
1095 | return -ENOSYS; |
1096 | ||
27827786 SM |
1097 | err = mlx5_core_modify_cq_moderation(dev->mdev, &mcq->mcq, |
1098 | cq_period, cq_count); | |
3bdb31f6 EC |
1099 | if (err) |
1100 | mlx5_ib_warn(dev, "modify cq 0x%x failed\n", mcq->mcq.cqn); | |
1101 | ||
1102 | return err; | |
e126ba97 EC |
1103 | } |
1104 | ||
bde51583 EC |
1105 | static int resize_user(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq, |
1106 | int entries, struct ib_udata *udata, int *npas, | |
1107 | int *page_shift, int *cqe_size) | |
1108 | { | |
1109 | struct mlx5_ib_resize_cq ucmd; | |
1110 | struct ib_umem *umem; | |
1111 | int err; | |
1112 | int npages; | |
1113 | struct ib_ucontext *context = cq->buf.umem->context; | |
1114 | ||
57761d8d EC |
1115 | err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); |
1116 | if (err) | |
1117 | return err; | |
1118 | ||
1119 | if (ucmd.reserved0 || ucmd.reserved1) | |
1120 | return -EINVAL; | |
bde51583 EC |
1121 | |
1122 | umem = ib_umem_get(context, ucmd.buf_addr, entries * ucmd.cqe_size, | |
1123 | IB_ACCESS_LOCAL_WRITE, 1); | |
1124 | if (IS_ERR(umem)) { | |
1125 | err = PTR_ERR(umem); | |
1126 | return err; | |
1127 | } | |
1128 | ||
1129 | mlx5_ib_cont_pages(umem, ucmd.buf_addr, &npages, page_shift, | |
1130 | npas, NULL); | |
1131 | ||
1132 | cq->resize_umem = umem; | |
1133 | *cqe_size = ucmd.cqe_size; | |
1134 | ||
1135 | return 0; | |
1136 | } | |
1137 | ||
1138 | static void un_resize_user(struct mlx5_ib_cq *cq) | |
1139 | { | |
1140 | ib_umem_release(cq->resize_umem); | |
1141 | } | |
1142 | ||
1143 | static int resize_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq, | |
1144 | int entries, int cqe_size) | |
1145 | { | |
1146 | int err; | |
1147 | ||
1148 | cq->resize_buf = kzalloc(sizeof(*cq->resize_buf), GFP_KERNEL); | |
1149 | if (!cq->resize_buf) | |
1150 | return -ENOMEM; | |
1151 | ||
1152 | err = alloc_cq_buf(dev, cq->resize_buf, entries, cqe_size); | |
1153 | if (err) | |
1154 | goto ex; | |
1155 | ||
1156 | init_cq_buf(cq, cq->resize_buf); | |
1157 | ||
1158 | return 0; | |
1159 | ||
1160 | ex: | |
1161 | kfree(cq->resize_buf); | |
1162 | return err; | |
1163 | } | |
1164 | ||
1165 | static void un_resize_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq) | |
1166 | { | |
1167 | free_cq_buf(dev, cq->resize_buf); | |
1168 | cq->resize_buf = NULL; | |
1169 | } | |
1170 | ||
1171 | static int copy_resize_cqes(struct mlx5_ib_cq *cq) | |
1172 | { | |
1173 | struct mlx5_ib_dev *dev = to_mdev(cq->ibcq.device); | |
1174 | struct mlx5_cqe64 *scqe64; | |
1175 | struct mlx5_cqe64 *dcqe64; | |
1176 | void *start_cqe; | |
1177 | void *scqe; | |
1178 | void *dcqe; | |
1179 | int ssize; | |
1180 | int dsize; | |
1181 | int i; | |
1182 | u8 sw_own; | |
1183 | ||
1184 | ssize = cq->buf.cqe_size; | |
1185 | dsize = cq->resize_buf->cqe_size; | |
1186 | if (ssize != dsize) { | |
1187 | mlx5_ib_warn(dev, "resize from different cqe size is not supported\n"); | |
1188 | return -EINVAL; | |
1189 | } | |
1190 | ||
1191 | i = cq->mcq.cons_index; | |
1192 | scqe = get_sw_cqe(cq, i); | |
1193 | scqe64 = ssize == 64 ? scqe : scqe + 64; | |
1194 | start_cqe = scqe; | |
1195 | if (!scqe) { | |
1196 | mlx5_ib_warn(dev, "expected cqe in sw ownership\n"); | |
1197 | return -EINVAL; | |
1198 | } | |
1199 | ||
1200 | while ((scqe64->op_own >> 4) != MLX5_CQE_RESIZE_CQ) { | |
1201 | dcqe = get_cqe_from_buf(cq->resize_buf, | |
1202 | (i + 1) & (cq->resize_buf->nent), | |
1203 | dsize); | |
1204 | dcqe64 = dsize == 64 ? dcqe : dcqe + 64; | |
1205 | sw_own = sw_ownership_bit(i + 1, cq->resize_buf->nent); | |
1206 | memcpy(dcqe, scqe, dsize); | |
1207 | dcqe64->op_own = (dcqe64->op_own & ~MLX5_CQE_OWNER_MASK) | sw_own; | |
1208 | ||
1209 | ++i; | |
1210 | scqe = get_sw_cqe(cq, i); | |
1211 | scqe64 = ssize == 64 ? scqe : scqe + 64; | |
1212 | if (!scqe) { | |
1213 | mlx5_ib_warn(dev, "expected cqe in sw ownership\n"); | |
1214 | return -EINVAL; | |
1215 | } | |
1216 | ||
1217 | if (scqe == start_cqe) { | |
1218 | pr_warn("resize CQ failed to get resize CQE, CQN 0x%x\n", | |
1219 | cq->mcq.cqn); | |
1220 | return -ENOMEM; | |
1221 | } | |
1222 | } | |
1223 | ++cq->mcq.cons_index; | |
1224 | return 0; | |
1225 | } | |
1226 | ||
e126ba97 EC |
1227 | int mlx5_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata) |
1228 | { | |
bde51583 EC |
1229 | struct mlx5_ib_dev *dev = to_mdev(ibcq->device); |
1230 | struct mlx5_ib_cq *cq = to_mcq(ibcq); | |
27827786 SM |
1231 | void *cqc; |
1232 | u32 *in; | |
bde51583 EC |
1233 | int err; |
1234 | int npas; | |
27827786 | 1235 | __be64 *pas; |
bde51583 EC |
1236 | int page_shift; |
1237 | int inlen; | |
1238 | int uninitialized_var(cqe_size); | |
1239 | unsigned long flags; | |
1240 | ||
938fe83c | 1241 | if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) { |
bde51583 EC |
1242 | pr_info("Firmware does not support resize CQ\n"); |
1243 | return -ENOSYS; | |
1244 | } | |
1245 | ||
3c4c3774 NO |
1246 | if (entries < 1 || |
1247 | entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) { | |
1248 | mlx5_ib_warn(dev, "wrong entries number %d, max %d\n", | |
1249 | entries, | |
1250 | 1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)); | |
bde51583 | 1251 | return -EINVAL; |
3c4c3774 | 1252 | } |
bde51583 EC |
1253 | |
1254 | entries = roundup_pow_of_two(entries + 1); | |
3c4c3774 | 1255 | if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1) |
bde51583 EC |
1256 | return -EINVAL; |
1257 | ||
1258 | if (entries == ibcq->cqe + 1) | |
1259 | return 0; | |
1260 | ||
1261 | mutex_lock(&cq->resize_mutex); | |
1262 | if (udata) { | |
1263 | err = resize_user(dev, cq, entries, udata, &npas, &page_shift, | |
1264 | &cqe_size); | |
1265 | } else { | |
1266 | cqe_size = 64; | |
1267 | err = resize_kernel(dev, cq, entries, cqe_size); | |
1268 | if (!err) { | |
1269 | npas = cq->resize_buf->buf.npages; | |
1270 | page_shift = cq->resize_buf->buf.page_shift; | |
1271 | } | |
1272 | } | |
1273 | ||
1274 | if (err) | |
1275 | goto ex; | |
1276 | ||
27827786 SM |
1277 | inlen = MLX5_ST_SZ_BYTES(modify_cq_in) + |
1278 | MLX5_FLD_SZ_BYTES(modify_cq_in, pas[0]) * npas; | |
1279 | ||
bde51583 EC |
1280 | in = mlx5_vzalloc(inlen); |
1281 | if (!in) { | |
1282 | err = -ENOMEM; | |
1283 | goto ex_resize; | |
1284 | } | |
1285 | ||
27827786 | 1286 | pas = (__be64 *)MLX5_ADDR_OF(modify_cq_in, in, pas); |
bde51583 EC |
1287 | if (udata) |
1288 | mlx5_ib_populate_pas(dev, cq->resize_umem, page_shift, | |
27827786 | 1289 | pas, 0); |
bde51583 | 1290 | else |
27827786 SM |
1291 | mlx5_fill_page_array(&cq->resize_buf->buf, pas); |
1292 | ||
1293 | MLX5_SET(modify_cq_in, in, | |
1294 | modify_field_select_resize_field_select.resize_field_select.resize_field_select, | |
1295 | MLX5_MODIFY_CQ_MASK_LOG_SIZE | | |
1296 | MLX5_MODIFY_CQ_MASK_PG_OFFSET | | |
1297 | MLX5_MODIFY_CQ_MASK_PG_SIZE); | |
1298 | ||
1299 | cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context); | |
1300 | ||
1301 | MLX5_SET(cqc, cqc, log_page_size, | |
1302 | page_shift - MLX5_ADAPTER_PAGE_SHIFT); | |
1303 | MLX5_SET(cqc, cqc, cqe_sz, cqe_sz_to_mlx_sz(cqe_size)); | |
1304 | MLX5_SET(cqc, cqc, log_cq_size, ilog2(entries)); | |
1305 | ||
1306 | MLX5_SET(modify_cq_in, in, op_mod, MLX5_CQ_OPMOD_RESIZE); | |
1307 | MLX5_SET(modify_cq_in, in, cqn, cq->mcq.cqn); | |
bde51583 | 1308 | |
9603b61d | 1309 | err = mlx5_core_modify_cq(dev->mdev, &cq->mcq, in, inlen); |
bde51583 EC |
1310 | if (err) |
1311 | goto ex_alloc; | |
1312 | ||
1313 | if (udata) { | |
1314 | cq->ibcq.cqe = entries - 1; | |
1315 | ib_umem_release(cq->buf.umem); | |
1316 | cq->buf.umem = cq->resize_umem; | |
1317 | cq->resize_umem = NULL; | |
1318 | } else { | |
1319 | struct mlx5_ib_cq_buf tbuf; | |
1320 | int resized = 0; | |
1321 | ||
1322 | spin_lock_irqsave(&cq->lock, flags); | |
1323 | if (cq->resize_buf) { | |
1324 | err = copy_resize_cqes(cq); | |
1325 | if (!err) { | |
1326 | tbuf = cq->buf; | |
1327 | cq->buf = *cq->resize_buf; | |
1328 | kfree(cq->resize_buf); | |
1329 | cq->resize_buf = NULL; | |
1330 | resized = 1; | |
1331 | } | |
1332 | } | |
1333 | cq->ibcq.cqe = entries - 1; | |
1334 | spin_unlock_irqrestore(&cq->lock, flags); | |
1335 | if (resized) | |
1336 | free_cq_buf(dev, &tbuf); | |
1337 | } | |
1338 | mutex_unlock(&cq->resize_mutex); | |
1339 | ||
479163f4 | 1340 | kvfree(in); |
bde51583 EC |
1341 | return 0; |
1342 | ||
1343 | ex_alloc: | |
479163f4 | 1344 | kvfree(in); |
bde51583 EC |
1345 | |
1346 | ex_resize: | |
1347 | if (udata) | |
1348 | un_resize_user(cq); | |
1349 | else | |
1350 | un_resize_kernel(dev, cq); | |
1351 | ex: | |
1352 | mutex_unlock(&cq->resize_mutex); | |
1353 | return err; | |
e126ba97 EC |
1354 | } |
1355 | ||
1356 | int mlx5_ib_get_cqe_size(struct mlx5_ib_dev *dev, struct ib_cq *ibcq) | |
1357 | { | |
1358 | struct mlx5_ib_cq *cq; | |
1359 | ||
1360 | if (!ibcq) | |
1361 | return 128; | |
1362 | ||
1363 | cq = to_mcq(ibcq); | |
1364 | return cq->cqe_size; | |
1365 | } | |
25361e02 HE |
1366 | |
1367 | /* Called from atomic context */ | |
1368 | int mlx5_ib_generate_wc(struct ib_cq *ibcq, struct ib_wc *wc) | |
1369 | { | |
1370 | struct mlx5_ib_wc *soft_wc; | |
1371 | struct mlx5_ib_cq *cq = to_mcq(ibcq); | |
1372 | unsigned long flags; | |
1373 | ||
1374 | soft_wc = kmalloc(sizeof(*soft_wc), GFP_ATOMIC); | |
1375 | if (!soft_wc) | |
1376 | return -ENOMEM; | |
1377 | ||
1378 | soft_wc->wc = *wc; | |
1379 | spin_lock_irqsave(&cq->lock, flags); | |
1380 | list_add_tail(&soft_wc->list, &cq->wc_list); | |
1381 | if (cq->notify_flags == IB_CQ_NEXT_COMP || | |
1382 | wc->status != IB_WC_SUCCESS) { | |
1383 | cq->notify_flags = 0; | |
1384 | schedule_work(&cq->notify_work); | |
1385 | } | |
1386 | spin_unlock_irqrestore(&cq->lock, flags); | |
1387 | ||
1388 | return 0; | |
1389 | } |