projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
IB/user_mad: Fix buggy usage of port index
[deliverable/linux.git] / drivers / infiniband / hw / mlx5 / main.c
CommitLineData
e126ba97 1/*
6cf0a15f 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
e126ba97
EC		 3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <asm-generic/kmap_types.h>
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/errno.h>
37#include <linux/pci.h>
38#include <linux/dma-mapping.h>
39#include <linux/slab.h>
40#include <linux/io-mapping.h>
41#include <linux/sched.h>
42#include <rdma/ib_user_verbs.h>
43#include <rdma/ib_smi.h>
44#include <rdma/ib_umem.h>
45#include "user.h"
46#include "mlx5_ib.h"
47
48#define DRIVER_NAME "mlx5_ib"
169a1d85
AV		 49#define DRIVER_VERSION "2.2-1"
50#define DRIVER_RELDATE "Feb 2014"
e126ba97
EC		 51
52MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
53MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
54MODULE_LICENSE("Dual BSD/GPL");
55MODULE_VERSION(DRIVER_VERSION);
56
9603b61d
JM		 57static int deprecated_prof_sel = 2;
58module_param_named(prof_sel, deprecated_prof_sel, int, 0444);
59MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core");
e126ba97
EC		 60
61static char mlx5_version[] =
62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
64
e126ba97
EC		 65static int mlx5_ib_query_device(struct ib_device *ibdev,
66 struct ib_device_attr *props)
67{
68 struct mlx5_ib_dev *dev = to_mdev(ibdev);
69 struct ib_smp *in_mad = NULL;
70 struct ib_smp *out_mad = NULL;
c7a08ac7 71 struct mlx5_general_caps *gen;
e126ba97
EC		 72 int err = -ENOMEM;
73 int max_rq_sg;
74 int max_sq_sg;
75 u64 flags;
76
c7a08ac7 77 gen = &dev->mdev->caps.gen;
e126ba97
EC		 78 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
79 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
80 if (!in_mad || !out_mad)
81 goto out;
82
83 init_query_mad(in_mad);
84 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
85
86 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
87 if (err)
88 goto out;
89
90 memset(props, 0, sizeof(*props));
91
9603b61d
JM		 92 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
93 (fw_rev_min(dev->mdev) << 16) |
94 fw_rev_sub(dev->mdev);
e126ba97
EC		 95 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
96 IB_DEVICE_PORT_ACTIVE_EVENT |
97 IB_DEVICE_SYS_IMAGE_GUID |
1a4c3a3d 98 IB_DEVICE_RC_RNR_NAK_GEN;
c7a08ac7 99 flags = gen->flags;
e126ba97
EC		 100 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
101 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
102 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
103 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
104 if (flags & MLX5_DEV_CAP_FLAG_APM)
105 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
106 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
107 if (flags & MLX5_DEV_CAP_FLAG_XRC)
108 props->device_cap_flags |= IB_DEVICE_XRC;
109 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
2dea9094
SG		 110 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
111 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
112 /* At this stage no support for signature handover */
113 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
114 IB_PROT_T10DIF_TYPE_2 |
115 IB_PROT_T10DIF_TYPE_3;
116 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
117 IB_GUARD_T10DIF_CSUM;
118 }
f360d88a
EC		 119 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
120 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
e126ba97
EC		 121
122 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
123 0xffffff;
124 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
125 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
126 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
127
128 props->max_mr_size = ~0ull;
c7a08ac7
EC		 129 props->page_size_cap = gen->min_page_sz;
130 props->max_qp = 1 << gen->log_max_qp;
131 props->max_qp_wr = gen->max_wqes;
132 max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
133 max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
e126ba97
EC		 134 sizeof(struct mlx5_wqe_data_seg);
135 props->max_sge = min(max_rq_sg, max_sq_sg);
c7a08ac7
EC		 136 props->max_cq = 1 << gen->log_max_cq;
137 props->max_cqe = gen->max_cqes - 1;
138 props->max_mr = 1 << gen->log_max_mkey;
139 props->max_pd = 1 << gen->log_max_pd;
140 props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp;
141 props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp;
142 props->max_srq = 1 << gen->log_max_srq;
143 props->max_srq_wr = gen->max_srq_wqes - 1;
144 props->local_ca_ack_delay = gen->local_ca_ack_delay;
e126ba97 145 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
e126ba97
EC		 146 props->max_srq_sge = max_rq_sg - 1;
147 props->max_fast_reg_page_list_len = (unsigned int)-1;
c7a08ac7 148 props->local_ca_ack_delay = gen->local_ca_ack_delay;
81bea28f
EC		 149 props->atomic_cap = IB_ATOMIC_NONE;
150 props->masked_atomic_cap = IB_ATOMIC_NONE;
e126ba97 151 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
c7a08ac7
EC		 152 props->max_mcast_grp = 1 << gen->log_max_mcg;
153 props->max_mcast_qp_attach = gen->max_qp_mcg;
e126ba97
EC		 154 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
155 props->max_mcast_grp;
156 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
157
8cdd312c
HE		 158#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
159 if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)
160 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
161 props->odp_caps = dev->odp_caps;
162#endif
163
e126ba97
EC		 164out:
165 kfree(in_mad);
166 kfree(out_mad);
167
168 return err;
169}
170
171int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
172 struct ib_port_attr *props)
173{
174 struct mlx5_ib_dev *dev = to_mdev(ibdev);
175 struct ib_smp *in_mad = NULL;
176 struct ib_smp *out_mad = NULL;
c7a08ac7 177 struct mlx5_general_caps *gen;
e126ba97
EC		 178 int ext_active_speed;
179 int err = -ENOMEM;
180
c7a08ac7
EC		 181 gen = &dev->mdev->caps.gen;
182 if (port < 1 || port > gen->num_ports) {
e126ba97
EC		 183 mlx5_ib_warn(dev, "invalid port number %d\n", port);
184 return -EINVAL;
185 }
186
187 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
188 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
189 if (!in_mad || !out_mad)
190 goto out;
191
192 memset(props, 0, sizeof(*props));
193
194 init_query_mad(in_mad);
195 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
196 in_mad->attr_mod = cpu_to_be32(port);
197
198 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
199 if (err) {
200 mlx5_ib_warn(dev, "err %d\n", err);
201 goto out;
202 }
203
204
205 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
206 props->lmc = out_mad->data[34] & 0x7;
207 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
208 props->sm_sl = out_mad->data[36] & 0xf;
209 props->state = out_mad->data[32] & 0xf;
210 props->phys_state = out_mad->data[33] >> 4;
211 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
212 props->gid_tbl_len = out_mad->data[50];
c7a08ac7
EC		 213 props->max_msg_sz = 1 << gen->log_max_msg;
214 props->pkey_tbl_len = gen->port[port - 1].pkey_table_len;
e126ba97
EC		 215 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
216 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
217 props->active_width = out_mad->data[31] & 0xf;
218 props->active_speed = out_mad->data[35] >> 4;
219 props->max_mtu = out_mad->data[41] & 0xf;
220 props->active_mtu = out_mad->data[36] >> 4;
221 props->subnet_timeout = out_mad->data[51] & 0x1f;
222 props->max_vl_num = out_mad->data[37] >> 4;
223 props->init_type_reply = out_mad->data[41] >> 4;
224
225 /* Check if extended speeds (EDR/FDR/...) are supported */
226 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
227 ext_active_speed = out_mad->data[62] >> 4;
228
229 switch (ext_active_speed) {
230 case 1:
231 props->active_speed = 16; /* FDR */
232 break;
233 case 2:
234 props->active_speed = 32; /* EDR */
235 break;
236 }
237 }
238
239 /* If reported active speed is QDR, check if is FDR-10 */
240 if (props->active_speed == 4) {
c7a08ac7 241 if (gen->ext_port_cap[port - 1] &
e126ba97
EC		 242 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
243 init_query_mad(in_mad);
244 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
245 in_mad->attr_mod = cpu_to_be32(port);
246
247 err = mlx5_MAD_IFC(dev, 1, 1, port,
248 NULL, NULL, in_mad, out_mad);
249 if (err)
250 goto out;
251
252 /* Checking LinkSpeedActive for FDR-10 */
253 if (out_mad->data[15] & 0x1)
254 props->active_speed = 8;
255 }
256 }
257
258out:
259 kfree(in_mad);
260 kfree(out_mad);
261
262 return err;
263}
264
6b90a6d6
MW		 265static enum rdma_protocol_type
266mlx5_ib_query_protocol(struct ib_device *device, u8 port_num)
267{
268 return RDMA_PROTOCOL_IB;
269}
270
e126ba97
EC		 271static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
272 union ib_gid *gid)
273{
274 struct ib_smp *in_mad = NULL;
275 struct ib_smp *out_mad = NULL;
276 int err = -ENOMEM;
277
278 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
279 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
280 if (!in_mad || !out_mad)
281 goto out;
282
283 init_query_mad(in_mad);
284 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
285 in_mad->attr_mod = cpu_to_be32(port);
286
287 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
288 if (err)
289 goto out;
290
291 memcpy(gid->raw, out_mad->data + 8, 8);
292
293 init_query_mad(in_mad);
294 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
295 in_mad->attr_mod = cpu_to_be32(index / 8);
296
297 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
298 if (err)
299 goto out;
300
301 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
302
303out:
304 kfree(in_mad);
305 kfree(out_mad);
306 return err;
307}
308
309static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
310 u16 *pkey)
311{
312 struct ib_smp *in_mad = NULL;
313 struct ib_smp *out_mad = NULL;
314 int err = -ENOMEM;
315
316 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
317 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
318 if (!in_mad || !out_mad)
319 goto out;
320
321 init_query_mad(in_mad);
322 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
323 in_mad->attr_mod = cpu_to_be32(index / 32);
324
325 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
326 if (err)
327 goto out;
328
329 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
330
331out:
332 kfree(in_mad);
333 kfree(out_mad);
334 return err;
335}
336
337struct mlx5_reg_node_desc {
338 u8 desc[64];
339};
340
341static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
342 struct ib_device_modify *props)
343{
344 struct mlx5_ib_dev *dev = to_mdev(ibdev);
345 struct mlx5_reg_node_desc in;
346 struct mlx5_reg_node_desc out;
347 int err;
348
349 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
350 return -EOPNOTSUPP;
351
352 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
353 return 0;
354
355 /*
356 * If possible, pass node desc to FW, so it can generate
357 * a 144 trap. If cmd fails, just ignore.
358 */
359 memcpy(&in, props->node_desc, 64);
9603b61d 360 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out,
e126ba97
EC		 361 sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
362 if (err)
363 return err;
364
365 memcpy(ibdev->node_desc, props->node_desc, 64);
366
367 return err;
368}
369
370static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
371 struct ib_port_modify *props)
372{
373 struct mlx5_ib_dev *dev = to_mdev(ibdev);
374 struct ib_port_attr attr;
375 u32 tmp;
376 int err;
377
378 mutex_lock(&dev->cap_mask_mutex);
379
380 err = mlx5_ib_query_port(ibdev, port, &attr);
381 if (err)
382 goto out;
383
384 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
385 ~props->clr_port_cap_mask;
386
9603b61d 387 err = mlx5_set_port_caps(dev->mdev, port, tmp);
e126ba97
EC		 388
389out:
390 mutex_unlock(&dev->cap_mask_mutex);
391 return err;
392}
393
394static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
395 struct ib_udata *udata)
396{
397 struct mlx5_ib_dev *dev = to_mdev(ibdev);
78c0f98c 398 struct mlx5_ib_alloc_ucontext_req_v2 req;
e126ba97
EC		 399 struct mlx5_ib_alloc_ucontext_resp resp;
400 struct mlx5_ib_ucontext *context;
c7a08ac7 401 struct mlx5_general_caps *gen;
e126ba97
EC		 402 struct mlx5_uuar_info *uuari;
403 struct mlx5_uar *uars;
c1be5232 404 int gross_uuars;
e126ba97 405 int num_uars;
78c0f98c 406 int ver;
e126ba97
EC		 407 int uuarn;
408 int err;
409 int i;
f241e749 410 size_t reqlen;
e126ba97 411
c7a08ac7 412 gen = &dev->mdev->caps.gen;
e126ba97
EC		 413 if (!dev->ib_active)
414 return ERR_PTR(-EAGAIN);
415
78c0f98c
EC		 416 memset(&req, 0, sizeof(req));
417 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
418 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
419 ver = 0;
420 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
421 ver = 2;
422 else
423 return ERR_PTR(-EINVAL);
424
425 err = ib_copy_from_udata(&req, udata, reqlen);
e126ba97
EC		 426 if (err)
427 return ERR_PTR(err);
428
78c0f98c
EC		 429 if (req.flags || req.reserved)
430 return ERR_PTR(-EINVAL);
431
e126ba97
EC		 432 if (req.total_num_uuars > MLX5_MAX_UUARS)
433 return ERR_PTR(-ENOMEM);
434
435 if (req.total_num_uuars == 0)
436 return ERR_PTR(-EINVAL);
437
c1be5232
EC		 438 req.total_num_uuars = ALIGN(req.total_num_uuars,
439 MLX5_NON_FP_BF_REGS_PER_PAGE);
e126ba97
EC		 440 if (req.num_low_latency_uuars > req.total_num_uuars - 1)
441 return ERR_PTR(-EINVAL);
442
c1be5232
EC		 443 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
444 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
c7a08ac7
EC		 445 resp.qp_tab_size = 1 << gen->log_max_qp;
446 resp.bf_reg_size = gen->bf_reg_size;
e126ba97 447 resp.cache_line_size = L1_CACHE_BYTES;
c7a08ac7
EC		 448 resp.max_sq_desc_sz = gen->max_sq_desc_sz;
449 resp.max_rq_desc_sz = gen->max_rq_desc_sz;
450 resp.max_send_wqebb = gen->max_wqes;
451 resp.max_recv_wr = gen->max_wqes;
452 resp.max_srq_recv_wr = gen->max_srq_wqes;
e126ba97
EC		 453
454 context = kzalloc(sizeof(*context), GFP_KERNEL);
455 if (!context)
456 return ERR_PTR(-ENOMEM);
457
458 uuari = &context->uuari;
459 mutex_init(&uuari->lock);
460 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
461 if (!uars) {
462 err = -ENOMEM;
463 goto out_ctx;
464 }
465
c1be5232 466 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
e126ba97
EC		 467 sizeof(*uuari->bitmap),
468 GFP_KERNEL);
469 if (!uuari->bitmap) {
470 err = -ENOMEM;
471 goto out_uar_ctx;
472 }
473 /*
474 * clear all fast path uuars
475 */
c1be5232 476 for (i = 0; i < gross_uuars; i++) {
e126ba97
EC		 477 uuarn = i & 3;
478 if (uuarn == 2 || uuarn == 3)
479 set_bit(i, uuari->bitmap);
480 }
481
c1be5232 482 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
e126ba97
EC		 483 if (!uuari->count) {
484 err = -ENOMEM;
485 goto out_bitmap;
486 }
487
488 for (i = 0; i < num_uars; i++) {
9603b61d 489 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index);
e126ba97
EC		 490 if (err)
491 goto out_count;
492 }
493
b4cfe447
HE		 494#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
495 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range;
496#endif
497
e126ba97
EC		 498 INIT_LIST_HEAD(&context->db_page_list);
499 mutex_init(&context->db_page_mutex);
500
501 resp.tot_uuars = req.total_num_uuars;
c7a08ac7 502 resp.num_ports = gen->num_ports;
92b0ca7c
DC		 503 err = ib_copy_to_udata(udata, &resp,
504 sizeof(resp) - sizeof(resp.reserved));
e126ba97
EC		 505 if (err)
506 goto out_uars;
507
78c0f98c 508 uuari->ver = ver;
e126ba97
EC		 509 uuari->num_low_latency_uuars = req.num_low_latency_uuars;
510 uuari->uars = uars;
511 uuari->num_uars = num_uars;
512 return &context->ibucontext;
513
514out_uars:
515 for (i--; i >= 0; i--)
9603b61d 516 mlx5_cmd_free_uar(dev->mdev, uars[i].index);
e126ba97
EC		 517out_count:
518 kfree(uuari->count);
519
520out_bitmap:
521 kfree(uuari->bitmap);
522
523out_uar_ctx:
524 kfree(uars);
525
526out_ctx:
527 kfree(context);
528 return ERR_PTR(err);
529}
530
531static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
532{
533 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
534 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
535 struct mlx5_uuar_info *uuari = &context->uuari;
536 int i;
537
538 for (i = 0; i < uuari->num_uars; i++) {
9603b61d 539 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
e126ba97
EC		 540 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
541 }
542
543 kfree(uuari->count);
544 kfree(uuari->bitmap);
545 kfree(uuari->uars);
546 kfree(context);
547
548 return 0;
549}
550
551static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
552{
9603b61d 553 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index;
e126ba97
EC		 554}
555
556static int get_command(unsigned long offset)
557{
558 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
559}
560
561static int get_arg(unsigned long offset)
562{
563 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
564}
565
566static int get_index(unsigned long offset)
567{
568 return get_arg(offset);
569}
570
571static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
572{
573 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
574 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
575 struct mlx5_uuar_info *uuari = &context->uuari;
576 unsigned long command;
577 unsigned long idx;
578 phys_addr_t pfn;
579
580 command = get_command(vma->vm_pgoff);
581 switch (command) {
582 case MLX5_IB_MMAP_REGULAR_PAGE:
583 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
584 return -EINVAL;
585
586 idx = get_index(vma->vm_pgoff);
1c3ce90d
EC		 587 if (idx >= uuari->num_uars)
588 return -EINVAL;
589
e126ba97
EC		 590 pfn = uar_index2pfn(dev, uuari->uars[idx].index);
591 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
592 (unsigned long long)pfn);
593
e126ba97
EC		 594 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
595 if (io_remap_pfn_range(vma, vma->vm_start, pfn,
596 PAGE_SIZE, vma->vm_page_prot))
597 return -EAGAIN;
598
599 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
600 vma->vm_start,
601 (unsigned long long)pfn << PAGE_SHIFT);
602 break;
603
604 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
605 return -ENOSYS;
606
607 default:
608 return -EINVAL;
609 }
610
611 return 0;
612}
613
614static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
615{
616 struct mlx5_create_mkey_mbox_in *in;
617 struct mlx5_mkey_seg *seg;
618 struct mlx5_core_mr mr;
619 int err;
620
621 in = kzalloc(sizeof(*in), GFP_KERNEL);
622 if (!in)
623 return -ENOMEM;
624
625 seg = &in->seg;
626 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
627 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
628 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
629 seg->start_addr = 0;
630
9603b61d 631 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
746b5583 632 NULL, NULL, NULL);
e126ba97
EC		 633 if (err) {
634 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
635 goto err_in;
636 }
637
638 kfree(in);
639 *key = mr.key;
640
641 return 0;
642
643err_in:
644 kfree(in);
645
646 return err;
647}
648
649static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
650{
651 struct mlx5_core_mr mr;
652 int err;
653
654 memset(&mr, 0, sizeof(mr));
655 mr.key = key;
9603b61d 656 err = mlx5_core_destroy_mkey(dev->mdev, &mr);
e126ba97
EC		 657 if (err)
658 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
659}
660
661static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
662 struct ib_ucontext *context,
663 struct ib_udata *udata)
664{
665 struct mlx5_ib_alloc_pd_resp resp;
666 struct mlx5_ib_pd *pd;
667 int err;
668
669 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
670 if (!pd)
671 return ERR_PTR(-ENOMEM);
672
9603b61d 673 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn);
e126ba97
EC		 674 if (err) {
675 kfree(pd);
676 return ERR_PTR(err);
677 }
678
679 if (context) {
680 resp.pdn = pd->pdn;
681 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
9603b61d 682 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 683 kfree(pd);
684 return ERR_PTR(-EFAULT);
685 }
686 } else {
687 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
688 if (err) {
9603b61d 689 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 690 kfree(pd);
691 return ERR_PTR(err);
692 }
693 }
694
695 return &pd->ibpd;
696}
697
698static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
699{
700 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
701 struct mlx5_ib_pd *mpd = to_mpd(pd);
702
703 if (!pd->uobject)
704 free_pa_mkey(mdev, mpd->pa_lkey);
705
9603b61d 706 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
e126ba97
EC		 707 kfree(mpd);
708
709 return 0;
710}
711
712static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
713{
714 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
715 int err;
716
9603b61d 717 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 718 if (err)
719 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
720 ibqp->qp_num, gid->raw);
721
722 return err;
723}
724
725static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
726{
727 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
728 int err;
729
9603b61d 730 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 731 if (err)
732 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
733 ibqp->qp_num, gid->raw);
734
735 return err;
736}
737
738static int init_node_data(struct mlx5_ib_dev *dev)
739{
740 struct ib_smp *in_mad = NULL;
741 struct ib_smp *out_mad = NULL;
742 int err = -ENOMEM;
743
744 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
745 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
746 if (!in_mad || !out_mad)
747 goto out;
748
749 init_query_mad(in_mad);
750 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
751
752 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
753 if (err)
754 goto out;
755
756 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
757
758 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
759
760 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
761 if (err)
762 goto out;
763
9603b61d 764 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
e126ba97
EC		 765 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
766
767out:
768 kfree(in_mad);
769 kfree(out_mad);
770 return err;
771}
772
773static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
774 char *buf)
775{
776 struct mlx5_ib_dev *dev =
777 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
778
9603b61d 779 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
e126ba97
EC		 780}
781
782static ssize_t show_reg_pages(struct device *device,
783 struct device_attribute *attr, char *buf)
784{
785 struct mlx5_ib_dev *dev =
786 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
787
6aec21f6 788 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
e126ba97
EC		 789}
790
791static ssize_t show_hca(struct device *device, struct device_attribute *attr,
792 char *buf)
793{
794 struct mlx5_ib_dev *dev =
795 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 796 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
e126ba97
EC		 797}
798
799static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
800 char *buf)
801{
802 struct mlx5_ib_dev *dev =
803 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d
JM		 804 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
805 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
e126ba97
EC		 806}
807
808static ssize_t show_rev(struct device *device, struct device_attribute *attr,
809 char *buf)
810{
811 struct mlx5_ib_dev *dev =
812 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 813 return sprintf(buf, "%x\n", dev->mdev->rev_id);
e126ba97
EC		 814}
815
816static ssize_t show_board(struct device *device, struct device_attribute *attr,
817 char *buf)
818{
819 struct mlx5_ib_dev *dev =
820 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
821 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
9603b61d 822 dev->mdev->board_id);
e126ba97
EC		 823}
824
825static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
826static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
827static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
828static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
829static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
830static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
831
832static struct device_attribute *mlx5_class_attributes[] = {
833 &dev_attr_hw_rev,
834 &dev_attr_fw_ver,
835 &dev_attr_hca_type,
836 &dev_attr_board_id,
837 &dev_attr_fw_pages,
838 &dev_attr_reg_pages,
839};
840
9603b61d 841static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context,
4d2f9bbb 842 enum mlx5_dev_event event, unsigned long param)
e126ba97 843{
9603b61d 844 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
e126ba97 845 struct ib_event ibev;
9603b61d 846
e126ba97
EC		 847 u8 port = 0;
848
849 switch (event) {
850 case MLX5_DEV_EVENT_SYS_ERROR:
851 ibdev->ib_active = false;
852 ibev.event = IB_EVENT_DEVICE_FATAL;
853 break;
854
855 case MLX5_DEV_EVENT_PORT_UP:
856 ibev.event = IB_EVENT_PORT_ACTIVE;
4d2f9bbb 857 port = (u8)param;
e126ba97
EC		 858 break;
859
860 case MLX5_DEV_EVENT_PORT_DOWN:
861 ibev.event = IB_EVENT_PORT_ERR;
4d2f9bbb 862 port = (u8)param;
e126ba97
EC		 863 break;
864
865 case MLX5_DEV_EVENT_PORT_INITIALIZED:
866 /* not used by ULPs */
867 return;
868
869 case MLX5_DEV_EVENT_LID_CHANGE:
870 ibev.event = IB_EVENT_LID_CHANGE;
4d2f9bbb 871 port = (u8)param;
e126ba97
EC		 872 break;
873
874 case MLX5_DEV_EVENT_PKEY_CHANGE:
875 ibev.event = IB_EVENT_PKEY_CHANGE;
4d2f9bbb 876 port = (u8)param;
e126ba97
EC		 877 break;
878
879 case MLX5_DEV_EVENT_GUID_CHANGE:
880 ibev.event = IB_EVENT_GID_CHANGE;
4d2f9bbb 881 port = (u8)param;
e126ba97
EC		 882 break;
883
884 case MLX5_DEV_EVENT_CLIENT_REREG:
885 ibev.event = IB_EVENT_CLIENT_REREGISTER;
4d2f9bbb 886 port = (u8)param;
e126ba97
EC		 887 break;
888 }
889
890 ibev.device = &ibdev->ib_dev;
891 ibev.element.port_num = port;
892
a0c84c32
EC		 893 if (port < 1 || port > ibdev->num_ports) {
894 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
895 return;
896 }
897
e126ba97
EC		 898 if (ibdev->ib_active)
899 ib_dispatch_event(&ibev);
900}
901
902static void get_ext_port_caps(struct mlx5_ib_dev *dev)
903{
c7a08ac7 904 struct mlx5_general_caps *gen;
e126ba97
EC		 905 int port;
906
c7a08ac7
EC		 907 gen = &dev->mdev->caps.gen;
908 for (port = 1; port <= gen->num_ports; port++)
e126ba97
EC		 909 mlx5_query_ext_port_caps(dev, port);
910}
911
912static int get_port_caps(struct mlx5_ib_dev *dev)
913{
914 struct ib_device_attr *dprops = NULL;
915 struct ib_port_attr *pprops = NULL;
c7a08ac7 916 struct mlx5_general_caps *gen;
f614fc15 917 int err = -ENOMEM;
e126ba97
EC		 918 int port;
919
c7a08ac7 920 gen = &dev->mdev->caps.gen;
e126ba97
EC		 921 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
922 if (!pprops)
923 goto out;
924
925 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
926 if (!dprops)
927 goto out;
928
929 err = mlx5_ib_query_device(&dev->ib_dev, dprops);
930 if (err) {
931 mlx5_ib_warn(dev, "query_device failed %d\n", err);
932 goto out;
933 }
934
c7a08ac7 935 for (port = 1; port <= gen->num_ports; port++) {
e126ba97
EC		 936 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
937 if (err) {
938 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
939 break;
940 }
c7a08ac7
EC		 941 gen->port[port - 1].pkey_table_len = dprops->max_pkeys;
942 gen->port[port - 1].gid_table_len = pprops->gid_tbl_len;
e126ba97
EC		 943 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
944 dprops->max_pkeys, pprops->gid_tbl_len);
945 }
946
947out:
948 kfree(pprops);
949 kfree(dprops);
950
951 return err;
952}
953
954static void destroy_umrc_res(struct mlx5_ib_dev *dev)
955{
956 int err;
957
958 err = mlx5_mr_cache_cleanup(dev);
959 if (err)
960 mlx5_ib_warn(dev, "mr cache cleanup failed\n");
961
962 mlx5_ib_destroy_qp(dev->umrc.qp);
963 ib_destroy_cq(dev->umrc.cq);
964 ib_dereg_mr(dev->umrc.mr);
965 ib_dealloc_pd(dev->umrc.pd);
966}
967
968enum {
969 MAX_UMR_WR = 128,
970};
971
972static int create_umr_res(struct mlx5_ib_dev *dev)
973{
974 struct ib_qp_init_attr *init_attr = NULL;
975 struct ib_qp_attr *attr = NULL;
976 struct ib_pd *pd;
977 struct ib_cq *cq;
978 struct ib_qp *qp;
979 struct ib_mr *mr;
980 int ret;
981
982 attr = kzalloc(sizeof(*attr), GFP_KERNEL);
983 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
984 if (!attr || !init_attr) {
985 ret = -ENOMEM;
986 goto error_0;
987 }
988
989 pd = ib_alloc_pd(&dev->ib_dev);
990 if (IS_ERR(pd)) {
991 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
992 ret = PTR_ERR(pd);
993 goto error_0;
994 }
995
996 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
997 if (IS_ERR(mr)) {
998 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
999 ret = PTR_ERR(mr);
1000 goto error_1;
1001 }
1002
1003 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
1004 0);
1005 if (IS_ERR(cq)) {
1006 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
1007 ret = PTR_ERR(cq);
1008 goto error_2;
1009 }
1010 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
1011
1012 init_attr->send_cq = cq;
1013 init_attr->recv_cq = cq;
1014 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
1015 init_attr->cap.max_send_wr = MAX_UMR_WR;
1016 init_attr->cap.max_send_sge = 1;
1017 init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
1018 init_attr->port_num = 1;
1019 qp = mlx5_ib_create_qp(pd, init_attr, NULL);
1020 if (IS_ERR(qp)) {
1021 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
1022 ret = PTR_ERR(qp);
1023 goto error_3;
1024 }
1025 qp->device = &dev->ib_dev;
1026 qp->real_qp = qp;
1027 qp->uobject = NULL;
1028 qp->qp_type = MLX5_IB_QPT_REG_UMR;
1029
1030 attr->qp_state = IB_QPS_INIT;
1031 attr->port_num = 1;
1032 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
1033 IB_QP_PORT, NULL);
1034 if (ret) {
1035 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
1036 goto error_4;
1037 }
1038
1039 memset(attr, 0, sizeof(*attr));
1040 attr->qp_state = IB_QPS_RTR;
1041 attr->path_mtu = IB_MTU_256;
1042
1043 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1044 if (ret) {
1045 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
1046 goto error_4;
1047 }
1048
1049 memset(attr, 0, sizeof(*attr));
1050 attr->qp_state = IB_QPS_RTS;
1051 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1052 if (ret) {
1053 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
1054 goto error_4;
1055 }
1056
1057 dev->umrc.qp = qp;
1058 dev->umrc.cq = cq;
1059 dev->umrc.mr = mr;
1060 dev->umrc.pd = pd;
1061
1062 sema_init(&dev->umrc.sem, MAX_UMR_WR);
1063 ret = mlx5_mr_cache_init(dev);
1064 if (ret) {
1065 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
1066 goto error_4;
1067 }
1068
1069 kfree(attr);
1070 kfree(init_attr);
1071
1072 return 0;
1073
1074error_4:
1075 mlx5_ib_destroy_qp(qp);
1076
1077error_3:
1078 ib_destroy_cq(cq);
1079
1080error_2:
1081 ib_dereg_mr(mr);
1082
1083error_1:
1084 ib_dealloc_pd(pd);
1085
1086error_0:
1087 kfree(attr);
1088 kfree(init_attr);
1089 return ret;
1090}
1091
1092static int create_dev_resources(struct mlx5_ib_resources *devr)
1093{
1094 struct ib_srq_init_attr attr;
1095 struct mlx5_ib_dev *dev;
1096 int ret = 0;
1097
1098 dev = container_of(devr, struct mlx5_ib_dev, devr);
1099
1100 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1101 if (IS_ERR(devr->p0)) {
1102 ret = PTR_ERR(devr->p0);
1103 goto error0;
1104 }
1105 devr->p0->device = &dev->ib_dev;
1106 devr->p0->uobject = NULL;
1107 atomic_set(&devr->p0->usecnt, 0);
1108
1109 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
1110 if (IS_ERR(devr->c0)) {
1111 ret = PTR_ERR(devr->c0);
1112 goto error1;
1113 }
1114 devr->c0->device = &dev->ib_dev;
1115 devr->c0->uobject = NULL;
1116 devr->c0->comp_handler = NULL;
1117 devr->c0->event_handler = NULL;
1118 devr->c0->cq_context = NULL;
1119 atomic_set(&devr->c0->usecnt, 0);
1120
1121 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1122 if (IS_ERR(devr->x0)) {
1123 ret = PTR_ERR(devr->x0);
1124 goto error2;
1125 }
1126 devr->x0->device = &dev->ib_dev;
1127 devr->x0->inode = NULL;
1128 atomic_set(&devr->x0->usecnt, 0);
1129 mutex_init(&devr->x0->tgt_qp_mutex);
1130 INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
1131
1132 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1133 if (IS_ERR(devr->x1)) {
1134 ret = PTR_ERR(devr->x1);
1135 goto error3;
1136 }
1137 devr->x1->device = &dev->ib_dev;
1138 devr->x1->inode = NULL;
1139 atomic_set(&devr->x1->usecnt, 0);
1140 mutex_init(&devr->x1->tgt_qp_mutex);
1141 INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
1142
1143 memset(&attr, 0, sizeof(attr));
1144 attr.attr.max_sge = 1;
1145 attr.attr.max_wr = 1;
1146 attr.srq_type = IB_SRQT_XRC;
1147 attr.ext.xrc.cq = devr->c0;
1148 attr.ext.xrc.xrcd = devr->x0;
1149
1150 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
1151 if (IS_ERR(devr->s0)) {
1152 ret = PTR_ERR(devr->s0);
1153 goto error4;
1154 }
1155 devr->s0->device = &dev->ib_dev;
1156 devr->s0->pd = devr->p0;
1157 devr->s0->uobject = NULL;
1158 devr->s0->event_handler = NULL;
1159 devr->s0->srq_context = NULL;
1160 devr->s0->srq_type = IB_SRQT_XRC;
1161 devr->s0->ext.xrc.xrcd = devr->x0;
1162 devr->s0->ext.xrc.cq = devr->c0;
1163 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
1164 atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
1165 atomic_inc(&devr->p0->usecnt);
1166 atomic_set(&devr->s0->usecnt, 0);
1167
1168 return 0;
1169
1170error4:
1171 mlx5_ib_dealloc_xrcd(devr->x1);
1172error3:
1173 mlx5_ib_dealloc_xrcd(devr->x0);
1174error2:
1175 mlx5_ib_destroy_cq(devr->c0);
1176error1:
1177 mlx5_ib_dealloc_pd(devr->p0);
1178error0:
1179 return ret;
1180}
1181
1182static void destroy_dev_resources(struct mlx5_ib_resources *devr)
1183{
1184 mlx5_ib_destroy_srq(devr->s0);
1185 mlx5_ib_dealloc_xrcd(devr->x0);
1186 mlx5_ib_dealloc_xrcd(devr->x1);
1187 mlx5_ib_destroy_cq(devr->c0);
1188 mlx5_ib_dealloc_pd(devr->p0);
1189}
1190
9603b61d 1191static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
e126ba97 1192{
e126ba97
EC		 1193 struct mlx5_ib_dev *dev;
1194 int err;
1195 int i;
1196
1197 printk_once(KERN_INFO "%s", mlx5_version);
1198
1199 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
1200 if (!dev)
9603b61d 1201 return NULL;
e126ba97 1202
9603b61d 1203 dev->mdev = mdev;
e126ba97
EC		 1204
1205 err = get_port_caps(dev);
1206 if (err)
9603b61d 1207 goto err_dealloc;
e126ba97
EC		 1208
1209 get_ext_port_caps(dev);
1210
e126ba97
EC		 1211 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
1212
1213 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1214 dev->ib_dev.owner = THIS_MODULE;
1215 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
c7a08ac7
EC		 1216 dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey;
1217 dev->num_ports = mdev->caps.gen.num_ports;
e126ba97 1218 dev->ib_dev.phys_port_cnt = dev->num_ports;
233d05d2
SM		 1219 dev->ib_dev.num_comp_vectors =
1220 dev->mdev->priv.eq_table.num_comp_vectors;
e126ba97
EC		 1221 dev->ib_dev.dma_device = &mdev->pdev->dev;
1222
1223 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
1224 dev->ib_dev.uverbs_cmd_mask =
1225 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1226 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1227 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1228 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1229 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1230 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1231 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1232 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1233 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1234 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1235 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1236 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1237 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1238 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1239 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1240 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1241 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1242 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1243 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1244 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1245 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1246 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1247 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
1707cb4a
HE		 1248 dev->ib_dev.uverbs_ex_cmd_mask =
1249 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
e126ba97
EC		 1250
1251 dev->ib_dev.query_device = mlx5_ib_query_device;
1252 dev->ib_dev.query_port = mlx5_ib_query_port;
6b90a6d6 1253 dev->ib_dev.query_protocol = mlx5_ib_query_protocol;
e126ba97
EC		 1254 dev->ib_dev.query_gid = mlx5_ib_query_gid;
1255 dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
1256 dev->ib_dev.modify_device = mlx5_ib_modify_device;
1257 dev->ib_dev.modify_port = mlx5_ib_modify_port;
1258 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
1259 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
1260 dev->ib_dev.mmap = mlx5_ib_mmap;
1261 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
1262 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
1263 dev->ib_dev.create_ah = mlx5_ib_create_ah;
1264 dev->ib_dev.query_ah = mlx5_ib_query_ah;
1265 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
1266 dev->ib_dev.create_srq = mlx5_ib_create_srq;
1267 dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
1268 dev->ib_dev.query_srq = mlx5_ib_query_srq;
1269 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
1270 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
1271 dev->ib_dev.create_qp = mlx5_ib_create_qp;
1272 dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
1273 dev->ib_dev.query_qp = mlx5_ib_query_qp;
1274 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
1275 dev->ib_dev.post_send = mlx5_ib_post_send;
1276 dev->ib_dev.post_recv = mlx5_ib_post_recv;
1277 dev->ib_dev.create_cq = mlx5_ib_create_cq;
1278 dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
1279 dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
1280 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
1281 dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
1282 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
1283 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
1284 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
1285 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
3121e3c4 1286 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
e126ba97
EC		 1287 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
1288 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
1289 dev->ib_dev.process_mad = mlx5_ib_process_mad;
3121e3c4 1290 dev->ib_dev.create_mr = mlx5_ib_create_mr;
e126ba97
EC		 1291 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
1292 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
1293 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
d5436ba0 1294 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
e126ba97 1295
8cdd312c
HE		 1296 mlx5_ib_internal_query_odp_caps(dev);
1297
c7a08ac7 1298 if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) {
e126ba97
EC		 1299 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
1300 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
1301 dev->ib_dev.uverbs_cmd_mask |=
1302 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1303 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1304 }
1305
1306 err = init_node_data(dev);
1307 if (err)
233d05d2 1308 goto err_dealloc;
e126ba97
EC		 1309
1310 mutex_init(&dev->cap_mask_mutex);
e126ba97
EC		 1311
1312 err = create_dev_resources(&dev->devr);
1313 if (err)
233d05d2 1314 goto err_dealloc;
e126ba97 1315
6aec21f6 1316 err = mlx5_ib_odp_init_one(dev);
281d1a92 1317 if (err)
e126ba97
EC		 1318 goto err_rsrc;
1319
6aec21f6
HE		 1320 err = ib_register_device(&dev->ib_dev, NULL);
1321 if (err)
1322 goto err_odp;
1323
e126ba97
EC		 1324 err = create_umr_res(dev);
1325 if (err)
1326 goto err_dev;
1327
1328 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
281d1a92
WY		 1329 err = device_create_file(&dev->ib_dev.dev,
1330 mlx5_class_attributes[i]);
1331 if (err)
e126ba97
EC		 1332 goto err_umrc;
1333 }
1334
1335 dev->ib_active = true;
1336
9603b61d 1337 return dev;
e126ba97
EC		 1338
1339err_umrc:
1340 destroy_umrc_res(dev);
1341
1342err_dev:
1343 ib_unregister_device(&dev->ib_dev);
1344
6aec21f6
HE		 1345err_odp:
1346 mlx5_ib_odp_remove_one(dev);
1347
e126ba97
EC		 1348err_rsrc:
1349 destroy_dev_resources(&dev->devr);
1350
9603b61d 1351err_dealloc:
e126ba97
EC		 1352 ib_dealloc_device((struct ib_device *)dev);
1353
9603b61d 1354 return NULL;
e126ba97
EC		 1355}
1356
9603b61d 1357static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
e126ba97 1358{
9603b61d 1359 struct mlx5_ib_dev *dev = context;
6aec21f6 1360
e126ba97 1361 ib_unregister_device(&dev->ib_dev);
eefd56e5 1362 destroy_umrc_res(dev);
6aec21f6 1363 mlx5_ib_odp_remove_one(dev);
e126ba97 1364 destroy_dev_resources(&dev->devr);
e126ba97
EC		 1365 ib_dealloc_device(&dev->ib_dev);
1366}
1367
9603b61d
JM		 1368static struct mlx5_interface mlx5_ib_interface = {
1369 .add = mlx5_ib_add,
1370 .remove = mlx5_ib_remove,
1371 .event = mlx5_ib_event,
64613d94 1372 .protocol = MLX5_INTERFACE_PROTOCOL_IB,
e126ba97
EC		 1373};
1374
1375static int __init mlx5_ib_init(void)
1376{
6aec21f6
HE		 1377 int err;
1378
9603b61d
JM		 1379 if (deprecated_prof_sel != 2)
1380 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
1381
6aec21f6
HE		 1382 err = mlx5_ib_odp_init();
1383 if (err)
1384 return err;
1385
1386 err = mlx5_register_interface(&mlx5_ib_interface);
1387 if (err)
1388 goto clean_odp;
1389
1390 return err;
1391
1392clean_odp:
1393 mlx5_ib_odp_cleanup();
1394 return err;
e126ba97
EC		 1395}
1396
1397static void __exit mlx5_ib_cleanup(void)
1398{
9603b61d 1399 mlx5_unregister_interface(&mlx5_ib_interface);
6aec21f6 1400 mlx5_ib_odp_cleanup();
e126ba97
EC		 1401}
1402
1403module_init(mlx5_ib_init);
1404module_exit(mlx5_ib_cleanup);
Linux kernel - Deliverables
This page took 0.170326 seconds and 5 git commands to generate.