Commit | Line | Data |
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e126ba97 | 1 | /* |
6cf0a15f | 2 | * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. |
e126ba97 EC |
3 | * |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <asm-generic/kmap_types.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/errno.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/dma-mapping.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/io-mapping.h> | |
41 | #include <linux/sched.h> | |
42 | #include <rdma/ib_user_verbs.h> | |
43 | #include <rdma/ib_smi.h> | |
44 | #include <rdma/ib_umem.h> | |
45 | #include "user.h" | |
46 | #include "mlx5_ib.h" | |
47 | ||
48 | #define DRIVER_NAME "mlx5_ib" | |
169a1d85 AV |
49 | #define DRIVER_VERSION "2.2-1" |
50 | #define DRIVER_RELDATE "Feb 2014" | |
e126ba97 EC |
51 | |
52 | MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); | |
53 | MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); | |
54 | MODULE_LICENSE("Dual BSD/GPL"); | |
55 | MODULE_VERSION(DRIVER_VERSION); | |
56 | ||
9603b61d JM |
57 | static int deprecated_prof_sel = 2; |
58 | module_param_named(prof_sel, deprecated_prof_sel, int, 0444); | |
59 | MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); | |
e126ba97 EC |
60 | |
61 | static char mlx5_version[] = | |
62 | DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" | |
63 | DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; | |
64 | ||
e126ba97 | 65 | static int mlx5_ib_query_device(struct ib_device *ibdev, |
2528e33e MB |
66 | struct ib_device_attr *props, |
67 | struct ib_udata *uhw) | |
e126ba97 EC |
68 | { |
69 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
70 | struct ib_smp *in_mad = NULL; | |
71 | struct ib_smp *out_mad = NULL; | |
c7a08ac7 | 72 | struct mlx5_general_caps *gen; |
e126ba97 EC |
73 | int err = -ENOMEM; |
74 | int max_rq_sg; | |
75 | int max_sq_sg; | |
76 | u64 flags; | |
77 | ||
2528e33e MB |
78 | if (uhw->inlen || uhw->outlen) |
79 | return -EINVAL; | |
80 | ||
c7a08ac7 | 81 | gen = &dev->mdev->caps.gen; |
e126ba97 EC |
82 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); |
83 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
84 | if (!in_mad || !out_mad) | |
85 | goto out; | |
86 | ||
87 | init_query_mad(in_mad); | |
88 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | |
89 | ||
90 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
91 | if (err) | |
92 | goto out; | |
93 | ||
94 | memset(props, 0, sizeof(*props)); | |
95 | ||
9603b61d JM |
96 | props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | |
97 | (fw_rev_min(dev->mdev) << 16) | | |
98 | fw_rev_sub(dev->mdev); | |
e126ba97 EC |
99 | props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | |
100 | IB_DEVICE_PORT_ACTIVE_EVENT | | |
101 | IB_DEVICE_SYS_IMAGE_GUID | | |
1a4c3a3d | 102 | IB_DEVICE_RC_RNR_NAK_GEN; |
c7a08ac7 | 103 | flags = gen->flags; |
e126ba97 EC |
104 | if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) |
105 | props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; | |
106 | if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) | |
107 | props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; | |
108 | if (flags & MLX5_DEV_CAP_FLAG_APM) | |
109 | props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; | |
110 | props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; | |
111 | if (flags & MLX5_DEV_CAP_FLAG_XRC) | |
112 | props->device_cap_flags |= IB_DEVICE_XRC; | |
113 | props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; | |
2dea9094 SG |
114 | if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) { |
115 | props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; | |
116 | /* At this stage no support for signature handover */ | |
117 | props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | | |
118 | IB_PROT_T10DIF_TYPE_2 | | |
119 | IB_PROT_T10DIF_TYPE_3; | |
120 | props->sig_guard_cap = IB_GUARD_T10DIF_CRC | | |
121 | IB_GUARD_T10DIF_CSUM; | |
122 | } | |
f360d88a EC |
123 | if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST) |
124 | props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; | |
e126ba97 EC |
125 | |
126 | props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & | |
127 | 0xffffff; | |
128 | props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); | |
129 | props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); | |
130 | memcpy(&props->sys_image_guid, out_mad->data + 4, 8); | |
131 | ||
132 | props->max_mr_size = ~0ull; | |
c7a08ac7 EC |
133 | props->page_size_cap = gen->min_page_sz; |
134 | props->max_qp = 1 << gen->log_max_qp; | |
135 | props->max_qp_wr = gen->max_wqes; | |
136 | max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); | |
137 | max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / | |
e126ba97 EC |
138 | sizeof(struct mlx5_wqe_data_seg); |
139 | props->max_sge = min(max_rq_sg, max_sq_sg); | |
c7a08ac7 EC |
140 | props->max_cq = 1 << gen->log_max_cq; |
141 | props->max_cqe = gen->max_cqes - 1; | |
142 | props->max_mr = 1 << gen->log_max_mkey; | |
143 | props->max_pd = 1 << gen->log_max_pd; | |
144 | props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp; | |
145 | props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp; | |
146 | props->max_srq = 1 << gen->log_max_srq; | |
147 | props->max_srq_wr = gen->max_srq_wqes - 1; | |
148 | props->local_ca_ack_delay = gen->local_ca_ack_delay; | |
e126ba97 | 149 | props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; |
e126ba97 EC |
150 | props->max_srq_sge = max_rq_sg - 1; |
151 | props->max_fast_reg_page_list_len = (unsigned int)-1; | |
c7a08ac7 | 152 | props->local_ca_ack_delay = gen->local_ca_ack_delay; |
81bea28f EC |
153 | props->atomic_cap = IB_ATOMIC_NONE; |
154 | props->masked_atomic_cap = IB_ATOMIC_NONE; | |
e126ba97 | 155 | props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); |
c7a08ac7 EC |
156 | props->max_mcast_grp = 1 << gen->log_max_mcg; |
157 | props->max_mcast_qp_attach = gen->max_qp_mcg; | |
e126ba97 EC |
158 | props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * |
159 | props->max_mcast_grp; | |
160 | props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ | |
161 | ||
8cdd312c HE |
162 | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING |
163 | if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG) | |
164 | props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; | |
165 | props->odp_caps = dev->odp_caps; | |
166 | #endif | |
167 | ||
e126ba97 EC |
168 | out: |
169 | kfree(in_mad); | |
170 | kfree(out_mad); | |
171 | ||
172 | return err; | |
173 | } | |
174 | ||
175 | int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, | |
176 | struct ib_port_attr *props) | |
177 | { | |
178 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
179 | struct ib_smp *in_mad = NULL; | |
180 | struct ib_smp *out_mad = NULL; | |
c7a08ac7 | 181 | struct mlx5_general_caps *gen; |
e126ba97 EC |
182 | int ext_active_speed; |
183 | int err = -ENOMEM; | |
184 | ||
c7a08ac7 EC |
185 | gen = &dev->mdev->caps.gen; |
186 | if (port < 1 || port > gen->num_ports) { | |
e126ba97 EC |
187 | mlx5_ib_warn(dev, "invalid port number %d\n", port); |
188 | return -EINVAL; | |
189 | } | |
190 | ||
191 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
192 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
193 | if (!in_mad || !out_mad) | |
194 | goto out; | |
195 | ||
196 | memset(props, 0, sizeof(*props)); | |
197 | ||
198 | init_query_mad(in_mad); | |
199 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | |
200 | in_mad->attr_mod = cpu_to_be32(port); | |
201 | ||
202 | err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); | |
203 | if (err) { | |
204 | mlx5_ib_warn(dev, "err %d\n", err); | |
205 | goto out; | |
206 | } | |
207 | ||
208 | ||
209 | props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); | |
210 | props->lmc = out_mad->data[34] & 0x7; | |
211 | props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); | |
212 | props->sm_sl = out_mad->data[36] & 0xf; | |
213 | props->state = out_mad->data[32] & 0xf; | |
214 | props->phys_state = out_mad->data[33] >> 4; | |
215 | props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); | |
216 | props->gid_tbl_len = out_mad->data[50]; | |
c7a08ac7 EC |
217 | props->max_msg_sz = 1 << gen->log_max_msg; |
218 | props->pkey_tbl_len = gen->port[port - 1].pkey_table_len; | |
e126ba97 EC |
219 | props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); |
220 | props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); | |
221 | props->active_width = out_mad->data[31] & 0xf; | |
222 | props->active_speed = out_mad->data[35] >> 4; | |
223 | props->max_mtu = out_mad->data[41] & 0xf; | |
224 | props->active_mtu = out_mad->data[36] >> 4; | |
225 | props->subnet_timeout = out_mad->data[51] & 0x1f; | |
226 | props->max_vl_num = out_mad->data[37] >> 4; | |
227 | props->init_type_reply = out_mad->data[41] >> 4; | |
228 | ||
229 | /* Check if extended speeds (EDR/FDR/...) are supported */ | |
230 | if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { | |
231 | ext_active_speed = out_mad->data[62] >> 4; | |
232 | ||
233 | switch (ext_active_speed) { | |
234 | case 1: | |
235 | props->active_speed = 16; /* FDR */ | |
236 | break; | |
237 | case 2: | |
238 | props->active_speed = 32; /* EDR */ | |
239 | break; | |
240 | } | |
241 | } | |
242 | ||
243 | /* If reported active speed is QDR, check if is FDR-10 */ | |
244 | if (props->active_speed == 4) { | |
c7a08ac7 | 245 | if (gen->ext_port_cap[port - 1] & |
e126ba97 EC |
246 | MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { |
247 | init_query_mad(in_mad); | |
248 | in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; | |
249 | in_mad->attr_mod = cpu_to_be32(port); | |
250 | ||
251 | err = mlx5_MAD_IFC(dev, 1, 1, port, | |
252 | NULL, NULL, in_mad, out_mad); | |
253 | if (err) | |
254 | goto out; | |
255 | ||
256 | /* Checking LinkSpeedActive for FDR-10 */ | |
257 | if (out_mad->data[15] & 0x1) | |
258 | props->active_speed = 8; | |
259 | } | |
260 | } | |
261 | ||
262 | out: | |
263 | kfree(in_mad); | |
264 | kfree(out_mad); | |
265 | ||
266 | return err; | |
267 | } | |
268 | ||
269 | static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, | |
270 | union ib_gid *gid) | |
271 | { | |
272 | struct ib_smp *in_mad = NULL; | |
273 | struct ib_smp *out_mad = NULL; | |
274 | int err = -ENOMEM; | |
275 | ||
276 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
277 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
278 | if (!in_mad || !out_mad) | |
279 | goto out; | |
280 | ||
281 | init_query_mad(in_mad); | |
282 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | |
283 | in_mad->attr_mod = cpu_to_be32(port); | |
284 | ||
285 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
286 | if (err) | |
287 | goto out; | |
288 | ||
289 | memcpy(gid->raw, out_mad->data + 8, 8); | |
290 | ||
291 | init_query_mad(in_mad); | |
292 | in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; | |
293 | in_mad->attr_mod = cpu_to_be32(index / 8); | |
294 | ||
295 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
296 | if (err) | |
297 | goto out; | |
298 | ||
299 | memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); | |
300 | ||
301 | out: | |
302 | kfree(in_mad); | |
303 | kfree(out_mad); | |
304 | return err; | |
305 | } | |
306 | ||
307 | static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, | |
308 | u16 *pkey) | |
309 | { | |
310 | struct ib_smp *in_mad = NULL; | |
311 | struct ib_smp *out_mad = NULL; | |
312 | int err = -ENOMEM; | |
313 | ||
314 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
315 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
316 | if (!in_mad || !out_mad) | |
317 | goto out; | |
318 | ||
319 | init_query_mad(in_mad); | |
320 | in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; | |
321 | in_mad->attr_mod = cpu_to_be32(index / 32); | |
322 | ||
323 | err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | |
324 | if (err) | |
325 | goto out; | |
326 | ||
327 | *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); | |
328 | ||
329 | out: | |
330 | kfree(in_mad); | |
331 | kfree(out_mad); | |
332 | return err; | |
333 | } | |
334 | ||
335 | struct mlx5_reg_node_desc { | |
336 | u8 desc[64]; | |
337 | }; | |
338 | ||
339 | static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, | |
340 | struct ib_device_modify *props) | |
341 | { | |
342 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
343 | struct mlx5_reg_node_desc in; | |
344 | struct mlx5_reg_node_desc out; | |
345 | int err; | |
346 | ||
347 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) | |
348 | return -EOPNOTSUPP; | |
349 | ||
350 | if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) | |
351 | return 0; | |
352 | ||
353 | /* | |
354 | * If possible, pass node desc to FW, so it can generate | |
355 | * a 144 trap. If cmd fails, just ignore. | |
356 | */ | |
357 | memcpy(&in, props->node_desc, 64); | |
9603b61d | 358 | err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, |
e126ba97 EC |
359 | sizeof(out), MLX5_REG_NODE_DESC, 0, 1); |
360 | if (err) | |
361 | return err; | |
362 | ||
363 | memcpy(ibdev->node_desc, props->node_desc, 64); | |
364 | ||
365 | return err; | |
366 | } | |
367 | ||
368 | static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, | |
369 | struct ib_port_modify *props) | |
370 | { | |
371 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
372 | struct ib_port_attr attr; | |
373 | u32 tmp; | |
374 | int err; | |
375 | ||
376 | mutex_lock(&dev->cap_mask_mutex); | |
377 | ||
378 | err = mlx5_ib_query_port(ibdev, port, &attr); | |
379 | if (err) | |
380 | goto out; | |
381 | ||
382 | tmp = (attr.port_cap_flags | props->set_port_cap_mask) & | |
383 | ~props->clr_port_cap_mask; | |
384 | ||
9603b61d | 385 | err = mlx5_set_port_caps(dev->mdev, port, tmp); |
e126ba97 EC |
386 | |
387 | out: | |
388 | mutex_unlock(&dev->cap_mask_mutex); | |
389 | return err; | |
390 | } | |
391 | ||
392 | static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, | |
393 | struct ib_udata *udata) | |
394 | { | |
395 | struct mlx5_ib_dev *dev = to_mdev(ibdev); | |
78c0f98c | 396 | struct mlx5_ib_alloc_ucontext_req_v2 req; |
e126ba97 EC |
397 | struct mlx5_ib_alloc_ucontext_resp resp; |
398 | struct mlx5_ib_ucontext *context; | |
c7a08ac7 | 399 | struct mlx5_general_caps *gen; |
e126ba97 EC |
400 | struct mlx5_uuar_info *uuari; |
401 | struct mlx5_uar *uars; | |
c1be5232 | 402 | int gross_uuars; |
e126ba97 | 403 | int num_uars; |
78c0f98c | 404 | int ver; |
e126ba97 EC |
405 | int uuarn; |
406 | int err; | |
407 | int i; | |
f241e749 | 408 | size_t reqlen; |
e126ba97 | 409 | |
c7a08ac7 | 410 | gen = &dev->mdev->caps.gen; |
e126ba97 EC |
411 | if (!dev->ib_active) |
412 | return ERR_PTR(-EAGAIN); | |
413 | ||
78c0f98c EC |
414 | memset(&req, 0, sizeof(req)); |
415 | reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); | |
416 | if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) | |
417 | ver = 0; | |
418 | else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) | |
419 | ver = 2; | |
420 | else | |
421 | return ERR_PTR(-EINVAL); | |
422 | ||
423 | err = ib_copy_from_udata(&req, udata, reqlen); | |
e126ba97 EC |
424 | if (err) |
425 | return ERR_PTR(err); | |
426 | ||
78c0f98c EC |
427 | if (req.flags || req.reserved) |
428 | return ERR_PTR(-EINVAL); | |
429 | ||
e126ba97 EC |
430 | if (req.total_num_uuars > MLX5_MAX_UUARS) |
431 | return ERR_PTR(-ENOMEM); | |
432 | ||
433 | if (req.total_num_uuars == 0) | |
434 | return ERR_PTR(-EINVAL); | |
435 | ||
c1be5232 EC |
436 | req.total_num_uuars = ALIGN(req.total_num_uuars, |
437 | MLX5_NON_FP_BF_REGS_PER_PAGE); | |
e126ba97 EC |
438 | if (req.num_low_latency_uuars > req.total_num_uuars - 1) |
439 | return ERR_PTR(-EINVAL); | |
440 | ||
c1be5232 EC |
441 | num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; |
442 | gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; | |
c7a08ac7 EC |
443 | resp.qp_tab_size = 1 << gen->log_max_qp; |
444 | resp.bf_reg_size = gen->bf_reg_size; | |
e126ba97 | 445 | resp.cache_line_size = L1_CACHE_BYTES; |
c7a08ac7 EC |
446 | resp.max_sq_desc_sz = gen->max_sq_desc_sz; |
447 | resp.max_rq_desc_sz = gen->max_rq_desc_sz; | |
448 | resp.max_send_wqebb = gen->max_wqes; | |
449 | resp.max_recv_wr = gen->max_wqes; | |
450 | resp.max_srq_recv_wr = gen->max_srq_wqes; | |
e126ba97 EC |
451 | |
452 | context = kzalloc(sizeof(*context), GFP_KERNEL); | |
453 | if (!context) | |
454 | return ERR_PTR(-ENOMEM); | |
455 | ||
456 | uuari = &context->uuari; | |
457 | mutex_init(&uuari->lock); | |
458 | uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); | |
459 | if (!uars) { | |
460 | err = -ENOMEM; | |
461 | goto out_ctx; | |
462 | } | |
463 | ||
c1be5232 | 464 | uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), |
e126ba97 EC |
465 | sizeof(*uuari->bitmap), |
466 | GFP_KERNEL); | |
467 | if (!uuari->bitmap) { | |
468 | err = -ENOMEM; | |
469 | goto out_uar_ctx; | |
470 | } | |
471 | /* | |
472 | * clear all fast path uuars | |
473 | */ | |
c1be5232 | 474 | for (i = 0; i < gross_uuars; i++) { |
e126ba97 EC |
475 | uuarn = i & 3; |
476 | if (uuarn == 2 || uuarn == 3) | |
477 | set_bit(i, uuari->bitmap); | |
478 | } | |
479 | ||
c1be5232 | 480 | uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); |
e126ba97 EC |
481 | if (!uuari->count) { |
482 | err = -ENOMEM; | |
483 | goto out_bitmap; | |
484 | } | |
485 | ||
486 | for (i = 0; i < num_uars; i++) { | |
9603b61d | 487 | err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); |
e126ba97 EC |
488 | if (err) |
489 | goto out_count; | |
490 | } | |
491 | ||
b4cfe447 HE |
492 | #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING |
493 | context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; | |
494 | #endif | |
495 | ||
e126ba97 EC |
496 | INIT_LIST_HEAD(&context->db_page_list); |
497 | mutex_init(&context->db_page_mutex); | |
498 | ||
499 | resp.tot_uuars = req.total_num_uuars; | |
c7a08ac7 | 500 | resp.num_ports = gen->num_ports; |
92b0ca7c DC |
501 | err = ib_copy_to_udata(udata, &resp, |
502 | sizeof(resp) - sizeof(resp.reserved)); | |
e126ba97 EC |
503 | if (err) |
504 | goto out_uars; | |
505 | ||
78c0f98c | 506 | uuari->ver = ver; |
e126ba97 EC |
507 | uuari->num_low_latency_uuars = req.num_low_latency_uuars; |
508 | uuari->uars = uars; | |
509 | uuari->num_uars = num_uars; | |
510 | return &context->ibucontext; | |
511 | ||
512 | out_uars: | |
513 | for (i--; i >= 0; i--) | |
9603b61d | 514 | mlx5_cmd_free_uar(dev->mdev, uars[i].index); |
e126ba97 EC |
515 | out_count: |
516 | kfree(uuari->count); | |
517 | ||
518 | out_bitmap: | |
519 | kfree(uuari->bitmap); | |
520 | ||
521 | out_uar_ctx: | |
522 | kfree(uars); | |
523 | ||
524 | out_ctx: | |
525 | kfree(context); | |
526 | return ERR_PTR(err); | |
527 | } | |
528 | ||
529 | static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) | |
530 | { | |
531 | struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); | |
532 | struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); | |
533 | struct mlx5_uuar_info *uuari = &context->uuari; | |
534 | int i; | |
535 | ||
536 | for (i = 0; i < uuari->num_uars; i++) { | |
9603b61d | 537 | if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) |
e126ba97 EC |
538 | mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); |
539 | } | |
540 | ||
541 | kfree(uuari->count); | |
542 | kfree(uuari->bitmap); | |
543 | kfree(uuari->uars); | |
544 | kfree(context); | |
545 | ||
546 | return 0; | |
547 | } | |
548 | ||
549 | static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) | |
550 | { | |
9603b61d | 551 | return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; |
e126ba97 EC |
552 | } |
553 | ||
554 | static int get_command(unsigned long offset) | |
555 | { | |
556 | return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; | |
557 | } | |
558 | ||
559 | static int get_arg(unsigned long offset) | |
560 | { | |
561 | return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); | |
562 | } | |
563 | ||
564 | static int get_index(unsigned long offset) | |
565 | { | |
566 | return get_arg(offset); | |
567 | } | |
568 | ||
569 | static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) | |
570 | { | |
571 | struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); | |
572 | struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); | |
573 | struct mlx5_uuar_info *uuari = &context->uuari; | |
574 | unsigned long command; | |
575 | unsigned long idx; | |
576 | phys_addr_t pfn; | |
577 | ||
578 | command = get_command(vma->vm_pgoff); | |
579 | switch (command) { | |
580 | case MLX5_IB_MMAP_REGULAR_PAGE: | |
581 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) | |
582 | return -EINVAL; | |
583 | ||
584 | idx = get_index(vma->vm_pgoff); | |
1c3ce90d EC |
585 | if (idx >= uuari->num_uars) |
586 | return -EINVAL; | |
587 | ||
e126ba97 EC |
588 | pfn = uar_index2pfn(dev, uuari->uars[idx].index); |
589 | mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, | |
590 | (unsigned long long)pfn); | |
591 | ||
e126ba97 EC |
592 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); |
593 | if (io_remap_pfn_range(vma, vma->vm_start, pfn, | |
594 | PAGE_SIZE, vma->vm_page_prot)) | |
595 | return -EAGAIN; | |
596 | ||
597 | mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", | |
598 | vma->vm_start, | |
599 | (unsigned long long)pfn << PAGE_SHIFT); | |
600 | break; | |
601 | ||
602 | case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: | |
603 | return -ENOSYS; | |
604 | ||
605 | default: | |
606 | return -EINVAL; | |
607 | } | |
608 | ||
609 | return 0; | |
610 | } | |
611 | ||
612 | static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) | |
613 | { | |
614 | struct mlx5_create_mkey_mbox_in *in; | |
615 | struct mlx5_mkey_seg *seg; | |
616 | struct mlx5_core_mr mr; | |
617 | int err; | |
618 | ||
619 | in = kzalloc(sizeof(*in), GFP_KERNEL); | |
620 | if (!in) | |
621 | return -ENOMEM; | |
622 | ||
623 | seg = &in->seg; | |
624 | seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; | |
625 | seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); | |
626 | seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); | |
627 | seg->start_addr = 0; | |
628 | ||
9603b61d | 629 | err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), |
746b5583 | 630 | NULL, NULL, NULL); |
e126ba97 EC |
631 | if (err) { |
632 | mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); | |
633 | goto err_in; | |
634 | } | |
635 | ||
636 | kfree(in); | |
637 | *key = mr.key; | |
638 | ||
639 | return 0; | |
640 | ||
641 | err_in: | |
642 | kfree(in); | |
643 | ||
644 | return err; | |
645 | } | |
646 | ||
647 | static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) | |
648 | { | |
649 | struct mlx5_core_mr mr; | |
650 | int err; | |
651 | ||
652 | memset(&mr, 0, sizeof(mr)); | |
653 | mr.key = key; | |
9603b61d | 654 | err = mlx5_core_destroy_mkey(dev->mdev, &mr); |
e126ba97 EC |
655 | if (err) |
656 | mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); | |
657 | } | |
658 | ||
659 | static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, | |
660 | struct ib_ucontext *context, | |
661 | struct ib_udata *udata) | |
662 | { | |
663 | struct mlx5_ib_alloc_pd_resp resp; | |
664 | struct mlx5_ib_pd *pd; | |
665 | int err; | |
666 | ||
667 | pd = kmalloc(sizeof(*pd), GFP_KERNEL); | |
668 | if (!pd) | |
669 | return ERR_PTR(-ENOMEM); | |
670 | ||
9603b61d | 671 | err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); |
e126ba97 EC |
672 | if (err) { |
673 | kfree(pd); | |
674 | return ERR_PTR(err); | |
675 | } | |
676 | ||
677 | if (context) { | |
678 | resp.pdn = pd->pdn; | |
679 | if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { | |
9603b61d | 680 | mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); |
e126ba97 EC |
681 | kfree(pd); |
682 | return ERR_PTR(-EFAULT); | |
683 | } | |
684 | } else { | |
685 | err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); | |
686 | if (err) { | |
9603b61d | 687 | mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); |
e126ba97 EC |
688 | kfree(pd); |
689 | return ERR_PTR(err); | |
690 | } | |
691 | } | |
692 | ||
693 | return &pd->ibpd; | |
694 | } | |
695 | ||
696 | static int mlx5_ib_dealloc_pd(struct ib_pd *pd) | |
697 | { | |
698 | struct mlx5_ib_dev *mdev = to_mdev(pd->device); | |
699 | struct mlx5_ib_pd *mpd = to_mpd(pd); | |
700 | ||
701 | if (!pd->uobject) | |
702 | free_pa_mkey(mdev, mpd->pa_lkey); | |
703 | ||
9603b61d | 704 | mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); |
e126ba97 EC |
705 | kfree(mpd); |
706 | ||
707 | return 0; | |
708 | } | |
709 | ||
710 | static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |
711 | { | |
712 | struct mlx5_ib_dev *dev = to_mdev(ibqp->device); | |
713 | int err; | |
714 | ||
9603b61d | 715 | err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); |
e126ba97 EC |
716 | if (err) |
717 | mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", | |
718 | ibqp->qp_num, gid->raw); | |
719 | ||
720 | return err; | |
721 | } | |
722 | ||
723 | static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | |
724 | { | |
725 | struct mlx5_ib_dev *dev = to_mdev(ibqp->device); | |
726 | int err; | |
727 | ||
9603b61d | 728 | err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); |
e126ba97 EC |
729 | if (err) |
730 | mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", | |
731 | ibqp->qp_num, gid->raw); | |
732 | ||
733 | return err; | |
734 | } | |
735 | ||
736 | static int init_node_data(struct mlx5_ib_dev *dev) | |
737 | { | |
738 | struct ib_smp *in_mad = NULL; | |
739 | struct ib_smp *out_mad = NULL; | |
740 | int err = -ENOMEM; | |
741 | ||
742 | in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); | |
743 | out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); | |
744 | if (!in_mad || !out_mad) | |
745 | goto out; | |
746 | ||
747 | init_query_mad(in_mad); | |
748 | in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; | |
749 | ||
750 | err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
751 | if (err) | |
752 | goto out; | |
753 | ||
754 | memcpy(dev->ib_dev.node_desc, out_mad->data, 64); | |
755 | ||
756 | in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; | |
757 | ||
758 | err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); | |
759 | if (err) | |
760 | goto out; | |
761 | ||
9603b61d | 762 | dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); |
e126ba97 EC |
763 | memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); |
764 | ||
765 | out: | |
766 | kfree(in_mad); | |
767 | kfree(out_mad); | |
768 | return err; | |
769 | } | |
770 | ||
771 | static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, | |
772 | char *buf) | |
773 | { | |
774 | struct mlx5_ib_dev *dev = | |
775 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
776 | ||
9603b61d | 777 | return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); |
e126ba97 EC |
778 | } |
779 | ||
780 | static ssize_t show_reg_pages(struct device *device, | |
781 | struct device_attribute *attr, char *buf) | |
782 | { | |
783 | struct mlx5_ib_dev *dev = | |
784 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
785 | ||
6aec21f6 | 786 | return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); |
e126ba97 EC |
787 | } |
788 | ||
789 | static ssize_t show_hca(struct device *device, struct device_attribute *attr, | |
790 | char *buf) | |
791 | { | |
792 | struct mlx5_ib_dev *dev = | |
793 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
9603b61d | 794 | return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); |
e126ba97 EC |
795 | } |
796 | ||
797 | static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, | |
798 | char *buf) | |
799 | { | |
800 | struct mlx5_ib_dev *dev = | |
801 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
9603b61d JM |
802 | return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), |
803 | fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); | |
e126ba97 EC |
804 | } |
805 | ||
806 | static ssize_t show_rev(struct device *device, struct device_attribute *attr, | |
807 | char *buf) | |
808 | { | |
809 | struct mlx5_ib_dev *dev = | |
810 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
9603b61d | 811 | return sprintf(buf, "%x\n", dev->mdev->rev_id); |
e126ba97 EC |
812 | } |
813 | ||
814 | static ssize_t show_board(struct device *device, struct device_attribute *attr, | |
815 | char *buf) | |
816 | { | |
817 | struct mlx5_ib_dev *dev = | |
818 | container_of(device, struct mlx5_ib_dev, ib_dev.dev); | |
819 | return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, | |
9603b61d | 820 | dev->mdev->board_id); |
e126ba97 EC |
821 | } |
822 | ||
823 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | |
824 | static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); | |
825 | static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); | |
826 | static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); | |
827 | static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); | |
828 | static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); | |
829 | ||
830 | static struct device_attribute *mlx5_class_attributes[] = { | |
831 | &dev_attr_hw_rev, | |
832 | &dev_attr_fw_ver, | |
833 | &dev_attr_hca_type, | |
834 | &dev_attr_board_id, | |
835 | &dev_attr_fw_pages, | |
836 | &dev_attr_reg_pages, | |
837 | }; | |
838 | ||
9603b61d | 839 | static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, |
4d2f9bbb | 840 | enum mlx5_dev_event event, unsigned long param) |
e126ba97 | 841 | { |
9603b61d | 842 | struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; |
e126ba97 | 843 | struct ib_event ibev; |
9603b61d | 844 | |
e126ba97 EC |
845 | u8 port = 0; |
846 | ||
847 | switch (event) { | |
848 | case MLX5_DEV_EVENT_SYS_ERROR: | |
849 | ibdev->ib_active = false; | |
850 | ibev.event = IB_EVENT_DEVICE_FATAL; | |
851 | break; | |
852 | ||
853 | case MLX5_DEV_EVENT_PORT_UP: | |
854 | ibev.event = IB_EVENT_PORT_ACTIVE; | |
4d2f9bbb | 855 | port = (u8)param; |
e126ba97 EC |
856 | break; |
857 | ||
858 | case MLX5_DEV_EVENT_PORT_DOWN: | |
859 | ibev.event = IB_EVENT_PORT_ERR; | |
4d2f9bbb | 860 | port = (u8)param; |
e126ba97 EC |
861 | break; |
862 | ||
863 | case MLX5_DEV_EVENT_PORT_INITIALIZED: | |
864 | /* not used by ULPs */ | |
865 | return; | |
866 | ||
867 | case MLX5_DEV_EVENT_LID_CHANGE: | |
868 | ibev.event = IB_EVENT_LID_CHANGE; | |
4d2f9bbb | 869 | port = (u8)param; |
e126ba97 EC |
870 | break; |
871 | ||
872 | case MLX5_DEV_EVENT_PKEY_CHANGE: | |
873 | ibev.event = IB_EVENT_PKEY_CHANGE; | |
4d2f9bbb | 874 | port = (u8)param; |
e126ba97 EC |
875 | break; |
876 | ||
877 | case MLX5_DEV_EVENT_GUID_CHANGE: | |
878 | ibev.event = IB_EVENT_GID_CHANGE; | |
4d2f9bbb | 879 | port = (u8)param; |
e126ba97 EC |
880 | break; |
881 | ||
882 | case MLX5_DEV_EVENT_CLIENT_REREG: | |
883 | ibev.event = IB_EVENT_CLIENT_REREGISTER; | |
4d2f9bbb | 884 | port = (u8)param; |
e126ba97 EC |
885 | break; |
886 | } | |
887 | ||
888 | ibev.device = &ibdev->ib_dev; | |
889 | ibev.element.port_num = port; | |
890 | ||
a0c84c32 EC |
891 | if (port < 1 || port > ibdev->num_ports) { |
892 | mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); | |
893 | return; | |
894 | } | |
895 | ||
e126ba97 EC |
896 | if (ibdev->ib_active) |
897 | ib_dispatch_event(&ibev); | |
898 | } | |
899 | ||
900 | static void get_ext_port_caps(struct mlx5_ib_dev *dev) | |
901 | { | |
c7a08ac7 | 902 | struct mlx5_general_caps *gen; |
e126ba97 EC |
903 | int port; |
904 | ||
c7a08ac7 EC |
905 | gen = &dev->mdev->caps.gen; |
906 | for (port = 1; port <= gen->num_ports; port++) | |
e126ba97 EC |
907 | mlx5_query_ext_port_caps(dev, port); |
908 | } | |
909 | ||
910 | static int get_port_caps(struct mlx5_ib_dev *dev) | |
911 | { | |
912 | struct ib_device_attr *dprops = NULL; | |
913 | struct ib_port_attr *pprops = NULL; | |
c7a08ac7 | 914 | struct mlx5_general_caps *gen; |
f614fc15 | 915 | int err = -ENOMEM; |
e126ba97 | 916 | int port; |
2528e33e | 917 | struct ib_udata uhw = {.inlen = 0, .outlen = 0}; |
e126ba97 | 918 | |
c7a08ac7 | 919 | gen = &dev->mdev->caps.gen; |
e126ba97 EC |
920 | pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); |
921 | if (!pprops) | |
922 | goto out; | |
923 | ||
924 | dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); | |
925 | if (!dprops) | |
926 | goto out; | |
927 | ||
2528e33e | 928 | err = mlx5_ib_query_device(&dev->ib_dev, dprops, &uhw); |
e126ba97 EC |
929 | if (err) { |
930 | mlx5_ib_warn(dev, "query_device failed %d\n", err); | |
931 | goto out; | |
932 | } | |
933 | ||
c7a08ac7 | 934 | for (port = 1; port <= gen->num_ports; port++) { |
e126ba97 EC |
935 | err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); |
936 | if (err) { | |
937 | mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); | |
938 | break; | |
939 | } | |
c7a08ac7 EC |
940 | gen->port[port - 1].pkey_table_len = dprops->max_pkeys; |
941 | gen->port[port - 1].gid_table_len = pprops->gid_tbl_len; | |
e126ba97 EC |
942 | mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", |
943 | dprops->max_pkeys, pprops->gid_tbl_len); | |
944 | } | |
945 | ||
946 | out: | |
947 | kfree(pprops); | |
948 | kfree(dprops); | |
949 | ||
950 | return err; | |
951 | } | |
952 | ||
953 | static void destroy_umrc_res(struct mlx5_ib_dev *dev) | |
954 | { | |
955 | int err; | |
956 | ||
957 | err = mlx5_mr_cache_cleanup(dev); | |
958 | if (err) | |
959 | mlx5_ib_warn(dev, "mr cache cleanup failed\n"); | |
960 | ||
961 | mlx5_ib_destroy_qp(dev->umrc.qp); | |
962 | ib_destroy_cq(dev->umrc.cq); | |
963 | ib_dereg_mr(dev->umrc.mr); | |
964 | ib_dealloc_pd(dev->umrc.pd); | |
965 | } | |
966 | ||
967 | enum { | |
968 | MAX_UMR_WR = 128, | |
969 | }; | |
970 | ||
971 | static int create_umr_res(struct mlx5_ib_dev *dev) | |
972 | { | |
973 | struct ib_qp_init_attr *init_attr = NULL; | |
974 | struct ib_qp_attr *attr = NULL; | |
975 | struct ib_pd *pd; | |
976 | struct ib_cq *cq; | |
977 | struct ib_qp *qp; | |
978 | struct ib_mr *mr; | |
8e37210b | 979 | struct ib_cq_init_attr cq_attr = {}; |
e126ba97 EC |
980 | int ret; |
981 | ||
982 | attr = kzalloc(sizeof(*attr), GFP_KERNEL); | |
983 | init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); | |
984 | if (!attr || !init_attr) { | |
985 | ret = -ENOMEM; | |
986 | goto error_0; | |
987 | } | |
988 | ||
989 | pd = ib_alloc_pd(&dev->ib_dev); | |
990 | if (IS_ERR(pd)) { | |
991 | mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); | |
992 | ret = PTR_ERR(pd); | |
993 | goto error_0; | |
994 | } | |
995 | ||
996 | mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); | |
997 | if (IS_ERR(mr)) { | |
998 | mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); | |
999 | ret = PTR_ERR(mr); | |
1000 | goto error_1; | |
1001 | } | |
1002 | ||
8e37210b MB |
1003 | cq_attr.cqe = 128; |
1004 | cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, | |
1005 | &cq_attr); | |
e126ba97 EC |
1006 | if (IS_ERR(cq)) { |
1007 | mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); | |
1008 | ret = PTR_ERR(cq); | |
1009 | goto error_2; | |
1010 | } | |
1011 | ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); | |
1012 | ||
1013 | init_attr->send_cq = cq; | |
1014 | init_attr->recv_cq = cq; | |
1015 | init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; | |
1016 | init_attr->cap.max_send_wr = MAX_UMR_WR; | |
1017 | init_attr->cap.max_send_sge = 1; | |
1018 | init_attr->qp_type = MLX5_IB_QPT_REG_UMR; | |
1019 | init_attr->port_num = 1; | |
1020 | qp = mlx5_ib_create_qp(pd, init_attr, NULL); | |
1021 | if (IS_ERR(qp)) { | |
1022 | mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); | |
1023 | ret = PTR_ERR(qp); | |
1024 | goto error_3; | |
1025 | } | |
1026 | qp->device = &dev->ib_dev; | |
1027 | qp->real_qp = qp; | |
1028 | qp->uobject = NULL; | |
1029 | qp->qp_type = MLX5_IB_QPT_REG_UMR; | |
1030 | ||
1031 | attr->qp_state = IB_QPS_INIT; | |
1032 | attr->port_num = 1; | |
1033 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | | |
1034 | IB_QP_PORT, NULL); | |
1035 | if (ret) { | |
1036 | mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); | |
1037 | goto error_4; | |
1038 | } | |
1039 | ||
1040 | memset(attr, 0, sizeof(*attr)); | |
1041 | attr->qp_state = IB_QPS_RTR; | |
1042 | attr->path_mtu = IB_MTU_256; | |
1043 | ||
1044 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); | |
1045 | if (ret) { | |
1046 | mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); | |
1047 | goto error_4; | |
1048 | } | |
1049 | ||
1050 | memset(attr, 0, sizeof(*attr)); | |
1051 | attr->qp_state = IB_QPS_RTS; | |
1052 | ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); | |
1053 | if (ret) { | |
1054 | mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); | |
1055 | goto error_4; | |
1056 | } | |
1057 | ||
1058 | dev->umrc.qp = qp; | |
1059 | dev->umrc.cq = cq; | |
1060 | dev->umrc.mr = mr; | |
1061 | dev->umrc.pd = pd; | |
1062 | ||
1063 | sema_init(&dev->umrc.sem, MAX_UMR_WR); | |
1064 | ret = mlx5_mr_cache_init(dev); | |
1065 | if (ret) { | |
1066 | mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); | |
1067 | goto error_4; | |
1068 | } | |
1069 | ||
1070 | kfree(attr); | |
1071 | kfree(init_attr); | |
1072 | ||
1073 | return 0; | |
1074 | ||
1075 | error_4: | |
1076 | mlx5_ib_destroy_qp(qp); | |
1077 | ||
1078 | error_3: | |
1079 | ib_destroy_cq(cq); | |
1080 | ||
1081 | error_2: | |
1082 | ib_dereg_mr(mr); | |
1083 | ||
1084 | error_1: | |
1085 | ib_dealloc_pd(pd); | |
1086 | ||
1087 | error_0: | |
1088 | kfree(attr); | |
1089 | kfree(init_attr); | |
1090 | return ret; | |
1091 | } | |
1092 | ||
1093 | static int create_dev_resources(struct mlx5_ib_resources *devr) | |
1094 | { | |
1095 | struct ib_srq_init_attr attr; | |
1096 | struct mlx5_ib_dev *dev; | |
bcf4c1ea | 1097 | struct ib_cq_init_attr cq_attr = {.cqe = 1}; |
e126ba97 EC |
1098 | int ret = 0; |
1099 | ||
1100 | dev = container_of(devr, struct mlx5_ib_dev, devr); | |
1101 | ||
1102 | devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); | |
1103 | if (IS_ERR(devr->p0)) { | |
1104 | ret = PTR_ERR(devr->p0); | |
1105 | goto error0; | |
1106 | } | |
1107 | devr->p0->device = &dev->ib_dev; | |
1108 | devr->p0->uobject = NULL; | |
1109 | atomic_set(&devr->p0->usecnt, 0); | |
1110 | ||
bcf4c1ea | 1111 | devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL); |
e126ba97 EC |
1112 | if (IS_ERR(devr->c0)) { |
1113 | ret = PTR_ERR(devr->c0); | |
1114 | goto error1; | |
1115 | } | |
1116 | devr->c0->device = &dev->ib_dev; | |
1117 | devr->c0->uobject = NULL; | |
1118 | devr->c0->comp_handler = NULL; | |
1119 | devr->c0->event_handler = NULL; | |
1120 | devr->c0->cq_context = NULL; | |
1121 | atomic_set(&devr->c0->usecnt, 0); | |
1122 | ||
1123 | devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); | |
1124 | if (IS_ERR(devr->x0)) { | |
1125 | ret = PTR_ERR(devr->x0); | |
1126 | goto error2; | |
1127 | } | |
1128 | devr->x0->device = &dev->ib_dev; | |
1129 | devr->x0->inode = NULL; | |
1130 | atomic_set(&devr->x0->usecnt, 0); | |
1131 | mutex_init(&devr->x0->tgt_qp_mutex); | |
1132 | INIT_LIST_HEAD(&devr->x0->tgt_qp_list); | |
1133 | ||
1134 | devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); | |
1135 | if (IS_ERR(devr->x1)) { | |
1136 | ret = PTR_ERR(devr->x1); | |
1137 | goto error3; | |
1138 | } | |
1139 | devr->x1->device = &dev->ib_dev; | |
1140 | devr->x1->inode = NULL; | |
1141 | atomic_set(&devr->x1->usecnt, 0); | |
1142 | mutex_init(&devr->x1->tgt_qp_mutex); | |
1143 | INIT_LIST_HEAD(&devr->x1->tgt_qp_list); | |
1144 | ||
1145 | memset(&attr, 0, sizeof(attr)); | |
1146 | attr.attr.max_sge = 1; | |
1147 | attr.attr.max_wr = 1; | |
1148 | attr.srq_type = IB_SRQT_XRC; | |
1149 | attr.ext.xrc.cq = devr->c0; | |
1150 | attr.ext.xrc.xrcd = devr->x0; | |
1151 | ||
1152 | devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); | |
1153 | if (IS_ERR(devr->s0)) { | |
1154 | ret = PTR_ERR(devr->s0); | |
1155 | goto error4; | |
1156 | } | |
1157 | devr->s0->device = &dev->ib_dev; | |
1158 | devr->s0->pd = devr->p0; | |
1159 | devr->s0->uobject = NULL; | |
1160 | devr->s0->event_handler = NULL; | |
1161 | devr->s0->srq_context = NULL; | |
1162 | devr->s0->srq_type = IB_SRQT_XRC; | |
1163 | devr->s0->ext.xrc.xrcd = devr->x0; | |
1164 | devr->s0->ext.xrc.cq = devr->c0; | |
1165 | atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); | |
1166 | atomic_inc(&devr->s0->ext.xrc.cq->usecnt); | |
1167 | atomic_inc(&devr->p0->usecnt); | |
1168 | atomic_set(&devr->s0->usecnt, 0); | |
1169 | ||
1170 | return 0; | |
1171 | ||
1172 | error4: | |
1173 | mlx5_ib_dealloc_xrcd(devr->x1); | |
1174 | error3: | |
1175 | mlx5_ib_dealloc_xrcd(devr->x0); | |
1176 | error2: | |
1177 | mlx5_ib_destroy_cq(devr->c0); | |
1178 | error1: | |
1179 | mlx5_ib_dealloc_pd(devr->p0); | |
1180 | error0: | |
1181 | return ret; | |
1182 | } | |
1183 | ||
1184 | static void destroy_dev_resources(struct mlx5_ib_resources *devr) | |
1185 | { | |
1186 | mlx5_ib_destroy_srq(devr->s0); | |
1187 | mlx5_ib_dealloc_xrcd(devr->x0); | |
1188 | mlx5_ib_dealloc_xrcd(devr->x1); | |
1189 | mlx5_ib_destroy_cq(devr->c0); | |
1190 | mlx5_ib_dealloc_pd(devr->p0); | |
1191 | } | |
1192 | ||
7738613e IW |
1193 | static int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, |
1194 | struct ib_port_immutable *immutable) | |
1195 | { | |
1196 | struct ib_port_attr attr; | |
1197 | int err; | |
1198 | ||
1199 | err = mlx5_ib_query_port(ibdev, port_num, &attr); | |
1200 | if (err) | |
1201 | return err; | |
1202 | ||
1203 | immutable->pkey_tbl_len = attr.pkey_tbl_len; | |
1204 | immutable->gid_tbl_len = attr.gid_tbl_len; | |
f9b22e35 | 1205 | immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; |
337877a4 | 1206 | immutable->max_mad_size = IB_MGMT_MAD_SIZE; |
7738613e IW |
1207 | |
1208 | return 0; | |
1209 | } | |
1210 | ||
9603b61d | 1211 | static void *mlx5_ib_add(struct mlx5_core_dev *mdev) |
e126ba97 | 1212 | { |
e126ba97 EC |
1213 | struct mlx5_ib_dev *dev; |
1214 | int err; | |
1215 | int i; | |
1216 | ||
1217 | printk_once(KERN_INFO "%s", mlx5_version); | |
1218 | ||
1219 | dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); | |
1220 | if (!dev) | |
9603b61d | 1221 | return NULL; |
e126ba97 | 1222 | |
9603b61d | 1223 | dev->mdev = mdev; |
e126ba97 EC |
1224 | |
1225 | err = get_port_caps(dev); | |
1226 | if (err) | |
9603b61d | 1227 | goto err_dealloc; |
e126ba97 EC |
1228 | |
1229 | get_ext_port_caps(dev); | |
1230 | ||
e126ba97 EC |
1231 | MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); |
1232 | ||
1233 | strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); | |
1234 | dev->ib_dev.owner = THIS_MODULE; | |
1235 | dev->ib_dev.node_type = RDMA_NODE_IB_CA; | |
c7a08ac7 EC |
1236 | dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey; |
1237 | dev->num_ports = mdev->caps.gen.num_ports; | |
e126ba97 | 1238 | dev->ib_dev.phys_port_cnt = dev->num_ports; |
233d05d2 SM |
1239 | dev->ib_dev.num_comp_vectors = |
1240 | dev->mdev->priv.eq_table.num_comp_vectors; | |
e126ba97 EC |
1241 | dev->ib_dev.dma_device = &mdev->pdev->dev; |
1242 | ||
1243 | dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; | |
1244 | dev->ib_dev.uverbs_cmd_mask = | |
1245 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | | |
1246 | (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | | |
1247 | (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | | |
1248 | (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | | |
1249 | (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | | |
1250 | (1ull << IB_USER_VERBS_CMD_REG_MR) | | |
1251 | (1ull << IB_USER_VERBS_CMD_DEREG_MR) | | |
1252 | (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | | |
1253 | (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | | |
1254 | (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | | |
1255 | (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | | |
1256 | (1ull << IB_USER_VERBS_CMD_CREATE_QP) | | |
1257 | (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | | |
1258 | (1ull << IB_USER_VERBS_CMD_QUERY_QP) | | |
1259 | (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | | |
1260 | (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | | |
1261 | (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | | |
1262 | (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | | |
1263 | (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | | |
1264 | (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | | |
1265 | (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | | |
1266 | (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | | |
1267 | (1ull << IB_USER_VERBS_CMD_OPEN_QP); | |
1707cb4a HE |
1268 | dev->ib_dev.uverbs_ex_cmd_mask = |
1269 | (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE); | |
e126ba97 EC |
1270 | |
1271 | dev->ib_dev.query_device = mlx5_ib_query_device; | |
1272 | dev->ib_dev.query_port = mlx5_ib_query_port; | |
1273 | dev->ib_dev.query_gid = mlx5_ib_query_gid; | |
1274 | dev->ib_dev.query_pkey = mlx5_ib_query_pkey; | |
1275 | dev->ib_dev.modify_device = mlx5_ib_modify_device; | |
1276 | dev->ib_dev.modify_port = mlx5_ib_modify_port; | |
1277 | dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; | |
1278 | dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; | |
1279 | dev->ib_dev.mmap = mlx5_ib_mmap; | |
1280 | dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; | |
1281 | dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; | |
1282 | dev->ib_dev.create_ah = mlx5_ib_create_ah; | |
1283 | dev->ib_dev.query_ah = mlx5_ib_query_ah; | |
1284 | dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; | |
1285 | dev->ib_dev.create_srq = mlx5_ib_create_srq; | |
1286 | dev->ib_dev.modify_srq = mlx5_ib_modify_srq; | |
1287 | dev->ib_dev.query_srq = mlx5_ib_query_srq; | |
1288 | dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; | |
1289 | dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; | |
1290 | dev->ib_dev.create_qp = mlx5_ib_create_qp; | |
1291 | dev->ib_dev.modify_qp = mlx5_ib_modify_qp; | |
1292 | dev->ib_dev.query_qp = mlx5_ib_query_qp; | |
1293 | dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; | |
1294 | dev->ib_dev.post_send = mlx5_ib_post_send; | |
1295 | dev->ib_dev.post_recv = mlx5_ib_post_recv; | |
1296 | dev->ib_dev.create_cq = mlx5_ib_create_cq; | |
1297 | dev->ib_dev.modify_cq = mlx5_ib_modify_cq; | |
1298 | dev->ib_dev.resize_cq = mlx5_ib_resize_cq; | |
1299 | dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; | |
1300 | dev->ib_dev.poll_cq = mlx5_ib_poll_cq; | |
1301 | dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; | |
1302 | dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; | |
1303 | dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; | |
1304 | dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; | |
3121e3c4 | 1305 | dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; |
e126ba97 EC |
1306 | dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; |
1307 | dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; | |
1308 | dev->ib_dev.process_mad = mlx5_ib_process_mad; | |
3121e3c4 | 1309 | dev->ib_dev.create_mr = mlx5_ib_create_mr; |
e126ba97 EC |
1310 | dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; |
1311 | dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; | |
1312 | dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; | |
d5436ba0 | 1313 | dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; |
7738613e | 1314 | dev->ib_dev.get_port_immutable = mlx5_port_immutable; |
e126ba97 | 1315 | |
8cdd312c HE |
1316 | mlx5_ib_internal_query_odp_caps(dev); |
1317 | ||
c7a08ac7 | 1318 | if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) { |
e126ba97 EC |
1319 | dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; |
1320 | dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; | |
1321 | dev->ib_dev.uverbs_cmd_mask |= | |
1322 | (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | | |
1323 | (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); | |
1324 | } | |
1325 | ||
1326 | err = init_node_data(dev); | |
1327 | if (err) | |
233d05d2 | 1328 | goto err_dealloc; |
e126ba97 EC |
1329 | |
1330 | mutex_init(&dev->cap_mask_mutex); | |
e126ba97 EC |
1331 | |
1332 | err = create_dev_resources(&dev->devr); | |
1333 | if (err) | |
233d05d2 | 1334 | goto err_dealloc; |
e126ba97 | 1335 | |
6aec21f6 | 1336 | err = mlx5_ib_odp_init_one(dev); |
281d1a92 | 1337 | if (err) |
e126ba97 EC |
1338 | goto err_rsrc; |
1339 | ||
6aec21f6 HE |
1340 | err = ib_register_device(&dev->ib_dev, NULL); |
1341 | if (err) | |
1342 | goto err_odp; | |
1343 | ||
e126ba97 EC |
1344 | err = create_umr_res(dev); |
1345 | if (err) | |
1346 | goto err_dev; | |
1347 | ||
1348 | for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { | |
281d1a92 WY |
1349 | err = device_create_file(&dev->ib_dev.dev, |
1350 | mlx5_class_attributes[i]); | |
1351 | if (err) | |
e126ba97 EC |
1352 | goto err_umrc; |
1353 | } | |
1354 | ||
1355 | dev->ib_active = true; | |
1356 | ||
9603b61d | 1357 | return dev; |
e126ba97 EC |
1358 | |
1359 | err_umrc: | |
1360 | destroy_umrc_res(dev); | |
1361 | ||
1362 | err_dev: | |
1363 | ib_unregister_device(&dev->ib_dev); | |
1364 | ||
6aec21f6 HE |
1365 | err_odp: |
1366 | mlx5_ib_odp_remove_one(dev); | |
1367 | ||
e126ba97 EC |
1368 | err_rsrc: |
1369 | destroy_dev_resources(&dev->devr); | |
1370 | ||
9603b61d | 1371 | err_dealloc: |
e126ba97 EC |
1372 | ib_dealloc_device((struct ib_device *)dev); |
1373 | ||
9603b61d | 1374 | return NULL; |
e126ba97 EC |
1375 | } |
1376 | ||
9603b61d | 1377 | static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) |
e126ba97 | 1378 | { |
9603b61d | 1379 | struct mlx5_ib_dev *dev = context; |
6aec21f6 | 1380 | |
e126ba97 | 1381 | ib_unregister_device(&dev->ib_dev); |
eefd56e5 | 1382 | destroy_umrc_res(dev); |
6aec21f6 | 1383 | mlx5_ib_odp_remove_one(dev); |
e126ba97 | 1384 | destroy_dev_resources(&dev->devr); |
e126ba97 EC |
1385 | ib_dealloc_device(&dev->ib_dev); |
1386 | } | |
1387 | ||
9603b61d JM |
1388 | static struct mlx5_interface mlx5_ib_interface = { |
1389 | .add = mlx5_ib_add, | |
1390 | .remove = mlx5_ib_remove, | |
1391 | .event = mlx5_ib_event, | |
64613d94 | 1392 | .protocol = MLX5_INTERFACE_PROTOCOL_IB, |
e126ba97 EC |
1393 | }; |
1394 | ||
1395 | static int __init mlx5_ib_init(void) | |
1396 | { | |
6aec21f6 HE |
1397 | int err; |
1398 | ||
9603b61d JM |
1399 | if (deprecated_prof_sel != 2) |
1400 | pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); | |
1401 | ||
6aec21f6 HE |
1402 | err = mlx5_ib_odp_init(); |
1403 | if (err) | |
1404 | return err; | |
1405 | ||
1406 | err = mlx5_register_interface(&mlx5_ib_interface); | |
1407 | if (err) | |
1408 | goto clean_odp; | |
1409 | ||
1410 | return err; | |
1411 | ||
1412 | clean_odp: | |
1413 | mlx5_ib_odp_cleanup(); | |
1414 | return err; | |
e126ba97 EC |
1415 | } |
1416 | ||
1417 | static void __exit mlx5_ib_cleanup(void) | |
1418 | { | |
9603b61d | 1419 | mlx5_unregister_interface(&mlx5_ib_interface); |
6aec21f6 | 1420 | mlx5_ib_odp_cleanup(); |
e126ba97 EC |
1421 | } |
1422 | ||
1423 | module_init(mlx5_ib_init); | |
1424 | module_exit(mlx5_ib_cleanup); |