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IB/mlx5: Add mlx5_ib_update_mtt to update page tables after creation
[deliverable/linux.git] / drivers / infiniband / hw / mlx5 / main.c
CommitLineData
e126ba97
EC		 1/*
2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <asm-generic/kmap_types.h>
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/errno.h>
37#include <linux/pci.h>
38#include <linux/dma-mapping.h>
39#include <linux/slab.h>
40#include <linux/io-mapping.h>
41#include <linux/sched.h>
42#include <rdma/ib_user_verbs.h>
43#include <rdma/ib_smi.h>
44#include <rdma/ib_umem.h>
45#include "user.h"
46#include "mlx5_ib.h"
47
48#define DRIVER_NAME "mlx5_ib"
169a1d85
AV		 49#define DRIVER_VERSION "2.2-1"
50#define DRIVER_RELDATE "Feb 2014"
e126ba97
EC		 51
52MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
53MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
54MODULE_LICENSE("Dual BSD/GPL");
55MODULE_VERSION(DRIVER_VERSION);
56
9603b61d
JM		 57static int deprecated_prof_sel = 2;
58module_param_named(prof_sel, deprecated_prof_sel, int, 0444);
59MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core");
e126ba97
EC		 60
61static char mlx5_version[] =
62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
64
e126ba97
EC		 65int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn)
66{
9603b61d 67 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
e126ba97
EC		 68 struct mlx5_eq *eq, *n;
69 int err = -ENOENT;
70
71 spin_lock(&table->lock);
72 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
73 if (eq->index == vector) {
74 *eqn = eq->eqn;
75 *irqn = eq->irqn;
76 err = 0;
77 break;
78 }
79 }
80 spin_unlock(&table->lock);
81
82 return err;
83}
84
85static int alloc_comp_eqs(struct mlx5_ib_dev *dev)
86{
9603b61d 87 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
ada9f5d0 88 char name[MLX5_MAX_EQ_NAME];
e126ba97
EC		 89 struct mlx5_eq *eq, *n;
90 int ncomp_vec;
91 int nent;
92 int err;
93 int i;
94
95 INIT_LIST_HEAD(&dev->eqs_list);
96 ncomp_vec = table->num_comp_vectors;
97 nent = MLX5_COMP_EQ_SIZE;
98 for (i = 0; i < ncomp_vec; i++) {
99 eq = kzalloc(sizeof(*eq), GFP_KERNEL);
100 if (!eq) {
101 err = -ENOMEM;
102 goto clean;
103 }
104
ada9f5d0 105 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i);
9603b61d 106 err = mlx5_create_map_eq(dev->mdev, eq,
e126ba97 107 i + MLX5_EQ_VEC_COMP_BASE, nent, 0,
9603b61d 108 name, &dev->mdev->priv.uuari.uars[0]);
e126ba97
EC		 109 if (err) {
110 kfree(eq);
111 goto clean;
112 }
113 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
114 eq->index = i;
115 spin_lock(&table->lock);
116 list_add_tail(&eq->list, &dev->eqs_list);
117 spin_unlock(&table->lock);
118 }
119
120 dev->num_comp_vectors = ncomp_vec;
121 return 0;
122
123clean:
124 spin_lock(&table->lock);
125 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
126 list_del(&eq->list);
127 spin_unlock(&table->lock);
9603b61d 128 if (mlx5_destroy_unmap_eq(dev->mdev, eq))
e126ba97
EC		 129 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
130 kfree(eq);
131 spin_lock(&table->lock);
132 }
133 spin_unlock(&table->lock);
134 return err;
135}
136
137static void free_comp_eqs(struct mlx5_ib_dev *dev)
138{
9603b61d 139 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
e126ba97
EC		 140 struct mlx5_eq *eq, *n;
141
142 spin_lock(&table->lock);
143 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
144 list_del(&eq->list);
145 spin_unlock(&table->lock);
9603b61d 146 if (mlx5_destroy_unmap_eq(dev->mdev, eq))
e126ba97
EC		 147 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
148 kfree(eq);
149 spin_lock(&table->lock);
150 }
151 spin_unlock(&table->lock);
152}
153
154static int mlx5_ib_query_device(struct ib_device *ibdev,
155 struct ib_device_attr *props)
156{
157 struct mlx5_ib_dev *dev = to_mdev(ibdev);
158 struct ib_smp *in_mad = NULL;
159 struct ib_smp *out_mad = NULL;
c7a08ac7 160 struct mlx5_general_caps *gen;
e126ba97
EC		 161 int err = -ENOMEM;
162 int max_rq_sg;
163 int max_sq_sg;
164 u64 flags;
165
c7a08ac7 166 gen = &dev->mdev->caps.gen;
e126ba97
EC		 167 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
168 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
169 if (!in_mad || !out_mad)
170 goto out;
171
172 init_query_mad(in_mad);
173 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
174
175 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
176 if (err)
177 goto out;
178
179 memset(props, 0, sizeof(*props));
180
9603b61d
JM		 181 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
182 (fw_rev_min(dev->mdev) << 16) |
183 fw_rev_sub(dev->mdev);
e126ba97
EC		 184 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
185 IB_DEVICE_PORT_ACTIVE_EVENT |
186 IB_DEVICE_SYS_IMAGE_GUID |
1a4c3a3d 187 IB_DEVICE_RC_RNR_NAK_GEN;
c7a08ac7 188 flags = gen->flags;
e126ba97
EC		 189 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
190 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
191 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
192 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
193 if (flags & MLX5_DEV_CAP_FLAG_APM)
194 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
195 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
196 if (flags & MLX5_DEV_CAP_FLAG_XRC)
197 props->device_cap_flags |= IB_DEVICE_XRC;
198 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
2dea9094
SG		 199 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
200 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
201 /* At this stage no support for signature handover */
202 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
203 IB_PROT_T10DIF_TYPE_2 |
204 IB_PROT_T10DIF_TYPE_3;
205 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
206 IB_GUARD_T10DIF_CSUM;
207 }
f360d88a
EC		 208 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
209 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
e126ba97
EC		 210
211 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
212 0xffffff;
213 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
214 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
215 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
216
217 props->max_mr_size = ~0ull;
c7a08ac7
EC		 218 props->page_size_cap = gen->min_page_sz;
219 props->max_qp = 1 << gen->log_max_qp;
220 props->max_qp_wr = gen->max_wqes;
221 max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
222 max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
e126ba97
EC		 223 sizeof(struct mlx5_wqe_data_seg);
224 props->max_sge = min(max_rq_sg, max_sq_sg);
c7a08ac7
EC		 225 props->max_cq = 1 << gen->log_max_cq;
226 props->max_cqe = gen->max_cqes - 1;
227 props->max_mr = 1 << gen->log_max_mkey;
228 props->max_pd = 1 << gen->log_max_pd;
229 props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp;
230 props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp;
231 props->max_srq = 1 << gen->log_max_srq;
232 props->max_srq_wr = gen->max_srq_wqes - 1;
233 props->local_ca_ack_delay = gen->local_ca_ack_delay;
e126ba97 234 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
e126ba97
EC		 235 props->max_srq_sge = max_rq_sg - 1;
236 props->max_fast_reg_page_list_len = (unsigned int)-1;
c7a08ac7 237 props->local_ca_ack_delay = gen->local_ca_ack_delay;
81bea28f
EC		 238 props->atomic_cap = IB_ATOMIC_NONE;
239 props->masked_atomic_cap = IB_ATOMIC_NONE;
e126ba97 240 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
c7a08ac7
EC		 241 props->max_mcast_grp = 1 << gen->log_max_mcg;
242 props->max_mcast_qp_attach = gen->max_qp_mcg;
e126ba97
EC		 243 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
244 props->max_mcast_grp;
245 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
246
8cdd312c
HE		 247#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
248 if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)
249 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
250 props->odp_caps = dev->odp_caps;
251#endif
252
e126ba97
EC		 253out:
254 kfree(in_mad);
255 kfree(out_mad);
256
257 return err;
258}
259
260int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
261 struct ib_port_attr *props)
262{
263 struct mlx5_ib_dev *dev = to_mdev(ibdev);
264 struct ib_smp *in_mad = NULL;
265 struct ib_smp *out_mad = NULL;
c7a08ac7 266 struct mlx5_general_caps *gen;
e126ba97
EC		 267 int ext_active_speed;
268 int err = -ENOMEM;
269
c7a08ac7
EC		 270 gen = &dev->mdev->caps.gen;
271 if (port < 1 || port > gen->num_ports) {
e126ba97
EC		 272 mlx5_ib_warn(dev, "invalid port number %d\n", port);
273 return -EINVAL;
274 }
275
276 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
277 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
278 if (!in_mad || !out_mad)
279 goto out;
280
281 memset(props, 0, sizeof(*props));
282
283 init_query_mad(in_mad);
284 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
285 in_mad->attr_mod = cpu_to_be32(port);
286
287 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
288 if (err) {
289 mlx5_ib_warn(dev, "err %d\n", err);
290 goto out;
291 }
292
293
294 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
295 props->lmc = out_mad->data[34] & 0x7;
296 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
297 props->sm_sl = out_mad->data[36] & 0xf;
298 props->state = out_mad->data[32] & 0xf;
299 props->phys_state = out_mad->data[33] >> 4;
300 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
301 props->gid_tbl_len = out_mad->data[50];
c7a08ac7
EC		 302 props->max_msg_sz = 1 << gen->log_max_msg;
303 props->pkey_tbl_len = gen->port[port - 1].pkey_table_len;
e126ba97
EC		 304 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
305 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
306 props->active_width = out_mad->data[31] & 0xf;
307 props->active_speed = out_mad->data[35] >> 4;
308 props->max_mtu = out_mad->data[41] & 0xf;
309 props->active_mtu = out_mad->data[36] >> 4;
310 props->subnet_timeout = out_mad->data[51] & 0x1f;
311 props->max_vl_num = out_mad->data[37] >> 4;
312 props->init_type_reply = out_mad->data[41] >> 4;
313
314 /* Check if extended speeds (EDR/FDR/...) are supported */
315 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
316 ext_active_speed = out_mad->data[62] >> 4;
317
318 switch (ext_active_speed) {
319 case 1:
320 props->active_speed = 16; /* FDR */
321 break;
322 case 2:
323 props->active_speed = 32; /* EDR */
324 break;
325 }
326 }
327
328 /* If reported active speed is QDR, check if is FDR-10 */
329 if (props->active_speed == 4) {
c7a08ac7 330 if (gen->ext_port_cap[port - 1] &
e126ba97
EC		 331 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
332 init_query_mad(in_mad);
333 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
334 in_mad->attr_mod = cpu_to_be32(port);
335
336 err = mlx5_MAD_IFC(dev, 1, 1, port,
337 NULL, NULL, in_mad, out_mad);
338 if (err)
339 goto out;
340
341 /* Checking LinkSpeedActive for FDR-10 */
342 if (out_mad->data[15] & 0x1)
343 props->active_speed = 8;
344 }
345 }
346
347out:
348 kfree(in_mad);
349 kfree(out_mad);
350
351 return err;
352}
353
354static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
355 union ib_gid *gid)
356{
357 struct ib_smp *in_mad = NULL;
358 struct ib_smp *out_mad = NULL;
359 int err = -ENOMEM;
360
361 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
362 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
363 if (!in_mad || !out_mad)
364 goto out;
365
366 init_query_mad(in_mad);
367 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
368 in_mad->attr_mod = cpu_to_be32(port);
369
370 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
371 if (err)
372 goto out;
373
374 memcpy(gid->raw, out_mad->data + 8, 8);
375
376 init_query_mad(in_mad);
377 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
378 in_mad->attr_mod = cpu_to_be32(index / 8);
379
380 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
381 if (err)
382 goto out;
383
384 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
385
386out:
387 kfree(in_mad);
388 kfree(out_mad);
389 return err;
390}
391
392static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
393 u16 *pkey)
394{
395 struct ib_smp *in_mad = NULL;
396 struct ib_smp *out_mad = NULL;
397 int err = -ENOMEM;
398
399 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
400 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
401 if (!in_mad || !out_mad)
402 goto out;
403
404 init_query_mad(in_mad);
405 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
406 in_mad->attr_mod = cpu_to_be32(index / 32);
407
408 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
409 if (err)
410 goto out;
411
412 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
413
414out:
415 kfree(in_mad);
416 kfree(out_mad);
417 return err;
418}
419
420struct mlx5_reg_node_desc {
421 u8 desc[64];
422};
423
424static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
425 struct ib_device_modify *props)
426{
427 struct mlx5_ib_dev *dev = to_mdev(ibdev);
428 struct mlx5_reg_node_desc in;
429 struct mlx5_reg_node_desc out;
430 int err;
431
432 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
433 return -EOPNOTSUPP;
434
435 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
436 return 0;
437
438 /*
439 * If possible, pass node desc to FW, so it can generate
440 * a 144 trap. If cmd fails, just ignore.
441 */
442 memcpy(&in, props->node_desc, 64);
9603b61d 443 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out,
e126ba97
EC		 444 sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
445 if (err)
446 return err;
447
448 memcpy(ibdev->node_desc, props->node_desc, 64);
449
450 return err;
451}
452
453static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
454 struct ib_port_modify *props)
455{
456 struct mlx5_ib_dev *dev = to_mdev(ibdev);
457 struct ib_port_attr attr;
458 u32 tmp;
459 int err;
460
461 mutex_lock(&dev->cap_mask_mutex);
462
463 err = mlx5_ib_query_port(ibdev, port, &attr);
464 if (err)
465 goto out;
466
467 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
468 ~props->clr_port_cap_mask;
469
9603b61d 470 err = mlx5_set_port_caps(dev->mdev, port, tmp);
e126ba97
EC		 471
472out:
473 mutex_unlock(&dev->cap_mask_mutex);
474 return err;
475}
476
477static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
478 struct ib_udata *udata)
479{
480 struct mlx5_ib_dev *dev = to_mdev(ibdev);
78c0f98c 481 struct mlx5_ib_alloc_ucontext_req_v2 req;
e126ba97
EC		 482 struct mlx5_ib_alloc_ucontext_resp resp;
483 struct mlx5_ib_ucontext *context;
c7a08ac7 484 struct mlx5_general_caps *gen;
e126ba97
EC		 485 struct mlx5_uuar_info *uuari;
486 struct mlx5_uar *uars;
c1be5232 487 int gross_uuars;
e126ba97 488 int num_uars;
78c0f98c 489 int ver;
e126ba97
EC		 490 int uuarn;
491 int err;
492 int i;
f241e749 493 size_t reqlen;
e126ba97 494
c7a08ac7 495 gen = &dev->mdev->caps.gen;
e126ba97
EC		 496 if (!dev->ib_active)
497 return ERR_PTR(-EAGAIN);
498
78c0f98c
EC		 499 memset(&req, 0, sizeof(req));
500 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
501 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
502 ver = 0;
503 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
504 ver = 2;
505 else
506 return ERR_PTR(-EINVAL);
507
508 err = ib_copy_from_udata(&req, udata, reqlen);
e126ba97
EC		 509 if (err)
510 return ERR_PTR(err);
511
78c0f98c
EC		 512 if (req.flags || req.reserved)
513 return ERR_PTR(-EINVAL);
514
e126ba97
EC		 515 if (req.total_num_uuars > MLX5_MAX_UUARS)
516 return ERR_PTR(-ENOMEM);
517
518 if (req.total_num_uuars == 0)
519 return ERR_PTR(-EINVAL);
520
c1be5232
EC		 521 req.total_num_uuars = ALIGN(req.total_num_uuars,
522 MLX5_NON_FP_BF_REGS_PER_PAGE);
e126ba97
EC		 523 if (req.num_low_latency_uuars > req.total_num_uuars - 1)
524 return ERR_PTR(-EINVAL);
525
c1be5232
EC		 526 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
527 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
c7a08ac7
EC		 528 resp.qp_tab_size = 1 << gen->log_max_qp;
529 resp.bf_reg_size = gen->bf_reg_size;
e126ba97 530 resp.cache_line_size = L1_CACHE_BYTES;
c7a08ac7
EC		 531 resp.max_sq_desc_sz = gen->max_sq_desc_sz;
532 resp.max_rq_desc_sz = gen->max_rq_desc_sz;
533 resp.max_send_wqebb = gen->max_wqes;
534 resp.max_recv_wr = gen->max_wqes;
535 resp.max_srq_recv_wr = gen->max_srq_wqes;
e126ba97
EC		 536
537 context = kzalloc(sizeof(*context), GFP_KERNEL);
538 if (!context)
539 return ERR_PTR(-ENOMEM);
540
541 uuari = &context->uuari;
542 mutex_init(&uuari->lock);
543 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
544 if (!uars) {
545 err = -ENOMEM;
546 goto out_ctx;
547 }
548
c1be5232 549 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
e126ba97
EC		 550 sizeof(*uuari->bitmap),
551 GFP_KERNEL);
552 if (!uuari->bitmap) {
553 err = -ENOMEM;
554 goto out_uar_ctx;
555 }
556 /*
557 * clear all fast path uuars
558 */
c1be5232 559 for (i = 0; i < gross_uuars; i++) {
e126ba97
EC		 560 uuarn = i & 3;
561 if (uuarn == 2 || uuarn == 3)
562 set_bit(i, uuari->bitmap);
563 }
564
c1be5232 565 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
e126ba97
EC		 566 if (!uuari->count) {
567 err = -ENOMEM;
568 goto out_bitmap;
569 }
570
571 for (i = 0; i < num_uars; i++) {
9603b61d 572 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index);
e126ba97
EC		 573 if (err)
574 goto out_count;
575 }
576
577 INIT_LIST_HEAD(&context->db_page_list);
578 mutex_init(&context->db_page_mutex);
579
580 resp.tot_uuars = req.total_num_uuars;
c7a08ac7 581 resp.num_ports = gen->num_ports;
92b0ca7c
DC		 582 err = ib_copy_to_udata(udata, &resp,
583 sizeof(resp) - sizeof(resp.reserved));
e126ba97
EC		 584 if (err)
585 goto out_uars;
586
78c0f98c 587 uuari->ver = ver;
e126ba97
EC		 588 uuari->num_low_latency_uuars = req.num_low_latency_uuars;
589 uuari->uars = uars;
590 uuari->num_uars = num_uars;
591 return &context->ibucontext;
592
593out_uars:
594 for (i--; i >= 0; i--)
9603b61d 595 mlx5_cmd_free_uar(dev->mdev, uars[i].index);
e126ba97
EC		 596out_count:
597 kfree(uuari->count);
598
599out_bitmap:
600 kfree(uuari->bitmap);
601
602out_uar_ctx:
603 kfree(uars);
604
605out_ctx:
606 kfree(context);
607 return ERR_PTR(err);
608}
609
610static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
611{
612 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
613 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
614 struct mlx5_uuar_info *uuari = &context->uuari;
615 int i;
616
617 for (i = 0; i < uuari->num_uars; i++) {
9603b61d 618 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
e126ba97
EC		 619 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
620 }
621
622 kfree(uuari->count);
623 kfree(uuari->bitmap);
624 kfree(uuari->uars);
625 kfree(context);
626
627 return 0;
628}
629
630static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
631{
9603b61d 632 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index;
e126ba97
EC		 633}
634
635static int get_command(unsigned long offset)
636{
637 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
638}
639
640static int get_arg(unsigned long offset)
641{
642 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
643}
644
645static int get_index(unsigned long offset)
646{
647 return get_arg(offset);
648}
649
650static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
651{
652 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
653 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
654 struct mlx5_uuar_info *uuari = &context->uuari;
655 unsigned long command;
656 unsigned long idx;
657 phys_addr_t pfn;
658
659 command = get_command(vma->vm_pgoff);
660 switch (command) {
661 case MLX5_IB_MMAP_REGULAR_PAGE:
662 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
663 return -EINVAL;
664
665 idx = get_index(vma->vm_pgoff);
1c3ce90d
EC		 666 if (idx >= uuari->num_uars)
667 return -EINVAL;
668
e126ba97
EC		 669 pfn = uar_index2pfn(dev, uuari->uars[idx].index);
670 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
671 (unsigned long long)pfn);
672
e126ba97
EC		 673 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
674 if (io_remap_pfn_range(vma, vma->vm_start, pfn,
675 PAGE_SIZE, vma->vm_page_prot))
676 return -EAGAIN;
677
678 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
679 vma->vm_start,
680 (unsigned long long)pfn << PAGE_SHIFT);
681 break;
682
683 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
684 return -ENOSYS;
685
686 default:
687 return -EINVAL;
688 }
689
690 return 0;
691}
692
693static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
694{
695 struct mlx5_create_mkey_mbox_in *in;
696 struct mlx5_mkey_seg *seg;
697 struct mlx5_core_mr mr;
698 int err;
699
700 in = kzalloc(sizeof(*in), GFP_KERNEL);
701 if (!in)
702 return -ENOMEM;
703
704 seg = &in->seg;
705 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
706 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
707 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
708 seg->start_addr = 0;
709
9603b61d 710 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
746b5583 711 NULL, NULL, NULL);
e126ba97
EC		 712 if (err) {
713 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
714 goto err_in;
715 }
716
717 kfree(in);
718 *key = mr.key;
719
720 return 0;
721
722err_in:
723 kfree(in);
724
725 return err;
726}
727
728static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
729{
730 struct mlx5_core_mr mr;
731 int err;
732
733 memset(&mr, 0, sizeof(mr));
734 mr.key = key;
9603b61d 735 err = mlx5_core_destroy_mkey(dev->mdev, &mr);
e126ba97
EC		 736 if (err)
737 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
738}
739
740static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
741 struct ib_ucontext *context,
742 struct ib_udata *udata)
743{
744 struct mlx5_ib_alloc_pd_resp resp;
745 struct mlx5_ib_pd *pd;
746 int err;
747
748 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
749 if (!pd)
750 return ERR_PTR(-ENOMEM);
751
9603b61d 752 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn);
e126ba97
EC		 753 if (err) {
754 kfree(pd);
755 return ERR_PTR(err);
756 }
757
758 if (context) {
759 resp.pdn = pd->pdn;
760 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
9603b61d 761 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 762 kfree(pd);
763 return ERR_PTR(-EFAULT);
764 }
765 } else {
766 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
767 if (err) {
9603b61d 768 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 769 kfree(pd);
770 return ERR_PTR(err);
771 }
772 }
773
774 return &pd->ibpd;
775}
776
777static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
778{
779 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
780 struct mlx5_ib_pd *mpd = to_mpd(pd);
781
782 if (!pd->uobject)
783 free_pa_mkey(mdev, mpd->pa_lkey);
784
9603b61d 785 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
e126ba97
EC		 786 kfree(mpd);
787
788 return 0;
789}
790
791static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
792{
793 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
794 int err;
795
9603b61d 796 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 797 if (err)
798 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
799 ibqp->qp_num, gid->raw);
800
801 return err;
802}
803
804static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
805{
806 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
807 int err;
808
9603b61d 809 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 810 if (err)
811 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
812 ibqp->qp_num, gid->raw);
813
814 return err;
815}
816
817static int init_node_data(struct mlx5_ib_dev *dev)
818{
819 struct ib_smp *in_mad = NULL;
820 struct ib_smp *out_mad = NULL;
821 int err = -ENOMEM;
822
823 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
824 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
825 if (!in_mad || !out_mad)
826 goto out;
827
828 init_query_mad(in_mad);
829 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
830
831 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
832 if (err)
833 goto out;
834
835 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
836
837 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
838
839 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
840 if (err)
841 goto out;
842
9603b61d 843 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
e126ba97
EC		 844 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
845
846out:
847 kfree(in_mad);
848 kfree(out_mad);
849 return err;
850}
851
852static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
853 char *buf)
854{
855 struct mlx5_ib_dev *dev =
856 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
857
9603b61d 858 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
e126ba97
EC		 859}
860
861static ssize_t show_reg_pages(struct device *device,
862 struct device_attribute *attr, char *buf)
863{
864 struct mlx5_ib_dev *dev =
865 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
866
9603b61d 867 return sprintf(buf, "%d\n", dev->mdev->priv.reg_pages);
e126ba97
EC		 868}
869
870static ssize_t show_hca(struct device *device, struct device_attribute *attr,
871 char *buf)
872{
873 struct mlx5_ib_dev *dev =
874 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 875 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
e126ba97
EC		 876}
877
878static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
879 char *buf)
880{
881 struct mlx5_ib_dev *dev =
882 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d
JM		 883 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
884 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
e126ba97
EC		 885}
886
887static ssize_t show_rev(struct device *device, struct device_attribute *attr,
888 char *buf)
889{
890 struct mlx5_ib_dev *dev =
891 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 892 return sprintf(buf, "%x\n", dev->mdev->rev_id);
e126ba97
EC		 893}
894
895static ssize_t show_board(struct device *device, struct device_attribute *attr,
896 char *buf)
897{
898 struct mlx5_ib_dev *dev =
899 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
900 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
9603b61d 901 dev->mdev->board_id);
e126ba97
EC		 902}
903
904static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
905static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
906static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
907static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
908static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
909static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
910
911static struct device_attribute *mlx5_class_attributes[] = {
912 &dev_attr_hw_rev,
913 &dev_attr_fw_ver,
914 &dev_attr_hca_type,
915 &dev_attr_board_id,
916 &dev_attr_fw_pages,
917 &dev_attr_reg_pages,
918};
919
9603b61d 920static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context,
4d2f9bbb 921 enum mlx5_dev_event event, unsigned long param)
e126ba97 922{
9603b61d 923 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
e126ba97 924 struct ib_event ibev;
9603b61d 925
e126ba97
EC		 926 u8 port = 0;
927
928 switch (event) {
929 case MLX5_DEV_EVENT_SYS_ERROR:
930 ibdev->ib_active = false;
931 ibev.event = IB_EVENT_DEVICE_FATAL;
932 break;
933
934 case MLX5_DEV_EVENT_PORT_UP:
935 ibev.event = IB_EVENT_PORT_ACTIVE;
4d2f9bbb 936 port = (u8)param;
e126ba97
EC		 937 break;
938
939 case MLX5_DEV_EVENT_PORT_DOWN:
940 ibev.event = IB_EVENT_PORT_ERR;
4d2f9bbb 941 port = (u8)param;
e126ba97
EC		 942 break;
943
944 case MLX5_DEV_EVENT_PORT_INITIALIZED:
945 /* not used by ULPs */
946 return;
947
948 case MLX5_DEV_EVENT_LID_CHANGE:
949 ibev.event = IB_EVENT_LID_CHANGE;
4d2f9bbb 950 port = (u8)param;
e126ba97
EC		 951 break;
952
953 case MLX5_DEV_EVENT_PKEY_CHANGE:
954 ibev.event = IB_EVENT_PKEY_CHANGE;
4d2f9bbb 955 port = (u8)param;
e126ba97
EC		 956 break;
957
958 case MLX5_DEV_EVENT_GUID_CHANGE:
959 ibev.event = IB_EVENT_GID_CHANGE;
4d2f9bbb 960 port = (u8)param;
e126ba97
EC		 961 break;
962
963 case MLX5_DEV_EVENT_CLIENT_REREG:
964 ibev.event = IB_EVENT_CLIENT_REREGISTER;
4d2f9bbb 965 port = (u8)param;
e126ba97
EC		 966 break;
967 }
968
969 ibev.device = &ibdev->ib_dev;
970 ibev.element.port_num = port;
971
a0c84c32
EC		 972 if (port < 1 || port > ibdev->num_ports) {
973 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
974 return;
975 }
976
e126ba97
EC		 977 if (ibdev->ib_active)
978 ib_dispatch_event(&ibev);
979}
980
981static void get_ext_port_caps(struct mlx5_ib_dev *dev)
982{
c7a08ac7 983 struct mlx5_general_caps *gen;
e126ba97
EC		 984 int port;
985
c7a08ac7
EC		 986 gen = &dev->mdev->caps.gen;
987 for (port = 1; port <= gen->num_ports; port++)
e126ba97
EC		 988 mlx5_query_ext_port_caps(dev, port);
989}
990
991static int get_port_caps(struct mlx5_ib_dev *dev)
992{
993 struct ib_device_attr *dprops = NULL;
994 struct ib_port_attr *pprops = NULL;
c7a08ac7 995 struct mlx5_general_caps *gen;
e126ba97
EC		 996 int err = 0;
997 int port;
998
c7a08ac7 999 gen = &dev->mdev->caps.gen;
e126ba97
EC		 1000 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
1001 if (!pprops)
1002 goto out;
1003
1004 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
1005 if (!dprops)
1006 goto out;
1007
1008 err = mlx5_ib_query_device(&dev->ib_dev, dprops);
1009 if (err) {
1010 mlx5_ib_warn(dev, "query_device failed %d\n", err);
1011 goto out;
1012 }
1013
c7a08ac7 1014 for (port = 1; port <= gen->num_ports; port++) {
e126ba97
EC		 1015 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
1016 if (err) {
1017 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
1018 break;
1019 }
c7a08ac7
EC		 1020 gen->port[port - 1].pkey_table_len = dprops->max_pkeys;
1021 gen->port[port - 1].gid_table_len = pprops->gid_tbl_len;
e126ba97
EC		 1022 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
1023 dprops->max_pkeys, pprops->gid_tbl_len);
1024 }
1025
1026out:
1027 kfree(pprops);
1028 kfree(dprops);
1029
1030 return err;
1031}
1032
1033static void destroy_umrc_res(struct mlx5_ib_dev *dev)
1034{
1035 int err;
1036
1037 err = mlx5_mr_cache_cleanup(dev);
1038 if (err)
1039 mlx5_ib_warn(dev, "mr cache cleanup failed\n");
1040
1041 mlx5_ib_destroy_qp(dev->umrc.qp);
1042 ib_destroy_cq(dev->umrc.cq);
1043 ib_dereg_mr(dev->umrc.mr);
1044 ib_dealloc_pd(dev->umrc.pd);
1045}
1046
1047enum {
1048 MAX_UMR_WR = 128,
1049};
1050
1051static int create_umr_res(struct mlx5_ib_dev *dev)
1052{
1053 struct ib_qp_init_attr *init_attr = NULL;
1054 struct ib_qp_attr *attr = NULL;
1055 struct ib_pd *pd;
1056 struct ib_cq *cq;
1057 struct ib_qp *qp;
1058 struct ib_mr *mr;
1059 int ret;
1060
1061 attr = kzalloc(sizeof(*attr), GFP_KERNEL);
1062 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
1063 if (!attr || !init_attr) {
1064 ret = -ENOMEM;
1065 goto error_0;
1066 }
1067
1068 pd = ib_alloc_pd(&dev->ib_dev);
1069 if (IS_ERR(pd)) {
1070 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
1071 ret = PTR_ERR(pd);
1072 goto error_0;
1073 }
1074
1075 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
1076 if (IS_ERR(mr)) {
1077 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
1078 ret = PTR_ERR(mr);
1079 goto error_1;
1080 }
1081
1082 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
1083 0);
1084 if (IS_ERR(cq)) {
1085 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
1086 ret = PTR_ERR(cq);
1087 goto error_2;
1088 }
1089 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
1090
1091 init_attr->send_cq = cq;
1092 init_attr->recv_cq = cq;
1093 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
1094 init_attr->cap.max_send_wr = MAX_UMR_WR;
1095 init_attr->cap.max_send_sge = 1;
1096 init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
1097 init_attr->port_num = 1;
1098 qp = mlx5_ib_create_qp(pd, init_attr, NULL);
1099 if (IS_ERR(qp)) {
1100 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
1101 ret = PTR_ERR(qp);
1102 goto error_3;
1103 }
1104 qp->device = &dev->ib_dev;
1105 qp->real_qp = qp;
1106 qp->uobject = NULL;
1107 qp->qp_type = MLX5_IB_QPT_REG_UMR;
1108
1109 attr->qp_state = IB_QPS_INIT;
1110 attr->port_num = 1;
1111 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
1112 IB_QP_PORT, NULL);
1113 if (ret) {
1114 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
1115 goto error_4;
1116 }
1117
1118 memset(attr, 0, sizeof(*attr));
1119 attr->qp_state = IB_QPS_RTR;
1120 attr->path_mtu = IB_MTU_256;
1121
1122 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1123 if (ret) {
1124 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
1125 goto error_4;
1126 }
1127
1128 memset(attr, 0, sizeof(*attr));
1129 attr->qp_state = IB_QPS_RTS;
1130 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1131 if (ret) {
1132 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
1133 goto error_4;
1134 }
1135
1136 dev->umrc.qp = qp;
1137 dev->umrc.cq = cq;
1138 dev->umrc.mr = mr;
1139 dev->umrc.pd = pd;
1140
1141 sema_init(&dev->umrc.sem, MAX_UMR_WR);
1142 ret = mlx5_mr_cache_init(dev);
1143 if (ret) {
1144 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
1145 goto error_4;
1146 }
1147
1148 kfree(attr);
1149 kfree(init_attr);
1150
1151 return 0;
1152
1153error_4:
1154 mlx5_ib_destroy_qp(qp);
1155
1156error_3:
1157 ib_destroy_cq(cq);
1158
1159error_2:
1160 ib_dereg_mr(mr);
1161
1162error_1:
1163 ib_dealloc_pd(pd);
1164
1165error_0:
1166 kfree(attr);
1167 kfree(init_attr);
1168 return ret;
1169}
1170
1171static int create_dev_resources(struct mlx5_ib_resources *devr)
1172{
1173 struct ib_srq_init_attr attr;
1174 struct mlx5_ib_dev *dev;
1175 int ret = 0;
1176
1177 dev = container_of(devr, struct mlx5_ib_dev, devr);
1178
1179 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1180 if (IS_ERR(devr->p0)) {
1181 ret = PTR_ERR(devr->p0);
1182 goto error0;
1183 }
1184 devr->p0->device = &dev->ib_dev;
1185 devr->p0->uobject = NULL;
1186 atomic_set(&devr->p0->usecnt, 0);
1187
1188 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
1189 if (IS_ERR(devr->c0)) {
1190 ret = PTR_ERR(devr->c0);
1191 goto error1;
1192 }
1193 devr->c0->device = &dev->ib_dev;
1194 devr->c0->uobject = NULL;
1195 devr->c0->comp_handler = NULL;
1196 devr->c0->event_handler = NULL;
1197 devr->c0->cq_context = NULL;
1198 atomic_set(&devr->c0->usecnt, 0);
1199
1200 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1201 if (IS_ERR(devr->x0)) {
1202 ret = PTR_ERR(devr->x0);
1203 goto error2;
1204 }
1205 devr->x0->device = &dev->ib_dev;
1206 devr->x0->inode = NULL;
1207 atomic_set(&devr->x0->usecnt, 0);
1208 mutex_init(&devr->x0->tgt_qp_mutex);
1209 INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
1210
1211 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1212 if (IS_ERR(devr->x1)) {
1213 ret = PTR_ERR(devr->x1);
1214 goto error3;
1215 }
1216 devr->x1->device = &dev->ib_dev;
1217 devr->x1->inode = NULL;
1218 atomic_set(&devr->x1->usecnt, 0);
1219 mutex_init(&devr->x1->tgt_qp_mutex);
1220 INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
1221
1222 memset(&attr, 0, sizeof(attr));
1223 attr.attr.max_sge = 1;
1224 attr.attr.max_wr = 1;
1225 attr.srq_type = IB_SRQT_XRC;
1226 attr.ext.xrc.cq = devr->c0;
1227 attr.ext.xrc.xrcd = devr->x0;
1228
1229 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
1230 if (IS_ERR(devr->s0)) {
1231 ret = PTR_ERR(devr->s0);
1232 goto error4;
1233 }
1234 devr->s0->device = &dev->ib_dev;
1235 devr->s0->pd = devr->p0;
1236 devr->s0->uobject = NULL;
1237 devr->s0->event_handler = NULL;
1238 devr->s0->srq_context = NULL;
1239 devr->s0->srq_type = IB_SRQT_XRC;
1240 devr->s0->ext.xrc.xrcd = devr->x0;
1241 devr->s0->ext.xrc.cq = devr->c0;
1242 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
1243 atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
1244 atomic_inc(&devr->p0->usecnt);
1245 atomic_set(&devr->s0->usecnt, 0);
1246
1247 return 0;
1248
1249error4:
1250 mlx5_ib_dealloc_xrcd(devr->x1);
1251error3:
1252 mlx5_ib_dealloc_xrcd(devr->x0);
1253error2:
1254 mlx5_ib_destroy_cq(devr->c0);
1255error1:
1256 mlx5_ib_dealloc_pd(devr->p0);
1257error0:
1258 return ret;
1259}
1260
1261static void destroy_dev_resources(struct mlx5_ib_resources *devr)
1262{
1263 mlx5_ib_destroy_srq(devr->s0);
1264 mlx5_ib_dealloc_xrcd(devr->x0);
1265 mlx5_ib_dealloc_xrcd(devr->x1);
1266 mlx5_ib_destroy_cq(devr->c0);
1267 mlx5_ib_dealloc_pd(devr->p0);
1268}
1269
9603b61d 1270static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
e126ba97 1271{
e126ba97
EC		 1272 struct mlx5_ib_dev *dev;
1273 int err;
1274 int i;
1275
1276 printk_once(KERN_INFO "%s", mlx5_version);
1277
1278 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
1279 if (!dev)
9603b61d 1280 return NULL;
e126ba97 1281
9603b61d 1282 dev->mdev = mdev;
e126ba97
EC		 1283
1284 err = get_port_caps(dev);
1285 if (err)
9603b61d 1286 goto err_dealloc;
e126ba97
EC		 1287
1288 get_ext_port_caps(dev);
1289
1290 err = alloc_comp_eqs(dev);
1291 if (err)
9603b61d 1292 goto err_dealloc;
e126ba97
EC		 1293
1294 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
1295
1296 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1297 dev->ib_dev.owner = THIS_MODULE;
1298 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
c7a08ac7
EC		 1299 dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey;
1300 dev->num_ports = mdev->caps.gen.num_ports;
e126ba97
EC		 1301 dev->ib_dev.phys_port_cnt = dev->num_ports;
1302 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors;
1303 dev->ib_dev.dma_device = &mdev->pdev->dev;
1304
1305 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
1306 dev->ib_dev.uverbs_cmd_mask =
1307 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1308 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1309 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1310 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1311 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1312 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1313 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1314 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1315 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1316 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1317 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1318 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1319 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1320 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1321 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1322 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1323 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1324 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1325 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1326 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1327 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1328 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1329 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
8cdd312c
HE		 1330 dev->ib_dev.uverbs_ex_cmd_mask =
1331 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
e126ba97
EC		 1332
1333 dev->ib_dev.query_device = mlx5_ib_query_device;
1334 dev->ib_dev.query_port = mlx5_ib_query_port;
1335 dev->ib_dev.query_gid = mlx5_ib_query_gid;
1336 dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
1337 dev->ib_dev.modify_device = mlx5_ib_modify_device;
1338 dev->ib_dev.modify_port = mlx5_ib_modify_port;
1339 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
1340 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
1341 dev->ib_dev.mmap = mlx5_ib_mmap;
1342 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
1343 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
1344 dev->ib_dev.create_ah = mlx5_ib_create_ah;
1345 dev->ib_dev.query_ah = mlx5_ib_query_ah;
1346 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
1347 dev->ib_dev.create_srq = mlx5_ib_create_srq;
1348 dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
1349 dev->ib_dev.query_srq = mlx5_ib_query_srq;
1350 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
1351 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
1352 dev->ib_dev.create_qp = mlx5_ib_create_qp;
1353 dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
1354 dev->ib_dev.query_qp = mlx5_ib_query_qp;
1355 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
1356 dev->ib_dev.post_send = mlx5_ib_post_send;
1357 dev->ib_dev.post_recv = mlx5_ib_post_recv;
1358 dev->ib_dev.create_cq = mlx5_ib_create_cq;
1359 dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
1360 dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
1361 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
1362 dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
1363 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
1364 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
1365 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
1366 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
3121e3c4 1367 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
e126ba97
EC		 1368 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
1369 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
1370 dev->ib_dev.process_mad = mlx5_ib_process_mad;
3121e3c4 1371 dev->ib_dev.create_mr = mlx5_ib_create_mr;
e126ba97
EC		 1372 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
1373 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
1374 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
d5436ba0 1375 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
e126ba97 1376
8cdd312c
HE		 1377 mlx5_ib_internal_query_odp_caps(dev);
1378
c7a08ac7 1379 if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) {
e126ba97
EC		 1380 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
1381 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
1382 dev->ib_dev.uverbs_cmd_mask |=
1383 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1384 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1385 }
1386
1387 err = init_node_data(dev);
1388 if (err)
1389 goto err_eqs;
1390
1391 mutex_init(&dev->cap_mask_mutex);
1392 spin_lock_init(&dev->mr_lock);
1393
1394 err = create_dev_resources(&dev->devr);
1395 if (err)
1396 goto err_eqs;
1397
281d1a92
WY		 1398 err = ib_register_device(&dev->ib_dev, NULL);
1399 if (err)
e126ba97
EC		 1400 goto err_rsrc;
1401
1402 err = create_umr_res(dev);
1403 if (err)
1404 goto err_dev;
1405
1406 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
281d1a92
WY		 1407 err = device_create_file(&dev->ib_dev.dev,
1408 mlx5_class_attributes[i]);
1409 if (err)
e126ba97
EC		 1410 goto err_umrc;
1411 }
1412
1413 dev->ib_active = true;
1414
9603b61d 1415 return dev;
e126ba97
EC		 1416
1417err_umrc:
1418 destroy_umrc_res(dev);
1419
1420err_dev:
1421 ib_unregister_device(&dev->ib_dev);
1422
1423err_rsrc:
1424 destroy_dev_resources(&dev->devr);
1425
1426err_eqs:
1427 free_comp_eqs(dev);
1428
9603b61d 1429err_dealloc:
e126ba97
EC		 1430 ib_dealloc_device((struct ib_device *)dev);
1431
9603b61d 1432 return NULL;
e126ba97
EC		 1433}
1434
9603b61d 1435static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
e126ba97 1436{
9603b61d 1437 struct mlx5_ib_dev *dev = context;
e126ba97 1438 ib_unregister_device(&dev->ib_dev);
eefd56e5 1439 destroy_umrc_res(dev);
e126ba97
EC		 1440 destroy_dev_resources(&dev->devr);
1441 free_comp_eqs(dev);
e126ba97
EC		 1442 ib_dealloc_device(&dev->ib_dev);
1443}
1444
9603b61d
JM		 1445static struct mlx5_interface mlx5_ib_interface = {
1446 .add = mlx5_ib_add,
1447 .remove = mlx5_ib_remove,
1448 .event = mlx5_ib_event,
e126ba97
EC		 1449};
1450
1451static int __init mlx5_ib_init(void)
1452{
9603b61d
JM		 1453 if (deprecated_prof_sel != 2)
1454 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
1455
1456 return mlx5_register_interface(&mlx5_ib_interface);
e126ba97
EC		 1457}
1458
1459static void __exit mlx5_ib_cleanup(void)
1460{
9603b61d 1461 mlx5_unregister_interface(&mlx5_ib_interface);
e126ba97
EC		 1462}
1463
1464module_init(mlx5_ib_init);
1465module_exit(mlx5_ib_cleanup);
Linux kernel - Deliverables
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