Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. | |
56483ec1 | 3 | * Copyright (c) 2005 Cisco Systems. All rights reserved. |
2a1d9b7f | 4 | * Copyright (c) 2005 Mellanox Technologies. All rights reserved. |
1da177e4 LT |
5 | * |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | * | |
34 | * $Id$ | |
35 | */ | |
36 | ||
dbcf31ba | 37 | #include <linux/mm.h> |
391e4dea | 38 | #include <linux/scatterlist.h> |
e8edc6e0 | 39 | #include <linux/sched.h> |
391e4dea MT |
40 | |
41 | #include <asm/page.h> | |
dbcf31ba | 42 | |
1da177e4 LT |
43 | #include "mthca_memfree.h" |
44 | #include "mthca_dev.h" | |
45 | #include "mthca_cmd.h" | |
46 | ||
47 | /* | |
48 | * We allocate in as big chunks as we can, up to a maximum of 256 KB | |
49 | * per chunk. | |
50 | */ | |
51 | enum { | |
52 | MTHCA_ICM_ALLOC_SIZE = 1 << 18, | |
53 | MTHCA_TABLE_CHUNK_SIZE = 1 << 18 | |
54 | }; | |
55 | ||
56483ec1 | 56 | struct mthca_user_db_table { |
fd9cfdd1 | 57 | struct mutex mutex; |
56483ec1 RD |
58 | struct { |
59 | u64 uvirt; | |
60 | struct scatterlist mem; | |
61 | int refcount; | |
62 | } page[0]; | |
63 | }; | |
64 | ||
391e4dea MT |
65 | static void mthca_free_icm_pages(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) |
66 | { | |
67 | int i; | |
68 | ||
69 | if (chunk->nsg > 0) | |
70 | pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, | |
71 | PCI_DMA_BIDIRECTIONAL); | |
72 | ||
73 | for (i = 0; i < chunk->npages; ++i) | |
45711f1a | 74 | __free_pages(sg_page(&chunk->mem[i]), |
391e4dea MT |
75 | get_order(chunk->mem[i].length)); |
76 | } | |
77 | ||
78 | static void mthca_free_icm_coherent(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) | |
1da177e4 | 79 | { |
1da177e4 LT |
80 | int i; |
81 | ||
391e4dea MT |
82 | for (i = 0; i < chunk->npages; ++i) { |
83 | dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length, | |
45711f1a | 84 | lowmem_page_address(sg_page(&chunk->mem[i])), |
391e4dea MT |
85 | sg_dma_address(&chunk->mem[i])); |
86 | } | |
87 | } | |
88 | ||
89 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent) | |
90 | { | |
91 | struct mthca_icm_chunk *chunk, *tmp; | |
92 | ||
1da177e4 LT |
93 | if (!icm) |
94 | return; | |
95 | ||
96 | list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { | |
391e4dea MT |
97 | if (coherent) |
98 | mthca_free_icm_coherent(dev, chunk); | |
99 | else | |
100 | mthca_free_icm_pages(dev, chunk); | |
1da177e4 LT |
101 | |
102 | kfree(chunk); | |
103 | } | |
104 | ||
105 | kfree(icm); | |
106 | } | |
107 | ||
391e4dea MT |
108 | static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask) |
109 | { | |
45711f1a JA |
110 | struct page *page; |
111 | ||
87afd448 EC |
112 | /* |
113 | * Use __GFP_ZERO because buggy firmware assumes ICM pages are | |
114 | * cleared, and subtle failures are seen if they aren't. | |
115 | */ | |
116 | page = alloc_pages(gfp_mask | __GFP_ZERO, order); | |
45711f1a | 117 | if (!page) |
391e4dea MT |
118 | return -ENOMEM; |
119 | ||
642f1490 | 120 | sg_set_page(mem, page, PAGE_SIZE << order, 0); |
391e4dea MT |
121 | return 0; |
122 | } | |
123 | ||
124 | static int mthca_alloc_icm_coherent(struct device *dev, struct scatterlist *mem, | |
125 | int order, gfp_t gfp_mask) | |
126 | { | |
127 | void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, &sg_dma_address(mem), | |
128 | gfp_mask); | |
129 | if (!buf) | |
130 | return -ENOMEM; | |
131 | ||
132 | sg_set_buf(mem, buf, PAGE_SIZE << order); | |
133 | BUG_ON(mem->offset); | |
134 | sg_dma_len(mem) = PAGE_SIZE << order; | |
135 | return 0; | |
136 | } | |
137 | ||
1da177e4 | 138 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, |
391e4dea | 139 | gfp_t gfp_mask, int coherent) |
1da177e4 LT |
140 | { |
141 | struct mthca_icm *icm; | |
142 | struct mthca_icm_chunk *chunk = NULL; | |
143 | int cur_order; | |
391e4dea MT |
144 | int ret; |
145 | ||
146 | /* We use sg_set_buf for coherent allocs, which assumes low memory */ | |
147 | BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); | |
1da177e4 LT |
148 | |
149 | icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); | |
150 | if (!icm) | |
151 | return icm; | |
152 | ||
153 | icm->refcount = 0; | |
154 | INIT_LIST_HEAD(&icm->chunk_list); | |
155 | ||
156 | cur_order = get_order(MTHCA_ICM_ALLOC_SIZE); | |
157 | ||
158 | while (npages > 0) { | |
159 | if (!chunk) { | |
160 | chunk = kmalloc(sizeof *chunk, | |
161 | gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); | |
162 | if (!chunk) | |
163 | goto fail; | |
164 | ||
45711f1a | 165 | sg_init_table(chunk->mem, MTHCA_ICM_CHUNK_LEN); |
1da177e4 LT |
166 | chunk->npages = 0; |
167 | chunk->nsg = 0; | |
168 | list_add_tail(&chunk->list, &icm->chunk_list); | |
169 | } | |
170 | ||
171 | while (1 << cur_order > npages) | |
172 | --cur_order; | |
173 | ||
391e4dea MT |
174 | if (coherent) |
175 | ret = mthca_alloc_icm_coherent(&dev->pdev->dev, | |
176 | &chunk->mem[chunk->npages], | |
177 | cur_order, gfp_mask); | |
178 | else | |
179 | ret = mthca_alloc_icm_pages(&chunk->mem[chunk->npages], | |
180 | cur_order, gfp_mask); | |
181 | ||
182 | if (!ret) { | |
183 | ++chunk->npages; | |
1da177e4 | 184 | |
11282b32 RD |
185 | if (coherent) |
186 | ++chunk->nsg; | |
187 | else if (chunk->npages == MTHCA_ICM_CHUNK_LEN) { | |
1da177e4 LT |
188 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
189 | chunk->npages, | |
190 | PCI_DMA_BIDIRECTIONAL); | |
191 | ||
192 | if (chunk->nsg <= 0) | |
193 | goto fail; | |
391e4dea | 194 | } |
1da177e4 | 195 | |
391e4dea | 196 | if (chunk->npages == MTHCA_ICM_CHUNK_LEN) |
1da177e4 | 197 | chunk = NULL; |
1da177e4 LT |
198 | |
199 | npages -= 1 << cur_order; | |
200 | } else { | |
201 | --cur_order; | |
202 | if (cur_order < 0) | |
203 | goto fail; | |
204 | } | |
205 | } | |
206 | ||
391e4dea | 207 | if (!coherent && chunk) { |
1da177e4 LT |
208 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
209 | chunk->npages, | |
210 | PCI_DMA_BIDIRECTIONAL); | |
211 | ||
212 | if (chunk->nsg <= 0) | |
213 | goto fail; | |
214 | } | |
215 | ||
216 | return icm; | |
217 | ||
218 | fail: | |
391e4dea | 219 | mthca_free_icm(dev, icm, coherent); |
1da177e4 LT |
220 | return NULL; |
221 | } | |
222 | ||
223 | int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) | |
224 | { | |
225 | int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; | |
226 | int ret = 0; | |
227 | u8 status; | |
228 | ||
fd9cfdd1 | 229 | mutex_lock(&table->mutex); |
1da177e4 LT |
230 | |
231 | if (table->icm[i]) { | |
232 | ++table->icm[i]->refcount; | |
233 | goto out; | |
234 | } | |
235 | ||
236 | table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT, | |
237 | (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | | |
391e4dea | 238 | __GFP_NOWARN, table->coherent); |
1da177e4 LT |
239 | if (!table->icm[i]) { |
240 | ret = -ENOMEM; | |
241 | goto out; | |
242 | } | |
243 | ||
244 | if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
245 | &status) || status) { | |
391e4dea | 246 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
247 | table->icm[i] = NULL; |
248 | ret = -ENOMEM; | |
249 | goto out; | |
250 | } | |
251 | ||
252 | ++table->icm[i]->refcount; | |
253 | ||
254 | out: | |
fd9cfdd1 | 255 | mutex_unlock(&table->mutex); |
1da177e4 LT |
256 | return ret; |
257 | } | |
258 | ||
259 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) | |
260 | { | |
a03a5a67 | 261 | int i; |
1da177e4 LT |
262 | u8 status; |
263 | ||
a03a5a67 RD |
264 | if (!mthca_is_memfree(dev)) |
265 | return; | |
266 | ||
267 | i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; | |
268 | ||
fd9cfdd1 | 269 | mutex_lock(&table->mutex); |
1da177e4 LT |
270 | |
271 | if (--table->icm[i]->refcount == 0) { | |
272 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d IR |
273 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
274 | &status); | |
391e4dea | 275 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
276 | table->icm[i] = NULL; |
277 | } | |
278 | ||
fd9cfdd1 | 279 | mutex_unlock(&table->mutex); |
1da177e4 LT |
280 | } |
281 | ||
391e4dea | 282 | void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle) |
0fabd9fb | 283 | { |
391e4dea | 284 | int idx, offset, dma_offset, i; |
0fabd9fb MT |
285 | struct mthca_icm_chunk *chunk; |
286 | struct mthca_icm *icm; | |
287 | struct page *page = NULL; | |
288 | ||
289 | if (!table->lowmem) | |
290 | return NULL; | |
291 | ||
fd9cfdd1 | 292 | mutex_lock(&table->mutex); |
0fabd9fb MT |
293 | |
294 | idx = (obj & (table->num_obj - 1)) * table->obj_size; | |
295 | icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE]; | |
391e4dea | 296 | dma_offset = offset = idx % MTHCA_TABLE_CHUNK_SIZE; |
0fabd9fb MT |
297 | |
298 | if (!icm) | |
299 | goto out; | |
300 | ||
301 | list_for_each_entry(chunk, &icm->chunk_list, list) { | |
302 | for (i = 0; i < chunk->npages; ++i) { | |
391e4dea MT |
303 | if (dma_handle && dma_offset >= 0) { |
304 | if (sg_dma_len(&chunk->mem[i]) > dma_offset) | |
305 | *dma_handle = sg_dma_address(&chunk->mem[i]) + | |
306 | dma_offset; | |
307 | dma_offset -= sg_dma_len(&chunk->mem[i]); | |
308 | } | |
309 | /* DMA mapping can merge pages but not split them, | |
310 | * so if we found the page, dma_handle has already | |
311 | * been assigned to. */ | |
46707e96 | 312 | if (chunk->mem[i].length > offset) { |
45711f1a | 313 | page = sg_page(&chunk->mem[i]); |
6c7d2a75 | 314 | goto out; |
0fabd9fb MT |
315 | } |
316 | offset -= chunk->mem[i].length; | |
317 | } | |
318 | } | |
319 | ||
320 | out: | |
fd9cfdd1 | 321 | mutex_unlock(&table->mutex); |
0fabd9fb MT |
322 | return page ? lowmem_page_address(page) + offset : NULL; |
323 | } | |
324 | ||
86562a13 RD |
325 | int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table, |
326 | int start, int end) | |
327 | { | |
328 | int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size; | |
329 | int i, err; | |
330 | ||
331 | for (i = start; i <= end; i += inc) { | |
332 | err = mthca_table_get(dev, table, i); | |
333 | if (err) | |
334 | goto fail; | |
335 | } | |
336 | ||
337 | return 0; | |
338 | ||
339 | fail: | |
340 | while (i > start) { | |
341 | i -= inc; | |
342 | mthca_table_put(dev, table, i); | |
343 | } | |
344 | ||
345 | return err; | |
346 | } | |
347 | ||
348 | void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table, | |
349 | int start, int end) | |
350 | { | |
351 | int i; | |
352 | ||
a03a5a67 RD |
353 | if (!mthca_is_memfree(dev)) |
354 | return; | |
355 | ||
86562a13 RD |
356 | for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size) |
357 | mthca_table_put(dev, table, i); | |
358 | } | |
359 | ||
1da177e4 LT |
360 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, |
361 | u64 virt, int obj_size, | |
362 | int nobj, int reserved, | |
391e4dea | 363 | int use_lowmem, int use_coherent) |
1da177e4 LT |
364 | { |
365 | struct mthca_icm_table *table; | |
c263ff65 | 366 | int obj_per_chunk; |
1da177e4 | 367 | int num_icm; |
d20a4019 | 368 | unsigned chunk_size; |
1da177e4 LT |
369 | int i; |
370 | u8 status; | |
371 | ||
c263ff65 RD |
372 | obj_per_chunk = MTHCA_TABLE_CHUNK_SIZE / obj_size; |
373 | num_icm = DIV_ROUND_UP(nobj, obj_per_chunk); | |
1da177e4 LT |
374 | |
375 | table = kmalloc(sizeof *table + num_icm * sizeof *table->icm, GFP_KERNEL); | |
376 | if (!table) | |
377 | return NULL; | |
378 | ||
379 | table->virt = virt; | |
380 | table->num_icm = num_icm; | |
381 | table->num_obj = nobj; | |
382 | table->obj_size = obj_size; | |
383 | table->lowmem = use_lowmem; | |
391e4dea | 384 | table->coherent = use_coherent; |
fd9cfdd1 | 385 | mutex_init(&table->mutex); |
1da177e4 LT |
386 | |
387 | for (i = 0; i < num_icm; ++i) | |
388 | table->icm[i] = NULL; | |
389 | ||
390 | for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) { | |
d20a4019 RD |
391 | chunk_size = MTHCA_TABLE_CHUNK_SIZE; |
392 | if ((i + 1) * MTHCA_TABLE_CHUNK_SIZE > nobj * obj_size) | |
393 | chunk_size = nobj * obj_size - i * MTHCA_TABLE_CHUNK_SIZE; | |
394 | ||
395 | table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT, | |
1da177e4 | 396 | (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | |
391e4dea | 397 | __GFP_NOWARN, use_coherent); |
1da177e4 LT |
398 | if (!table->icm[i]) |
399 | goto err; | |
400 | if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
401 | &status) || status) { | |
391e4dea | 402 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
403 | table->icm[i] = NULL; |
404 | goto err; | |
405 | } | |
406 | ||
407 | /* | |
408 | * Add a reference to this ICM chunk so that it never | |
409 | * gets freed (since it contains reserved firmware objects). | |
410 | */ | |
411 | ++table->icm[i]->refcount; | |
412 | } | |
413 | ||
414 | return table; | |
415 | ||
416 | err: | |
417 | for (i = 0; i < num_icm; ++i) | |
418 | if (table->icm[i]) { | |
419 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d | 420 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
b3999393 | 421 | &status); |
391e4dea | 422 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
423 | } |
424 | ||
425 | kfree(table); | |
426 | ||
427 | return NULL; | |
428 | } | |
429 | ||
430 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table) | |
431 | { | |
432 | int i; | |
433 | u8 status; | |
434 | ||
435 | for (i = 0; i < table->num_icm; ++i) | |
436 | if (table->icm[i]) { | |
437 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d IR |
438 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
439 | &status); | |
391e4dea | 440 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
441 | } |
442 | ||
443 | kfree(table); | |
444 | } | |
445 | ||
56483ec1 | 446 | static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page) |
1da177e4 LT |
447 | { |
448 | return dev->uar_table.uarc_base + | |
56483ec1 | 449 | uar->index * dev->uar_table.uarc_size + |
8d3ef29d | 450 | page * MTHCA_ICM_PAGE_SIZE; |
1da177e4 LT |
451 | } |
452 | ||
56483ec1 RD |
453 | int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar, |
454 | struct mthca_user_db_table *db_tab, int index, u64 uaddr) | |
455 | { | |
45711f1a | 456 | struct page *pages[1]; |
56483ec1 RD |
457 | int ret = 0; |
458 | u8 status; | |
459 | int i; | |
460 | ||
461 | if (!mthca_is_memfree(dev)) | |
462 | return 0; | |
463 | ||
464 | if (index < 0 || index > dev->uar_table.uarc_size / 8) | |
465 | return -EINVAL; | |
466 | ||
fd9cfdd1 | 467 | mutex_lock(&db_tab->mutex); |
56483ec1 RD |
468 | |
469 | i = index / MTHCA_DB_REC_PER_PAGE; | |
470 | ||
471 | if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) || | |
472 | (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) || | |
473 | (uaddr & 4095)) { | |
474 | ret = -EINVAL; | |
475 | goto out; | |
476 | } | |
477 | ||
478 | if (db_tab->page[i].refcount) { | |
479 | ++db_tab->page[i].refcount; | |
480 | goto out; | |
481 | } | |
482 | ||
483 | ret = get_user_pages(current, current->mm, uaddr & PAGE_MASK, 1, 1, 0, | |
45711f1a | 484 | pages, NULL); |
56483ec1 RD |
485 | if (ret < 0) |
486 | goto out; | |
487 | ||
642f1490 JA |
488 | sg_set_page(&db_tab->page[i].mem, pages[0], MTHCA_ICM_PAGE_SIZE, |
489 | uaddr & ~PAGE_MASK); | |
56483ec1 RD |
490 | |
491 | ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
492 | if (ret < 0) { | |
45711f1a | 493 | put_page(pages[0]); |
56483ec1 RD |
494 | goto out; |
495 | } | |
496 | ||
497 | ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem), | |
498 | mthca_uarc_virt(dev, uar, i), &status); | |
499 | if (!ret && status) | |
500 | ret = -EINVAL; | |
501 | if (ret) { | |
502 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
45711f1a | 503 | put_page(sg_page(&db_tab->page[i].mem)); |
56483ec1 RD |
504 | goto out; |
505 | } | |
506 | ||
507 | db_tab->page[i].uvirt = uaddr; | |
508 | db_tab->page[i].refcount = 1; | |
509 | ||
510 | out: | |
fd9cfdd1 | 511 | mutex_unlock(&db_tab->mutex); |
56483ec1 RD |
512 | return ret; |
513 | } | |
514 | ||
515 | void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar, | |
516 | struct mthca_user_db_table *db_tab, int index) | |
517 | { | |
518 | if (!mthca_is_memfree(dev)) | |
519 | return; | |
520 | ||
521 | /* | |
522 | * To make our bookkeeping simpler, we don't unmap DB | |
523 | * pages until we clean up the whole db table. | |
524 | */ | |
525 | ||
fd9cfdd1 | 526 | mutex_lock(&db_tab->mutex); |
56483ec1 RD |
527 | |
528 | --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount; | |
529 | ||
fd9cfdd1 | 530 | mutex_unlock(&db_tab->mutex); |
56483ec1 RD |
531 | } |
532 | ||
533 | struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev) | |
534 | { | |
535 | struct mthca_user_db_table *db_tab; | |
536 | int npages; | |
537 | int i; | |
538 | ||
539 | if (!mthca_is_memfree(dev)) | |
540 | return NULL; | |
541 | ||
8d3ef29d | 542 | npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; |
56483ec1 RD |
543 | db_tab = kmalloc(sizeof *db_tab + npages * sizeof *db_tab->page, GFP_KERNEL); |
544 | if (!db_tab) | |
545 | return ERR_PTR(-ENOMEM); | |
546 | ||
fd9cfdd1 | 547 | mutex_init(&db_tab->mutex); |
56483ec1 RD |
548 | for (i = 0; i < npages; ++i) { |
549 | db_tab->page[i].refcount = 0; | |
550 | db_tab->page[i].uvirt = 0; | |
fe174357 | 551 | sg_init_table(&db_tab->page[i].mem, 1); |
56483ec1 RD |
552 | } |
553 | ||
554 | return db_tab; | |
555 | } | |
556 | ||
557 | void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar, | |
558 | struct mthca_user_db_table *db_tab) | |
559 | { | |
560 | int i; | |
561 | u8 status; | |
562 | ||
563 | if (!mthca_is_memfree(dev)) | |
564 | return; | |
565 | ||
8d3ef29d | 566 | for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) { |
56483ec1 RD |
567 | if (db_tab->page[i].uvirt) { |
568 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status); | |
569 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
45711f1a | 570 | put_page(sg_page(&db_tab->page[i].mem)); |
56483ec1 RD |
571 | } |
572 | } | |
52d0df15 JM |
573 | |
574 | kfree(db_tab); | |
56483ec1 RD |
575 | } |
576 | ||
c6f5cb7b RD |
577 | int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type, |
578 | u32 qn, __be32 **db) | |
1da177e4 LT |
579 | { |
580 | int group; | |
581 | int start, end, dir; | |
582 | int i, j; | |
583 | struct mthca_db_page *page; | |
584 | int ret = 0; | |
585 | u8 status; | |
586 | ||
fd9cfdd1 | 587 | mutex_lock(&dev->db_tab->mutex); |
1da177e4 LT |
588 | |
589 | switch (type) { | |
590 | case MTHCA_DB_TYPE_CQ_ARM: | |
591 | case MTHCA_DB_TYPE_SQ: | |
592 | group = 0; | |
593 | start = 0; | |
594 | end = dev->db_tab->max_group1; | |
595 | dir = 1; | |
596 | break; | |
597 | ||
598 | case MTHCA_DB_TYPE_CQ_SET_CI: | |
599 | case MTHCA_DB_TYPE_RQ: | |
600 | case MTHCA_DB_TYPE_SRQ: | |
601 | group = 1; | |
602 | start = dev->db_tab->npages - 1; | |
603 | end = dev->db_tab->min_group2; | |
604 | dir = -1; | |
605 | break; | |
606 | ||
607 | default: | |
2714eb5a RD |
608 | ret = -EINVAL; |
609 | goto out; | |
1da177e4 LT |
610 | } |
611 | ||
612 | for (i = start; i != end; i += dir) | |
613 | if (dev->db_tab->page[i].db_rec && | |
614 | !bitmap_full(dev->db_tab->page[i].used, | |
615 | MTHCA_DB_REC_PER_PAGE)) { | |
616 | page = dev->db_tab->page + i; | |
617 | goto found; | |
618 | } | |
619 | ||
018771f4 RD |
620 | for (i = start; i != end; i += dir) |
621 | if (!dev->db_tab->page[i].db_rec) { | |
622 | page = dev->db_tab->page + i; | |
623 | goto alloc; | |
624 | } | |
625 | ||
1da177e4 LT |
626 | if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) { |
627 | ret = -ENOMEM; | |
628 | goto out; | |
629 | } | |
630 | ||
018771f4 RD |
631 | if (group == 0) |
632 | ++dev->db_tab->max_group1; | |
633 | else | |
634 | --dev->db_tab->min_group2; | |
635 | ||
1da177e4 | 636 | page = dev->db_tab->page + end; |
018771f4 RD |
637 | |
638 | alloc: | |
8d3ef29d | 639 | page->db_rec = dma_alloc_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
640 | &page->mapping, GFP_KERNEL); |
641 | if (!page->db_rec) { | |
642 | ret = -ENOMEM; | |
643 | goto out; | |
644 | } | |
8d3ef29d | 645 | memset(page->db_rec, 0, MTHCA_ICM_PAGE_SIZE); |
1da177e4 | 646 | |
56483ec1 RD |
647 | ret = mthca_MAP_ICM_page(dev, page->mapping, |
648 | mthca_uarc_virt(dev, &dev->driver_uar, i), &status); | |
1da177e4 LT |
649 | if (!ret && status) |
650 | ret = -EINVAL; | |
651 | if (ret) { | |
8d3ef29d | 652 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
653 | page->db_rec, page->mapping); |
654 | goto out; | |
655 | } | |
656 | ||
657 | bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE); | |
1da177e4 LT |
658 | |
659 | found: | |
660 | j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE); | |
661 | set_bit(j, page->used); | |
662 | ||
663 | if (group == 1) | |
664 | j = MTHCA_DB_REC_PER_PAGE - 1 - j; | |
665 | ||
666 | ret = i * MTHCA_DB_REC_PER_PAGE + j; | |
667 | ||
668 | page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5)); | |
669 | ||
97f52eb4 | 670 | *db = (__be32 *) &page->db_rec[j]; |
1da177e4 LT |
671 | |
672 | out: | |
fd9cfdd1 | 673 | mutex_unlock(&dev->db_tab->mutex); |
1da177e4 LT |
674 | |
675 | return ret; | |
676 | } | |
677 | ||
678 | void mthca_free_db(struct mthca_dev *dev, int type, int db_index) | |
679 | { | |
680 | int i, j; | |
681 | struct mthca_db_page *page; | |
682 | u8 status; | |
683 | ||
684 | i = db_index / MTHCA_DB_REC_PER_PAGE; | |
685 | j = db_index % MTHCA_DB_REC_PER_PAGE; | |
686 | ||
687 | page = dev->db_tab->page + i; | |
688 | ||
fd9cfdd1 | 689 | mutex_lock(&dev->db_tab->mutex); |
1da177e4 LT |
690 | |
691 | page->db_rec[j] = 0; | |
692 | if (i >= dev->db_tab->min_group2) | |
693 | j = MTHCA_DB_REC_PER_PAGE - 1 - j; | |
694 | clear_bit(j, page->used); | |
695 | ||
696 | if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) && | |
697 | i >= dev->db_tab->max_group1 - 1) { | |
56483ec1 | 698 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); |
1da177e4 | 699 | |
8d3ef29d | 700 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
701 | page->db_rec, page->mapping); |
702 | page->db_rec = NULL; | |
703 | ||
704 | if (i == dev->db_tab->max_group1) { | |
705 | --dev->db_tab->max_group1; | |
706 | /* XXX may be able to unmap more pages now */ | |
707 | } | |
708 | if (i == dev->db_tab->min_group2) | |
709 | ++dev->db_tab->min_group2; | |
710 | } | |
711 | ||
fd9cfdd1 | 712 | mutex_unlock(&dev->db_tab->mutex); |
1da177e4 LT |
713 | } |
714 | ||
715 | int mthca_init_db_tab(struct mthca_dev *dev) | |
716 | { | |
717 | int i; | |
718 | ||
d10ddbf6 | 719 | if (!mthca_is_memfree(dev)) |
1da177e4 LT |
720 | return 0; |
721 | ||
722 | dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL); | |
723 | if (!dev->db_tab) | |
724 | return -ENOMEM; | |
725 | ||
fd9cfdd1 | 726 | mutex_init(&dev->db_tab->mutex); |
1da177e4 | 727 | |
8d3ef29d | 728 | dev->db_tab->npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; |
1da177e4 LT |
729 | dev->db_tab->max_group1 = 0; |
730 | dev->db_tab->min_group2 = dev->db_tab->npages - 1; | |
731 | ||
732 | dev->db_tab->page = kmalloc(dev->db_tab->npages * | |
733 | sizeof *dev->db_tab->page, | |
734 | GFP_KERNEL); | |
735 | if (!dev->db_tab->page) { | |
736 | kfree(dev->db_tab); | |
737 | return -ENOMEM; | |
738 | } | |
739 | ||
740 | for (i = 0; i < dev->db_tab->npages; ++i) | |
741 | dev->db_tab->page[i].db_rec = NULL; | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | void mthca_cleanup_db_tab(struct mthca_dev *dev) | |
747 | { | |
748 | int i; | |
749 | u8 status; | |
750 | ||
d10ddbf6 | 751 | if (!mthca_is_memfree(dev)) |
1da177e4 LT |
752 | return; |
753 | ||
754 | /* | |
755 | * Because we don't always free our UARC pages when they | |
756 | * become empty to make mthca_free_db() simpler we need to | |
757 | * make a sweep through the doorbell pages and free any | |
758 | * leftover pages now. | |
759 | */ | |
760 | for (i = 0; i < dev->db_tab->npages; ++i) { | |
761 | if (!dev->db_tab->page[i].db_rec) | |
762 | continue; | |
763 | ||
764 | if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE)) | |
765 | mthca_warn(dev, "Kernel UARC page %d not empty\n", i); | |
766 | ||
56483ec1 | 767 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); |
1da177e4 | 768 | |
8d3ef29d | 769 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
770 | dev->db_tab->page[i].db_rec, |
771 | dev->db_tab->page[i].mapping); | |
772 | } | |
773 | ||
774 | kfree(dev->db_tab->page); | |
775 | kfree(dev->db_tab); | |
776 | } |