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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004 Topspin Communications. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
1da177e4 LT |
31 | */ |
32 | ||
1da177e4 LT |
33 | #include <linux/errno.h> |
34 | #include <linux/pci.h> | |
35 | #include <linux/delay.h> | |
4e57b681 | 36 | #include <linux/slab.h> |
1da177e4 LT |
37 | |
38 | #include "mthca_dev.h" | |
39 | #include "mthca_cmd.h" | |
40 | ||
41 | int mthca_reset(struct mthca_dev *mdev) | |
42 | { | |
43 | int i; | |
44 | int err = 0; | |
45 | u32 *hca_header = NULL; | |
46 | u32 *bridge_header = NULL; | |
47 | struct pci_dev *bridge = NULL; | |
13aa6ecb MT |
48 | int bridge_pcix_cap = 0; |
49 | int hca_pcie_cap = 0; | |
50 | int hca_pcix_cap = 0; | |
51 | ||
52 | u16 devctl; | |
53 | u16 linkctl; | |
1da177e4 LT |
54 | |
55 | #define MTHCA_RESET_OFFSET 0xf0010 | |
56 | #define MTHCA_RESET_VALUE swab32(1) | |
57 | ||
58 | /* | |
59 | * Reset the chip. This is somewhat ugly because we have to | |
60 | * save off the PCI header before reset and then restore it | |
61 | * after the chip reboots. We skip config space offsets 22 | |
62 | * and 23 since those have a special meaning. | |
63 | * | |
64 | * To make matters worse, for Tavor (PCI-X HCA) we have to | |
65 | * find the associated bridge device and save off its PCI | |
66 | * header as well. | |
67 | */ | |
68 | ||
68a3c212 | 69 | if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) { |
1da177e4 LT |
70 | /* Look for the bridge -- its device ID will be 2 more |
71 | than HCA's device ID. */ | |
72 | while ((bridge = pci_get_device(mdev->pdev->vendor, | |
73 | mdev->pdev->device + 2, | |
74 | bridge)) != NULL) { | |
75 | if (bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE && | |
76 | bridge->subordinate == mdev->pdev->bus) { | |
982245f0 AB |
77 | mthca_dbg(mdev, "Found bridge: %s\n", |
78 | pci_name(bridge)); | |
1da177e4 LT |
79 | break; |
80 | } | |
81 | } | |
82 | ||
83 | if (!bridge) { | |
84 | /* | |
85 | * Didn't find a bridge for a Tavor device -- | |
86 | * assume we're in no-bridge mode and hope for | |
87 | * the best. | |
88 | */ | |
982245f0 AB |
89 | mthca_warn(mdev, "No bridge found for %s\n", |
90 | pci_name(mdev->pdev)); | |
1da177e4 LT |
91 | } |
92 | ||
93 | } | |
94 | ||
95 | /* For Arbel do we need to save off the full 4K PCI Express header?? */ | |
96 | hca_header = kmalloc(256, GFP_KERNEL); | |
97 | if (!hca_header) { | |
98 | err = -ENOMEM; | |
99 | mthca_err(mdev, "Couldn't allocate memory to save HCA " | |
100 | "PCI header, aborting.\n"); | |
101 | goto out; | |
102 | } | |
103 | ||
104 | for (i = 0; i < 64; ++i) { | |
105 | if (i == 22 || i == 23) | |
106 | continue; | |
107 | if (pci_read_config_dword(mdev->pdev, i * 4, hca_header + i)) { | |
108 | err = -ENODEV; | |
109 | mthca_err(mdev, "Couldn't save HCA " | |
110 | "PCI header, aborting.\n"); | |
111 | goto out; | |
112 | } | |
113 | } | |
114 | ||
13aa6ecb | 115 | hca_pcix_cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); |
9b89925c | 116 | hca_pcie_cap = pci_pcie_cap(mdev->pdev); |
13aa6ecb | 117 | |
1da177e4 LT |
118 | if (bridge) { |
119 | bridge_header = kmalloc(256, GFP_KERNEL); | |
120 | if (!bridge_header) { | |
121 | err = -ENOMEM; | |
122 | mthca_err(mdev, "Couldn't allocate memory to save HCA " | |
123 | "bridge PCI header, aborting.\n"); | |
124 | goto out; | |
125 | } | |
126 | ||
127 | for (i = 0; i < 64; ++i) { | |
128 | if (i == 22 || i == 23) | |
129 | continue; | |
130 | if (pci_read_config_dword(bridge, i * 4, bridge_header + i)) { | |
131 | err = -ENODEV; | |
132 | mthca_err(mdev, "Couldn't save HCA bridge " | |
133 | "PCI header, aborting.\n"); | |
134 | goto out; | |
135 | } | |
136 | } | |
13aa6ecb MT |
137 | bridge_pcix_cap = pci_find_capability(bridge, PCI_CAP_ID_PCIX); |
138 | if (!bridge_pcix_cap) { | |
139 | err = -ENODEV; | |
140 | mthca_err(mdev, "Couldn't locate HCA bridge " | |
141 | "PCI-X capability, aborting.\n"); | |
142 | goto out; | |
143 | } | |
1da177e4 LT |
144 | } |
145 | ||
146 | /* actually hit reset */ | |
147 | { | |
148 | void __iomem *reset = ioremap(pci_resource_start(mdev->pdev, 0) + | |
149 | MTHCA_RESET_OFFSET, 4); | |
150 | ||
151 | if (!reset) { | |
152 | err = -ENOMEM; | |
153 | mthca_err(mdev, "Couldn't map HCA reset register, " | |
154 | "aborting.\n"); | |
155 | goto out; | |
156 | } | |
157 | ||
158 | writel(MTHCA_RESET_VALUE, reset); | |
159 | iounmap(reset); | |
160 | } | |
161 | ||
162 | /* Docs say to wait one second before accessing device */ | |
163 | msleep(1000); | |
164 | ||
165 | /* Now wait for PCI device to start responding again */ | |
166 | { | |
167 | u32 v; | |
168 | int c = 0; | |
169 | ||
170 | for (c = 0; c < 100; ++c) { | |
171 | if (pci_read_config_dword(bridge ? bridge : mdev->pdev, 0, &v)) { | |
172 | err = -ENODEV; | |
173 | mthca_err(mdev, "Couldn't access HCA after reset, " | |
174 | "aborting.\n"); | |
175 | goto out; | |
176 | } | |
177 | ||
178 | if (v != 0xffffffff) | |
179 | goto good; | |
180 | ||
181 | msleep(100); | |
182 | } | |
183 | ||
184 | err = -ENODEV; | |
185 | mthca_err(mdev, "PCI device did not come back after reset, " | |
186 | "aborting.\n"); | |
187 | goto out; | |
188 | } | |
189 | ||
190 | good: | |
191 | /* Now restore the PCI headers */ | |
192 | if (bridge) { | |
13aa6ecb MT |
193 | if (pci_write_config_dword(bridge, bridge_pcix_cap + 0x8, |
194 | bridge_header[(bridge_pcix_cap + 0x8) / 4])) { | |
195 | err = -ENODEV; | |
196 | mthca_err(mdev, "Couldn't restore HCA bridge Upstream " | |
197 | "split transaction control, aborting.\n"); | |
198 | goto out; | |
199 | } | |
200 | if (pci_write_config_dword(bridge, bridge_pcix_cap + 0xc, | |
201 | bridge_header[(bridge_pcix_cap + 0xc) / 4])) { | |
202 | err = -ENODEV; | |
203 | mthca_err(mdev, "Couldn't restore HCA bridge Downstream " | |
204 | "split transaction control, aborting.\n"); | |
205 | goto out; | |
206 | } | |
1da177e4 LT |
207 | /* |
208 | * Bridge control register is at 0x3e, so we'll | |
209 | * naturally restore it last in this loop. | |
210 | */ | |
211 | for (i = 0; i < 16; ++i) { | |
212 | if (i * 4 == PCI_COMMAND) | |
213 | continue; | |
214 | ||
215 | if (pci_write_config_dword(bridge, i * 4, bridge_header[i])) { | |
216 | err = -ENODEV; | |
217 | mthca_err(mdev, "Couldn't restore HCA bridge reg %x, " | |
218 | "aborting.\n", i); | |
219 | goto out; | |
220 | } | |
221 | } | |
222 | ||
223 | if (pci_write_config_dword(bridge, PCI_COMMAND, | |
224 | bridge_header[PCI_COMMAND / 4])) { | |
225 | err = -ENODEV; | |
226 | mthca_err(mdev, "Couldn't restore HCA bridge COMMAND, " | |
227 | "aborting.\n"); | |
228 | goto out; | |
229 | } | |
230 | } | |
231 | ||
13aa6ecb MT |
232 | if (hca_pcix_cap) { |
233 | if (pci_write_config_dword(mdev->pdev, hca_pcix_cap, | |
234 | hca_header[hca_pcix_cap / 4])) { | |
235 | err = -ENODEV; | |
236 | mthca_err(mdev, "Couldn't restore HCA PCI-X " | |
237 | "command register, aborting.\n"); | |
238 | goto out; | |
239 | } | |
240 | } | |
241 | ||
242 | if (hca_pcie_cap) { | |
243 | devctl = hca_header[(hca_pcie_cap + PCI_EXP_DEVCTL) / 4]; | |
3c55569b JL |
244 | if (pcie_capability_write_word(mdev->pdev, PCI_EXP_DEVCTL, |
245 | devctl)) { | |
13aa6ecb MT |
246 | err = -ENODEV; |
247 | mthca_err(mdev, "Couldn't restore HCA PCI Express " | |
248 | "Device Control register, aborting.\n"); | |
249 | goto out; | |
250 | } | |
251 | linkctl = hca_header[(hca_pcie_cap + PCI_EXP_LNKCTL) / 4]; | |
3c55569b JL |
252 | if (pcie_capability_write_word(mdev->pdev, PCI_EXP_LNKCTL, |
253 | linkctl)) { | |
13aa6ecb MT |
254 | err = -ENODEV; |
255 | mthca_err(mdev, "Couldn't restore HCA PCI Express " | |
256 | "Link control register, aborting.\n"); | |
257 | goto out; | |
258 | } | |
259 | } | |
260 | ||
1da177e4 LT |
261 | for (i = 0; i < 16; ++i) { |
262 | if (i * 4 == PCI_COMMAND) | |
263 | continue; | |
264 | ||
265 | if (pci_write_config_dword(mdev->pdev, i * 4, hca_header[i])) { | |
266 | err = -ENODEV; | |
267 | mthca_err(mdev, "Couldn't restore HCA reg %x, " | |
268 | "aborting.\n", i); | |
269 | goto out; | |
270 | } | |
271 | } | |
272 | ||
273 | if (pci_write_config_dword(mdev->pdev, PCI_COMMAND, | |
274 | hca_header[PCI_COMMAND / 4])) { | |
275 | err = -ENODEV; | |
276 | mthca_err(mdev, "Couldn't restore HCA COMMAND, " | |
277 | "aborting.\n"); | |
278 | goto out; | |
279 | } | |
280 | ||
281 | out: | |
282 | if (bridge) | |
283 | pci_dev_put(bridge); | |
284 | kfree(bridge_header); | |
285 | kfree(hca_header); | |
286 | ||
287 | return err; | |
288 | } |