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RDMA/ocrdma: SQ and RQ doorbell offset clean up
[deliverable/linux.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
CommitLineData
fe2caefc
PP		 1/*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *
20 * Contact Information:
21 * linux-drivers@emulex.com
22 *
23 * Emulex
24 * 3333 Susan Street
25 * Costa Mesa, CA 92626
26 *******************************************************************/
27
28#include <linux/dma-mapping.h>
29#include <rdma/ib_verbs.h>
30#include <rdma/ib_user_verbs.h>
31#include <rdma/iw_cm.h>
32#include <rdma/ib_umem.h>
33#include <rdma/ib_addr.h>
34
35#include "ocrdma.h"
36#include "ocrdma_hw.h"
37#include "ocrdma_verbs.h"
38#include "ocrdma_abi.h"
39
40int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
41{
42 if (index > 1)
43 return -EINVAL;
44
45 *pkey = 0xffff;
46 return 0;
47}
48
49int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
50 int index, union ib_gid *sgid)
51{
52 struct ocrdma_dev *dev;
53
54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid));
7b33dc2b 56 if (index >= OCRDMA_MAX_SGID)
fe2caefc
PP		 57 return -EINVAL;
58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
60
61 return 0;
62}
63
64int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
65{
66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
67
68 memset(attr, 0, sizeof *attr);
69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
72 attr->max_mr_size = ~0ull;
73 attr->page_size_cap = 0xffff000;
74 attr->vendor_id = dev->nic_info.pdev->vendor;
75 attr->vendor_part_id = dev->nic_info.pdev->device;
76 attr->hw_ver = 0;
77 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 78 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 79 attr->max_qp_wr = dev->attr.max_wqe;
80
81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
82 IB_DEVICE_RC_RNR_NAK_GEN |
83 IB_DEVICE_SHUTDOWN_PORT |
84 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 85 IB_DEVICE_LOCAL_DMA_LKEY |
86 IB_DEVICE_MEM_MGT_EXTENSIONS;
634c5796 87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
c43e9ab8 88 attr->max_sge_rd = 0;
fe2caefc
PP		 89 attr->max_cq = dev->attr.max_cq;
90 attr->max_cqe = dev->attr.max_cqe;
91 attr->max_mr = dev->attr.max_mr;
92 attr->max_mw = 0;
93 attr->max_pd = dev->attr.max_pd;
94 attr->atomic_cap = 0;
95 attr->max_fmr = 0;
96 attr->max_map_per_fmr = 0;
97 attr->max_qp_rd_atom =
98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 100 attr->max_srq = dev->attr.max_srq;
d1e09ebf 101 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 102 attr->max_srq_wr = dev->attr.max_rqe;
103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
104 attr->max_fast_reg_page_list_len = 0;
105 attr->max_pkeys = 1;
106 return 0;
107}
108
f24ceba6
NG		 109static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
110 u8 *ib_speed, u8 *ib_width)
111{
112 int status;
113 u8 speed;
114
115 status = ocrdma_mbx_get_link_speed(dev, &speed);
116 if (status)
117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
118
119 switch (speed) {
120 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
121 *ib_speed = IB_SPEED_SDR;
122 *ib_width = IB_WIDTH_1X;
123 break;
124
125 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
126 *ib_speed = IB_SPEED_QDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
131 *ib_speed = IB_SPEED_DDR;
132 *ib_width = IB_WIDTH_4X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
136 *ib_speed = IB_SPEED_QDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 default:
141 /* Unsupported */
142 *ib_speed = IB_SPEED_SDR;
143 *ib_width = IB_WIDTH_1X;
2b50176d 144 }
f24ceba6
NG		 145}
146
147
fe2caefc
PP		 148int ocrdma_query_port(struct ib_device *ibdev,
149 u8 port, struct ib_port_attr *props)
150{
151 enum ib_port_state port_state;
152 struct ocrdma_dev *dev;
153 struct net_device *netdev;
154
155 dev = get_ocrdma_dev(ibdev);
156 if (port > 1) {
ef99c4c2
NG		 157 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
158 dev->id, port);
fe2caefc
PP		 159 return -EINVAL;
160 }
161 netdev = dev->nic_info.netdev;
162 if (netif_running(netdev) && netif_oper_up(netdev)) {
163 port_state = IB_PORT_ACTIVE;
164 props->phys_state = 5;
165 } else {
166 port_state = IB_PORT_DOWN;
167 props->phys_state = 3;
168 }
169 props->max_mtu = IB_MTU_4096;
170 props->active_mtu = iboe_get_mtu(netdev->mtu);
171 props->lid = 0;
172 props->lmc = 0;
173 props->sm_lid = 0;
174 props->sm_sl = 0;
175 props->state = port_state;
176 props->port_cap_flags =
177 IB_PORT_CM_SUP |
178 IB_PORT_REINIT_SUP |
b4a26a27 179 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
fe2caefc
PP		 180 props->gid_tbl_len = OCRDMA_MAX_SGID;
181 props->pkey_tbl_len = 1;
182 props->bad_pkey_cntr = 0;
183 props->qkey_viol_cntr = 0;
f24ceba6
NG		 184 get_link_speed_and_width(dev, &props->active_speed,
185 &props->active_width);
fe2caefc
PP		 186 props->max_msg_sz = 0x80000000;
187 props->max_vl_num = 4;
188 return 0;
189}
190
191int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
192 struct ib_port_modify *props)
193{
194 struct ocrdma_dev *dev;
195
196 dev = get_ocrdma_dev(ibdev);
197 if (port > 1) {
ef99c4c2 198 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
fe2caefc
PP		 199 return -EINVAL;
200 }
201 return 0;
202}
203
204static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
205 unsigned long len)
206{
207 struct ocrdma_mm *mm;
208
209 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
210 if (mm == NULL)
211 return -ENOMEM;
212 mm->key.phy_addr = phy_addr;
213 mm->key.len = len;
214 INIT_LIST_HEAD(&mm->entry);
215
216 mutex_lock(&uctx->mm_list_lock);
217 list_add_tail(&mm->entry, &uctx->mm_head);
218 mutex_unlock(&uctx->mm_list_lock);
219 return 0;
220}
221
222static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
223 unsigned long len)
224{
225 struct ocrdma_mm *mm, *tmp;
226
227 mutex_lock(&uctx->mm_list_lock);
228 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 229 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 230 continue;
231
232 list_del(&mm->entry);
233 kfree(mm);
234 break;
235 }
236 mutex_unlock(&uctx->mm_list_lock);
237}
238
239static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
240 unsigned long len)
241{
242 bool found = false;
243 struct ocrdma_mm *mm;
244
245 mutex_lock(&uctx->mm_list_lock);
246 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 247 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 248 continue;
249
250 found = true;
251 break;
252 }
253 mutex_unlock(&uctx->mm_list_lock);
254 return found;
255}
256
cffce990
NG		 257static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
258 struct ocrdma_ucontext *uctx,
259 struct ib_udata *udata)
260{
261 struct ocrdma_pd *pd = NULL;
262 int status = 0;
263
264 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
265 if (!pd)
266 return ERR_PTR(-ENOMEM);
267
268 if (udata && uctx) {
269 pd->dpp_enabled =
270 dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY;
271 pd->num_dpp_qp =
272 pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;
273 }
274
275retry:
276 status = ocrdma_mbx_alloc_pd(dev, pd);
277 if (status) {
278 if (pd->dpp_enabled) {
279 pd->dpp_enabled = false;
280 pd->num_dpp_qp = 0;
281 goto retry;
282 } else {
283 kfree(pd);
284 return ERR_PTR(status);
285 }
286 }
287
288 return pd;
289}
290
291static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
292 struct ocrdma_pd *pd)
293{
294 return (uctx->cntxt_pd == pd ? true : false);
295}
296
297static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
298 struct ocrdma_pd *pd)
299{
300 int status = 0;
301
302 status = ocrdma_mbx_dealloc_pd(dev, pd);
303 kfree(pd);
304 return status;
305}
306
307static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
308 struct ocrdma_ucontext *uctx,
309 struct ib_udata *udata)
310{
311 int status = 0;
312
313 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
314 if (IS_ERR(uctx->cntxt_pd)) {
315 status = PTR_ERR(uctx->cntxt_pd);
316 uctx->cntxt_pd = NULL;
317 goto err;
318 }
319
320 uctx->cntxt_pd->uctx = uctx;
321 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
322err:
323 return status;
324}
325
326static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
327{
328 int status = 0;
329 struct ocrdma_pd *pd = uctx->cntxt_pd;
330 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
331
332 BUG_ON(uctx->pd_in_use);
333 uctx->cntxt_pd = NULL;
334 status = _ocrdma_dealloc_pd(dev, pd);
335 return status;
336}
337
338static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
339{
340 struct ocrdma_pd *pd = NULL;
341
342 mutex_lock(&uctx->mm_list_lock);
343 if (!uctx->pd_in_use) {
344 uctx->pd_in_use = true;
345 pd = uctx->cntxt_pd;
346 }
347 mutex_unlock(&uctx->mm_list_lock);
348
349 return pd;
350}
351
352static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
353{
354 mutex_lock(&uctx->mm_list_lock);
355 uctx->pd_in_use = false;
356 mutex_unlock(&uctx->mm_list_lock);
357}
358
fe2caefc
PP		 359struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
360 struct ib_udata *udata)
361{
362 int status;
363 struct ocrdma_ucontext *ctx;
364 struct ocrdma_alloc_ucontext_resp resp;
365 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
366 struct pci_dev *pdev = dev->nic_info.pdev;
367 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
368
369 if (!udata)
370 return ERR_PTR(-EFAULT);
371 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
372 if (!ctx)
373 return ERR_PTR(-ENOMEM);
fe2caefc
PP		 374 INIT_LIST_HEAD(&ctx->mm_head);
375 mutex_init(&ctx->mm_list_lock);
376
377 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
378 &ctx->ah_tbl.pa, GFP_KERNEL);
379 if (!ctx->ah_tbl.va) {
380 kfree(ctx);
381 return ERR_PTR(-ENOMEM);
382 }
383 memset(ctx->ah_tbl.va, 0, map_len);
384 ctx->ah_tbl.len = map_len;
385
63ea3749 386 memset(&resp, 0, sizeof(resp));
fe2caefc
PP		 387 resp.ah_tbl_len = ctx->ah_tbl.len;
388 resp.ah_tbl_page = ctx->ah_tbl.pa;
389
390 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
391 if (status)
392 goto map_err;
cffce990
NG		 393
394 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
395 if (status)
396 goto pd_err;
397
fe2caefc
PP		 398 resp.dev_id = dev->id;
399 resp.max_inline_data = dev->attr.max_inline_data;
400 resp.wqe_size = dev->attr.wqe_size;
401 resp.rqe_size = dev->attr.rqe_size;
402 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 403
404 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
405 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
406 if (status)
407 goto cpy_err;
408 return &ctx->ibucontext;
409
410cpy_err:
cffce990 411pd_err:
fe2caefc
PP		 412 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
413map_err:
414 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
415 ctx->ah_tbl.pa);
416 kfree(ctx);
417 return ERR_PTR(status);
418}
419
420int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
421{
cffce990 422 int status = 0;
fe2caefc
PP		 423 struct ocrdma_mm *mm, *tmp;
424 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 425 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
426 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 427
cffce990
NG		 428 status = ocrdma_dealloc_ucontext_pd(uctx);
429
fe2caefc
PP		 430 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
431 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
432 uctx->ah_tbl.pa);
433
434 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
435 list_del(&mm->entry);
436 kfree(mm);
437 }
438 kfree(uctx);
cffce990 439 return status;
fe2caefc
PP		 440}
441
442int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
443{
444 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 445 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 446 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
447 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
448 unsigned long len = (vma->vm_end - vma->vm_start);
449 int status = 0;
450 bool found;
451
452 if (vma->vm_start & (PAGE_SIZE - 1))
453 return -EINVAL;
454 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
455 if (!found)
456 return -EINVAL;
457
458 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
459 dev->nic_info.db_total_size)) &&
460 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 461 if (vma->vm_flags & VM_READ)
462 return -EPERM;
463
464 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 465 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
466 len, vma->vm_page_prot);
467 } else if (dev->nic_info.dpp_unmapped_len &&
468 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
469 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
470 dev->nic_info.dpp_unmapped_len)) &&
471 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 472 if (vma->vm_flags & VM_READ)
473 return -EPERM;
474
fe2caefc
PP		 475 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
476 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
477 len, vma->vm_page_prot);
478 } else {
fe2caefc
PP		 479 status = remap_pfn_range(vma, vma->vm_start,
480 vma->vm_pgoff, len, vma->vm_page_prot);
481 }
482 return status;
483}
484
45e86b33 485static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 486 struct ib_ucontext *ib_ctx,
487 struct ib_udata *udata)
488{
489 int status;
490 u64 db_page_addr;
da496438 491 u64 dpp_page_addr = 0;
fe2caefc
PP		 492 u32 db_page_size;
493 struct ocrdma_alloc_pd_uresp rsp;
494 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
495
63ea3749 496 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 497 rsp.id = pd->id;
498 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 499 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 500 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 501
502 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
503 if (status)
504 return status;
505
506 if (pd->dpp_enabled) {
f99b1649 507 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 508 (pd->id * PAGE_SIZE);
fe2caefc 509 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 510 PAGE_SIZE);
fe2caefc
PP		 511 if (status)
512 goto dpp_map_err;
513 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
514 rsp.dpp_page_addr_lo = dpp_page_addr;
515 }
516
517 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
518 if (status)
519 goto ucopy_err;
520
521 pd->uctx = uctx;
522 return 0;
523
524ucopy_err:
da496438 525 if (pd->dpp_enabled)
43a6b402 526 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 527dpp_map_err:
528 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
529 return status;
530}
531
532struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
533 struct ib_ucontext *context,
534 struct ib_udata *udata)
535{
536 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
537 struct ocrdma_pd *pd;
cffce990 538 struct ocrdma_ucontext *uctx = NULL;
fe2caefc 539 int status;
cffce990 540 u8 is_uctx_pd = false;
fe2caefc 541
fe2caefc 542 if (udata && context) {
cffce990
NG		 543 uctx = get_ocrdma_ucontext(context);
544 pd = ocrdma_get_ucontext_pd(uctx);
545 if (pd) {
546 is_uctx_pd = true;
547 goto pd_mapping;
43a6b402 548 }
fe2caefc 549 }
fe2caefc 550
cffce990
NG		 551 pd = _ocrdma_alloc_pd(dev, uctx, udata);
552 if (IS_ERR(pd)) {
553 status = PTR_ERR(pd);
554 goto exit;
555 }
556
557pd_mapping:
fe2caefc 558 if (udata && context) {
45e86b33 559 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
fe2caefc
PP		 560 if (status)
561 goto err;
562 }
563 return &pd->ibpd;
564
565err:
cffce990
NG		 566 if (is_uctx_pd) {
567 ocrdma_release_ucontext_pd(uctx);
568 } else {
569 status = ocrdma_mbx_dealloc_pd(dev, pd);
570 kfree(pd);
571 }
572exit:
fe2caefc
PP		 573 return ERR_PTR(status);
574}
575
576int ocrdma_dealloc_pd(struct ib_pd *ibpd)
577{
578 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 579 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990
NG		 580 struct ocrdma_ucontext *uctx = NULL;
581 int status = 0;
fe2caefc
PP		 582 u64 usr_db;
583
cffce990
NG		 584 uctx = pd->uctx;
585 if (uctx) {
fe2caefc 586 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 587 (pd->id * PAGE_SIZE);
fe2caefc 588 if (pd->dpp_enabled)
43a6b402 589 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 590 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 591 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 592
593 if (is_ucontext_pd(uctx, pd)) {
594 ocrdma_release_ucontext_pd(uctx);
595 return status;
596 }
fe2caefc 597 }
cffce990 598 status = _ocrdma_dealloc_pd(dev, pd);
fe2caefc
PP		 599 return status;
600}
601
1afc0454
NG		 602static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
603 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 604{
605 int status;
fe2caefc 606
fe2caefc
PP		 607 mr->hwmr.fr_mr = 0;
608 mr->hwmr.local_rd = 1;
609 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
610 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
611 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
612 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
613 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
614 mr->hwmr.num_pbls = num_pbls;
615
f99b1649
NG		 616 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
617 if (status)
618 return status;
619
fe2caefc
PP		 620 mr->ibmr.lkey = mr->hwmr.lkey;
621 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
622 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 623 return 0;
fe2caefc
PP		 624}
625
626struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
627{
f99b1649 628 int status;
fe2caefc 629 struct ocrdma_mr *mr;
f99b1649
NG		 630 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
631 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
632
633 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
634 pr_err("%s err, invalid access rights\n", __func__);
635 return ERR_PTR(-EINVAL);
636 }
fe2caefc 637
f99b1649
NG		 638 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
639 if (!mr)
640 return ERR_PTR(-ENOMEM);
641
1afc0454 642 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 643 OCRDMA_ADDR_CHECK_DISABLE);
644 if (status) {
645 kfree(mr);
646 return ERR_PTR(status);
647 }
fe2caefc
PP		 648
649 return &mr->ibmr;
650}
651
652static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
653 struct ocrdma_hw_mr *mr)
654{
655 struct pci_dev *pdev = dev->nic_info.pdev;
656 int i = 0;
657
658 if (mr->pbl_table) {
659 for (i = 0; i < mr->num_pbls; i++) {
660 if (!mr->pbl_table[i].va)
661 continue;
662 dma_free_coherent(&pdev->dev, mr->pbl_size,
663 mr->pbl_table[i].va,
664 mr->pbl_table[i].pa);
665 }
666 kfree(mr->pbl_table);
667 mr->pbl_table = NULL;
668 }
669}
670
1afc0454
NG		 671static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
672 u32 num_pbes)
fe2caefc
PP		 673{
674 u32 num_pbls = 0;
675 u32 idx = 0;
676 int status = 0;
677 u32 pbl_size;
678
679 do {
680 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
681 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
682 status = -EFAULT;
683 break;
684 }
685 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
686 num_pbls = num_pbls / (pbl_size / sizeof(u64));
687 idx++;
1afc0454 688 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 689
690 mr->hwmr.num_pbes = num_pbes;
691 mr->hwmr.num_pbls = num_pbls;
692 mr->hwmr.pbl_size = pbl_size;
693 return status;
694}
695
696static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
697{
698 int status = 0;
699 int i;
700 u32 dma_len = mr->pbl_size;
701 struct pci_dev *pdev = dev->nic_info.pdev;
702 void *va;
703 dma_addr_t pa;
704
705 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
706 mr->num_pbls, GFP_KERNEL);
707
708 if (!mr->pbl_table)
709 return -ENOMEM;
710
711 for (i = 0; i < mr->num_pbls; i++) {
712 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
713 if (!va) {
714 ocrdma_free_mr_pbl_tbl(dev, mr);
715 status = -ENOMEM;
716 break;
717 }
718 memset(va, 0, dma_len);
719 mr->pbl_table[i].va = va;
720 mr->pbl_table[i].pa = pa;
721 }
722 return status;
723}
724
725static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
726 u32 num_pbes)
727{
728 struct ocrdma_pbe *pbe;
729 struct ib_umem_chunk *chunk;
730 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
731 struct ib_umem *umem = mr->umem;
732 int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
733
734 if (!mr->hwmr.num_pbes)
735 return;
736
737 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
738 pbe_cnt = 0;
739
740 shift = ilog2(umem->page_size);
741
742 list_for_each_entry(chunk, &umem->chunk_list, list) {
743 /* get all the dma regions from the chunk. */
744 for (i = 0; i < chunk->nmap; i++) {
745 pages = sg_dma_len(&chunk->page_list[i]) >> shift;
746 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
747 /* store the page address in pbe */
748 pbe->pa_lo =
749 cpu_to_le32(sg_dma_address
750 (&chunk->page_list[i]) +
751 (umem->page_size * pg_cnt));
752 pbe->pa_hi =
753 cpu_to_le32(upper_32_bits
754 ((sg_dma_address
755 (&chunk->page_list[i]) +
756 umem->page_size * pg_cnt)));
757 pbe_cnt += 1;
758 total_num_pbes += 1;
759 pbe++;
760
761 /* if done building pbes, issue the mbx cmd. */
762 if (total_num_pbes == num_pbes)
763 return;
764
765 /* if the given pbl is full storing the pbes,
766 * move to next pbl.
767 */
768 if (pbe_cnt ==
769 (mr->hwmr.pbl_size / sizeof(u64))) {
770 pbl_tbl++;
771 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
772 pbe_cnt = 0;
773 }
774 }
775 }
776 }
777}
778
779struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
780 u64 usr_addr, int acc, struct ib_udata *udata)
781{
782 int status = -ENOMEM;
f99b1649 783 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 784 struct ocrdma_mr *mr;
785 struct ocrdma_pd *pd;
fe2caefc
PP		 786 u32 num_pbes;
787
788 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 789
790 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
791 return ERR_PTR(-EINVAL);
792
793 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
794 if (!mr)
795 return ERR_PTR(status);
fe2caefc
PP		 796 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
797 if (IS_ERR(mr->umem)) {
798 status = -EFAULT;
799 goto umem_err;
800 }
801 num_pbes = ib_umem_page_count(mr->umem);
1afc0454 802 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
fe2caefc
PP		 803 if (status)
804 goto umem_err;
805
806 mr->hwmr.pbe_size = mr->umem->page_size;
807 mr->hwmr.fbo = mr->umem->offset;
808 mr->hwmr.va = usr_addr;
809 mr->hwmr.len = len;
810 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
811 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
812 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
813 mr->hwmr.local_rd = 1;
814 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
815 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
816 if (status)
817 goto umem_err;
818 build_user_pbes(dev, mr, num_pbes);
819 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
820 if (status)
821 goto mbx_err;
fe2caefc
PP		 822 mr->ibmr.lkey = mr->hwmr.lkey;
823 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
824 mr->ibmr.rkey = mr->hwmr.lkey;
825
826 return &mr->ibmr;
827
828mbx_err:
829 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
830umem_err:
831 kfree(mr);
832 return ERR_PTR(status);
833}
834
835int ocrdma_dereg_mr(struct ib_mr *ib_mr)
836{
837 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 838 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc
PP		 839 int status;
840
841 status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
842
843 if (mr->hwmr.fr_mr == 0)
844 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
845
fe2caefc
PP		 846 /* it could be user registered memory. */
847 if (mr->umem)
848 ib_umem_release(mr->umem);
849 kfree(mr);
850 return status;
851}
852
1afc0454
NG		 853static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
854 struct ib_udata *udata,
fe2caefc
PP		 855 struct ib_ucontext *ib_ctx)
856{
857 int status;
cffce990 858 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
fe2caefc
PP		 859 struct ocrdma_create_cq_uresp uresp;
860
63ea3749 861 memset(&uresp, 0, sizeof(uresp));
fe2caefc 862 uresp.cq_id = cq->id;
43a6b402 863 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 864 uresp.num_pages = 1;
865 uresp.max_hw_cqe = cq->max_hw_cqe;
866 uresp.page_addr[0] = cq->pa;
cffce990 867 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 868 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 869 uresp.phase_change = cq->phase_change ? 1 : 0;
870 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
871 if (status) {
ef99c4c2 872 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 873 __func__, dev->id, cq->id);
fe2caefc
PP		 874 goto err;
875 }
fe2caefc
PP		 876 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
877 if (status)
878 goto err;
879 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
880 if (status) {
881 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
882 goto err;
883 }
884 cq->ucontext = uctx;
885err:
886 return status;
887}
888
889struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
890 struct ib_ucontext *ib_ctx,
891 struct ib_udata *udata)
892{
893 struct ocrdma_cq *cq;
894 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
cffce990
NG		 895 struct ocrdma_ucontext *uctx = NULL;
896 u16 pd_id = 0;
fe2caefc
PP		 897 int status;
898 struct ocrdma_create_cq_ureq ureq;
899
900 if (udata) {
901 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
902 return ERR_PTR(-EFAULT);
903 } else
904 ureq.dpp_cq = 0;
905 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
906 if (!cq)
907 return ERR_PTR(-ENOMEM);
908
909 spin_lock_init(&cq->cq_lock);
910 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 911 INIT_LIST_HEAD(&cq->sq_head);
912 INIT_LIST_HEAD(&cq->rq_head);
ea617626 913 cq->first_arm = true;
fe2caefc 914
cffce990
NG		 915 if (ib_ctx) {
916 uctx = get_ocrdma_ucontext(ib_ctx);
917 pd_id = uctx->cntxt_pd->id;
918 }
919
920 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
fe2caefc
PP		 921 if (status) {
922 kfree(cq);
923 return ERR_PTR(status);
924 }
925 if (ib_ctx) {
1afc0454 926 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
fe2caefc
PP		 927 if (status)
928 goto ctx_err;
929 }
930 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 931 dev->cq_tbl[cq->id] = cq;
fe2caefc
PP		 932 return &cq->ibcq;
933
934ctx_err:
935 ocrdma_mbx_destroy_cq(dev, cq);
936 kfree(cq);
937 return ERR_PTR(status);
938}
939
940int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
941 struct ib_udata *udata)
942{
943 int status = 0;
944 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
945
946 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
947 status = -EINVAL;
948 return status;
949 }
950 ibcq->cqe = new_cnt;
951 return status;
952}
953
ea617626
DS		 954static void ocrdma_flush_cq(struct ocrdma_cq *cq)
955{
956 int cqe_cnt;
957 int valid_count = 0;
958 unsigned long flags;
959
960 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
961 struct ocrdma_cqe *cqe = NULL;
962
963 cqe = cq->va;
964 cqe_cnt = cq->cqe_cnt;
965
966 /* Last irq might have scheduled a polling thread
967 * sync-up with it before hard flushing.
968 */
969 spin_lock_irqsave(&cq->cq_lock, flags);
970 while (cqe_cnt) {
971 if (is_cqe_valid(cq, cqe))
972 valid_count++;
973 cqe++;
974 cqe_cnt--;
975 }
976 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
977 spin_unlock_irqrestore(&cq->cq_lock, flags);
978}
979
fe2caefc
PP		 980int ocrdma_destroy_cq(struct ib_cq *ibcq)
981{
982 int status;
983 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 984 struct ocrdma_eq *eq = NULL;
1afc0454 985 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 986 int pdid = 0;
ea617626 987 u32 irq, indx;
fe2caefc 988
ea617626
DS		 989 dev->cq_tbl[cq->id] = NULL;
990 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
991 if (indx == -EINVAL)
992 BUG();
fe2caefc 993
ea617626
DS		 994 eq = &dev->eq_tbl[indx];
995 irq = ocrdma_get_irq(dev, eq);
996 synchronize_irq(irq);
997 ocrdma_flush_cq(cq);
998
999 status = ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 1000 if (cq->ucontext) {
cffce990 1001 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1002 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1003 PAGE_ALIGN(cq->len));
cffce990
NG		 1004 ocrdma_del_mmap(cq->ucontext,
1005 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1006 dev->nic_info.db_page_size);
1007 }
fe2caefc
PP		 1008
1009 kfree(cq);
1010 return status;
1011}
1012
1013static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1014{
1015 int status = -EINVAL;
1016
1017 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1018 dev->qp_tbl[qp->id] = qp;
1019 status = 0;
1020 }
1021 return status;
1022}
1023
1024static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1025{
1026 dev->qp_tbl[qp->id] = NULL;
1027}
1028
1029static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1030 struct ib_qp_init_attr *attrs)
1031{
43a6b402
NG		 1032 if ((attrs->qp_type != IB_QPT_GSI) &&
1033 (attrs->qp_type != IB_QPT_RC) &&
1034 (attrs->qp_type != IB_QPT_UC) &&
1035 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1036 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1037 __func__, dev->id, attrs->qp_type);
fe2caefc
PP		 1038 return -EINVAL;
1039 }
43a6b402
NG		 1040 /* Skip the check for QP1 to support CM size of 128 */
1041 if ((attrs->qp_type != IB_QPT_GSI) &&
1042 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1043 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1044 __func__, dev->id, attrs->cap.max_send_wr);
1045 pr_err("%s(%d) supported send_wr=0x%x\n",
1046 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1047 return -EINVAL;
1048 }
1049 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1050 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1051 __func__, dev->id, attrs->cap.max_recv_wr);
1052 pr_err("%s(%d) supported recv_wr=0x%x\n",
1053 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1054 return -EINVAL;
1055 }
1056 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1057 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1058 __func__, dev->id, attrs->cap.max_inline_data);
1059 pr_err("%s(%d) supported inline data size=0x%x\n",
1060 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1061 return -EINVAL;
1062 }
1063 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1064 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1065 __func__, dev->id, attrs->cap.max_send_sge);
1066 pr_err("%s(%d) supported send_sge=0x%x\n",
1067 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1068 return -EINVAL;
1069 }
1070 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1071 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1072 __func__, dev->id, attrs->cap.max_recv_sge);
1073 pr_err("%s(%d) supported recv_sge=0x%x\n",
1074 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1075 return -EINVAL;
1076 }
1077 /* unprivileged user space cannot create special QP */
1078 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1079 pr_err
fe2caefc
PP		 1080 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1081 __func__, dev->id, attrs->qp_type);
1082 return -EINVAL;
1083 }
1084 /* allow creating only one GSI type of QP */
1085 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1086 pr_err("%s(%d) GSI special QPs already created.\n",
1087 __func__, dev->id);
fe2caefc
PP		 1088 return -EINVAL;
1089 }
1090 /* verify consumer QPs are not trying to use GSI QP's CQ */
1091 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1092 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1093 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1094 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1095 __func__, dev->id);
fe2caefc
PP		 1096 return -EINVAL;
1097 }
1098 }
1099 return 0;
1100}
1101
1102static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1103 struct ib_udata *udata, int dpp_offset,
1104 int dpp_credit_lmt, int srq)
1105{
1106 int status = 0;
1107 u64 usr_db;
1108 struct ocrdma_create_qp_uresp uresp;
1109 struct ocrdma_dev *dev = qp->dev;
1110 struct ocrdma_pd *pd = qp->pd;
1111
1112 memset(&uresp, 0, sizeof(uresp));
1113 usr_db = dev->nic_info.unmapped_db +
1114 (pd->id * dev->nic_info.db_page_size);
1115 uresp.qp_id = qp->id;
1116 uresp.sq_dbid = qp->sq.dbid;
1117 uresp.num_sq_pages = 1;
43a6b402 1118 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
fe2caefc
PP		 1119 uresp.sq_page_addr[0] = qp->sq.pa;
1120 uresp.num_wqe_allocated = qp->sq.max_cnt;
1121 if (!srq) {
1122 uresp.rq_dbid = qp->rq.dbid;
1123 uresp.num_rq_pages = 1;
43a6b402 1124 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
fe2caefc
PP		 1125 uresp.rq_page_addr[0] = qp->rq.pa;
1126 uresp.num_rqe_allocated = qp->rq.max_cnt;
1127 }
1128 uresp.db_page_addr = usr_db;
1129 uresp.db_page_size = dev->nic_info.db_page_size;
2df84fa8
DS		 1130 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1131 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1132 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
fe2caefc
PP		 1133
1134 if (qp->dpp_enabled) {
1135 uresp.dpp_credit = dpp_credit_lmt;
1136 uresp.dpp_offset = dpp_offset;
1137 }
1138 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1139 if (status) {
ef99c4c2 1140 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1141 goto err;
1142 }
1143 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1144 uresp.sq_page_size);
1145 if (status)
1146 goto err;
1147
1148 if (!srq) {
1149 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1150 uresp.rq_page_size);
1151 if (status)
1152 goto rq_map_err;
1153 }
1154 return status;
1155rq_map_err:
1156 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1157err:
1158 return status;
1159}
1160
1161static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1162 struct ocrdma_pd *pd)
1163{
1164 if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
1165 qp->sq_db = dev->nic_info.db +
1166 (pd->id * dev->nic_info.db_page_size) +
1167 OCRDMA_DB_GEN2_SQ_OFFSET;
1168 qp->rq_db = dev->nic_info.db +
1169 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1170 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1171 } else {
1172 qp->sq_db = dev->nic_info.db +
1173 (pd->id * dev->nic_info.db_page_size) +
1174 OCRDMA_DB_SQ_OFFSET;
1175 qp->rq_db = dev->nic_info.db +
1176 (pd->id * dev->nic_info.db_page_size) +
1177 OCRDMA_DB_RQ_OFFSET;
1178 }
1179}
1180
1181static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1182{
1183 qp->wqe_wr_id_tbl =
1184 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1185 GFP_KERNEL);
1186 if (qp->wqe_wr_id_tbl == NULL)
1187 return -ENOMEM;
1188 qp->rqe_wr_id_tbl =
1189 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1190 if (qp->rqe_wr_id_tbl == NULL)
1191 return -ENOMEM;
1192
1193 return 0;
1194}
1195
1196static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1197 struct ocrdma_pd *pd,
1198 struct ib_qp_init_attr *attrs)
1199{
1200 qp->pd = pd;
1201 spin_lock_init(&qp->q_lock);
1202 INIT_LIST_HEAD(&qp->sq_entry);
1203 INIT_LIST_HEAD(&qp->rq_entry);
1204
1205 qp->qp_type = attrs->qp_type;
1206 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1207 qp->max_inline_data = attrs->cap.max_inline_data;
1208 qp->sq.max_sges = attrs->cap.max_send_sge;
1209 qp->rq.max_sges = attrs->cap.max_recv_sge;
1210 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1211 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1212}
1213
fe2caefc
PP		 1214
1215static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1216 struct ib_qp_init_attr *attrs)
1217{
1218 if (attrs->qp_type == IB_QPT_GSI) {
1219 dev->gsi_qp_created = 1;
1220 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1221 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1222 }
1223}
1224
1225struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1226 struct ib_qp_init_attr *attrs,
1227 struct ib_udata *udata)
1228{
1229 int status;
1230 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1231 struct ocrdma_qp *qp;
f99b1649 1232 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1233 struct ocrdma_create_qp_ureq ureq;
1234 u16 dpp_credit_lmt, dpp_offset;
1235
1236 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1237 if (status)
1238 goto gen_err;
1239
1240 memset(&ureq, 0, sizeof(ureq));
1241 if (udata) {
1242 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1243 return ERR_PTR(-EFAULT);
1244 }
1245 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1246 if (!qp) {
1247 status = -ENOMEM;
1248 goto gen_err;
1249 }
1250 qp->dev = dev;
1251 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1252 if (udata == NULL)
1253 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1254 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1255
1256 mutex_lock(&dev->dev_lock);
1257 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1258 ureq.dpp_cq_id,
1259 &dpp_offset, &dpp_credit_lmt);
1260 if (status)
1261 goto mbx_err;
1262
1263 /* user space QP's wr_id table are managed in library */
1264 if (udata == NULL) {
fe2caefc
PP		 1265 status = ocrdma_alloc_wr_id_tbl(qp);
1266 if (status)
1267 goto map_err;
1268 }
1269
1270 status = ocrdma_add_qpn_map(dev, qp);
1271 if (status)
1272 goto map_err;
1273 ocrdma_set_qp_db(dev, qp, pd);
1274 if (udata) {
1275 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1276 dpp_credit_lmt,
1277 (attrs->srq != NULL));
1278 if (status)
1279 goto cpy_err;
1280 }
1281 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1282 qp->ibqp.qp_num = qp->id;
fe2caefc
PP		 1283 mutex_unlock(&dev->dev_lock);
1284 return &qp->ibqp;
1285
1286cpy_err:
1287 ocrdma_del_qpn_map(dev, qp);
1288map_err:
1289 ocrdma_mbx_destroy_qp(dev, qp);
1290mbx_err:
1291 mutex_unlock(&dev->dev_lock);
1292 kfree(qp->wqe_wr_id_tbl);
1293 kfree(qp->rqe_wr_id_tbl);
1294 kfree(qp);
ef99c4c2 1295 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc
PP		 1296gen_err:
1297 return ERR_PTR(status);
1298}
1299
45e86b33
NG		 1300
1301static void ocrdma_flush_rq_db(struct ocrdma_qp *qp)
1302{
1303 if (qp->db_cache) {
1304 u32 val = qp->rq.dbid | (qp->db_cache <<
2df84fa8 1305 OCRDMA_DB_RQ_SHIFT);
45e86b33
NG		 1306 iowrite32(val, qp->rq_db);
1307 qp->db_cache = 0;
1308 }
1309}
1310
fe2caefc
PP		 1311int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1312 int attr_mask)
1313{
1314 int status = 0;
1315 struct ocrdma_qp *qp;
1316 struct ocrdma_dev *dev;
1317 enum ib_qp_state old_qps;
1318
1319 qp = get_ocrdma_qp(ibqp);
1320 dev = qp->dev;
1321 if (attr_mask & IB_QP_STATE)
057729cb 1322 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1323 /* if new and previous states are same hw doesn't need to
1324 * know about it.
1325 */
1326 if (status < 0)
1327 return status;
bc1b04ab 1328 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
45e86b33
NG		 1329 if (!status && attr_mask & IB_QP_STATE && attr->qp_state == IB_QPS_RTR)
1330 ocrdma_flush_rq_db(qp);
1331
fe2caefc
PP		 1332 return status;
1333}
1334
1335int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1336 int attr_mask, struct ib_udata *udata)
1337{
1338 unsigned long flags;
1339 int status = -EINVAL;
1340 struct ocrdma_qp *qp;
1341 struct ocrdma_dev *dev;
1342 enum ib_qp_state old_qps, new_qps;
1343
1344 qp = get_ocrdma_qp(ibqp);
1345 dev = qp->dev;
1346
1347 /* syncronize with multiple context trying to change, retrive qps */
1348 mutex_lock(&dev->dev_lock);
1349 /* syncronize with wqe, rqe posting and cqe processing contexts */
1350 spin_lock_irqsave(&qp->q_lock, flags);
1351 old_qps = get_ibqp_state(qp->state);
1352 if (attr_mask & IB_QP_STATE)
1353 new_qps = attr->qp_state;
1354 else
1355 new_qps = old_qps;
1356 spin_unlock_irqrestore(&qp->q_lock, flags);
1357
dd5f03be 1358 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
37721d85 1359 IB_LINK_LAYER_ETHERNET)) {
ef99c4c2
NG		 1360 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1361 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1362 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1363 old_qps, new_qps);
fe2caefc
PP		 1364 goto param_err;
1365 }
1366
1367 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1368 if (status > 0)
1369 status = 0;
1370param_err:
1371 mutex_unlock(&dev->dev_lock);
1372 return status;
1373}
1374
1375static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1376{
1377 switch (mtu) {
1378 case 256:
1379 return IB_MTU_256;
1380 case 512:
1381 return IB_MTU_512;
1382 case 1024:
1383 return IB_MTU_1024;
1384 case 2048:
1385 return IB_MTU_2048;
1386 case 4096:
1387 return IB_MTU_4096;
1388 default:
1389 return IB_MTU_1024;
1390 }
1391}
1392
1393static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1394{
1395 int ib_qp_acc_flags = 0;
1396
1397 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1398 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1399 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1400 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1401 return ib_qp_acc_flags;
1402}
1403
1404int ocrdma_query_qp(struct ib_qp *ibqp,
1405 struct ib_qp_attr *qp_attr,
1406 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1407{
1408 int status;
1409 u32 qp_state;
1410 struct ocrdma_qp_params params;
1411 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1412 struct ocrdma_dev *dev = qp->dev;
1413
1414 memset(&params, 0, sizeof(params));
1415 mutex_lock(&dev->dev_lock);
1416 status = ocrdma_mbx_query_qp(dev, qp, &params);
1417 mutex_unlock(&dev->dev_lock);
1418 if (status)
1419 goto mbx_err;
1420 qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
1421 qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
1422 qp_attr->path_mtu =
1423 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1424 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1425 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1426 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1427 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1428 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1429 qp_attr->dest_qp_num =
1430 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1431
1432 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1433 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1434 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1435 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1436 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1437 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc
PP		 1438 qp_init_attr->cap = qp_attr->cap;
1439 memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
1440 sizeof(params.dgid));
1441 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1442 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1443 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1444 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1445 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1446 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1447 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
a61d93d9 1448 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
fe2caefc
PP		 1449 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1450
1451 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1452 qp_attr->ah_attr.port_num = 1;
1453 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1454 OCRDMA_QP_PARAMS_SL_MASK) >>
1455 OCRDMA_QP_PARAMS_SL_SHIFT;
1456 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1457 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1458 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1459 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1460 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1461 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1462 qp_attr->retry_cnt =
1463 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1464 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1465 qp_attr->min_rnr_timer = 0;
1466 qp_attr->pkey_index = 0;
1467 qp_attr->port_num = 1;
1468 qp_attr->ah_attr.src_path_bits = 0;
1469 qp_attr->ah_attr.static_rate = 0;
1470 qp_attr->alt_pkey_index = 0;
1471 qp_attr->alt_port_num = 0;
1472 qp_attr->alt_timeout = 0;
1473 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1474 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1475 OCRDMA_QP_PARAMS_STATE_SHIFT;
1476 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1477 qp_attr->max_dest_rd_atomic =
1478 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1479 qp_attr->max_rd_atomic =
1480 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1481 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1482 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1483mbx_err:
1484 return status;
1485}
1486
1487static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
1488{
1489 int i = idx / 32;
1490 unsigned int mask = (1 << (idx % 32));
1491
1492 if (srq->idx_bit_fields[i] & mask)
1493 srq->idx_bit_fields[i] &= ~mask;
1494 else
1495 srq->idx_bit_fields[i] |= mask;
1496}
1497
1498static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1499{
43a6b402 1500 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1501}
1502
1503static int is_hw_sq_empty(struct ocrdma_qp *qp)
1504{
43a6b402 1505 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1506}
1507
1508static int is_hw_rq_empty(struct ocrdma_qp *qp)
1509{
43a6b402 1510 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1511}
1512
1513static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1514{
1515 return q->va + (q->head * q->entry_size);
1516}
1517
1518static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1519 u32 idx)
1520{
1521 return q->va + (idx * q->entry_size);
1522}
1523
1524static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1525{
1526 q->head = (q->head + 1) & q->max_wqe_idx;
1527}
1528
1529static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1530{
1531 q->tail = (q->tail + 1) & q->max_wqe_idx;
1532}
1533
1534/* discard the cqe for a given QP */
1535static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1536{
1537 unsigned long cq_flags;
1538 unsigned long flags;
1539 int discard_cnt = 0;
1540 u32 cur_getp, stop_getp;
1541 struct ocrdma_cqe *cqe;
1542 u32 qpn = 0;
1543
1544 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1545
1546 /* traverse through the CQEs in the hw CQ,
1547 * find the matching CQE for a given qp,
1548 * mark the matching one discarded by clearing qpn.
1549 * ring the doorbell in the poll_cq() as
1550 * we don't complete out of order cqe.
1551 */
1552
1553 cur_getp = cq->getp;
1554 /* find upto when do we reap the cq. */
1555 stop_getp = cur_getp;
1556 do {
1557 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1558 break;
1559
1560 cqe = cq->va + cur_getp;
1561 /* if (a) done reaping whole hw cq, or
1562 * (b) qp_xq becomes empty.
1563 * then exit
1564 */
1565 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1566 /* if previously discarded cqe found, skip that too. */
1567 /* check for matching qp */
1568 if (qpn == 0 || qpn != qp->id)
1569 goto skip_cqe;
1570
1571 /* mark cqe discarded so that it is not picked up later
1572 * in the poll_cq().
1573 */
1574 discard_cnt += 1;
1575 cqe->cmn.qpn = 0;
f99b1649 1576 if (is_cqe_for_sq(cqe)) {
fe2caefc 1577 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1578 } else {
fe2caefc
PP		 1579 if (qp->srq) {
1580 spin_lock_irqsave(&qp->srq->q_lock, flags);
1581 ocrdma_hwq_inc_tail(&qp->srq->rq);
1582 ocrdma_srq_toggle_bit(qp->srq, cur_getp);
1583 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1584
f99b1649 1585 } else {
fe2caefc 1586 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1587 }
fe2caefc
PP		 1588 }
1589skip_cqe:
1590 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1591 } while (cur_getp != stop_getp);
1592 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1593}
1594
f11220ee 1595void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1596{
1597 int found = false;
1598 unsigned long flags;
1599 struct ocrdma_dev *dev = qp->dev;
1600 /* sync with any active CQ poll */
1601
1602 spin_lock_irqsave(&dev->flush_q_lock, flags);
1603 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1604 if (found)
1605 list_del(&qp->sq_entry);
1606 if (!qp->srq) {
1607 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1608 if (found)
1609 list_del(&qp->rq_entry);
1610 }
1611 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1612}
1613
1614int ocrdma_destroy_qp(struct ib_qp *ibqp)
1615{
1616 int status;
1617 struct ocrdma_pd *pd;
1618 struct ocrdma_qp *qp;
1619 struct ocrdma_dev *dev;
1620 struct ib_qp_attr attrs;
1621 int attr_mask = IB_QP_STATE;
d19081e0 1622 unsigned long flags;
fe2caefc
PP		 1623
1624 qp = get_ocrdma_qp(ibqp);
1625 dev = qp->dev;
1626
1627 attrs.qp_state = IB_QPS_ERR;
1628 pd = qp->pd;
1629
1630 /* change the QP state to ERROR */
1631 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1632
1633 /* ensure that CQEs for newly created QP (whose id may be same with
1634 * one which just getting destroyed are same), dont get
1635 * discarded until the old CQEs are discarded.
1636 */
1637 mutex_lock(&dev->dev_lock);
1638 status = ocrdma_mbx_destroy_qp(dev, qp);
1639
1640 /*
1641 * acquire CQ lock while destroy is in progress, in order to
1642 * protect against proessing in-flight CQEs for this QP.
1643 */
d19081e0 1644 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
fe2caefc 1645 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0 1646 spin_lock(&qp->rq_cq->cq_lock);
fe2caefc
PP		 1647
1648 ocrdma_del_qpn_map(dev, qp);
1649
1650 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0
DC		 1651 spin_unlock(&qp->rq_cq->cq_lock);
1652 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1653
1654 if (!pd->uctx) {
1655 ocrdma_discard_cqes(qp, qp->sq_cq);
1656 ocrdma_discard_cqes(qp, qp->rq_cq);
1657 }
1658 mutex_unlock(&dev->dev_lock);
1659
1660 if (pd->uctx) {
43a6b402
NG		 1661 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1662 PAGE_ALIGN(qp->sq.len));
fe2caefc 1663 if (!qp->srq)
43a6b402
NG		 1664 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1665 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1666 }
1667
1668 ocrdma_del_flush_qp(qp);
1669
fe2caefc
PP		 1670 kfree(qp->wqe_wr_id_tbl);
1671 kfree(qp->rqe_wr_id_tbl);
1672 kfree(qp);
1673 return status;
1674}
1675
1afc0454
NG		 1676static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1677 struct ib_udata *udata)
fe2caefc
PP		 1678{
1679 int status;
1680 struct ocrdma_create_srq_uresp uresp;
1681
63ea3749 1682 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1683 uresp.rq_dbid = srq->rq.dbid;
1684 uresp.num_rq_pages = 1;
1685 uresp.rq_page_addr[0] = srq->rq.pa;
1686 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1687 uresp.db_page_addr = dev->nic_info.unmapped_db +
1688 (srq->pd->id * dev->nic_info.db_page_size);
1689 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1690 uresp.num_rqe_allocated = srq->rq.max_cnt;
1afc0454 1691 if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
f11220ee 1692 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1693 uresp.db_shift = 24;
1694 } else {
1695 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1696 uresp.db_shift = 16;
1697 }
1698
1699 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1700 if (status)
1701 return status;
1702 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1703 uresp.rq_page_size);
1704 if (status)
1705 return status;
1706 return status;
1707}
1708
1709struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1710 struct ib_srq_init_attr *init_attr,
1711 struct ib_udata *udata)
1712{
1713 int status = -ENOMEM;
1714 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 1715 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1716 struct ocrdma_srq *srq;
1717
1718 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1719 return ERR_PTR(-EINVAL);
1720 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1721 return ERR_PTR(-EINVAL);
1722
1723 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1724 if (!srq)
1725 return ERR_PTR(status);
1726
1727 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1728 srq->pd = pd;
1729 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1730 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc
PP		 1731 if (status)
1732 goto err;
1733
1734 if (udata == NULL) {
1735 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1736 GFP_KERNEL);
1737 if (srq->rqe_wr_id_tbl == NULL)
1738 goto arm_err;
1739
1740 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1741 (srq->rq.max_cnt % 32 ? 1 : 0);
1742 srq->idx_bit_fields =
1743 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1744 if (srq->idx_bit_fields == NULL)
1745 goto arm_err;
1746 memset(srq->idx_bit_fields, 0xff,
1747 srq->bit_fields_len * sizeof(u32));
1748 }
1749
1750 if (init_attr->attr.srq_limit) {
1751 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1752 if (status)
1753 goto arm_err;
1754 }
1755
fe2caefc 1756 if (udata) {
1afc0454 1757 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1758 if (status)
1759 goto arm_err;
1760 }
1761
fe2caefc
PP		 1762 return &srq->ibsrq;
1763
1764arm_err:
1765 ocrdma_mbx_destroy_srq(dev, srq);
1766err:
1767 kfree(srq->rqe_wr_id_tbl);
1768 kfree(srq->idx_bit_fields);
1769 kfree(srq);
1770 return ERR_PTR(status);
1771}
1772
1773int ocrdma_modify_srq(struct ib_srq *ibsrq,
1774 struct ib_srq_attr *srq_attr,
1775 enum ib_srq_attr_mask srq_attr_mask,
1776 struct ib_udata *udata)
1777{
1778 int status = 0;
1779 struct ocrdma_srq *srq;
fe2caefc
PP		 1780
1781 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1782 if (srq_attr_mask & IB_SRQ_MAX_WR)
1783 status = -EINVAL;
1784 else
1785 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1786 return status;
1787}
1788
1789int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1790{
1791 int status;
1792 struct ocrdma_srq *srq;
fe2caefc
PP		 1793
1794 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1795 status = ocrdma_mbx_query_srq(srq, srq_attr);
1796 return status;
1797}
1798
1799int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1800{
1801 int status;
1802 struct ocrdma_srq *srq;
1afc0454 1803 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1804
1805 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1806
1807 status = ocrdma_mbx_destroy_srq(dev, srq);
1808
1809 if (srq->pd->uctx)
43a6b402
NG		 1810 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1811 PAGE_ALIGN(srq->rq.len));
fe2caefc 1812
fe2caefc
PP		 1813 kfree(srq->idx_bit_fields);
1814 kfree(srq->rqe_wr_id_tbl);
1815 kfree(srq);
1816 return status;
1817}
1818
1819/* unprivileged verbs and their support functions. */
1820static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1821 struct ocrdma_hdr_wqe *hdr,
1822 struct ib_send_wr *wr)
1823{
1824 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1825 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1826 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
1827
1828 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
1829 if (qp->qp_type == IB_QPT_GSI)
1830 ud_hdr->qkey = qp->qkey;
1831 else
1832 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1833 ud_hdr->rsvd_ahid = ah->id;
1834}
1835
1836static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1837 struct ocrdma_sge *sge, int num_sge,
1838 struct ib_sge *sg_list)
1839{
1840 int i;
1841
1842 for (i = 0; i < num_sge; i++) {
1843 sge[i].lrkey = sg_list[i].lkey;
1844 sge[i].addr_lo = sg_list[i].addr;
1845 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1846 sge[i].len = sg_list[i].length;
1847 hdr->total_len += sg_list[i].length;
1848 }
1849 if (num_sge == 0)
1850 memset(sge, 0, sizeof(*sge));
1851}
1852
117e6dd1
NG		 1853static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1854{
1855 uint32_t total_len = 0, i;
1856
1857 for (i = 0; i < num_sge; i++)
1858 total_len += sg_list[i].length;
1859 return total_len;
1860}
1861
1862
fe2caefc
PP		 1863static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1864 struct ocrdma_hdr_wqe *hdr,
1865 struct ocrdma_sge *sge,
1866 struct ib_send_wr *wr, u32 wqe_size)
1867{
117e6dd1
NG		 1868 int i;
1869 char *dpp_addr;
1870
43a6b402 1871 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1872 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1873 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2
NG		 1874 pr_err("%s() supported_len=0x%x,\n"
1875 " unspported len req=0x%x\n", __func__,
117e6dd1 1876 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1877 return -EINVAL;
1878 }
117e6dd1
NG		 1879 dpp_addr = (char *)sge;
1880 for (i = 0; i < wr->num_sge; i++) {
1881 memcpy(dpp_addr,
1882 (void *)(unsigned long)wr->sg_list[i].addr,
1883 wr->sg_list[i].length);
1884 dpp_addr += wr->sg_list[i].length;
1885 }
1886
fe2caefc 1887 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1888 if (0 == hdr->total_len)
43a6b402 1889 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1890 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1891 } else {
1892 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1893 if (wr->num_sge)
1894 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
1895 else
1896 wqe_size += sizeof(struct ocrdma_sge);
1897 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1898 }
1899 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1900 return 0;
1901}
1902
1903static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1904 struct ib_send_wr *wr)
1905{
1906 int status;
1907 struct ocrdma_sge *sge;
1908 u32 wqe_size = sizeof(*hdr);
1909
1910 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
1911 ocrdma_build_ud_hdr(qp, hdr, wr);
1912 sge = (struct ocrdma_sge *)(hdr + 2);
1913 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 1914 } else {
fe2caefc 1915 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 1916 }
fe2caefc
PP		 1917
1918 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1919 return status;
1920}
1921
1922static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1923 struct ib_send_wr *wr)
1924{
1925 int status;
1926 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1927 struct ocrdma_sge *sge = ext_rw + 1;
1928 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
1929
1930 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1931 if (status)
1932 return status;
1933 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1934 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1935 ext_rw->lrkey = wr->wr.rdma.rkey;
1936 ext_rw->len = hdr->total_len;
1937 return 0;
1938}
1939
1940static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1941 struct ib_send_wr *wr)
1942{
1943 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1944 struct ocrdma_sge *sge = ext_rw + 1;
1945 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
1946 sizeof(struct ocrdma_hdr_wqe);
1947
1948 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1949 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1950 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
1951 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1952
1953 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1954 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1955 ext_rw->lrkey = wr->wr.rdma.rkey;
1956 ext_rw->len = hdr->total_len;
1957}
1958
7c33880c
NG		 1959static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
1960 struct ocrdma_hw_mr *hwmr)
1961{
1962 int i;
1963 u64 buf_addr = 0;
1964 int num_pbes;
1965 struct ocrdma_pbe *pbe;
1966
1967 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1968 num_pbes = 0;
1969
1970 /* go through the OS phy regions & fill hw pbe entries into pbls. */
1971 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
1972 /* number of pbes can be more for one OS buf, when
1973 * buffers are of different sizes.
1974 * split the ib_buf to one or more pbes.
1975 */
1976 buf_addr = wr->wr.fast_reg.page_list->page_list[i];
1977 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
1978 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
1979 num_pbes += 1;
1980 pbe++;
1981
1982 /* if the pbl is full storing the pbes,
1983 * move to next pbl.
1984 */
1985 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
1986 pbl_tbl++;
1987 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1988 }
1989 }
1990 return;
1991}
1992
1993static int get_encoded_page_size(int pg_sz)
1994{
1995 /* Max size is 256M 4096 << 16 */
1996 int i = 0;
1997 for (; i < 17; i++)
1998 if (pg_sz == (4096 << i))
1999 break;
2000 return i;
2001}
2002
2003
2004static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2005 struct ib_send_wr *wr)
2006{
2007 u64 fbo;
2008 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2009 struct ocrdma_mr *mr;
2010 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2011
2012 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2013
d5e3f378 2014 if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr)
7c33880c
NG		 2015 return -EINVAL;
2016
2017 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2018 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2019
2020 if (wr->wr.fast_reg.page_list_len == 0)
2021 BUG();
2022 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
2023 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2024 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
2025 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2026 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
2027 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2028 hdr->lkey = wr->wr.fast_reg.rkey;
2029 hdr->total_len = wr->wr.fast_reg.length;
2030
2031 fbo = wr->wr.fast_reg.iova_start -
2032 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
2033
2034 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
2035 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
2036 fast_reg->fbo_hi = upper_32_bits(fbo);
2037 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2038 fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
2039 fast_reg->size_sge =
2040 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
33ccbd85 2041 mr = (struct ocrdma_mr *) (unsigned long) qp->dev->stag_arr[(hdr->lkey >> 8) &
7c33880c
NG		 2042 (OCRDMA_MAX_STAG - 1)];
2043 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2044 return 0;
2045}
2046
fe2caefc
PP		 2047static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2048{
2df84fa8 2049 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
fe2caefc
PP		 2050
2051 iowrite32(val, qp->sq_db);
2052}
2053
2054int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2055 struct ib_send_wr **bad_wr)
2056{
2057 int status = 0;
2058 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2059 struct ocrdma_hdr_wqe *hdr;
2060 unsigned long flags;
2061
2062 spin_lock_irqsave(&qp->q_lock, flags);
2063 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2064 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2065 *bad_wr = wr;
fe2caefc
PP		 2066 return -EINVAL;
2067 }
2068
2069 while (wr) {
2070 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2071 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2072 *bad_wr = wr;
fe2caefc
PP		 2073 status = -ENOMEM;
2074 break;
2075 }
2076 hdr = ocrdma_hwq_head(&qp->sq);
2077 hdr->cw = 0;
2b51a9b9 2078 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2079 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2080 if (wr->send_flags & IB_SEND_FENCE)
2081 hdr->cw |=
2082 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2083 if (wr->send_flags & IB_SEND_SOLICITED)
2084 hdr->cw |=
2085 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2086 hdr->total_len = 0;
2087 switch (wr->opcode) {
2088 case IB_WR_SEND_WITH_IMM:
2089 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2090 hdr->immdt = ntohl(wr->ex.imm_data);
2091 case IB_WR_SEND:
2092 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2093 ocrdma_build_send(qp, hdr, wr);
2094 break;
2095 case IB_WR_SEND_WITH_INV:
2096 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2097 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2098 hdr->lkey = wr->ex.invalidate_rkey;
2099 status = ocrdma_build_send(qp, hdr, wr);
2100 break;
2101 case IB_WR_RDMA_WRITE_WITH_IMM:
2102 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2103 hdr->immdt = ntohl(wr->ex.imm_data);
2104 case IB_WR_RDMA_WRITE:
2105 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2106 status = ocrdma_build_write(qp, hdr, wr);
2107 break;
2108 case IB_WR_RDMA_READ_WITH_INV:
2109 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2110 case IB_WR_RDMA_READ:
2111 ocrdma_build_read(qp, hdr, wr);
2112 break;
2113 case IB_WR_LOCAL_INV:
2114 hdr->cw |=
2115 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2116 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2117 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2118 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2119 hdr->lkey = wr->ex.invalidate_rkey;
2120 break;
7c33880c
NG		 2121 case IB_WR_FAST_REG_MR:
2122 status = ocrdma_build_fr(qp, hdr, wr);
2123 break;
fe2caefc
PP		 2124 default:
2125 status = -EINVAL;
2126 break;
2127 }
2128 if (status) {
2129 *bad_wr = wr;
2130 break;
2131 }
2b51a9b9 2132 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2133 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2134 else
2135 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2136 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2137 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2138 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2139 /* make sure wqe is written before adapter can access it */
2140 wmb();
2141 /* inform hw to start processing it */
2142 ocrdma_ring_sq_db(qp);
2143
2144 /* update pointer, counter for next wr */
2145 ocrdma_hwq_inc_head(&qp->sq);
2146 wr = wr->next;
2147 }
2148 spin_unlock_irqrestore(&qp->q_lock, flags);
2149 return status;
2150}
2151
2152static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2153{
2df84fa8 2154 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
fe2caefc 2155
2df84fa8 2156 iowrite32(val, qp->rq_db);
fe2caefc
PP		 2157}
2158
2159static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2160 u16 tag)
2161{
2162 u32 wqe_size = 0;
2163 struct ocrdma_sge *sge;
2164 if (wr->num_sge)
2165 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2166 else
2167 wqe_size = sizeof(*sge) + sizeof(*rqe);
2168
2169 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2170 OCRDMA_WQE_SIZE_SHIFT);
2171 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2172 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2173 rqe->total_len = 0;
2174 rqe->rsvd_tag = tag;
2175 sge = (struct ocrdma_sge *)(rqe + 1);
2176 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2177 ocrdma_cpu_to_le32(rqe, wqe_size);
2178}
2179
2180int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2181 struct ib_recv_wr **bad_wr)
2182{
2183 int status = 0;
2184 unsigned long flags;
2185 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2186 struct ocrdma_hdr_wqe *rqe;
2187
2188 spin_lock_irqsave(&qp->q_lock, flags);
2189 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2190 spin_unlock_irqrestore(&qp->q_lock, flags);
2191 *bad_wr = wr;
2192 return -EINVAL;
2193 }
2194 while (wr) {
2195 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2196 wr->num_sge > qp->rq.max_sges) {
2197 *bad_wr = wr;
2198 status = -ENOMEM;
2199 break;
2200 }
2201 rqe = ocrdma_hwq_head(&qp->rq);
2202 ocrdma_build_rqe(rqe, wr, 0);
2203
2204 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2205 /* make sure rqe is written before adapter can access it */
2206 wmb();
2207
2208 /* inform hw to start processing it */
2209 ocrdma_ring_rq_db(qp);
2210
2211 /* update pointer, counter for next wr */
2212 ocrdma_hwq_inc_head(&qp->rq);
2213 wr = wr->next;
2214 }
2215 spin_unlock_irqrestore(&qp->q_lock, flags);
2216 return status;
2217}
2218
2219/* cqe for srq's rqe can potentially arrive out of order.
2220 * index gives the entry in the shadow table where to store
2221 * the wr_id. tag/index is returned in cqe to reference back
2222 * for a given rqe.
2223 */
2224static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2225{
2226 int row = 0;
2227 int indx = 0;
2228
2229 for (row = 0; row < srq->bit_fields_len; row++) {
2230 if (srq->idx_bit_fields[row]) {
2231 indx = ffs(srq->idx_bit_fields[row]);
2232 indx = (row * 32) + (indx - 1);
2233 if (indx >= srq->rq.max_cnt)
2234 BUG();
2235 ocrdma_srq_toggle_bit(srq, indx);
2236 break;
2237 }
2238 }
2239
2240 if (row == srq->bit_fields_len)
2241 BUG();
2242 return indx;
2243}
2244
2245static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2246{
2247 u32 val = srq->rq.dbid | (1 << 16);
2248
2249 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2250}
2251
2252int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2253 struct ib_recv_wr **bad_wr)
2254{
2255 int status = 0;
2256 unsigned long flags;
2257 struct ocrdma_srq *srq;
2258 struct ocrdma_hdr_wqe *rqe;
2259 u16 tag;
2260
2261 srq = get_ocrdma_srq(ibsrq);
2262
2263 spin_lock_irqsave(&srq->q_lock, flags);
2264 while (wr) {
2265 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2266 wr->num_sge > srq->rq.max_sges) {
2267 status = -ENOMEM;
2268 *bad_wr = wr;
2269 break;
2270 }
2271 tag = ocrdma_srq_get_idx(srq);
2272 rqe = ocrdma_hwq_head(&srq->rq);
2273 ocrdma_build_rqe(rqe, wr, tag);
2274
2275 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2276 /* make sure rqe is written before adapter can perform DMA */
2277 wmb();
2278 /* inform hw to start processing it */
2279 ocrdma_ring_srq_db(srq);
2280 /* update pointer, counter for next wr */
2281 ocrdma_hwq_inc_head(&srq->rq);
2282 wr = wr->next;
2283 }
2284 spin_unlock_irqrestore(&srq->q_lock, flags);
2285 return status;
2286}
2287
2288static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2289{
f99b1649 2290 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2291
2292 switch (status) {
2293 case OCRDMA_CQE_GENERAL_ERR:
2294 ibwc_status = IB_WC_GENERAL_ERR;
2295 break;
2296 case OCRDMA_CQE_LOC_LEN_ERR:
2297 ibwc_status = IB_WC_LOC_LEN_ERR;
2298 break;
2299 case OCRDMA_CQE_LOC_QP_OP_ERR:
2300 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2301 break;
2302 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2303 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2304 break;
2305 case OCRDMA_CQE_LOC_PROT_ERR:
2306 ibwc_status = IB_WC_LOC_PROT_ERR;
2307 break;
2308 case OCRDMA_CQE_WR_FLUSH_ERR:
2309 ibwc_status = IB_WC_WR_FLUSH_ERR;
2310 break;
2311 case OCRDMA_CQE_MW_BIND_ERR:
2312 ibwc_status = IB_WC_MW_BIND_ERR;
2313 break;
2314 case OCRDMA_CQE_BAD_RESP_ERR:
2315 ibwc_status = IB_WC_BAD_RESP_ERR;
2316 break;
2317 case OCRDMA_CQE_LOC_ACCESS_ERR:
2318 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2319 break;
2320 case OCRDMA_CQE_REM_INV_REQ_ERR:
2321 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2322 break;
2323 case OCRDMA_CQE_REM_ACCESS_ERR:
2324 ibwc_status = IB_WC_REM_ACCESS_ERR;
2325 break;
2326 case OCRDMA_CQE_REM_OP_ERR:
2327 ibwc_status = IB_WC_REM_OP_ERR;
2328 break;
2329 case OCRDMA_CQE_RETRY_EXC_ERR:
2330 ibwc_status = IB_WC_RETRY_EXC_ERR;
2331 break;
2332 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2333 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2334 break;
2335 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2336 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2337 break;
2338 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2339 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2340 break;
2341 case OCRDMA_CQE_REM_ABORT_ERR:
2342 ibwc_status = IB_WC_REM_ABORT_ERR;
2343 break;
2344 case OCRDMA_CQE_INV_EECN_ERR:
2345 ibwc_status = IB_WC_INV_EECN_ERR;
2346 break;
2347 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2348 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2349 break;
2350 case OCRDMA_CQE_FATAL_ERR:
2351 ibwc_status = IB_WC_FATAL_ERR;
2352 break;
2353 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2354 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2355 break;
2356 default:
2357 ibwc_status = IB_WC_GENERAL_ERR;
2358 break;
2b50176d 2359 }
fe2caefc
PP		 2360 return ibwc_status;
2361}
2362
2363static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2364 u32 wqe_idx)
2365{
2366 struct ocrdma_hdr_wqe *hdr;
2367 struct ocrdma_sge *rw;
2368 int opcode;
2369
2370 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2371
2372 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2373 /* Undo the hdr->cw swap */
2374 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2375 switch (opcode) {
2376 case OCRDMA_WRITE:
2377 ibwc->opcode = IB_WC_RDMA_WRITE;
2378 break;
2379 case OCRDMA_READ:
2380 rw = (struct ocrdma_sge *)(hdr + 1);
2381 ibwc->opcode = IB_WC_RDMA_READ;
2382 ibwc->byte_len = rw->len;
2383 break;
2384 case OCRDMA_SEND:
2385 ibwc->opcode = IB_WC_SEND;
2386 break;
7c33880c
NG		 2387 case OCRDMA_FR_MR:
2388 ibwc->opcode = IB_WC_FAST_REG_MR;
2389 break;
fe2caefc
PP		 2390 case OCRDMA_LKEY_INV:
2391 ibwc->opcode = IB_WC_LOCAL_INV;
2392 break;
2393 default:
2394 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2395 pr_err("%s() invalid opcode received = 0x%x\n",
2396 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2397 break;
2b50176d 2398 }
fe2caefc
PP		 2399}
2400
2401static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2402 struct ocrdma_cqe *cqe)
2403{
2404 if (is_cqe_for_sq(cqe)) {
2405 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2406 cqe->flags_status_srcqpn) &
2407 ~OCRDMA_CQE_STATUS_MASK);
2408 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2409 cqe->flags_status_srcqpn) |
2410 (OCRDMA_CQE_WR_FLUSH_ERR <<
2411 OCRDMA_CQE_STATUS_SHIFT));
2412 } else {
2413 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2414 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2415 cqe->flags_status_srcqpn) &
2416 ~OCRDMA_CQE_UD_STATUS_MASK);
2417 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2418 cqe->flags_status_srcqpn) |
2419 (OCRDMA_CQE_WR_FLUSH_ERR <<
2420 OCRDMA_CQE_UD_STATUS_SHIFT));
2421 } else {
2422 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2423 cqe->flags_status_srcqpn) &
2424 ~OCRDMA_CQE_STATUS_MASK);
2425 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2426 cqe->flags_status_srcqpn) |
2427 (OCRDMA_CQE_WR_FLUSH_ERR <<
2428 OCRDMA_CQE_STATUS_SHIFT));
2429 }
2430 }
2431}
2432
2433static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2434 struct ocrdma_qp *qp, int status)
2435{
2436 bool expand = false;
2437
2438 ibwc->byte_len = 0;
2439 ibwc->qp = &qp->ibqp;
2440 ibwc->status = ocrdma_to_ibwc_err(status);
2441
2442 ocrdma_flush_qp(qp);
057729cb 2443 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2444
2445 /* if wqe/rqe pending for which cqe needs to be returned,
2446 * trigger inflating it.
2447 */
2448 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2449 expand = true;
2450 ocrdma_set_cqe_status_flushed(qp, cqe);
2451 }
2452 return expand;
2453}
2454
2455static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2456 struct ocrdma_qp *qp, int status)
2457{
2458 ibwc->opcode = IB_WC_RECV;
2459 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2460 ocrdma_hwq_inc_tail(&qp->rq);
2461
2462 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2463}
2464
2465static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2466 struct ocrdma_qp *qp, int status)
2467{
2468 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2469 ocrdma_hwq_inc_tail(&qp->sq);
2470
2471 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2472}
2473
2474
2475static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2476 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2477 bool *polled, bool *stop)
2478{
2479 bool expand;
2480 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2481 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2482
2483 /* when hw sq is empty, but rq is not empty, so we continue
2484 * to keep the cqe in order to get the cq event again.
2485 */
2486 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2487 /* when cq for rq and sq is same, it is safe to return
2488 * flush cqe for RQEs.
2489 */
2490 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2491 *polled = true;
2492 status = OCRDMA_CQE_WR_FLUSH_ERR;
2493 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2494 } else {
2495 /* stop processing further cqe as this cqe is used for
2496 * triggering cq event on buddy cq of RQ.
2497 * When QP is destroyed, this cqe will be removed
2498 * from the cq's hardware q.
2499 */
2500 *polled = false;
2501 *stop = true;
2502 expand = false;
2503 }
2504 } else {
2505 *polled = true;
2506 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2507 }
2508 return expand;
2509}
2510
2511static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2512 struct ocrdma_cqe *cqe,
2513 struct ib_wc *ibwc, bool *polled)
2514{
2515 bool expand = false;
2516 int tail = qp->sq.tail;
2517 u32 wqe_idx;
2518
2519 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2520 *polled = false; /* WC cannot be consumed yet */
2521 } else {
2522 ibwc->status = IB_WC_SUCCESS;
2523 ibwc->wc_flags = 0;
2524 ibwc->qp = &qp->ibqp;
2525 ocrdma_update_wc(qp, ibwc, tail);
2526 *polled = true;
fe2caefc 2527 }
43a6b402
NG		 2528 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2529 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2530 if (tail != wqe_idx)
2531 expand = true; /* Coalesced CQE can't be consumed yet */
2532
fe2caefc
PP		 2533 ocrdma_hwq_inc_tail(&qp->sq);
2534 return expand;
2535}
2536
2537static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2538 struct ib_wc *ibwc, bool *polled, bool *stop)
2539{
2540 int status;
2541 bool expand;
2542
2543 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2544 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2545
2546 if (status == OCRDMA_CQE_SUCCESS)
2547 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2548 else
2549 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2550 return expand;
2551}
2552
2553static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2554{
2555 int status;
2556
2557 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2558 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2559 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2560 OCRDMA_CQE_SRCQP_MASK;
2561 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2562 OCRDMA_CQE_PKEY_MASK;
2563 ibwc->wc_flags = IB_WC_GRH;
2564 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2565 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2566 return status;
2567}
2568
2569static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2570 struct ocrdma_cqe *cqe,
2571 struct ocrdma_qp *qp)
2572{
2573 unsigned long flags;
2574 struct ocrdma_srq *srq;
2575 u32 wqe_idx;
2576
2577 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402
NG		 2578 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2579 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
fe2caefc
PP		 2580 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2581 spin_lock_irqsave(&srq->q_lock, flags);
2582 ocrdma_srq_toggle_bit(srq, wqe_idx);
2583 spin_unlock_irqrestore(&srq->q_lock, flags);
2584 ocrdma_hwq_inc_tail(&srq->rq);
2585}
2586
2587static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2588 struct ib_wc *ibwc, bool *polled, bool *stop,
2589 int status)
2590{
2591 bool expand;
2592
2593 /* when hw_rq is empty, but wq is not empty, so continue
2594 * to keep the cqe to get the cq event again.
2595 */
2596 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2597 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2598 *polled = true;
2599 status = OCRDMA_CQE_WR_FLUSH_ERR;
2600 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2601 } else {
2602 *polled = false;
2603 *stop = true;
2604 expand = false;
2605 }
a3698a9b
PP		 2606 } else {
2607 *polled = true;
fe2caefc 2608 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2609 }
fe2caefc
PP		 2610 return expand;
2611}
2612
2613static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2614 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2615{
2616 ibwc->opcode = IB_WC_RECV;
2617 ibwc->qp = &qp->ibqp;
2618 ibwc->status = IB_WC_SUCCESS;
2619
2620 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2621 ocrdma_update_ud_rcqe(ibwc, cqe);
2622 else
2623 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2624
2625 if (is_cqe_imm(cqe)) {
2626 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2627 ibwc->wc_flags |= IB_WC_WITH_IMM;
2628 } else if (is_cqe_wr_imm(cqe)) {
2629 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2630 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2631 ibwc->wc_flags |= IB_WC_WITH_IMM;
2632 } else if (is_cqe_invalidated(cqe)) {
2633 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2634 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2635 }
f99b1649 2636 if (qp->ibqp.srq) {
fe2caefc 2637 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2638 } else {
fe2caefc
PP		 2639 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2640 ocrdma_hwq_inc_tail(&qp->rq);
2641 }
2642}
2643
2644static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2645 struct ib_wc *ibwc, bool *polled, bool *stop)
2646{
2647 int status;
2648 bool expand = false;
2649
2650 ibwc->wc_flags = 0;
f99b1649 2651 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2652 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2653 OCRDMA_CQE_UD_STATUS_MASK) >>
2654 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2655 } else {
fe2caefc
PP		 2656 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2657 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2658 }
fe2caefc
PP		 2659
2660 if (status == OCRDMA_CQE_SUCCESS) {
2661 *polled = true;
2662 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2663 } else {
2664 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2665 status);
2666 }
2667 return expand;
2668}
2669
2670static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2671 u16 cur_getp)
2672{
2673 if (cq->phase_change) {
2674 if (cur_getp == 0)
2675 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2676 } else {
fe2caefc
PP		 2677 /* clear valid bit */
2678 cqe->flags_status_srcqpn = 0;
f99b1649 2679 }
fe2caefc
PP		 2680}
2681
2682static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2683 struct ib_wc *ibwc)
2684{
2685 u16 qpn = 0;
2686 int i = 0;
2687 bool expand = false;
2688 int polled_hw_cqes = 0;
2689 struct ocrdma_qp *qp = NULL;
1afc0454 2690 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2691 struct ocrdma_cqe *cqe;
2692 u16 cur_getp; bool polled = false; bool stop = false;
2693
2694 cur_getp = cq->getp;
2695 while (num_entries) {
2696 cqe = cq->va + cur_getp;
2697 /* check whether valid cqe or not */
2698 if (!is_cqe_valid(cq, cqe))
2699 break;
2700 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2701 /* ignore discarded cqe */
2702 if (qpn == 0)
2703 goto skip_cqe;
2704 qp = dev->qp_tbl[qpn];
2705 BUG_ON(qp == NULL);
2706
2707 if (is_cqe_for_sq(cqe)) {
2708 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2709 &stop);
2710 } else {
2711 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2712 &stop);
2713 }
2714 if (expand)
2715 goto expand_cqe;
2716 if (stop)
2717 goto stop_cqe;
2718 /* clear qpn to avoid duplicate processing by discard_cqe() */
2719 cqe->cmn.qpn = 0;
2720skip_cqe:
2721 polled_hw_cqes += 1;
2722 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2723 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2724expand_cqe:
2725 if (polled) {
2726 num_entries -= 1;
2727 i += 1;
2728 ibwc = ibwc + 1;
2729 polled = false;
2730 }
2731 }
2732stop_cqe:
2733 cq->getp = cur_getp;
ea617626
DS		 2734 if (cq->deferred_arm) {
2735 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
2736 polled_hw_cqes);
2737 cq->deferred_arm = false;
2738 cq->deferred_sol = false;
2739 } else {
2740 /* We need to pop the CQE. No need to arm */
2741 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
fe2caefc 2742 polled_hw_cqes);
ea617626 2743 cq->deferred_sol = false;
fe2caefc 2744 }
ea617626 2745
fe2caefc
PP		 2746 return i;
2747}
2748
2749/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2750static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2751 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2752{
2753 int err_cqes = 0;
2754
2755 while (num_entries) {
2756 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2757 break;
2758 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2759 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2760 ocrdma_hwq_inc_tail(&qp->sq);
2761 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2762 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2763 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2764 } else {
fe2caefc 2765 return err_cqes;
f99b1649 2766 }
fe2caefc
PP		 2767 ibwc->byte_len = 0;
2768 ibwc->status = IB_WC_WR_FLUSH_ERR;
2769 ibwc = ibwc + 1;
2770 err_cqes += 1;
2771 num_entries -= 1;
2772 }
2773 return err_cqes;
2774}
2775
2776int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2777{
2778 int cqes_to_poll = num_entries;
1afc0454
NG		 2779 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2780 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2781 int num_os_cqe = 0, err_cqes = 0;
2782 struct ocrdma_qp *qp;
1afc0454 2783 unsigned long flags;
fe2caefc
PP		 2784
2785 /* poll cqes from adapter CQ */
2786 spin_lock_irqsave(&cq->cq_lock, flags);
2787 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2788 spin_unlock_irqrestore(&cq->cq_lock, flags);
2789 cqes_to_poll -= num_os_cqe;
2790
2791 if (cqes_to_poll) {
2792 wc = wc + num_os_cqe;
2793 /* adapter returns single error cqe when qp moves to
2794 * error state. So insert error cqes with wc_status as
2795 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2796 * respectively which uses this CQ.
2797 */
2798 spin_lock_irqsave(&dev->flush_q_lock, flags);
2799 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2800 if (cqes_to_poll == 0)
2801 break;
2802 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2803 cqes_to_poll -= err_cqes;
2804 num_os_cqe += err_cqes;
2805 wc = wc + err_cqes;
2806 }
2807 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2808 }
2809 return num_os_cqe;
2810}
2811
2812int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2813{
1afc0454
NG		 2814 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2815 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2816 u16 cq_id;
1afc0454 2817 unsigned long flags;
ea617626 2818 bool arm_needed = false, sol_needed = false;
fe2caefc 2819
fe2caefc 2820 cq_id = cq->id;
fe2caefc
PP		 2821
2822 spin_lock_irqsave(&cq->cq_lock, flags);
2823 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2824 arm_needed = true;
fe2caefc 2825 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2826 sol_needed = true;
fe2caefc 2827
ea617626
DS		 2828 if (cq->first_arm) {
2829 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
2830 cq->first_arm = false;
2831 goto skip_defer;
fe2caefc 2832 }
ea617626
DS		 2833 cq->deferred_arm = true;
2834
2835skip_defer:
2836 cq->deferred_sol = sol_needed;
fe2caefc 2837 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2838
fe2caefc
PP		 2839 return 0;
2840}
7c33880c
NG		 2841
2842struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
2843{
2844 int status;
2845 struct ocrdma_mr *mr;
2846 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2847 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2848
2849 if (max_page_list_len > dev->attr.max_pages_per_frmr)
2850 return ERR_PTR(-EINVAL);
2851
2852 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2853 if (!mr)
2854 return ERR_PTR(-ENOMEM);
2855
2856 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
2857 if (status)
2858 goto pbl_err;
2859 mr->hwmr.fr_mr = 1;
2860 mr->hwmr.remote_rd = 0;
2861 mr->hwmr.remote_wr = 0;
2862 mr->hwmr.local_rd = 0;
2863 mr->hwmr.local_wr = 0;
2864 mr->hwmr.mw_bind = 0;
2865 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2866 if (status)
2867 goto pbl_err;
2868 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2869 if (status)
2870 goto mbx_err;
2871 mr->ibmr.rkey = mr->hwmr.lkey;
2872 mr->ibmr.lkey = mr->hwmr.lkey;
1852d1da 2873 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = mr;
7c33880c
NG		 2874 return &mr->ibmr;
2875mbx_err:
2876 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
2877pbl_err:
2878 kfree(mr);
2879 return ERR_PTR(-ENOMEM);
2880}
2881
2882struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
2883 *ibdev,
2884 int page_list_len)
2885{
2886 struct ib_fast_reg_page_list *frmr_list;
2887 int size;
2888
2889 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
2890 frmr_list = kzalloc(size, GFP_KERNEL);
2891 if (!frmr_list)
2892 return ERR_PTR(-ENOMEM);
2893 frmr_list->page_list = (u64 *)(frmr_list + 1);
2894 return frmr_list;
2895}
2896
2897void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
2898{
2899 kfree(page_list);
2900}
cffce990
NG		 2901
2902#define MAX_KERNEL_PBE_SIZE 65536
2903static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
2904 int buf_cnt, u32 *pbe_size)
2905{
2906 u64 total_size = 0;
2907 u64 buf_size = 0;
2908 int i;
2909 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
2910 *pbe_size = roundup_pow_of_two(*pbe_size);
2911
2912 /* find the smallest PBE size that we can have */
2913 for (i = 0; i < buf_cnt; i++) {
2914 /* first addr may not be page aligned, so ignore checking */
2915 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
2916 (buf_list[i].size & ~PAGE_MASK))) {
2917 return 0;
2918 }
2919
2920 /* if configured PBE size is greater then the chosen one,
2921 * reduce the PBE size.
2922 */
2923 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
2924 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
2925 buf_size = roundup_pow_of_two(buf_size);
2926 if (*pbe_size > buf_size)
2927 *pbe_size = buf_size;
2928
2929 total_size += buf_size;
2930 }
2931 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
2932 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
2933
2934 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
2935
2936 return total_size >> ilog2(*pbe_size);
2937}
2938
2939static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
2940 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
2941 struct ocrdma_hw_mr *hwmr)
2942{
2943 int i;
2944 int idx;
2945 int pbes_per_buf = 0;
2946 u64 buf_addr = 0;
2947 int num_pbes;
2948 struct ocrdma_pbe *pbe;
2949 int total_num_pbes = 0;
2950
2951 if (!hwmr->num_pbes)
2952 return;
2953
2954 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2955 num_pbes = 0;
2956
2957 /* go through the OS phy regions & fill hw pbe entries into pbls. */
2958 for (i = 0; i < ib_buf_cnt; i++) {
2959 buf_addr = buf_list[i].addr;
2960 pbes_per_buf =
2961 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
2962 pbe_size;
2963 hwmr->len += buf_list[i].size;
2964 /* number of pbes can be more for one OS buf, when
2965 * buffers are of different sizes.
2966 * split the ib_buf to one or more pbes.
2967 */
2968 for (idx = 0; idx < pbes_per_buf; idx++) {
2969 /* we program always page aligned addresses,
2970 * first unaligned address is taken care by fbo.
2971 */
2972 if (i == 0) {
2973 /* for non zero fbo, assign the
2974 * start of the page.
2975 */
2976 pbe->pa_lo =
2977 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2978 pbe->pa_hi =
2979 cpu_to_le32((u32) upper_32_bits(buf_addr));
2980 } else {
2981 pbe->pa_lo =
2982 cpu_to_le32((u32) (buf_addr & 0xffffffff));
2983 pbe->pa_hi =
2984 cpu_to_le32((u32) upper_32_bits(buf_addr));
2985 }
2986 buf_addr += pbe_size;
2987 num_pbes += 1;
2988 total_num_pbes += 1;
2989 pbe++;
2990
2991 if (total_num_pbes == hwmr->num_pbes)
2992 goto mr_tbl_done;
2993 /* if the pbl is full storing the pbes,
2994 * move to next pbl.
2995 */
2996 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
2997 pbl_tbl++;
2998 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2999 num_pbes = 0;
3000 }
3001 }
3002 }
3003mr_tbl_done:
3004 return;
3005}
3006
3007struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3008 struct ib_phys_buf *buf_list,
3009 int buf_cnt, int acc, u64 *iova_start)
3010{
3011 int status = -ENOMEM;
3012 struct ocrdma_mr *mr;
3013 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3014 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3015 u32 num_pbes;
3016 u32 pbe_size = 0;
3017
3018 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3019 return ERR_PTR(-EINVAL);
3020
3021 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3022 if (!mr)
3023 return ERR_PTR(status);
3024
3025 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3026 if (num_pbes == 0) {
3027 status = -EINVAL;
3028 goto pbl_err;
3029 }
3030 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3031 if (status)
3032 goto pbl_err;
3033
3034 mr->hwmr.pbe_size = pbe_size;
3035 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3036 mr->hwmr.va = *iova_start;
3037 mr->hwmr.local_rd = 1;
3038 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3039 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3040 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3041 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3042 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3043
3044 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3045 if (status)
3046 goto pbl_err;
3047 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3048 &mr->hwmr);
3049 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3050 if (status)
3051 goto mbx_err;
3052
3053 mr->ibmr.lkey = mr->hwmr.lkey;
3054 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3055 mr->ibmr.rkey = mr->hwmr.lkey;
3056 return &mr->ibmr;
3057
3058mbx_err:
3059 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3060pbl_err:
3061 kfree(mr);
3062 return ERR_PTR(status);
3063}
Linux kernel - Deliverables
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