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RDMA/ocrdma: Memory leak fix in ocrdma_dereg_mr()
[deliverable/linux.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
CommitLineData
fe2caefc
PP		 1/*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *
20 * Contact Information:
21 * linux-drivers@emulex.com
22 *
23 * Emulex
24 * 3333 Susan Street
25 * Costa Mesa, CA 92626
26 *******************************************************************/
27
28#include <linux/dma-mapping.h>
29#include <rdma/ib_verbs.h>
30#include <rdma/ib_user_verbs.h>
31#include <rdma/iw_cm.h>
32#include <rdma/ib_umem.h>
33#include <rdma/ib_addr.h>
34
35#include "ocrdma.h"
36#include "ocrdma_hw.h"
37#include "ocrdma_verbs.h"
38#include "ocrdma_abi.h"
39
40int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
41{
42 if (index > 1)
43 return -EINVAL;
44
45 *pkey = 0xffff;
46 return 0;
47}
48
49int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
50 int index, union ib_gid *sgid)
51{
52 struct ocrdma_dev *dev;
53
54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid));
7b33dc2b 56 if (index >= OCRDMA_MAX_SGID)
fe2caefc
PP		 57 return -EINVAL;
58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
60
61 return 0;
62}
63
64int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
65{
66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
67
68 memset(attr, 0, sizeof *attr);
69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
72 attr->max_mr_size = ~0ull;
73 attr->page_size_cap = 0xffff000;
74 attr->vendor_id = dev->nic_info.pdev->vendor;
75 attr->vendor_part_id = dev->nic_info.pdev->device;
76 attr->hw_ver = 0;
77 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 78 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 79 attr->max_qp_wr = dev->attr.max_wqe;
80
81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
82 IB_DEVICE_RC_RNR_NAK_GEN |
83 IB_DEVICE_SHUTDOWN_PORT |
84 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 85 IB_DEVICE_LOCAL_DMA_LKEY |
86 IB_DEVICE_MEM_MGT_EXTENSIONS;
634c5796 87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
c43e9ab8 88 attr->max_sge_rd = 0;
fe2caefc
PP		 89 attr->max_cq = dev->attr.max_cq;
90 attr->max_cqe = dev->attr.max_cqe;
91 attr->max_mr = dev->attr.max_mr;
92 attr->max_mw = 0;
93 attr->max_pd = dev->attr.max_pd;
94 attr->atomic_cap = 0;
95 attr->max_fmr = 0;
96 attr->max_map_per_fmr = 0;
97 attr->max_qp_rd_atom =
98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 100 attr->max_srq = dev->attr.max_srq;
d1e09ebf 101 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 102 attr->max_srq_wr = dev->attr.max_rqe;
103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
104 attr->max_fast_reg_page_list_len = 0;
105 attr->max_pkeys = 1;
106 return 0;
107}
108
f24ceba6
NG		 109static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
110 u8 *ib_speed, u8 *ib_width)
111{
112 int status;
113 u8 speed;
114
115 status = ocrdma_mbx_get_link_speed(dev, &speed);
116 if (status)
117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
118
119 switch (speed) {
120 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
121 *ib_speed = IB_SPEED_SDR;
122 *ib_width = IB_WIDTH_1X;
123 break;
124
125 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
126 *ib_speed = IB_SPEED_QDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
131 *ib_speed = IB_SPEED_DDR;
132 *ib_width = IB_WIDTH_4X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
136 *ib_speed = IB_SPEED_QDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 default:
141 /* Unsupported */
142 *ib_speed = IB_SPEED_SDR;
143 *ib_width = IB_WIDTH_1X;
2b50176d 144 }
f24ceba6
NG		 145}
146
147
fe2caefc
PP		 148int ocrdma_query_port(struct ib_device *ibdev,
149 u8 port, struct ib_port_attr *props)
150{
151 enum ib_port_state port_state;
152 struct ocrdma_dev *dev;
153 struct net_device *netdev;
154
155 dev = get_ocrdma_dev(ibdev);
156 if (port > 1) {
ef99c4c2
NG		 157 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
158 dev->id, port);
fe2caefc
PP		 159 return -EINVAL;
160 }
161 netdev = dev->nic_info.netdev;
162 if (netif_running(netdev) && netif_oper_up(netdev)) {
163 port_state = IB_PORT_ACTIVE;
164 props->phys_state = 5;
165 } else {
166 port_state = IB_PORT_DOWN;
167 props->phys_state = 3;
168 }
169 props->max_mtu = IB_MTU_4096;
170 props->active_mtu = iboe_get_mtu(netdev->mtu);
171 props->lid = 0;
172 props->lmc = 0;
173 props->sm_lid = 0;
174 props->sm_sl = 0;
175 props->state = port_state;
176 props->port_cap_flags =
177 IB_PORT_CM_SUP |
178 IB_PORT_REINIT_SUP |
b4a26a27 179 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
fe2caefc
PP		 180 props->gid_tbl_len = OCRDMA_MAX_SGID;
181 props->pkey_tbl_len = 1;
182 props->bad_pkey_cntr = 0;
183 props->qkey_viol_cntr = 0;
f24ceba6
NG		 184 get_link_speed_and_width(dev, &props->active_speed,
185 &props->active_width);
fe2caefc
PP		 186 props->max_msg_sz = 0x80000000;
187 props->max_vl_num = 4;
188 return 0;
189}
190
191int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
192 struct ib_port_modify *props)
193{
194 struct ocrdma_dev *dev;
195
196 dev = get_ocrdma_dev(ibdev);
197 if (port > 1) {
ef99c4c2 198 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
fe2caefc
PP		 199 return -EINVAL;
200 }
201 return 0;
202}
203
204static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
205 unsigned long len)
206{
207 struct ocrdma_mm *mm;
208
209 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
210 if (mm == NULL)
211 return -ENOMEM;
212 mm->key.phy_addr = phy_addr;
213 mm->key.len = len;
214 INIT_LIST_HEAD(&mm->entry);
215
216 mutex_lock(&uctx->mm_list_lock);
217 list_add_tail(&mm->entry, &uctx->mm_head);
218 mutex_unlock(&uctx->mm_list_lock);
219 return 0;
220}
221
222static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
223 unsigned long len)
224{
225 struct ocrdma_mm *mm, *tmp;
226
227 mutex_lock(&uctx->mm_list_lock);
228 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 229 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 230 continue;
231
232 list_del(&mm->entry);
233 kfree(mm);
234 break;
235 }
236 mutex_unlock(&uctx->mm_list_lock);
237}
238
239static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
240 unsigned long len)
241{
242 bool found = false;
243 struct ocrdma_mm *mm;
244
245 mutex_lock(&uctx->mm_list_lock);
246 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 247 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 248 continue;
249
250 found = true;
251 break;
252 }
253 mutex_unlock(&uctx->mm_list_lock);
254 return found;
255}
256
cffce990
NG		 257static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
258 struct ocrdma_ucontext *uctx,
259 struct ib_udata *udata)
260{
261 struct ocrdma_pd *pd = NULL;
262 int status = 0;
263
264 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
265 if (!pd)
266 return ERR_PTR(-ENOMEM);
267
268 if (udata && uctx) {
269 pd->dpp_enabled =
21c3391a 270 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
cffce990
NG		 271 pd->num_dpp_qp =
272 pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;
273 }
274
275retry:
276 status = ocrdma_mbx_alloc_pd(dev, pd);
277 if (status) {
278 if (pd->dpp_enabled) {
279 pd->dpp_enabled = false;
280 pd->num_dpp_qp = 0;
281 goto retry;
282 } else {
283 kfree(pd);
284 return ERR_PTR(status);
285 }
286 }
287
288 return pd;
289}
290
291static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
292 struct ocrdma_pd *pd)
293{
294 return (uctx->cntxt_pd == pd ? true : false);
295}
296
297static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
298 struct ocrdma_pd *pd)
299{
300 int status = 0;
301
302 status = ocrdma_mbx_dealloc_pd(dev, pd);
303 kfree(pd);
304 return status;
305}
306
307static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
308 struct ocrdma_ucontext *uctx,
309 struct ib_udata *udata)
310{
311 int status = 0;
312
313 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
314 if (IS_ERR(uctx->cntxt_pd)) {
315 status = PTR_ERR(uctx->cntxt_pd);
316 uctx->cntxt_pd = NULL;
317 goto err;
318 }
319
320 uctx->cntxt_pd->uctx = uctx;
321 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
322err:
323 return status;
324}
325
326static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
327{
328 int status = 0;
329 struct ocrdma_pd *pd = uctx->cntxt_pd;
330 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
331
332 BUG_ON(uctx->pd_in_use);
333 uctx->cntxt_pd = NULL;
334 status = _ocrdma_dealloc_pd(dev, pd);
335 return status;
336}
337
338static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
339{
340 struct ocrdma_pd *pd = NULL;
341
342 mutex_lock(&uctx->mm_list_lock);
343 if (!uctx->pd_in_use) {
344 uctx->pd_in_use = true;
345 pd = uctx->cntxt_pd;
346 }
347 mutex_unlock(&uctx->mm_list_lock);
348
349 return pd;
350}
351
352static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
353{
354 mutex_lock(&uctx->mm_list_lock);
355 uctx->pd_in_use = false;
356 mutex_unlock(&uctx->mm_list_lock);
357}
358
fe2caefc
PP		 359struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
360 struct ib_udata *udata)
361{
362 int status;
363 struct ocrdma_ucontext *ctx;
364 struct ocrdma_alloc_ucontext_resp resp;
365 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
366 struct pci_dev *pdev = dev->nic_info.pdev;
367 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
368
369 if (!udata)
370 return ERR_PTR(-EFAULT);
371 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
372 if (!ctx)
373 return ERR_PTR(-ENOMEM);
fe2caefc
PP		 374 INIT_LIST_HEAD(&ctx->mm_head);
375 mutex_init(&ctx->mm_list_lock);
376
377 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
378 &ctx->ah_tbl.pa, GFP_KERNEL);
379 if (!ctx->ah_tbl.va) {
380 kfree(ctx);
381 return ERR_PTR(-ENOMEM);
382 }
383 memset(ctx->ah_tbl.va, 0, map_len);
384 ctx->ah_tbl.len = map_len;
385
63ea3749 386 memset(&resp, 0, sizeof(resp));
fe2caefc
PP		 387 resp.ah_tbl_len = ctx->ah_tbl.len;
388 resp.ah_tbl_page = ctx->ah_tbl.pa;
389
390 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
391 if (status)
392 goto map_err;
cffce990
NG		 393
394 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
395 if (status)
396 goto pd_err;
397
fe2caefc
PP		 398 resp.dev_id = dev->id;
399 resp.max_inline_data = dev->attr.max_inline_data;
400 resp.wqe_size = dev->attr.wqe_size;
401 resp.rqe_size = dev->attr.rqe_size;
402 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 403
404 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
405 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
406 if (status)
407 goto cpy_err;
408 return &ctx->ibucontext;
409
410cpy_err:
cffce990 411pd_err:
fe2caefc
PP		 412 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
413map_err:
414 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
415 ctx->ah_tbl.pa);
416 kfree(ctx);
417 return ERR_PTR(status);
418}
419
420int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
421{
cffce990 422 int status = 0;
fe2caefc
PP		 423 struct ocrdma_mm *mm, *tmp;
424 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 425 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
426 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 427
cffce990
NG		 428 status = ocrdma_dealloc_ucontext_pd(uctx);
429
fe2caefc
PP		 430 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
431 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
432 uctx->ah_tbl.pa);
433
434 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
435 list_del(&mm->entry);
436 kfree(mm);
437 }
438 kfree(uctx);
cffce990 439 return status;
fe2caefc
PP		 440}
441
442int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
443{
444 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 445 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 446 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
447 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
448 unsigned long len = (vma->vm_end - vma->vm_start);
449 int status = 0;
450 bool found;
451
452 if (vma->vm_start & (PAGE_SIZE - 1))
453 return -EINVAL;
454 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
455 if (!found)
456 return -EINVAL;
457
458 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
459 dev->nic_info.db_total_size)) &&
460 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 461 if (vma->vm_flags & VM_READ)
462 return -EPERM;
463
464 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 465 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
466 len, vma->vm_page_prot);
467 } else if (dev->nic_info.dpp_unmapped_len &&
468 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
469 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
470 dev->nic_info.dpp_unmapped_len)) &&
471 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 472 if (vma->vm_flags & VM_READ)
473 return -EPERM;
474
fe2caefc
PP		 475 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
476 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
477 len, vma->vm_page_prot);
478 } else {
fe2caefc
PP		 479 status = remap_pfn_range(vma, vma->vm_start,
480 vma->vm_pgoff, len, vma->vm_page_prot);
481 }
482 return status;
483}
484
45e86b33 485static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 486 struct ib_ucontext *ib_ctx,
487 struct ib_udata *udata)
488{
489 int status;
490 u64 db_page_addr;
da496438 491 u64 dpp_page_addr = 0;
fe2caefc
PP		 492 u32 db_page_size;
493 struct ocrdma_alloc_pd_uresp rsp;
494 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
495
63ea3749 496 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 497 rsp.id = pd->id;
498 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 499 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 500 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 501
502 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
503 if (status)
504 return status;
505
506 if (pd->dpp_enabled) {
f99b1649 507 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 508 (pd->id * PAGE_SIZE);
fe2caefc 509 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 510 PAGE_SIZE);
fe2caefc
PP		 511 if (status)
512 goto dpp_map_err;
513 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
514 rsp.dpp_page_addr_lo = dpp_page_addr;
515 }
516
517 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
518 if (status)
519 goto ucopy_err;
520
521 pd->uctx = uctx;
522 return 0;
523
524ucopy_err:
da496438 525 if (pd->dpp_enabled)
43a6b402 526 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 527dpp_map_err:
528 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
529 return status;
530}
531
532struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
533 struct ib_ucontext *context,
534 struct ib_udata *udata)
535{
536 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
537 struct ocrdma_pd *pd;
cffce990 538 struct ocrdma_ucontext *uctx = NULL;
fe2caefc 539 int status;
cffce990 540 u8 is_uctx_pd = false;
fe2caefc 541
fe2caefc 542 if (udata && context) {
cffce990
NG		 543 uctx = get_ocrdma_ucontext(context);
544 pd = ocrdma_get_ucontext_pd(uctx);
545 if (pd) {
546 is_uctx_pd = true;
547 goto pd_mapping;
43a6b402 548 }
fe2caefc 549 }
fe2caefc 550
cffce990
NG		 551 pd = _ocrdma_alloc_pd(dev, uctx, udata);
552 if (IS_ERR(pd)) {
553 status = PTR_ERR(pd);
554 goto exit;
555 }
556
557pd_mapping:
fe2caefc 558 if (udata && context) {
45e86b33 559 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
fe2caefc
PP		 560 if (status)
561 goto err;
562 }
563 return &pd->ibpd;
564
565err:
cffce990
NG		 566 if (is_uctx_pd) {
567 ocrdma_release_ucontext_pd(uctx);
568 } else {
569 status = ocrdma_mbx_dealloc_pd(dev, pd);
570 kfree(pd);
571 }
572exit:
fe2caefc
PP		 573 return ERR_PTR(status);
574}
575
576int ocrdma_dealloc_pd(struct ib_pd *ibpd)
577{
578 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 579 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990
NG		 580 struct ocrdma_ucontext *uctx = NULL;
581 int status = 0;
fe2caefc
PP		 582 u64 usr_db;
583
cffce990
NG		 584 uctx = pd->uctx;
585 if (uctx) {
fe2caefc 586 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 587 (pd->id * PAGE_SIZE);
fe2caefc 588 if (pd->dpp_enabled)
43a6b402 589 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 590 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 591 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 592
593 if (is_ucontext_pd(uctx, pd)) {
594 ocrdma_release_ucontext_pd(uctx);
595 return status;
596 }
fe2caefc 597 }
cffce990 598 status = _ocrdma_dealloc_pd(dev, pd);
fe2caefc
PP		 599 return status;
600}
601
1afc0454
NG		 602static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
603 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 604{
605 int status;
fe2caefc 606
fe2caefc
PP		 607 mr->hwmr.fr_mr = 0;
608 mr->hwmr.local_rd = 1;
609 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
610 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
611 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
612 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
613 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
614 mr->hwmr.num_pbls = num_pbls;
615
f99b1649
NG		 616 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
617 if (status)
618 return status;
619
fe2caefc
PP		 620 mr->ibmr.lkey = mr->hwmr.lkey;
621 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
622 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 623 return 0;
fe2caefc
PP		 624}
625
626struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
627{
f99b1649 628 int status;
fe2caefc 629 struct ocrdma_mr *mr;
f99b1649
NG		 630 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
631 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
632
633 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
634 pr_err("%s err, invalid access rights\n", __func__);
635 return ERR_PTR(-EINVAL);
636 }
fe2caefc 637
f99b1649
NG		 638 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
639 if (!mr)
640 return ERR_PTR(-ENOMEM);
641
1afc0454 642 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 643 OCRDMA_ADDR_CHECK_DISABLE);
644 if (status) {
645 kfree(mr);
646 return ERR_PTR(status);
647 }
fe2caefc
PP		 648
649 return &mr->ibmr;
650}
651
652static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
653 struct ocrdma_hw_mr *mr)
654{
655 struct pci_dev *pdev = dev->nic_info.pdev;
656 int i = 0;
657
658 if (mr->pbl_table) {
659 for (i = 0; i < mr->num_pbls; i++) {
660 if (!mr->pbl_table[i].va)
661 continue;
662 dma_free_coherent(&pdev->dev, mr->pbl_size,
663 mr->pbl_table[i].va,
664 mr->pbl_table[i].pa);
665 }
666 kfree(mr->pbl_table);
667 mr->pbl_table = NULL;
668 }
669}
670
1afc0454
NG		 671static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
672 u32 num_pbes)
fe2caefc
PP		 673{
674 u32 num_pbls = 0;
675 u32 idx = 0;
676 int status = 0;
677 u32 pbl_size;
678
679 do {
680 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
681 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
682 status = -EFAULT;
683 break;
684 }
685 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
686 num_pbls = num_pbls / (pbl_size / sizeof(u64));
687 idx++;
1afc0454 688 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 689
690 mr->hwmr.num_pbes = num_pbes;
691 mr->hwmr.num_pbls = num_pbls;
692 mr->hwmr.pbl_size = pbl_size;
693 return status;
694}
695
696static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
697{
698 int status = 0;
699 int i;
700 u32 dma_len = mr->pbl_size;
701 struct pci_dev *pdev = dev->nic_info.pdev;
702 void *va;
703 dma_addr_t pa;
704
705 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
706 mr->num_pbls, GFP_KERNEL);
707
708 if (!mr->pbl_table)
709 return -ENOMEM;
710
711 for (i = 0; i < mr->num_pbls; i++) {
712 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
713 if (!va) {
714 ocrdma_free_mr_pbl_tbl(dev, mr);
715 status = -ENOMEM;
716 break;
717 }
718 memset(va, 0, dma_len);
719 mr->pbl_table[i].va = va;
720 mr->pbl_table[i].pa = pa;
721 }
722 return status;
723}
724
725static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
726 u32 num_pbes)
727{
728 struct ocrdma_pbe *pbe;
729 struct ib_umem_chunk *chunk;
730 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
731 struct ib_umem *umem = mr->umem;
732 int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
733
734 if (!mr->hwmr.num_pbes)
735 return;
736
737 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
738 pbe_cnt = 0;
739
740 shift = ilog2(umem->page_size);
741
742 list_for_each_entry(chunk, &umem->chunk_list, list) {
743 /* get all the dma regions from the chunk. */
744 for (i = 0; i < chunk->nmap; i++) {
745 pages = sg_dma_len(&chunk->page_list[i]) >> shift;
746 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
747 /* store the page address in pbe */
748 pbe->pa_lo =
749 cpu_to_le32(sg_dma_address
750 (&chunk->page_list[i]) +
751 (umem->page_size * pg_cnt));
752 pbe->pa_hi =
753 cpu_to_le32(upper_32_bits
754 ((sg_dma_address
755 (&chunk->page_list[i]) +
756 umem->page_size * pg_cnt)));
757 pbe_cnt += 1;
758 total_num_pbes += 1;
759 pbe++;
760
761 /* if done building pbes, issue the mbx cmd. */
762 if (total_num_pbes == num_pbes)
763 return;
764
765 /* if the given pbl is full storing the pbes,
766 * move to next pbl.
767 */
768 if (pbe_cnt ==
769 (mr->hwmr.pbl_size / sizeof(u64))) {
770 pbl_tbl++;
771 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
772 pbe_cnt = 0;
773 }
774 }
775 }
776 }
777}
778
779struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
780 u64 usr_addr, int acc, struct ib_udata *udata)
781{
782 int status = -ENOMEM;
f99b1649 783 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 784 struct ocrdma_mr *mr;
785 struct ocrdma_pd *pd;
fe2caefc
PP		 786 u32 num_pbes;
787
788 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 789
790 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
791 return ERR_PTR(-EINVAL);
792
793 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
794 if (!mr)
795 return ERR_PTR(status);
fe2caefc
PP		 796 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
797 if (IS_ERR(mr->umem)) {
798 status = -EFAULT;
799 goto umem_err;
800 }
801 num_pbes = ib_umem_page_count(mr->umem);
1afc0454 802 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
fe2caefc
PP		 803 if (status)
804 goto umem_err;
805
806 mr->hwmr.pbe_size = mr->umem->page_size;
807 mr->hwmr.fbo = mr->umem->offset;
808 mr->hwmr.va = usr_addr;
809 mr->hwmr.len = len;
810 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
811 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
812 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
813 mr->hwmr.local_rd = 1;
814 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
815 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
816 if (status)
817 goto umem_err;
818 build_user_pbes(dev, mr, num_pbes);
819 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
820 if (status)
821 goto mbx_err;
fe2caefc
PP		 822 mr->ibmr.lkey = mr->hwmr.lkey;
823 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
824 mr->ibmr.rkey = mr->hwmr.lkey;
825
826 return &mr->ibmr;
827
828mbx_err:
829 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
830umem_err:
831 kfree(mr);
832 return ERR_PTR(status);
833}
834
835int ocrdma_dereg_mr(struct ib_mr *ib_mr)
836{
837 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 838 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc
PP		 839 int status;
840
841 status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
842
9d1878a3 843 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
fe2caefc 844
fe2caefc
PP		 845 /* it could be user registered memory. */
846 if (mr->umem)
847 ib_umem_release(mr->umem);
848 kfree(mr);
849 return status;
850}
851
1afc0454
NG		 852static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
853 struct ib_udata *udata,
fe2caefc
PP		 854 struct ib_ucontext *ib_ctx)
855{
856 int status;
cffce990 857 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
fe2caefc
PP		 858 struct ocrdma_create_cq_uresp uresp;
859
63ea3749 860 memset(&uresp, 0, sizeof(uresp));
fe2caefc 861 uresp.cq_id = cq->id;
43a6b402 862 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 863 uresp.num_pages = 1;
864 uresp.max_hw_cqe = cq->max_hw_cqe;
865 uresp.page_addr[0] = cq->pa;
cffce990 866 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 867 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 868 uresp.phase_change = cq->phase_change ? 1 : 0;
869 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
870 if (status) {
ef99c4c2 871 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 872 __func__, dev->id, cq->id);
fe2caefc
PP		 873 goto err;
874 }
fe2caefc
PP		 875 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
876 if (status)
877 goto err;
878 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
879 if (status) {
880 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
881 goto err;
882 }
883 cq->ucontext = uctx;
884err:
885 return status;
886}
887
888struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
889 struct ib_ucontext *ib_ctx,
890 struct ib_udata *udata)
891{
892 struct ocrdma_cq *cq;
893 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
cffce990
NG		 894 struct ocrdma_ucontext *uctx = NULL;
895 u16 pd_id = 0;
fe2caefc
PP		 896 int status;
897 struct ocrdma_create_cq_ureq ureq;
898
899 if (udata) {
900 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
901 return ERR_PTR(-EFAULT);
902 } else
903 ureq.dpp_cq = 0;
904 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
905 if (!cq)
906 return ERR_PTR(-ENOMEM);
907
908 spin_lock_init(&cq->cq_lock);
909 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 910 INIT_LIST_HEAD(&cq->sq_head);
911 INIT_LIST_HEAD(&cq->rq_head);
ea617626 912 cq->first_arm = true;
fe2caefc 913
cffce990
NG		 914 if (ib_ctx) {
915 uctx = get_ocrdma_ucontext(ib_ctx);
916 pd_id = uctx->cntxt_pd->id;
917 }
918
919 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
fe2caefc
PP		 920 if (status) {
921 kfree(cq);
922 return ERR_PTR(status);
923 }
924 if (ib_ctx) {
1afc0454 925 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
fe2caefc
PP		 926 if (status)
927 goto ctx_err;
928 }
929 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 930 dev->cq_tbl[cq->id] = cq;
fe2caefc
PP		 931 return &cq->ibcq;
932
933ctx_err:
934 ocrdma_mbx_destroy_cq(dev, cq);
935 kfree(cq);
936 return ERR_PTR(status);
937}
938
939int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
940 struct ib_udata *udata)
941{
942 int status = 0;
943 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
944
945 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
946 status = -EINVAL;
947 return status;
948 }
949 ibcq->cqe = new_cnt;
950 return status;
951}
952
ea617626
DS		 953static void ocrdma_flush_cq(struct ocrdma_cq *cq)
954{
955 int cqe_cnt;
956 int valid_count = 0;
957 unsigned long flags;
958
959 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
960 struct ocrdma_cqe *cqe = NULL;
961
962 cqe = cq->va;
963 cqe_cnt = cq->cqe_cnt;
964
965 /* Last irq might have scheduled a polling thread
966 * sync-up with it before hard flushing.
967 */
968 spin_lock_irqsave(&cq->cq_lock, flags);
969 while (cqe_cnt) {
970 if (is_cqe_valid(cq, cqe))
971 valid_count++;
972 cqe++;
973 cqe_cnt--;
974 }
975 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
976 spin_unlock_irqrestore(&cq->cq_lock, flags);
977}
978
fe2caefc
PP		 979int ocrdma_destroy_cq(struct ib_cq *ibcq)
980{
981 int status;
982 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 983 struct ocrdma_eq *eq = NULL;
1afc0454 984 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 985 int pdid = 0;
ea617626 986 u32 irq, indx;
fe2caefc 987
ea617626
DS		 988 dev->cq_tbl[cq->id] = NULL;
989 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
990 if (indx == -EINVAL)
991 BUG();
fe2caefc 992
ea617626
DS		 993 eq = &dev->eq_tbl[indx];
994 irq = ocrdma_get_irq(dev, eq);
995 synchronize_irq(irq);
996 ocrdma_flush_cq(cq);
997
998 status = ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 999 if (cq->ucontext) {
cffce990 1000 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1001 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1002 PAGE_ALIGN(cq->len));
cffce990
NG		 1003 ocrdma_del_mmap(cq->ucontext,
1004 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1005 dev->nic_info.db_page_size);
1006 }
fe2caefc
PP		 1007
1008 kfree(cq);
1009 return status;
1010}
1011
1012static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1013{
1014 int status = -EINVAL;
1015
1016 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1017 dev->qp_tbl[qp->id] = qp;
1018 status = 0;
1019 }
1020 return status;
1021}
1022
1023static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1024{
1025 dev->qp_tbl[qp->id] = NULL;
1026}
1027
1028static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1029 struct ib_qp_init_attr *attrs)
1030{
43a6b402
NG		 1031 if ((attrs->qp_type != IB_QPT_GSI) &&
1032 (attrs->qp_type != IB_QPT_RC) &&
1033 (attrs->qp_type != IB_QPT_UC) &&
1034 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1035 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1036 __func__, dev->id, attrs->qp_type);
fe2caefc
PP		 1037 return -EINVAL;
1038 }
43a6b402
NG		 1039 /* Skip the check for QP1 to support CM size of 128 */
1040 if ((attrs->qp_type != IB_QPT_GSI) &&
1041 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1042 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1043 __func__, dev->id, attrs->cap.max_send_wr);
1044 pr_err("%s(%d) supported send_wr=0x%x\n",
1045 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1046 return -EINVAL;
1047 }
1048 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1049 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1050 __func__, dev->id, attrs->cap.max_recv_wr);
1051 pr_err("%s(%d) supported recv_wr=0x%x\n",
1052 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1053 return -EINVAL;
1054 }
1055 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1056 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1057 __func__, dev->id, attrs->cap.max_inline_data);
1058 pr_err("%s(%d) supported inline data size=0x%x\n",
1059 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1060 return -EINVAL;
1061 }
1062 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1063 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1064 __func__, dev->id, attrs->cap.max_send_sge);
1065 pr_err("%s(%d) supported send_sge=0x%x\n",
1066 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1067 return -EINVAL;
1068 }
1069 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1070 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1071 __func__, dev->id, attrs->cap.max_recv_sge);
1072 pr_err("%s(%d) supported recv_sge=0x%x\n",
1073 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1074 return -EINVAL;
1075 }
1076 /* unprivileged user space cannot create special QP */
1077 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1078 pr_err
fe2caefc
PP		 1079 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1080 __func__, dev->id, attrs->qp_type);
1081 return -EINVAL;
1082 }
1083 /* allow creating only one GSI type of QP */
1084 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1085 pr_err("%s(%d) GSI special QPs already created.\n",
1086 __func__, dev->id);
fe2caefc
PP		 1087 return -EINVAL;
1088 }
1089 /* verify consumer QPs are not trying to use GSI QP's CQ */
1090 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1091 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1092 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1093 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1094 __func__, dev->id);
fe2caefc
PP		 1095 return -EINVAL;
1096 }
1097 }
1098 return 0;
1099}
1100
1101static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1102 struct ib_udata *udata, int dpp_offset,
1103 int dpp_credit_lmt, int srq)
1104{
1105 int status = 0;
1106 u64 usr_db;
1107 struct ocrdma_create_qp_uresp uresp;
1108 struct ocrdma_dev *dev = qp->dev;
1109 struct ocrdma_pd *pd = qp->pd;
1110
1111 memset(&uresp, 0, sizeof(uresp));
1112 usr_db = dev->nic_info.unmapped_db +
1113 (pd->id * dev->nic_info.db_page_size);
1114 uresp.qp_id = qp->id;
1115 uresp.sq_dbid = qp->sq.dbid;
1116 uresp.num_sq_pages = 1;
43a6b402 1117 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
fe2caefc
PP		 1118 uresp.sq_page_addr[0] = qp->sq.pa;
1119 uresp.num_wqe_allocated = qp->sq.max_cnt;
1120 if (!srq) {
1121 uresp.rq_dbid = qp->rq.dbid;
1122 uresp.num_rq_pages = 1;
43a6b402 1123 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
fe2caefc
PP		 1124 uresp.rq_page_addr[0] = qp->rq.pa;
1125 uresp.num_rqe_allocated = qp->rq.max_cnt;
1126 }
1127 uresp.db_page_addr = usr_db;
1128 uresp.db_page_size = dev->nic_info.db_page_size;
2df84fa8
DS		 1129 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1130 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1131 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
fe2caefc
PP		 1132
1133 if (qp->dpp_enabled) {
1134 uresp.dpp_credit = dpp_credit_lmt;
1135 uresp.dpp_offset = dpp_offset;
1136 }
1137 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1138 if (status) {
ef99c4c2 1139 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1140 goto err;
1141 }
1142 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1143 uresp.sq_page_size);
1144 if (status)
1145 goto err;
1146
1147 if (!srq) {
1148 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1149 uresp.rq_page_size);
1150 if (status)
1151 goto rq_map_err;
1152 }
1153 return status;
1154rq_map_err:
1155 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1156err:
1157 return status;
1158}
1159
1160static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1161 struct ocrdma_pd *pd)
1162{
21c3391a 1163 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
fe2caefc
PP		 1164 qp->sq_db = dev->nic_info.db +
1165 (pd->id * dev->nic_info.db_page_size) +
1166 OCRDMA_DB_GEN2_SQ_OFFSET;
1167 qp->rq_db = dev->nic_info.db +
1168 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1169 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1170 } else {
1171 qp->sq_db = dev->nic_info.db +
1172 (pd->id * dev->nic_info.db_page_size) +
1173 OCRDMA_DB_SQ_OFFSET;
1174 qp->rq_db = dev->nic_info.db +
1175 (pd->id * dev->nic_info.db_page_size) +
1176 OCRDMA_DB_RQ_OFFSET;
1177 }
1178}
1179
1180static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1181{
1182 qp->wqe_wr_id_tbl =
1183 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1184 GFP_KERNEL);
1185 if (qp->wqe_wr_id_tbl == NULL)
1186 return -ENOMEM;
1187 qp->rqe_wr_id_tbl =
1188 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1189 if (qp->rqe_wr_id_tbl == NULL)
1190 return -ENOMEM;
1191
1192 return 0;
1193}
1194
1195static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1196 struct ocrdma_pd *pd,
1197 struct ib_qp_init_attr *attrs)
1198{
1199 qp->pd = pd;
1200 spin_lock_init(&qp->q_lock);
1201 INIT_LIST_HEAD(&qp->sq_entry);
1202 INIT_LIST_HEAD(&qp->rq_entry);
1203
1204 qp->qp_type = attrs->qp_type;
1205 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1206 qp->max_inline_data = attrs->cap.max_inline_data;
1207 qp->sq.max_sges = attrs->cap.max_send_sge;
1208 qp->rq.max_sges = attrs->cap.max_recv_sge;
1209 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1210 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1211}
1212
fe2caefc
PP		 1213
1214static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1215 struct ib_qp_init_attr *attrs)
1216{
1217 if (attrs->qp_type == IB_QPT_GSI) {
1218 dev->gsi_qp_created = 1;
1219 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1220 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1221 }
1222}
1223
1224struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1225 struct ib_qp_init_attr *attrs,
1226 struct ib_udata *udata)
1227{
1228 int status;
1229 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1230 struct ocrdma_qp *qp;
f99b1649 1231 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1232 struct ocrdma_create_qp_ureq ureq;
1233 u16 dpp_credit_lmt, dpp_offset;
1234
1235 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1236 if (status)
1237 goto gen_err;
1238
1239 memset(&ureq, 0, sizeof(ureq));
1240 if (udata) {
1241 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1242 return ERR_PTR(-EFAULT);
1243 }
1244 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1245 if (!qp) {
1246 status = -ENOMEM;
1247 goto gen_err;
1248 }
1249 qp->dev = dev;
1250 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1251 if (udata == NULL)
1252 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1253 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1254
1255 mutex_lock(&dev->dev_lock);
1256 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1257 ureq.dpp_cq_id,
1258 &dpp_offset, &dpp_credit_lmt);
1259 if (status)
1260 goto mbx_err;
1261
1262 /* user space QP's wr_id table are managed in library */
1263 if (udata == NULL) {
fe2caefc
PP		 1264 status = ocrdma_alloc_wr_id_tbl(qp);
1265 if (status)
1266 goto map_err;
1267 }
1268
1269 status = ocrdma_add_qpn_map(dev, qp);
1270 if (status)
1271 goto map_err;
1272 ocrdma_set_qp_db(dev, qp, pd);
1273 if (udata) {
1274 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1275 dpp_credit_lmt,
1276 (attrs->srq != NULL));
1277 if (status)
1278 goto cpy_err;
1279 }
1280 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1281 qp->ibqp.qp_num = qp->id;
fe2caefc
PP		 1282 mutex_unlock(&dev->dev_lock);
1283 return &qp->ibqp;
1284
1285cpy_err:
1286 ocrdma_del_qpn_map(dev, qp);
1287map_err:
1288 ocrdma_mbx_destroy_qp(dev, qp);
1289mbx_err:
1290 mutex_unlock(&dev->dev_lock);
1291 kfree(qp->wqe_wr_id_tbl);
1292 kfree(qp->rqe_wr_id_tbl);
1293 kfree(qp);
ef99c4c2 1294 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc
PP		 1295gen_err:
1296 return ERR_PTR(status);
1297}
1298
45e86b33
NG		 1299
1300static void ocrdma_flush_rq_db(struct ocrdma_qp *qp)
1301{
1302 if (qp->db_cache) {
1303 u32 val = qp->rq.dbid | (qp->db_cache <<
2df84fa8 1304 OCRDMA_DB_RQ_SHIFT);
45e86b33
NG		 1305 iowrite32(val, qp->rq_db);
1306 qp->db_cache = 0;
1307 }
1308}
1309
fe2caefc
PP		 1310int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1311 int attr_mask)
1312{
1313 int status = 0;
1314 struct ocrdma_qp *qp;
1315 struct ocrdma_dev *dev;
1316 enum ib_qp_state old_qps;
1317
1318 qp = get_ocrdma_qp(ibqp);
1319 dev = qp->dev;
1320 if (attr_mask & IB_QP_STATE)
057729cb 1321 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1322 /* if new and previous states are same hw doesn't need to
1323 * know about it.
1324 */
1325 if (status < 0)
1326 return status;
bc1b04ab 1327 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
45e86b33
NG		 1328 if (!status && attr_mask & IB_QP_STATE && attr->qp_state == IB_QPS_RTR)
1329 ocrdma_flush_rq_db(qp);
1330
fe2caefc
PP		 1331 return status;
1332}
1333
1334int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1335 int attr_mask, struct ib_udata *udata)
1336{
1337 unsigned long flags;
1338 int status = -EINVAL;
1339 struct ocrdma_qp *qp;
1340 struct ocrdma_dev *dev;
1341 enum ib_qp_state old_qps, new_qps;
1342
1343 qp = get_ocrdma_qp(ibqp);
1344 dev = qp->dev;
1345
1346 /* syncronize with multiple context trying to change, retrive qps */
1347 mutex_lock(&dev->dev_lock);
1348 /* syncronize with wqe, rqe posting and cqe processing contexts */
1349 spin_lock_irqsave(&qp->q_lock, flags);
1350 old_qps = get_ibqp_state(qp->state);
1351 if (attr_mask & IB_QP_STATE)
1352 new_qps = attr->qp_state;
1353 else
1354 new_qps = old_qps;
1355 spin_unlock_irqrestore(&qp->q_lock, flags);
1356
dd5f03be 1357 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
37721d85 1358 IB_LINK_LAYER_ETHERNET)) {
ef99c4c2
NG		 1359 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1360 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1361 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1362 old_qps, new_qps);
fe2caefc
PP		 1363 goto param_err;
1364 }
1365
1366 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1367 if (status > 0)
1368 status = 0;
1369param_err:
1370 mutex_unlock(&dev->dev_lock);
1371 return status;
1372}
1373
1374static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1375{
1376 switch (mtu) {
1377 case 256:
1378 return IB_MTU_256;
1379 case 512:
1380 return IB_MTU_512;
1381 case 1024:
1382 return IB_MTU_1024;
1383 case 2048:
1384 return IB_MTU_2048;
1385 case 4096:
1386 return IB_MTU_4096;
1387 default:
1388 return IB_MTU_1024;
1389 }
1390}
1391
1392static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1393{
1394 int ib_qp_acc_flags = 0;
1395
1396 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1397 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1398 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1399 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1400 return ib_qp_acc_flags;
1401}
1402
1403int ocrdma_query_qp(struct ib_qp *ibqp,
1404 struct ib_qp_attr *qp_attr,
1405 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1406{
1407 int status;
1408 u32 qp_state;
1409 struct ocrdma_qp_params params;
1410 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1411 struct ocrdma_dev *dev = qp->dev;
1412
1413 memset(&params, 0, sizeof(params));
1414 mutex_lock(&dev->dev_lock);
1415 status = ocrdma_mbx_query_qp(dev, qp, &params);
1416 mutex_unlock(&dev->dev_lock);
1417 if (status)
1418 goto mbx_err;
1419 qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
1420 qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
1421 qp_attr->path_mtu =
1422 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1423 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1424 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1425 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1426 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1427 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1428 qp_attr->dest_qp_num =
1429 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1430
1431 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1432 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1433 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1434 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1435 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1436 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc
PP		 1437 qp_init_attr->cap = qp_attr->cap;
1438 memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
1439 sizeof(params.dgid));
1440 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1441 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1442 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1443 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1444 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1445 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1446 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
a61d93d9 1447 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
fe2caefc
PP		 1448 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1449
1450 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1451 qp_attr->ah_attr.port_num = 1;
1452 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1453 OCRDMA_QP_PARAMS_SL_MASK) >>
1454 OCRDMA_QP_PARAMS_SL_SHIFT;
1455 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1456 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1457 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1458 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1459 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1460 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1461 qp_attr->retry_cnt =
1462 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1463 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1464 qp_attr->min_rnr_timer = 0;
1465 qp_attr->pkey_index = 0;
1466 qp_attr->port_num = 1;
1467 qp_attr->ah_attr.src_path_bits = 0;
1468 qp_attr->ah_attr.static_rate = 0;
1469 qp_attr->alt_pkey_index = 0;
1470 qp_attr->alt_port_num = 0;
1471 qp_attr->alt_timeout = 0;
1472 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1473 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1474 OCRDMA_QP_PARAMS_STATE_SHIFT;
1475 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1476 qp_attr->max_dest_rd_atomic =
1477 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1478 qp_attr->max_rd_atomic =
1479 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1480 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1481 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1482mbx_err:
1483 return status;
1484}
1485
1486static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
1487{
1488 int i = idx / 32;
1489 unsigned int mask = (1 << (idx % 32));
1490
1491 if (srq->idx_bit_fields[i] & mask)
1492 srq->idx_bit_fields[i] &= ~mask;
1493 else
1494 srq->idx_bit_fields[i] |= mask;
1495}
1496
1497static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1498{
43a6b402 1499 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1500}
1501
1502static int is_hw_sq_empty(struct ocrdma_qp *qp)
1503{
43a6b402 1504 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1505}
1506
1507static int is_hw_rq_empty(struct ocrdma_qp *qp)
1508{
43a6b402 1509 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1510}
1511
1512static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1513{
1514 return q->va + (q->head * q->entry_size);
1515}
1516
1517static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1518 u32 idx)
1519{
1520 return q->va + (idx * q->entry_size);
1521}
1522
1523static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1524{
1525 q->head = (q->head + 1) & q->max_wqe_idx;
1526}
1527
1528static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1529{
1530 q->tail = (q->tail + 1) & q->max_wqe_idx;
1531}
1532
1533/* discard the cqe for a given QP */
1534static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1535{
1536 unsigned long cq_flags;
1537 unsigned long flags;
1538 int discard_cnt = 0;
1539 u32 cur_getp, stop_getp;
1540 struct ocrdma_cqe *cqe;
1541 u32 qpn = 0;
1542
1543 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1544
1545 /* traverse through the CQEs in the hw CQ,
1546 * find the matching CQE for a given qp,
1547 * mark the matching one discarded by clearing qpn.
1548 * ring the doorbell in the poll_cq() as
1549 * we don't complete out of order cqe.
1550 */
1551
1552 cur_getp = cq->getp;
1553 /* find upto when do we reap the cq. */
1554 stop_getp = cur_getp;
1555 do {
1556 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1557 break;
1558
1559 cqe = cq->va + cur_getp;
1560 /* if (a) done reaping whole hw cq, or
1561 * (b) qp_xq becomes empty.
1562 * then exit
1563 */
1564 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1565 /* if previously discarded cqe found, skip that too. */
1566 /* check for matching qp */
1567 if (qpn == 0 || qpn != qp->id)
1568 goto skip_cqe;
1569
1570 /* mark cqe discarded so that it is not picked up later
1571 * in the poll_cq().
1572 */
1573 discard_cnt += 1;
1574 cqe->cmn.qpn = 0;
f99b1649 1575 if (is_cqe_for_sq(cqe)) {
fe2caefc 1576 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1577 } else {
fe2caefc
PP		 1578 if (qp->srq) {
1579 spin_lock_irqsave(&qp->srq->q_lock, flags);
1580 ocrdma_hwq_inc_tail(&qp->srq->rq);
1581 ocrdma_srq_toggle_bit(qp->srq, cur_getp);
1582 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1583
f99b1649 1584 } else {
fe2caefc 1585 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1586 }
fe2caefc
PP		 1587 }
1588skip_cqe:
1589 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1590 } while (cur_getp != stop_getp);
1591 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1592}
1593
f11220ee 1594void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1595{
1596 int found = false;
1597 unsigned long flags;
1598 struct ocrdma_dev *dev = qp->dev;
1599 /* sync with any active CQ poll */
1600
1601 spin_lock_irqsave(&dev->flush_q_lock, flags);
1602 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1603 if (found)
1604 list_del(&qp->sq_entry);
1605 if (!qp->srq) {
1606 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1607 if (found)
1608 list_del(&qp->rq_entry);
1609 }
1610 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1611}
1612
1613int ocrdma_destroy_qp(struct ib_qp *ibqp)
1614{
1615 int status;
1616 struct ocrdma_pd *pd;
1617 struct ocrdma_qp *qp;
1618 struct ocrdma_dev *dev;
1619 struct ib_qp_attr attrs;
1620 int attr_mask = IB_QP_STATE;
d19081e0 1621 unsigned long flags;
fe2caefc
PP		 1622
1623 qp = get_ocrdma_qp(ibqp);
1624 dev = qp->dev;
1625
1626 attrs.qp_state = IB_QPS_ERR;
1627 pd = qp->pd;
1628
1629 /* change the QP state to ERROR */
1630 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1631
1632 /* ensure that CQEs for newly created QP (whose id may be same with
1633 * one which just getting destroyed are same), dont get
1634 * discarded until the old CQEs are discarded.
1635 */
1636 mutex_lock(&dev->dev_lock);
1637 status = ocrdma_mbx_destroy_qp(dev, qp);
1638
1639 /*
1640 * acquire CQ lock while destroy is in progress, in order to
1641 * protect against proessing in-flight CQEs for this QP.
1642 */
d19081e0 1643 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
fe2caefc 1644 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0 1645 spin_lock(&qp->rq_cq->cq_lock);
fe2caefc
PP		 1646
1647 ocrdma_del_qpn_map(dev, qp);
1648
1649 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0
DC		 1650 spin_unlock(&qp->rq_cq->cq_lock);
1651 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1652
1653 if (!pd->uctx) {
1654 ocrdma_discard_cqes(qp, qp->sq_cq);
1655 ocrdma_discard_cqes(qp, qp->rq_cq);
1656 }
1657 mutex_unlock(&dev->dev_lock);
1658
1659 if (pd->uctx) {
43a6b402
NG		 1660 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1661 PAGE_ALIGN(qp->sq.len));
fe2caefc 1662 if (!qp->srq)
43a6b402
NG		 1663 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1664 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1665 }
1666
1667 ocrdma_del_flush_qp(qp);
1668
fe2caefc
PP		 1669 kfree(qp->wqe_wr_id_tbl);
1670 kfree(qp->rqe_wr_id_tbl);
1671 kfree(qp);
1672 return status;
1673}
1674
1afc0454
NG		 1675static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1676 struct ib_udata *udata)
fe2caefc
PP		 1677{
1678 int status;
1679 struct ocrdma_create_srq_uresp uresp;
1680
63ea3749 1681 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1682 uresp.rq_dbid = srq->rq.dbid;
1683 uresp.num_rq_pages = 1;
1684 uresp.rq_page_addr[0] = srq->rq.pa;
1685 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1686 uresp.db_page_addr = dev->nic_info.unmapped_db +
1687 (srq->pd->id * dev->nic_info.db_page_size);
1688 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1689 uresp.num_rqe_allocated = srq->rq.max_cnt;
21c3391a 1690 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
f11220ee 1691 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1692 uresp.db_shift = 24;
1693 } else {
1694 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1695 uresp.db_shift = 16;
1696 }
1697
1698 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1699 if (status)
1700 return status;
1701 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1702 uresp.rq_page_size);
1703 if (status)
1704 return status;
1705 return status;
1706}
1707
1708struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1709 struct ib_srq_init_attr *init_attr,
1710 struct ib_udata *udata)
1711{
1712 int status = -ENOMEM;
1713 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 1714 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1715 struct ocrdma_srq *srq;
1716
1717 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1718 return ERR_PTR(-EINVAL);
1719 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1720 return ERR_PTR(-EINVAL);
1721
1722 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1723 if (!srq)
1724 return ERR_PTR(status);
1725
1726 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1727 srq->pd = pd;
1728 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1729 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc
PP		 1730 if (status)
1731 goto err;
1732
1733 if (udata == NULL) {
1734 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1735 GFP_KERNEL);
1736 if (srq->rqe_wr_id_tbl == NULL)
1737 goto arm_err;
1738
1739 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1740 (srq->rq.max_cnt % 32 ? 1 : 0);
1741 srq->idx_bit_fields =
1742 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1743 if (srq->idx_bit_fields == NULL)
1744 goto arm_err;
1745 memset(srq->idx_bit_fields, 0xff,
1746 srq->bit_fields_len * sizeof(u32));
1747 }
1748
1749 if (init_attr->attr.srq_limit) {
1750 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1751 if (status)
1752 goto arm_err;
1753 }
1754
fe2caefc 1755 if (udata) {
1afc0454 1756 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1757 if (status)
1758 goto arm_err;
1759 }
1760
fe2caefc
PP		 1761 return &srq->ibsrq;
1762
1763arm_err:
1764 ocrdma_mbx_destroy_srq(dev, srq);
1765err:
1766 kfree(srq->rqe_wr_id_tbl);
1767 kfree(srq->idx_bit_fields);
1768 kfree(srq);
1769 return ERR_PTR(status);
1770}
1771
1772int ocrdma_modify_srq(struct ib_srq *ibsrq,
1773 struct ib_srq_attr *srq_attr,
1774 enum ib_srq_attr_mask srq_attr_mask,
1775 struct ib_udata *udata)
1776{
1777 int status = 0;
1778 struct ocrdma_srq *srq;
fe2caefc
PP		 1779
1780 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1781 if (srq_attr_mask & IB_SRQ_MAX_WR)
1782 status = -EINVAL;
1783 else
1784 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1785 return status;
1786}
1787
1788int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1789{
1790 int status;
1791 struct ocrdma_srq *srq;
fe2caefc
PP		 1792
1793 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1794 status = ocrdma_mbx_query_srq(srq, srq_attr);
1795 return status;
1796}
1797
1798int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1799{
1800 int status;
1801 struct ocrdma_srq *srq;
1afc0454 1802 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1803
1804 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1805
1806 status = ocrdma_mbx_destroy_srq(dev, srq);
1807
1808 if (srq->pd->uctx)
43a6b402
NG		 1809 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1810 PAGE_ALIGN(srq->rq.len));
fe2caefc 1811
fe2caefc
PP		 1812 kfree(srq->idx_bit_fields);
1813 kfree(srq->rqe_wr_id_tbl);
1814 kfree(srq);
1815 return status;
1816}
1817
1818/* unprivileged verbs and their support functions. */
1819static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1820 struct ocrdma_hdr_wqe *hdr,
1821 struct ib_send_wr *wr)
1822{
1823 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1824 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1825 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
1826
1827 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
1828 if (qp->qp_type == IB_QPT_GSI)
1829 ud_hdr->qkey = qp->qkey;
1830 else
1831 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1832 ud_hdr->rsvd_ahid = ah->id;
1833}
1834
1835static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1836 struct ocrdma_sge *sge, int num_sge,
1837 struct ib_sge *sg_list)
1838{
1839 int i;
1840
1841 for (i = 0; i < num_sge; i++) {
1842 sge[i].lrkey = sg_list[i].lkey;
1843 sge[i].addr_lo = sg_list[i].addr;
1844 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1845 sge[i].len = sg_list[i].length;
1846 hdr->total_len += sg_list[i].length;
1847 }
1848 if (num_sge == 0)
1849 memset(sge, 0, sizeof(*sge));
1850}
1851
117e6dd1
NG		 1852static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1853{
1854 uint32_t total_len = 0, i;
1855
1856 for (i = 0; i < num_sge; i++)
1857 total_len += sg_list[i].length;
1858 return total_len;
1859}
1860
1861
fe2caefc
PP		 1862static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1863 struct ocrdma_hdr_wqe *hdr,
1864 struct ocrdma_sge *sge,
1865 struct ib_send_wr *wr, u32 wqe_size)
1866{
117e6dd1
NG		 1867 int i;
1868 char *dpp_addr;
1869
43a6b402 1870 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1871 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1872 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2
NG		 1873 pr_err("%s() supported_len=0x%x,\n"
1874 " unspported len req=0x%x\n", __func__,
117e6dd1 1875 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1876 return -EINVAL;
1877 }
117e6dd1
NG		 1878 dpp_addr = (char *)sge;
1879 for (i = 0; i < wr->num_sge; i++) {
1880 memcpy(dpp_addr,
1881 (void *)(unsigned long)wr->sg_list[i].addr,
1882 wr->sg_list[i].length);
1883 dpp_addr += wr->sg_list[i].length;
1884 }
1885
fe2caefc 1886 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1887 if (0 == hdr->total_len)
43a6b402 1888 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1889 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1890 } else {
1891 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1892 if (wr->num_sge)
1893 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
1894 else
1895 wqe_size += sizeof(struct ocrdma_sge);
1896 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1897 }
1898 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1899 return 0;
1900}
1901
1902static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1903 struct ib_send_wr *wr)
1904{
1905 int status;
1906 struct ocrdma_sge *sge;
1907 u32 wqe_size = sizeof(*hdr);
1908
1909 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
1910 ocrdma_build_ud_hdr(qp, hdr, wr);
1911 sge = (struct ocrdma_sge *)(hdr + 2);
1912 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 1913 } else {
fe2caefc 1914 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 1915 }
fe2caefc
PP		 1916
1917 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1918 return status;
1919}
1920
1921static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1922 struct ib_send_wr *wr)
1923{
1924 int status;
1925 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1926 struct ocrdma_sge *sge = ext_rw + 1;
1927 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
1928
1929 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1930 if (status)
1931 return status;
1932 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1933 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1934 ext_rw->lrkey = wr->wr.rdma.rkey;
1935 ext_rw->len = hdr->total_len;
1936 return 0;
1937}
1938
1939static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1940 struct ib_send_wr *wr)
1941{
1942 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1943 struct ocrdma_sge *sge = ext_rw + 1;
1944 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
1945 sizeof(struct ocrdma_hdr_wqe);
1946
1947 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1948 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1949 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
1950 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1951
1952 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1953 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1954 ext_rw->lrkey = wr->wr.rdma.rkey;
1955 ext_rw->len = hdr->total_len;
1956}
1957
7c33880c
NG		 1958static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
1959 struct ocrdma_hw_mr *hwmr)
1960{
1961 int i;
1962 u64 buf_addr = 0;
1963 int num_pbes;
1964 struct ocrdma_pbe *pbe;
1965
1966 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1967 num_pbes = 0;
1968
1969 /* go through the OS phy regions & fill hw pbe entries into pbls. */
1970 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
1971 /* number of pbes can be more for one OS buf, when
1972 * buffers are of different sizes.
1973 * split the ib_buf to one or more pbes.
1974 */
1975 buf_addr = wr->wr.fast_reg.page_list->page_list[i];
1976 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
1977 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
1978 num_pbes += 1;
1979 pbe++;
1980
1981 /* if the pbl is full storing the pbes,
1982 * move to next pbl.
1983 */
1984 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
1985 pbl_tbl++;
1986 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1987 }
1988 }
1989 return;
1990}
1991
1992static int get_encoded_page_size(int pg_sz)
1993{
1994 /* Max size is 256M 4096 << 16 */
1995 int i = 0;
1996 for (; i < 17; i++)
1997 if (pg_sz == (4096 << i))
1998 break;
1999 return i;
2000}
2001
2002
2003static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2004 struct ib_send_wr *wr)
2005{
2006 u64 fbo;
2007 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2008 struct ocrdma_mr *mr;
2009 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2010
2011 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2012
d5e3f378 2013 if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr)
7c33880c
NG		 2014 return -EINVAL;
2015
2016 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2017 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2018
2019 if (wr->wr.fast_reg.page_list_len == 0)
2020 BUG();
2021 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
2022 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2023 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
2024 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2025 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
2026 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2027 hdr->lkey = wr->wr.fast_reg.rkey;
2028 hdr->total_len = wr->wr.fast_reg.length;
2029
2030 fbo = wr->wr.fast_reg.iova_start -
2031 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
2032
2033 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
2034 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
2035 fast_reg->fbo_hi = upper_32_bits(fbo);
2036 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2037 fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
2038 fast_reg->size_sge =
2039 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
33ccbd85 2040 mr = (struct ocrdma_mr *) (unsigned long) qp->dev->stag_arr[(hdr->lkey >> 8) &
7c33880c
NG		 2041 (OCRDMA_MAX_STAG - 1)];
2042 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2043 return 0;
2044}
2045
fe2caefc
PP		 2046static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2047{
2df84fa8 2048 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
fe2caefc
PP		 2049
2050 iowrite32(val, qp->sq_db);
2051}
2052
2053int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2054 struct ib_send_wr **bad_wr)
2055{
2056 int status = 0;
2057 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2058 struct ocrdma_hdr_wqe *hdr;
2059 unsigned long flags;
2060
2061 spin_lock_irqsave(&qp->q_lock, flags);
2062 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2063 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2064 *bad_wr = wr;
fe2caefc
PP		 2065 return -EINVAL;
2066 }
2067
2068 while (wr) {
2069 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2070 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2071 *bad_wr = wr;
fe2caefc
PP		 2072 status = -ENOMEM;
2073 break;
2074 }
2075 hdr = ocrdma_hwq_head(&qp->sq);
2076 hdr->cw = 0;
2b51a9b9 2077 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2078 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2079 if (wr->send_flags & IB_SEND_FENCE)
2080 hdr->cw |=
2081 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2082 if (wr->send_flags & IB_SEND_SOLICITED)
2083 hdr->cw |=
2084 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2085 hdr->total_len = 0;
2086 switch (wr->opcode) {
2087 case IB_WR_SEND_WITH_IMM:
2088 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2089 hdr->immdt = ntohl(wr->ex.imm_data);
2090 case IB_WR_SEND:
2091 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2092 ocrdma_build_send(qp, hdr, wr);
2093 break;
2094 case IB_WR_SEND_WITH_INV:
2095 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2096 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2097 hdr->lkey = wr->ex.invalidate_rkey;
2098 status = ocrdma_build_send(qp, hdr, wr);
2099 break;
2100 case IB_WR_RDMA_WRITE_WITH_IMM:
2101 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2102 hdr->immdt = ntohl(wr->ex.imm_data);
2103 case IB_WR_RDMA_WRITE:
2104 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2105 status = ocrdma_build_write(qp, hdr, wr);
2106 break;
2107 case IB_WR_RDMA_READ_WITH_INV:
2108 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2109 case IB_WR_RDMA_READ:
2110 ocrdma_build_read(qp, hdr, wr);
2111 break;
2112 case IB_WR_LOCAL_INV:
2113 hdr->cw |=
2114 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2115 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2116 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2117 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2118 hdr->lkey = wr->ex.invalidate_rkey;
2119 break;
7c33880c
NG		 2120 case IB_WR_FAST_REG_MR:
2121 status = ocrdma_build_fr(qp, hdr, wr);
2122 break;
fe2caefc
PP		 2123 default:
2124 status = -EINVAL;
2125 break;
2126 }
2127 if (status) {
2128 *bad_wr = wr;
2129 break;
2130 }
2b51a9b9 2131 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2132 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2133 else
2134 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2135 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2136 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2137 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2138 /* make sure wqe is written before adapter can access it */
2139 wmb();
2140 /* inform hw to start processing it */
2141 ocrdma_ring_sq_db(qp);
2142
2143 /* update pointer, counter for next wr */
2144 ocrdma_hwq_inc_head(&qp->sq);
2145 wr = wr->next;
2146 }
2147 spin_unlock_irqrestore(&qp->q_lock, flags);
2148 return status;
2149}
2150
2151static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2152{
2df84fa8 2153 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
fe2caefc 2154
2df84fa8 2155 iowrite32(val, qp->rq_db);
fe2caefc
PP		 2156}
2157
2158static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2159 u16 tag)
2160{
2161 u32 wqe_size = 0;
2162 struct ocrdma_sge *sge;
2163 if (wr->num_sge)
2164 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2165 else
2166 wqe_size = sizeof(*sge) + sizeof(*rqe);
2167
2168 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2169 OCRDMA_WQE_SIZE_SHIFT);
2170 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2171 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2172 rqe->total_len = 0;
2173 rqe->rsvd_tag = tag;
2174 sge = (struct ocrdma_sge *)(rqe + 1);
2175 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2176 ocrdma_cpu_to_le32(rqe, wqe_size);
2177}
2178
2179int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2180 struct ib_recv_wr **bad_wr)
2181{
2182 int status = 0;
2183 unsigned long flags;
2184 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2185 struct ocrdma_hdr_wqe *rqe;
2186
2187 spin_lock_irqsave(&qp->q_lock, flags);
2188 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2189 spin_unlock_irqrestore(&qp->q_lock, flags);
2190 *bad_wr = wr;
2191 return -EINVAL;
2192 }
2193 while (wr) {
2194 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2195 wr->num_sge > qp->rq.max_sges) {
2196 *bad_wr = wr;
2197 status = -ENOMEM;
2198 break;
2199 }
2200 rqe = ocrdma_hwq_head(&qp->rq);
2201 ocrdma_build_rqe(rqe, wr, 0);
2202
2203 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2204 /* make sure rqe is written before adapter can access it */
2205 wmb();
2206
2207 /* inform hw to start processing it */
2208 ocrdma_ring_rq_db(qp);
2209
2210 /* update pointer, counter for next wr */
2211 ocrdma_hwq_inc_head(&qp->rq);
2212 wr = wr->next;
2213 }
2214 spin_unlock_irqrestore(&qp->q_lock, flags);
2215 return status;
2216}
2217
2218/* cqe for srq's rqe can potentially arrive out of order.
2219 * index gives the entry in the shadow table where to store
2220 * the wr_id. tag/index is returned in cqe to reference back
2221 * for a given rqe.
2222 */
2223static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2224{
2225 int row = 0;
2226 int indx = 0;
2227
2228 for (row = 0; row < srq->bit_fields_len; row++) {
2229 if (srq->idx_bit_fields[row]) {
2230 indx = ffs(srq->idx_bit_fields[row]);
2231 indx = (row * 32) + (indx - 1);
2232 if (indx >= srq->rq.max_cnt)
2233 BUG();
2234 ocrdma_srq_toggle_bit(srq, indx);
2235 break;
2236 }
2237 }
2238
2239 if (row == srq->bit_fields_len)
2240 BUG();
2241 return indx;
2242}
2243
2244static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2245{
2246 u32 val = srq->rq.dbid | (1 << 16);
2247
2248 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2249}
2250
2251int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2252 struct ib_recv_wr **bad_wr)
2253{
2254 int status = 0;
2255 unsigned long flags;
2256 struct ocrdma_srq *srq;
2257 struct ocrdma_hdr_wqe *rqe;
2258 u16 tag;
2259
2260 srq = get_ocrdma_srq(ibsrq);
2261
2262 spin_lock_irqsave(&srq->q_lock, flags);
2263 while (wr) {
2264 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2265 wr->num_sge > srq->rq.max_sges) {
2266 status = -ENOMEM;
2267 *bad_wr = wr;
2268 break;
2269 }
2270 tag = ocrdma_srq_get_idx(srq);
2271 rqe = ocrdma_hwq_head(&srq->rq);
2272 ocrdma_build_rqe(rqe, wr, tag);
2273
2274 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2275 /* make sure rqe is written before adapter can perform DMA */
2276 wmb();
2277 /* inform hw to start processing it */
2278 ocrdma_ring_srq_db(srq);
2279 /* update pointer, counter for next wr */
2280 ocrdma_hwq_inc_head(&srq->rq);
2281 wr = wr->next;
2282 }
2283 spin_unlock_irqrestore(&srq->q_lock, flags);
2284 return status;
2285}
2286
2287static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2288{
f99b1649 2289 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2290
2291 switch (status) {
2292 case OCRDMA_CQE_GENERAL_ERR:
2293 ibwc_status = IB_WC_GENERAL_ERR;
2294 break;
2295 case OCRDMA_CQE_LOC_LEN_ERR:
2296 ibwc_status = IB_WC_LOC_LEN_ERR;
2297 break;
2298 case OCRDMA_CQE_LOC_QP_OP_ERR:
2299 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2300 break;
2301 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2302 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2303 break;
2304 case OCRDMA_CQE_LOC_PROT_ERR:
2305 ibwc_status = IB_WC_LOC_PROT_ERR;
2306 break;
2307 case OCRDMA_CQE_WR_FLUSH_ERR:
2308 ibwc_status = IB_WC_WR_FLUSH_ERR;
2309 break;
2310 case OCRDMA_CQE_MW_BIND_ERR:
2311 ibwc_status = IB_WC_MW_BIND_ERR;
2312 break;
2313 case OCRDMA_CQE_BAD_RESP_ERR:
2314 ibwc_status = IB_WC_BAD_RESP_ERR;
2315 break;
2316 case OCRDMA_CQE_LOC_ACCESS_ERR:
2317 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2318 break;
2319 case OCRDMA_CQE_REM_INV_REQ_ERR:
2320 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2321 break;
2322 case OCRDMA_CQE_REM_ACCESS_ERR:
2323 ibwc_status = IB_WC_REM_ACCESS_ERR;
2324 break;
2325 case OCRDMA_CQE_REM_OP_ERR:
2326 ibwc_status = IB_WC_REM_OP_ERR;
2327 break;
2328 case OCRDMA_CQE_RETRY_EXC_ERR:
2329 ibwc_status = IB_WC_RETRY_EXC_ERR;
2330 break;
2331 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2332 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2333 break;
2334 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2335 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2336 break;
2337 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2338 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2339 break;
2340 case OCRDMA_CQE_REM_ABORT_ERR:
2341 ibwc_status = IB_WC_REM_ABORT_ERR;
2342 break;
2343 case OCRDMA_CQE_INV_EECN_ERR:
2344 ibwc_status = IB_WC_INV_EECN_ERR;
2345 break;
2346 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2347 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2348 break;
2349 case OCRDMA_CQE_FATAL_ERR:
2350 ibwc_status = IB_WC_FATAL_ERR;
2351 break;
2352 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2353 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2354 break;
2355 default:
2356 ibwc_status = IB_WC_GENERAL_ERR;
2357 break;
2b50176d 2358 }
fe2caefc
PP		 2359 return ibwc_status;
2360}
2361
2362static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2363 u32 wqe_idx)
2364{
2365 struct ocrdma_hdr_wqe *hdr;
2366 struct ocrdma_sge *rw;
2367 int opcode;
2368
2369 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2370
2371 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2372 /* Undo the hdr->cw swap */
2373 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2374 switch (opcode) {
2375 case OCRDMA_WRITE:
2376 ibwc->opcode = IB_WC_RDMA_WRITE;
2377 break;
2378 case OCRDMA_READ:
2379 rw = (struct ocrdma_sge *)(hdr + 1);
2380 ibwc->opcode = IB_WC_RDMA_READ;
2381 ibwc->byte_len = rw->len;
2382 break;
2383 case OCRDMA_SEND:
2384 ibwc->opcode = IB_WC_SEND;
2385 break;
7c33880c
NG		 2386 case OCRDMA_FR_MR:
2387 ibwc->opcode = IB_WC_FAST_REG_MR;
2388 break;
fe2caefc
PP		 2389 case OCRDMA_LKEY_INV:
2390 ibwc->opcode = IB_WC_LOCAL_INV;
2391 break;
2392 default:
2393 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2394 pr_err("%s() invalid opcode received = 0x%x\n",
2395 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2396 break;
2b50176d 2397 }
fe2caefc
PP		 2398}
2399
2400static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2401 struct ocrdma_cqe *cqe)
2402{
2403 if (is_cqe_for_sq(cqe)) {
2404 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2405 cqe->flags_status_srcqpn) &
2406 ~OCRDMA_CQE_STATUS_MASK);
2407 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2408 cqe->flags_status_srcqpn) |
2409 (OCRDMA_CQE_WR_FLUSH_ERR <<
2410 OCRDMA_CQE_STATUS_SHIFT));
2411 } else {
2412 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2413 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2414 cqe->flags_status_srcqpn) &
2415 ~OCRDMA_CQE_UD_STATUS_MASK);
2416 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2417 cqe->flags_status_srcqpn) |
2418 (OCRDMA_CQE_WR_FLUSH_ERR <<
2419 OCRDMA_CQE_UD_STATUS_SHIFT));
2420 } else {
2421 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2422 cqe->flags_status_srcqpn) &
2423 ~OCRDMA_CQE_STATUS_MASK);
2424 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2425 cqe->flags_status_srcqpn) |
2426 (OCRDMA_CQE_WR_FLUSH_ERR <<
2427 OCRDMA_CQE_STATUS_SHIFT));
2428 }
2429 }
2430}
2431
2432static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2433 struct ocrdma_qp *qp, int status)
2434{
2435 bool expand = false;
2436
2437 ibwc->byte_len = 0;
2438 ibwc->qp = &qp->ibqp;
2439 ibwc->status = ocrdma_to_ibwc_err(status);
2440
2441 ocrdma_flush_qp(qp);
057729cb 2442 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2443
2444 /* if wqe/rqe pending for which cqe needs to be returned,
2445 * trigger inflating it.
2446 */
2447 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2448 expand = true;
2449 ocrdma_set_cqe_status_flushed(qp, cqe);
2450 }
2451 return expand;
2452}
2453
2454static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2455 struct ocrdma_qp *qp, int status)
2456{
2457 ibwc->opcode = IB_WC_RECV;
2458 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2459 ocrdma_hwq_inc_tail(&qp->rq);
2460
2461 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2462}
2463
2464static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2465 struct ocrdma_qp *qp, int status)
2466{
2467 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2468 ocrdma_hwq_inc_tail(&qp->sq);
2469
2470 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2471}
2472
2473
2474static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2475 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2476 bool *polled, bool *stop)
2477{
2478 bool expand;
2479 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2480 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2481
2482 /* when hw sq is empty, but rq is not empty, so we continue
2483 * to keep the cqe in order to get the cq event again.
2484 */
2485 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2486 /* when cq for rq and sq is same, it is safe to return
2487 * flush cqe for RQEs.
2488 */
2489 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2490 *polled = true;
2491 status = OCRDMA_CQE_WR_FLUSH_ERR;
2492 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2493 } else {
2494 /* stop processing further cqe as this cqe is used for
2495 * triggering cq event on buddy cq of RQ.
2496 * When QP is destroyed, this cqe will be removed
2497 * from the cq's hardware q.
2498 */
2499 *polled = false;
2500 *stop = true;
2501 expand = false;
2502 }
2503 } else {
2504 *polled = true;
2505 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2506 }
2507 return expand;
2508}
2509
2510static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2511 struct ocrdma_cqe *cqe,
2512 struct ib_wc *ibwc, bool *polled)
2513{
2514 bool expand = false;
2515 int tail = qp->sq.tail;
2516 u32 wqe_idx;
2517
2518 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2519 *polled = false; /* WC cannot be consumed yet */
2520 } else {
2521 ibwc->status = IB_WC_SUCCESS;
2522 ibwc->wc_flags = 0;
2523 ibwc->qp = &qp->ibqp;
2524 ocrdma_update_wc(qp, ibwc, tail);
2525 *polled = true;
fe2caefc 2526 }
43a6b402
NG		 2527 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2528 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2529 if (tail != wqe_idx)
2530 expand = true; /* Coalesced CQE can't be consumed yet */
2531
fe2caefc
PP		 2532 ocrdma_hwq_inc_tail(&qp->sq);
2533 return expand;
2534}
2535
2536static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2537 struct ib_wc *ibwc, bool *polled, bool *stop)
2538{
2539 int status;
2540 bool expand;
2541
2542 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2543 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2544
2545 if (status == OCRDMA_CQE_SUCCESS)
2546 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2547 else
2548 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2549 return expand;
2550}
2551
2552static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2553{
2554 int status;
2555
2556 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2557 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2558 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2559 OCRDMA_CQE_SRCQP_MASK;
2560 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2561 OCRDMA_CQE_PKEY_MASK;
2562 ibwc->wc_flags = IB_WC_GRH;
2563 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2564 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2565 return status;
2566}
2567
2568static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2569 struct ocrdma_cqe *cqe,
2570 struct ocrdma_qp *qp)
2571{
2572 unsigned long flags;
2573 struct ocrdma_srq *srq;
2574 u32 wqe_idx;
2575
2576 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402
NG		 2577 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2578 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
fe2caefc
PP		 2579 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2580 spin_lock_irqsave(&srq->q_lock, flags);
2581 ocrdma_srq_toggle_bit(srq, wqe_idx);
2582 spin_unlock_irqrestore(&srq->q_lock, flags);
2583 ocrdma_hwq_inc_tail(&srq->rq);
2584}
2585
2586static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2587 struct ib_wc *ibwc, bool *polled, bool *stop,
2588 int status)
2589{
2590 bool expand;
2591
2592 /* when hw_rq is empty, but wq is not empty, so continue
2593 * to keep the cqe to get the cq event again.
2594 */
2595 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2596 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2597 *polled = true;
2598 status = OCRDMA_CQE_WR_FLUSH_ERR;
2599 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2600 } else {
2601 *polled = false;
2602 *stop = true;
2603 expand = false;
2604 }
a3698a9b
PP		 2605 } else {
2606 *polled = true;
fe2caefc 2607 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2608 }
fe2caefc
PP		 2609 return expand;
2610}
2611
2612static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2613 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2614{
2615 ibwc->opcode = IB_WC_RECV;
2616 ibwc->qp = &qp->ibqp;
2617 ibwc->status = IB_WC_SUCCESS;
2618
2619 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2620 ocrdma_update_ud_rcqe(ibwc, cqe);
2621 else
2622 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2623
2624 if (is_cqe_imm(cqe)) {
2625 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2626 ibwc->wc_flags |= IB_WC_WITH_IMM;
2627 } else if (is_cqe_wr_imm(cqe)) {
2628 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2629 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2630 ibwc->wc_flags |= IB_WC_WITH_IMM;
2631 } else if (is_cqe_invalidated(cqe)) {
2632 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2633 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2634 }
f99b1649 2635 if (qp->ibqp.srq) {
fe2caefc 2636 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2637 } else {
fe2caefc
PP		 2638 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2639 ocrdma_hwq_inc_tail(&qp->rq);
2640 }
2641}
2642
2643static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2644 struct ib_wc *ibwc, bool *polled, bool *stop)
2645{
2646 int status;
2647 bool expand = false;
2648
2649 ibwc->wc_flags = 0;
f99b1649 2650 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2651 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2652 OCRDMA_CQE_UD_STATUS_MASK) >>
2653 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2654 } else {
fe2caefc
PP		 2655 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2656 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2657 }
fe2caefc
PP		 2658
2659 if (status == OCRDMA_CQE_SUCCESS) {
2660 *polled = true;
2661 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2662 } else {
2663 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2664 status);
2665 }
2666 return expand;
2667}
2668
2669static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2670 u16 cur_getp)
2671{
2672 if (cq->phase_change) {
2673 if (cur_getp == 0)
2674 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2675 } else {
fe2caefc
PP		 2676 /* clear valid bit */
2677 cqe->flags_status_srcqpn = 0;
f99b1649 2678 }
fe2caefc
PP		 2679}
2680
2681static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2682 struct ib_wc *ibwc)
2683{
2684 u16 qpn = 0;
2685 int i = 0;
2686 bool expand = false;
2687 int polled_hw_cqes = 0;
2688 struct ocrdma_qp *qp = NULL;
1afc0454 2689 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2690 struct ocrdma_cqe *cqe;
2691 u16 cur_getp; bool polled = false; bool stop = false;
2692
2693 cur_getp = cq->getp;
2694 while (num_entries) {
2695 cqe = cq->va + cur_getp;
2696 /* check whether valid cqe or not */
2697 if (!is_cqe_valid(cq, cqe))
2698 break;
2699 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2700 /* ignore discarded cqe */
2701 if (qpn == 0)
2702 goto skip_cqe;
2703 qp = dev->qp_tbl[qpn];
2704 BUG_ON(qp == NULL);
2705
2706 if (is_cqe_for_sq(cqe)) {
2707 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2708 &stop);
2709 } else {
2710 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2711 &stop);
2712 }
2713 if (expand)
2714 goto expand_cqe;
2715 if (stop)
2716 goto stop_cqe;
2717 /* clear qpn to avoid duplicate processing by discard_cqe() */
2718 cqe->cmn.qpn = 0;
2719skip_cqe:
2720 polled_hw_cqes += 1;
2721 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2722 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2723expand_cqe:
2724 if (polled) {
2725 num_entries -= 1;
2726 i += 1;
2727 ibwc = ibwc + 1;
2728 polled = false;
2729 }
2730 }
2731stop_cqe:
2732 cq->getp = cur_getp;
ea617626
DS		 2733 if (cq->deferred_arm) {
2734 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
2735 polled_hw_cqes);
2736 cq->deferred_arm = false;
2737 cq->deferred_sol = false;
2738 } else {
2739 /* We need to pop the CQE. No need to arm */
2740 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
fe2caefc 2741 polled_hw_cqes);
ea617626 2742 cq->deferred_sol = false;
fe2caefc 2743 }
ea617626 2744
fe2caefc
PP		 2745 return i;
2746}
2747
2748/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2749static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2750 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2751{
2752 int err_cqes = 0;
2753
2754 while (num_entries) {
2755 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2756 break;
2757 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2758 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2759 ocrdma_hwq_inc_tail(&qp->sq);
2760 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2761 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2762 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2763 } else {
fe2caefc 2764 return err_cqes;
f99b1649 2765 }
fe2caefc
PP		 2766 ibwc->byte_len = 0;
2767 ibwc->status = IB_WC_WR_FLUSH_ERR;
2768 ibwc = ibwc + 1;
2769 err_cqes += 1;
2770 num_entries -= 1;
2771 }
2772 return err_cqes;
2773}
2774
2775int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2776{
2777 int cqes_to_poll = num_entries;
1afc0454
NG		 2778 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2779 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2780 int num_os_cqe = 0, err_cqes = 0;
2781 struct ocrdma_qp *qp;
1afc0454 2782 unsigned long flags;
fe2caefc
PP		 2783
2784 /* poll cqes from adapter CQ */
2785 spin_lock_irqsave(&cq->cq_lock, flags);
2786 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2787 spin_unlock_irqrestore(&cq->cq_lock, flags);
2788 cqes_to_poll -= num_os_cqe;
2789
2790 if (cqes_to_poll) {
2791 wc = wc + num_os_cqe;
2792 /* adapter returns single error cqe when qp moves to
2793 * error state. So insert error cqes with wc_status as
2794 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2795 * respectively which uses this CQ.
2796 */
2797 spin_lock_irqsave(&dev->flush_q_lock, flags);
2798 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2799 if (cqes_to_poll == 0)
2800 break;
2801 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2802 cqes_to_poll -= err_cqes;
2803 num_os_cqe += err_cqes;
2804 wc = wc + err_cqes;
2805 }
2806 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2807 }
2808 return num_os_cqe;
2809}
2810
2811int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2812{
1afc0454
NG		 2813 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2814 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2815 u16 cq_id;
1afc0454 2816 unsigned long flags;
ea617626 2817 bool arm_needed = false, sol_needed = false;
fe2caefc 2818
fe2caefc 2819 cq_id = cq->id;
fe2caefc
PP		 2820
2821 spin_lock_irqsave(&cq->cq_lock, flags);
2822 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2823 arm_needed = true;
fe2caefc 2824 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2825 sol_needed = true;
fe2caefc 2826
ea617626
DS		 2827 if (cq->first_arm) {
2828 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
2829 cq->first_arm = false;
2830 goto skip_defer;
fe2caefc 2831 }
ea617626
DS		 2832 cq->deferred_arm = true;
2833
2834skip_defer:
2835 cq->deferred_sol = sol_needed;
fe2caefc 2836 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2837
fe2caefc
PP		 2838 return 0;
2839}
7c33880c
NG		 2840
2841struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
2842{
2843 int status;
2844 struct ocrdma_mr *mr;
2845 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2846 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2847
2848 if (max_page_list_len > dev->attr.max_pages_per_frmr)
2849 return ERR_PTR(-EINVAL);
2850
2851 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2852 if (!mr)
2853 return ERR_PTR(-ENOMEM);
2854
2855 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
2856 if (status)
2857 goto pbl_err;
2858 mr->hwmr.fr_mr = 1;
2859 mr->hwmr.remote_rd = 0;
2860 mr->hwmr.remote_wr = 0;
2861 mr->hwmr.local_rd = 0;
2862 mr->hwmr.local_wr = 0;
2863 mr->hwmr.mw_bind = 0;
2864 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2865 if (status)
2866 goto pbl_err;
2867 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2868 if (status)
2869 goto mbx_err;
2870 mr->ibmr.rkey = mr->hwmr.lkey;
2871 mr->ibmr.lkey = mr->hwmr.lkey;
1852d1da 2872 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = mr;
7c33880c
NG		 2873 return &mr->ibmr;
2874mbx_err:
2875 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
2876pbl_err:
2877 kfree(mr);
2878 return ERR_PTR(-ENOMEM);
2879}
2880
2881struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
2882 *ibdev,
2883 int page_list_len)
2884{
2885 struct ib_fast_reg_page_list *frmr_list;
2886 int size;
2887
2888 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
2889 frmr_list = kzalloc(size, GFP_KERNEL);
2890 if (!frmr_list)
2891 return ERR_PTR(-ENOMEM);
2892 frmr_list->page_list = (u64 *)(frmr_list + 1);
2893 return frmr_list;
2894}
2895
2896void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
2897{
2898 kfree(page_list);
2899}
cffce990
NG		 2900
2901#define MAX_KERNEL_PBE_SIZE 65536
2902static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
2903 int buf_cnt, u32 *pbe_size)
2904{
2905 u64 total_size = 0;
2906 u64 buf_size = 0;
2907 int i;
2908 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
2909 *pbe_size = roundup_pow_of_two(*pbe_size);
2910
2911 /* find the smallest PBE size that we can have */
2912 for (i = 0; i < buf_cnt; i++) {
2913 /* first addr may not be page aligned, so ignore checking */
2914 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
2915 (buf_list[i].size & ~PAGE_MASK))) {
2916 return 0;
2917 }
2918
2919 /* if configured PBE size is greater then the chosen one,
2920 * reduce the PBE size.
2921 */
2922 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
2923 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
2924 buf_size = roundup_pow_of_two(buf_size);
2925 if (*pbe_size > buf_size)
2926 *pbe_size = buf_size;
2927
2928 total_size += buf_size;
2929 }
2930 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
2931 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
2932
2933 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
2934
2935 return total_size >> ilog2(*pbe_size);
2936}
2937
2938static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
2939 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
2940 struct ocrdma_hw_mr *hwmr)
2941{
2942 int i;
2943 int idx;
2944 int pbes_per_buf = 0;
2945 u64 buf_addr = 0;
2946 int num_pbes;
2947 struct ocrdma_pbe *pbe;
2948 int total_num_pbes = 0;
2949
2950 if (!hwmr->num_pbes)
2951 return;
2952
2953 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2954 num_pbes = 0;
2955
2956 /* go through the OS phy regions & fill hw pbe entries into pbls. */
2957 for (i = 0; i < ib_buf_cnt; i++) {
2958 buf_addr = buf_list[i].addr;
2959 pbes_per_buf =
2960 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
2961 pbe_size;
2962 hwmr->len += buf_list[i].size;
2963 /* number of pbes can be more for one OS buf, when
2964 * buffers are of different sizes.
2965 * split the ib_buf to one or more pbes.
2966 */
2967 for (idx = 0; idx < pbes_per_buf; idx++) {
2968 /* we program always page aligned addresses,
2969 * first unaligned address is taken care by fbo.
2970 */
2971 if (i == 0) {
2972 /* for non zero fbo, assign the
2973 * start of the page.
2974 */
2975 pbe->pa_lo =
2976 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2977 pbe->pa_hi =
2978 cpu_to_le32((u32) upper_32_bits(buf_addr));
2979 } else {
2980 pbe->pa_lo =
2981 cpu_to_le32((u32) (buf_addr & 0xffffffff));
2982 pbe->pa_hi =
2983 cpu_to_le32((u32) upper_32_bits(buf_addr));
2984 }
2985 buf_addr += pbe_size;
2986 num_pbes += 1;
2987 total_num_pbes += 1;
2988 pbe++;
2989
2990 if (total_num_pbes == hwmr->num_pbes)
2991 goto mr_tbl_done;
2992 /* if the pbl is full storing the pbes,
2993 * move to next pbl.
2994 */
2995 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
2996 pbl_tbl++;
2997 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2998 num_pbes = 0;
2999 }
3000 }
3001 }
3002mr_tbl_done:
3003 return;
3004}
3005
3006struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3007 struct ib_phys_buf *buf_list,
3008 int buf_cnt, int acc, u64 *iova_start)
3009{
3010 int status = -ENOMEM;
3011 struct ocrdma_mr *mr;
3012 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3013 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3014 u32 num_pbes;
3015 u32 pbe_size = 0;
3016
3017 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3018 return ERR_PTR(-EINVAL);
3019
3020 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3021 if (!mr)
3022 return ERR_PTR(status);
3023
3024 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3025 if (num_pbes == 0) {
3026 status = -EINVAL;
3027 goto pbl_err;
3028 }
3029 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3030 if (status)
3031 goto pbl_err;
3032
3033 mr->hwmr.pbe_size = pbe_size;
3034 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3035 mr->hwmr.va = *iova_start;
3036 mr->hwmr.local_rd = 1;
3037 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3038 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3039 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3040 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3041 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3042
3043 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3044 if (status)
3045 goto pbl_err;
3046 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3047 &mr->hwmr);
3048 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3049 if (status)
3050 goto mbx_err;
3051
3052 mr->ibmr.lkey = mr->hwmr.lkey;
3053 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3054 mr->ibmr.rkey = mr->hwmr.lkey;
3055 return &mr->ibmr;
3056
3057mbx_err:
3058 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3059pbl_err:
3060 kfree(mr);
3061 return ERR_PTR(status);
3062}
Linux kernel - Deliverables
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