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RDMA/ocrdma: Help gcc generate better code for ocrdma_srq_toggle_bit
[deliverable/linux.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
CommitLineData
fe2caefc
PP		 1/*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *
20 * Contact Information:
21 * linux-drivers@emulex.com
22 *
23 * Emulex
24 * 3333 Susan Street
25 * Costa Mesa, CA 92626
26 *******************************************************************/
27
28#include <linux/dma-mapping.h>
29#include <rdma/ib_verbs.h>
30#include <rdma/ib_user_verbs.h>
31#include <rdma/iw_cm.h>
32#include <rdma/ib_umem.h>
33#include <rdma/ib_addr.h>
34
35#include "ocrdma.h"
36#include "ocrdma_hw.h"
37#include "ocrdma_verbs.h"
38#include "ocrdma_abi.h"
39
40int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
41{
42 if (index > 1)
43 return -EINVAL;
44
45 *pkey = 0xffff;
46 return 0;
47}
48
49int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
50 int index, union ib_gid *sgid)
51{
52 struct ocrdma_dev *dev;
53
54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid));
fad51b7d 56 if (index > OCRDMA_MAX_SGID)
fe2caefc
PP		 57 return -EINVAL;
58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
60
61 return 0;
62}
63
64int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
65{
66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
67
68 memset(attr, 0, sizeof *attr);
69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
033edd4d 72 attr->max_mr_size = dev->attr.max_mr_size;
fe2caefc
PP		 73 attr->page_size_cap = 0xffff000;
74 attr->vendor_id = dev->nic_info.pdev->vendor;
75 attr->vendor_part_id = dev->nic_info.pdev->device;
96c51abe 76 attr->hw_ver = dev->asic_id;
fe2caefc 77 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 78 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 79 attr->max_qp_wr = dev->attr.max_wqe;
80
81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
82 IB_DEVICE_RC_RNR_NAK_GEN |
83 IB_DEVICE_SHUTDOWN_PORT |
84 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 85 IB_DEVICE_LOCAL_DMA_LKEY |
86 IB_DEVICE_MEM_MGT_EXTENSIONS;
634c5796 87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
c43e9ab8 88 attr->max_sge_rd = 0;
fe2caefc
PP		 89 attr->max_cq = dev->attr.max_cq;
90 attr->max_cqe = dev->attr.max_cqe;
91 attr->max_mr = dev->attr.max_mr;
ac578aef 92 attr->max_mw = dev->attr.max_mw;
fe2caefc
PP		 93 attr->max_pd = dev->attr.max_pd;
94 attr->atomic_cap = 0;
95 attr->max_fmr = 0;
96 attr->max_map_per_fmr = 0;
97 attr->max_qp_rd_atom =
98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 100 attr->max_srq = dev->attr.max_srq;
d1e09ebf 101 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 102 attr->max_srq_wr = dev->attr.max_rqe;
103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
d6a488f2 104 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
fe2caefc
PP		 105 attr->max_pkeys = 1;
106 return 0;
107}
108
f24ceba6
NG		 109static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
110 u8 *ib_speed, u8 *ib_width)
111{
112 int status;
113 u8 speed;
114
115 status = ocrdma_mbx_get_link_speed(dev, &speed);
116 if (status)
117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
118
119 switch (speed) {
120 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
121 *ib_speed = IB_SPEED_SDR;
122 *ib_width = IB_WIDTH_1X;
123 break;
124
125 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
126 *ib_speed = IB_SPEED_QDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
131 *ib_speed = IB_SPEED_DDR;
132 *ib_width = IB_WIDTH_4X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
136 *ib_speed = IB_SPEED_QDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 default:
141 /* Unsupported */
142 *ib_speed = IB_SPEED_SDR;
143 *ib_width = IB_WIDTH_1X;
2b50176d 144 }
f24ceba6
NG		 145}
146
fe2caefc
PP		 147int ocrdma_query_port(struct ib_device *ibdev,
148 u8 port, struct ib_port_attr *props)
149{
150 enum ib_port_state port_state;
151 struct ocrdma_dev *dev;
152 struct net_device *netdev;
153
154 dev = get_ocrdma_dev(ibdev);
155 if (port > 1) {
ef99c4c2
NG		 156 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
157 dev->id, port);
fe2caefc
PP		 158 return -EINVAL;
159 }
160 netdev = dev->nic_info.netdev;
161 if (netif_running(netdev) && netif_oper_up(netdev)) {
162 port_state = IB_PORT_ACTIVE;
163 props->phys_state = 5;
164 } else {
165 port_state = IB_PORT_DOWN;
166 props->phys_state = 3;
167 }
168 props->max_mtu = IB_MTU_4096;
169 props->active_mtu = iboe_get_mtu(netdev->mtu);
170 props->lid = 0;
171 props->lmc = 0;
172 props->sm_lid = 0;
173 props->sm_sl = 0;
174 props->state = port_state;
175 props->port_cap_flags =
176 IB_PORT_CM_SUP |
177 IB_PORT_REINIT_SUP |
b4a26a27 178 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
fe2caefc
PP		 179 props->gid_tbl_len = OCRDMA_MAX_SGID;
180 props->pkey_tbl_len = 1;
181 props->bad_pkey_cntr = 0;
182 props->qkey_viol_cntr = 0;
f24ceba6
NG		 183 get_link_speed_and_width(dev, &props->active_speed,
184 &props->active_width);
fe2caefc
PP		 185 props->max_msg_sz = 0x80000000;
186 props->max_vl_num = 4;
187 return 0;
188}
189
190int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
191 struct ib_port_modify *props)
192{
193 struct ocrdma_dev *dev;
194
195 dev = get_ocrdma_dev(ibdev);
196 if (port > 1) {
ef99c4c2 197 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
fe2caefc
PP		 198 return -EINVAL;
199 }
200 return 0;
201}
202
203static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
204 unsigned long len)
205{
206 struct ocrdma_mm *mm;
207
208 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
209 if (mm == NULL)
210 return -ENOMEM;
211 mm->key.phy_addr = phy_addr;
212 mm->key.len = len;
213 INIT_LIST_HEAD(&mm->entry);
214
215 mutex_lock(&uctx->mm_list_lock);
216 list_add_tail(&mm->entry, &uctx->mm_head);
217 mutex_unlock(&uctx->mm_list_lock);
218 return 0;
219}
220
221static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
222 unsigned long len)
223{
224 struct ocrdma_mm *mm, *tmp;
225
226 mutex_lock(&uctx->mm_list_lock);
227 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 228 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 229 continue;
230
231 list_del(&mm->entry);
232 kfree(mm);
233 break;
234 }
235 mutex_unlock(&uctx->mm_list_lock);
236}
237
238static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
239 unsigned long len)
240{
241 bool found = false;
242 struct ocrdma_mm *mm;
243
244 mutex_lock(&uctx->mm_list_lock);
245 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 246 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 247 continue;
248
249 found = true;
250 break;
251 }
252 mutex_unlock(&uctx->mm_list_lock);
253 return found;
254}
255
9ba1377d
MA		 256
257static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
258{
259 u16 pd_bitmap_idx = 0;
260 const unsigned long *pd_bitmap;
261
262 if (dpp_pool) {
263 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
264 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
265 dev->pd_mgr->max_dpp_pd);
266 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
267 dev->pd_mgr->pd_dpp_count++;
268 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
269 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
270 } else {
271 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
272 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
273 dev->pd_mgr->max_normal_pd);
274 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
275 dev->pd_mgr->pd_norm_count++;
276 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
277 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
278 }
279 return pd_bitmap_idx;
280}
281
282static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
283 bool dpp_pool)
284{
285 u16 pd_count;
286 u16 pd_bit_index;
287
288 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
289 dev->pd_mgr->pd_norm_count;
290 if (pd_count == 0)
291 return -EINVAL;
292
293 if (dpp_pool) {
294 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
295 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
296 return -EINVAL;
297 } else {
298 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
299 dev->pd_mgr->pd_dpp_count--;
300 }
301 } else {
302 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
303 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
304 return -EINVAL;
305 } else {
306 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
307 dev->pd_mgr->pd_norm_count--;
308 }
309 }
310
311 return 0;
312}
313
314static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
315 bool dpp_pool)
316{
317 int status;
318
319 mutex_lock(&dev->dev_lock);
320 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
321 mutex_unlock(&dev->dev_lock);
322 return status;
323}
324
325static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
326{
327 u16 pd_idx = 0;
328 int status = 0;
329
330 mutex_lock(&dev->dev_lock);
331 if (pd->dpp_enabled) {
332 /* try allocating DPP PD, if not available then normal PD */
333 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
334 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
335 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
336 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
337 } else if (dev->pd_mgr->pd_norm_count <
338 dev->pd_mgr->max_normal_pd) {
339 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
340 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
341 pd->dpp_enabled = false;
342 } else {
343 status = -EINVAL;
344 }
345 } else {
346 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
347 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
348 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
349 } else {
350 status = -EINVAL;
351 }
352 }
353 mutex_unlock(&dev->dev_lock);
354 return status;
355}
356
cffce990
NG		 357static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
358 struct ocrdma_ucontext *uctx,
359 struct ib_udata *udata)
360{
361 struct ocrdma_pd *pd = NULL;
362 int status = 0;
363
364 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
365 if (!pd)
366 return ERR_PTR(-ENOMEM);
367
368 if (udata && uctx) {
369 pd->dpp_enabled =
21c3391a 370 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
cffce990 371 pd->num_dpp_qp =
a53d77a3
DS		 372 pd->dpp_enabled ? (dev->nic_info.db_page_size /
373 dev->attr.wqe_size) : 0;
cffce990
NG		 374 }
375
9ba1377d
MA		 376 if (dev->pd_mgr->pd_prealloc_valid) {
377 status = ocrdma_get_pd_num(dev, pd);
378 return (status == 0) ? pd : ERR_PTR(status);
379 }
380
cffce990
NG		 381retry:
382 status = ocrdma_mbx_alloc_pd(dev, pd);
383 if (status) {
384 if (pd->dpp_enabled) {
385 pd->dpp_enabled = false;
386 pd->num_dpp_qp = 0;
387 goto retry;
388 } else {
389 kfree(pd);
390 return ERR_PTR(status);
391 }
392 }
393
394 return pd;
395}
396
397static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
398 struct ocrdma_pd *pd)
399{
400 return (uctx->cntxt_pd == pd ? true : false);
401}
402
403static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
404 struct ocrdma_pd *pd)
405{
406 int status = 0;
407
9ba1377d
MA		 408 if (dev->pd_mgr->pd_prealloc_valid)
409 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
410 else
411 status = ocrdma_mbx_dealloc_pd(dev, pd);
412
cffce990
NG		 413 kfree(pd);
414 return status;
415}
416
417static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
418 struct ocrdma_ucontext *uctx,
419 struct ib_udata *udata)
420{
421 int status = 0;
422
423 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
424 if (IS_ERR(uctx->cntxt_pd)) {
425 status = PTR_ERR(uctx->cntxt_pd);
426 uctx->cntxt_pd = NULL;
427 goto err;
428 }
429
430 uctx->cntxt_pd->uctx = uctx;
431 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
432err:
433 return status;
434}
435
436static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
437{
cffce990
NG		 438 struct ocrdma_pd *pd = uctx->cntxt_pd;
439 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
440
6dab0264
MA		 441 if (uctx->pd_in_use) {
442 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
443 __func__, dev->id, pd->id);
444 }
cffce990 445 uctx->cntxt_pd = NULL;
4b8180aa
MA		 446 (void)_ocrdma_dealloc_pd(dev, pd);
447 return 0;
cffce990
NG		 448}
449
450static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
451{
452 struct ocrdma_pd *pd = NULL;
453
454 mutex_lock(&uctx->mm_list_lock);
455 if (!uctx->pd_in_use) {
456 uctx->pd_in_use = true;
457 pd = uctx->cntxt_pd;
458 }
459 mutex_unlock(&uctx->mm_list_lock);
460
461 return pd;
462}
463
464static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
465{
466 mutex_lock(&uctx->mm_list_lock);
467 uctx->pd_in_use = false;
468 mutex_unlock(&uctx->mm_list_lock);
469}
470
fe2caefc
PP		 471struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
472 struct ib_udata *udata)
473{
474 int status;
475 struct ocrdma_ucontext *ctx;
476 struct ocrdma_alloc_ucontext_resp resp;
477 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
478 struct pci_dev *pdev = dev->nic_info.pdev;
479 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
480
481 if (!udata)
482 return ERR_PTR(-EFAULT);
483 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
484 if (!ctx)
485 return ERR_PTR(-ENOMEM);
fe2caefc
PP		 486 INIT_LIST_HEAD(&ctx->mm_head);
487 mutex_init(&ctx->mm_list_lock);
488
489 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
490 &ctx->ah_tbl.pa, GFP_KERNEL);
491 if (!ctx->ah_tbl.va) {
492 kfree(ctx);
493 return ERR_PTR(-ENOMEM);
494 }
495 memset(ctx->ah_tbl.va, 0, map_len);
496 ctx->ah_tbl.len = map_len;
497
63ea3749 498 memset(&resp, 0, sizeof(resp));
fe2caefc 499 resp.ah_tbl_len = ctx->ah_tbl.len;
1b76d383 500 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
fe2caefc
PP		 501
502 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
503 if (status)
504 goto map_err;
cffce990
NG		 505
506 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
507 if (status)
508 goto pd_err;
509
fe2caefc
PP		 510 resp.dev_id = dev->id;
511 resp.max_inline_data = dev->attr.max_inline_data;
512 resp.wqe_size = dev->attr.wqe_size;
513 resp.rqe_size = dev->attr.rqe_size;
514 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 515
516 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
517 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
518 if (status)
519 goto cpy_err;
520 return &ctx->ibucontext;
521
522cpy_err:
cffce990 523pd_err:
fe2caefc
PP		 524 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
525map_err:
526 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
527 ctx->ah_tbl.pa);
528 kfree(ctx);
529 return ERR_PTR(status);
530}
531
532int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
533{
cffce990 534 int status = 0;
fe2caefc
PP		 535 struct ocrdma_mm *mm, *tmp;
536 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 537 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
538 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 539
cffce990
NG		 540 status = ocrdma_dealloc_ucontext_pd(uctx);
541
fe2caefc
PP		 542 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
543 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
544 uctx->ah_tbl.pa);
545
546 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
547 list_del(&mm->entry);
548 kfree(mm);
549 }
550 kfree(uctx);
cffce990 551 return status;
fe2caefc
PP		 552}
553
554int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
555{
556 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 557 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 558 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
559 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
560 unsigned long len = (vma->vm_end - vma->vm_start);
561 int status = 0;
562 bool found;
563
564 if (vma->vm_start & (PAGE_SIZE - 1))
565 return -EINVAL;
566 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
567 if (!found)
568 return -EINVAL;
569
570 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
571 dev->nic_info.db_total_size)) &&
572 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 573 if (vma->vm_flags & VM_READ)
574 return -EPERM;
575
576 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 577 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
578 len, vma->vm_page_prot);
579 } else if (dev->nic_info.dpp_unmapped_len &&
580 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
581 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
582 dev->nic_info.dpp_unmapped_len)) &&
583 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 584 if (vma->vm_flags & VM_READ)
585 return -EPERM;
586
fe2caefc
PP		 587 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
588 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
589 len, vma->vm_page_prot);
590 } else {
fe2caefc
PP		 591 status = remap_pfn_range(vma, vma->vm_start,
592 vma->vm_pgoff, len, vma->vm_page_prot);
593 }
594 return status;
595}
596
45e86b33 597static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 598 struct ib_ucontext *ib_ctx,
599 struct ib_udata *udata)
600{
601 int status;
602 u64 db_page_addr;
da496438 603 u64 dpp_page_addr = 0;
fe2caefc
PP		 604 u32 db_page_size;
605 struct ocrdma_alloc_pd_uresp rsp;
606 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
607
63ea3749 608 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 609 rsp.id = pd->id;
610 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 611 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 612 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 613
614 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
615 if (status)
616 return status;
617
618 if (pd->dpp_enabled) {
f99b1649 619 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 620 (pd->id * PAGE_SIZE);
fe2caefc 621 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 622 PAGE_SIZE);
fe2caefc
PP		 623 if (status)
624 goto dpp_map_err;
625 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
626 rsp.dpp_page_addr_lo = dpp_page_addr;
627 }
628
629 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
630 if (status)
631 goto ucopy_err;
632
633 pd->uctx = uctx;
634 return 0;
635
636ucopy_err:
da496438 637 if (pd->dpp_enabled)
43a6b402 638 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 639dpp_map_err:
640 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
641 return status;
642}
643
644struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
645 struct ib_ucontext *context,
646 struct ib_udata *udata)
647{
648 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
649 struct ocrdma_pd *pd;
cffce990 650 struct ocrdma_ucontext *uctx = NULL;
fe2caefc 651 int status;
cffce990 652 u8 is_uctx_pd = false;
fe2caefc 653
fe2caefc 654 if (udata && context) {
cffce990
NG		 655 uctx = get_ocrdma_ucontext(context);
656 pd = ocrdma_get_ucontext_pd(uctx);
657 if (pd) {
658 is_uctx_pd = true;
659 goto pd_mapping;
43a6b402 660 }
fe2caefc 661 }
fe2caefc 662
cffce990
NG		 663 pd = _ocrdma_alloc_pd(dev, uctx, udata);
664 if (IS_ERR(pd)) {
665 status = PTR_ERR(pd);
666 goto exit;
667 }
668
669pd_mapping:
fe2caefc 670 if (udata && context) {
45e86b33 671 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
fe2caefc
PP		 672 if (status)
673 goto err;
674 }
675 return &pd->ibpd;
676
677err:
cffce990
NG		 678 if (is_uctx_pd) {
679 ocrdma_release_ucontext_pd(uctx);
680 } else {
9ba1377d 681 status = _ocrdma_dealloc_pd(dev, pd);
cffce990
NG		 682 kfree(pd);
683 }
684exit:
fe2caefc
PP		 685 return ERR_PTR(status);
686}
687
688int ocrdma_dealloc_pd(struct ib_pd *ibpd)
689{
690 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 691 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990
NG		 692 struct ocrdma_ucontext *uctx = NULL;
693 int status = 0;
fe2caefc
PP		 694 u64 usr_db;
695
cffce990
NG		 696 uctx = pd->uctx;
697 if (uctx) {
fe2caefc 698 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 699 (pd->id * PAGE_SIZE);
fe2caefc 700 if (pd->dpp_enabled)
43a6b402 701 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 702 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 703 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 704
705 if (is_ucontext_pd(uctx, pd)) {
706 ocrdma_release_ucontext_pd(uctx);
707 return status;
708 }
fe2caefc 709 }
cffce990 710 status = _ocrdma_dealloc_pd(dev, pd);
fe2caefc
PP		 711 return status;
712}
713
1afc0454
NG		 714static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
715 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 716{
717 int status;
fe2caefc 718
fe2caefc
PP		 719 mr->hwmr.fr_mr = 0;
720 mr->hwmr.local_rd = 1;
721 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
722 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
723 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
724 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
725 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
726 mr->hwmr.num_pbls = num_pbls;
727
f99b1649
NG		 728 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
729 if (status)
730 return status;
731
fe2caefc
PP		 732 mr->ibmr.lkey = mr->hwmr.lkey;
733 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
734 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 735 return 0;
fe2caefc
PP		 736}
737
738struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
739{
f99b1649 740 int status;
fe2caefc 741 struct ocrdma_mr *mr;
f99b1649
NG		 742 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
743 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
744
745 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
746 pr_err("%s err, invalid access rights\n", __func__);
747 return ERR_PTR(-EINVAL);
748 }
fe2caefc 749
f99b1649
NG		 750 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
751 if (!mr)
752 return ERR_PTR(-ENOMEM);
753
1afc0454 754 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 755 OCRDMA_ADDR_CHECK_DISABLE);
756 if (status) {
757 kfree(mr);
758 return ERR_PTR(status);
759 }
fe2caefc
PP		 760
761 return &mr->ibmr;
762}
763
764static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
765 struct ocrdma_hw_mr *mr)
766{
767 struct pci_dev *pdev = dev->nic_info.pdev;
768 int i = 0;
769
770 if (mr->pbl_table) {
771 for (i = 0; i < mr->num_pbls; i++) {
772 if (!mr->pbl_table[i].va)
773 continue;
774 dma_free_coherent(&pdev->dev, mr->pbl_size,
775 mr->pbl_table[i].va,
776 mr->pbl_table[i].pa);
777 }
778 kfree(mr->pbl_table);
779 mr->pbl_table = NULL;
780 }
781}
782
1afc0454
NG		 783static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
784 u32 num_pbes)
fe2caefc
PP		 785{
786 u32 num_pbls = 0;
787 u32 idx = 0;
788 int status = 0;
789 u32 pbl_size;
790
791 do {
792 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
793 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
794 status = -EFAULT;
795 break;
796 }
797 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
798 num_pbls = num_pbls / (pbl_size / sizeof(u64));
799 idx++;
1afc0454 800 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 801
802 mr->hwmr.num_pbes = num_pbes;
803 mr->hwmr.num_pbls = num_pbls;
804 mr->hwmr.pbl_size = pbl_size;
805 return status;
806}
807
808static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
809{
810 int status = 0;
811 int i;
812 u32 dma_len = mr->pbl_size;
813 struct pci_dev *pdev = dev->nic_info.pdev;
814 void *va;
815 dma_addr_t pa;
816
817 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
818 mr->num_pbls, GFP_KERNEL);
819
820 if (!mr->pbl_table)
821 return -ENOMEM;
822
823 for (i = 0; i < mr->num_pbls; i++) {
824 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
825 if (!va) {
826 ocrdma_free_mr_pbl_tbl(dev, mr);
827 status = -ENOMEM;
828 break;
829 }
830 memset(va, 0, dma_len);
831 mr->pbl_table[i].va = va;
832 mr->pbl_table[i].pa = pa;
833 }
834 return status;
835}
836
837static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
838 u32 num_pbes)
839{
840 struct ocrdma_pbe *pbe;
eeb8461e 841 struct scatterlist *sg;
fe2caefc
PP		 842 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
843 struct ib_umem *umem = mr->umem;
eeb8461e 844 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
fe2caefc
PP		 845
846 if (!mr->hwmr.num_pbes)
847 return;
848
849 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
850 pbe_cnt = 0;
851
852 shift = ilog2(umem->page_size);
853
eeb8461e
YH		 854 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
855 pages = sg_dma_len(sg) >> shift;
856 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
857 /* store the page address in pbe */
858 pbe->pa_lo =
859 cpu_to_le32(sg_dma_address
860 (sg) +
861 (umem->page_size * pg_cnt));
862 pbe->pa_hi =
863 cpu_to_le32(upper_32_bits
864 ((sg_dma_address
865 (sg) +
866 umem->page_size * pg_cnt)));
867 pbe_cnt += 1;
868 total_num_pbes += 1;
869 pbe++;
870
871 /* if done building pbes, issue the mbx cmd. */
872 if (total_num_pbes == num_pbes)
873 return;
874
875 /* if the given pbl is full storing the pbes,
876 * move to next pbl.
877 */
878 if (pbe_cnt ==
879 (mr->hwmr.pbl_size / sizeof(u64))) {
880 pbl_tbl++;
881 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
882 pbe_cnt = 0;
fe2caefc 883 }
eeb8461e 884
fe2caefc
PP		 885 }
886 }
887}
888
889struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
890 u64 usr_addr, int acc, struct ib_udata *udata)
891{
892 int status = -ENOMEM;
f99b1649 893 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 894 struct ocrdma_mr *mr;
895 struct ocrdma_pd *pd;
fe2caefc
PP		 896 u32 num_pbes;
897
898 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 899
900 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
901 return ERR_PTR(-EINVAL);
902
903 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
904 if (!mr)
905 return ERR_PTR(status);
fe2caefc
PP		 906 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
907 if (IS_ERR(mr->umem)) {
908 status = -EFAULT;
909 goto umem_err;
910 }
911 num_pbes = ib_umem_page_count(mr->umem);
1afc0454 912 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
fe2caefc
PP		 913 if (status)
914 goto umem_err;
915
916 mr->hwmr.pbe_size = mr->umem->page_size;
406f9e5f 917 mr->hwmr.fbo = ib_umem_offset(mr->umem);
fe2caefc
PP		 918 mr->hwmr.va = usr_addr;
919 mr->hwmr.len = len;
920 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
921 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
922 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
923 mr->hwmr.local_rd = 1;
924 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
925 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
926 if (status)
927 goto umem_err;
928 build_user_pbes(dev, mr, num_pbes);
929 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
930 if (status)
931 goto mbx_err;
fe2caefc
PP		 932 mr->ibmr.lkey = mr->hwmr.lkey;
933 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
934 mr->ibmr.rkey = mr->hwmr.lkey;
935
936 return &mr->ibmr;
937
938mbx_err:
939 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
940umem_err:
941 kfree(mr);
942 return ERR_PTR(status);
943}
944
945int ocrdma_dereg_mr(struct ib_mr *ib_mr)
946{
947 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 948 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc 949
4b8180aa 950 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
fe2caefc 951
9d1878a3 952 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
fe2caefc 953
fe2caefc
PP		 954 /* it could be user registered memory. */
955 if (mr->umem)
956 ib_umem_release(mr->umem);
957 kfree(mr);
6dab0264
MA		 958
959 /* Don't stop cleanup, in case FW is unresponsive */
960 if (dev->mqe_ctx.fw_error_state) {
6dab0264
MA		 961 pr_err("%s(%d) fw not responding.\n",
962 __func__, dev->id);
963 }
4b8180aa 964 return 0;
fe2caefc
PP		 965}
966
1afc0454
NG		 967static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
968 struct ib_udata *udata,
fe2caefc
PP		 969 struct ib_ucontext *ib_ctx)
970{
971 int status;
cffce990 972 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
fe2caefc
PP		 973 struct ocrdma_create_cq_uresp uresp;
974
63ea3749 975 memset(&uresp, 0, sizeof(uresp));
fe2caefc 976 uresp.cq_id = cq->id;
43a6b402 977 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 978 uresp.num_pages = 1;
979 uresp.max_hw_cqe = cq->max_hw_cqe;
1b76d383 980 uresp.page_addr[0] = virt_to_phys(cq->va);
cffce990 981 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 982 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 983 uresp.phase_change = cq->phase_change ? 1 : 0;
984 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
985 if (status) {
ef99c4c2 986 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 987 __func__, dev->id, cq->id);
fe2caefc
PP		 988 goto err;
989 }
fe2caefc
PP		 990 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
991 if (status)
992 goto err;
993 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
994 if (status) {
995 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
996 goto err;
997 }
998 cq->ucontext = uctx;
999err:
1000 return status;
1001}
1002
1003struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
1004 struct ib_ucontext *ib_ctx,
1005 struct ib_udata *udata)
1006{
1007 struct ocrdma_cq *cq;
1008 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
cffce990
NG		 1009 struct ocrdma_ucontext *uctx = NULL;
1010 u16 pd_id = 0;
fe2caefc
PP		 1011 int status;
1012 struct ocrdma_create_cq_ureq ureq;
1013
1014 if (udata) {
1015 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1016 return ERR_PTR(-EFAULT);
1017 } else
1018 ureq.dpp_cq = 0;
1019 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
1020 if (!cq)
1021 return ERR_PTR(-ENOMEM);
1022
1023 spin_lock_init(&cq->cq_lock);
1024 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 1025 INIT_LIST_HEAD(&cq->sq_head);
1026 INIT_LIST_HEAD(&cq->rq_head);
ea617626 1027 cq->first_arm = true;
fe2caefc 1028
cffce990
NG		 1029 if (ib_ctx) {
1030 uctx = get_ocrdma_ucontext(ib_ctx);
1031 pd_id = uctx->cntxt_pd->id;
1032 }
1033
1034 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
fe2caefc
PP		 1035 if (status) {
1036 kfree(cq);
1037 return ERR_PTR(status);
1038 }
1039 if (ib_ctx) {
1afc0454 1040 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
fe2caefc
PP		 1041 if (status)
1042 goto ctx_err;
1043 }
1044 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 1045 dev->cq_tbl[cq->id] = cq;
fe2caefc
PP		 1046 return &cq->ibcq;
1047
1048ctx_err:
1049 ocrdma_mbx_destroy_cq(dev, cq);
1050 kfree(cq);
1051 return ERR_PTR(status);
1052}
1053
1054int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1055 struct ib_udata *udata)
1056{
1057 int status = 0;
1058 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1059
1060 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1061 status = -EINVAL;
1062 return status;
1063 }
1064 ibcq->cqe = new_cnt;
1065 return status;
1066}
1067
ea617626
DS		 1068static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1069{
1070 int cqe_cnt;
1071 int valid_count = 0;
1072 unsigned long flags;
1073
1074 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1075 struct ocrdma_cqe *cqe = NULL;
1076
1077 cqe = cq->va;
1078 cqe_cnt = cq->cqe_cnt;
1079
1080 /* Last irq might have scheduled a polling thread
1081 * sync-up with it before hard flushing.
1082 */
1083 spin_lock_irqsave(&cq->cq_lock, flags);
1084 while (cqe_cnt) {
1085 if (is_cqe_valid(cq, cqe))
1086 valid_count++;
1087 cqe++;
1088 cqe_cnt--;
1089 }
1090 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1091 spin_unlock_irqrestore(&cq->cq_lock, flags);
1092}
1093
fe2caefc
PP		 1094int ocrdma_destroy_cq(struct ib_cq *ibcq)
1095{
fe2caefc 1096 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 1097 struct ocrdma_eq *eq = NULL;
1afc0454 1098 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 1099 int pdid = 0;
ea617626 1100 u32 irq, indx;
fe2caefc 1101
ea617626
DS		 1102 dev->cq_tbl[cq->id] = NULL;
1103 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
1104 if (indx == -EINVAL)
1105 BUG();
fe2caefc 1106
ea617626
DS		 1107 eq = &dev->eq_tbl[indx];
1108 irq = ocrdma_get_irq(dev, eq);
1109 synchronize_irq(irq);
1110 ocrdma_flush_cq(cq);
fe2caefc 1111
4b8180aa 1112 (void)ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 1113 if (cq->ucontext) {
cffce990 1114 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1115 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1116 PAGE_ALIGN(cq->len));
cffce990
NG		 1117 ocrdma_del_mmap(cq->ucontext,
1118 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1119 dev->nic_info.db_page_size);
1120 }
fe2caefc
PP		 1121
1122 kfree(cq);
4b8180aa 1123 return 0;
fe2caefc
PP		 1124}
1125
1126static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1127{
1128 int status = -EINVAL;
1129
1130 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1131 dev->qp_tbl[qp->id] = qp;
1132 status = 0;
1133 }
1134 return status;
1135}
1136
1137static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1138{
1139 dev->qp_tbl[qp->id] = NULL;
1140}
1141
1142static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1143 struct ib_qp_init_attr *attrs)
1144{
43a6b402
NG		 1145 if ((attrs->qp_type != IB_QPT_GSI) &&
1146 (attrs->qp_type != IB_QPT_RC) &&
1147 (attrs->qp_type != IB_QPT_UC) &&
1148 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1149 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1150 __func__, dev->id, attrs->qp_type);
fe2caefc
PP		 1151 return -EINVAL;
1152 }
43a6b402
NG		 1153 /* Skip the check for QP1 to support CM size of 128 */
1154 if ((attrs->qp_type != IB_QPT_GSI) &&
1155 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1156 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1157 __func__, dev->id, attrs->cap.max_send_wr);
1158 pr_err("%s(%d) supported send_wr=0x%x\n",
1159 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1160 return -EINVAL;
1161 }
1162 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1163 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1164 __func__, dev->id, attrs->cap.max_recv_wr);
1165 pr_err("%s(%d) supported recv_wr=0x%x\n",
1166 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1167 return -EINVAL;
1168 }
1169 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1170 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1171 __func__, dev->id, attrs->cap.max_inline_data);
1172 pr_err("%s(%d) supported inline data size=0x%x\n",
1173 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1174 return -EINVAL;
1175 }
1176 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1177 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1178 __func__, dev->id, attrs->cap.max_send_sge);
1179 pr_err("%s(%d) supported send_sge=0x%x\n",
1180 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1181 return -EINVAL;
1182 }
1183 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1184 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1185 __func__, dev->id, attrs->cap.max_recv_sge);
1186 pr_err("%s(%d) supported recv_sge=0x%x\n",
1187 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1188 return -EINVAL;
1189 }
1190 /* unprivileged user space cannot create special QP */
1191 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1192 pr_err
fe2caefc
PP		 1193 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1194 __func__, dev->id, attrs->qp_type);
1195 return -EINVAL;
1196 }
1197 /* allow creating only one GSI type of QP */
1198 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1199 pr_err("%s(%d) GSI special QPs already created.\n",
1200 __func__, dev->id);
fe2caefc
PP		 1201 return -EINVAL;
1202 }
1203 /* verify consumer QPs are not trying to use GSI QP's CQ */
1204 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1205 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1206 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1207 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1208 __func__, dev->id);
fe2caefc
PP		 1209 return -EINVAL;
1210 }
1211 }
1212 return 0;
1213}
1214
1215static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1216 struct ib_udata *udata, int dpp_offset,
1217 int dpp_credit_lmt, int srq)
1218{
1219 int status = 0;
1220 u64 usr_db;
1221 struct ocrdma_create_qp_uresp uresp;
fe2caefc 1222 struct ocrdma_pd *pd = qp->pd;
d2b8f7b1 1223 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
fe2caefc
PP		 1224
1225 memset(&uresp, 0, sizeof(uresp));
1226 usr_db = dev->nic_info.unmapped_db +
1227 (pd->id * dev->nic_info.db_page_size);
1228 uresp.qp_id = qp->id;
1229 uresp.sq_dbid = qp->sq.dbid;
1230 uresp.num_sq_pages = 1;
43a6b402 1231 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1b76d383 1232 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
fe2caefc
PP		 1233 uresp.num_wqe_allocated = qp->sq.max_cnt;
1234 if (!srq) {
1235 uresp.rq_dbid = qp->rq.dbid;
1236 uresp.num_rq_pages = 1;
43a6b402 1237 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1b76d383 1238 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
fe2caefc
PP		 1239 uresp.num_rqe_allocated = qp->rq.max_cnt;
1240 }
1241 uresp.db_page_addr = usr_db;
1242 uresp.db_page_size = dev->nic_info.db_page_size;
2df84fa8
DS		 1243 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1244 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1245 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
fe2caefc
PP		 1246
1247 if (qp->dpp_enabled) {
1248 uresp.dpp_credit = dpp_credit_lmt;
1249 uresp.dpp_offset = dpp_offset;
1250 }
1251 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1252 if (status) {
ef99c4c2 1253 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1254 goto err;
1255 }
1256 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1257 uresp.sq_page_size);
1258 if (status)
1259 goto err;
1260
1261 if (!srq) {
1262 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1263 uresp.rq_page_size);
1264 if (status)
1265 goto rq_map_err;
1266 }
1267 return status;
1268rq_map_err:
1269 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1270err:
1271 return status;
1272}
1273
1274static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1275 struct ocrdma_pd *pd)
1276{
21c3391a 1277 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
fe2caefc
PP		 1278 qp->sq_db = dev->nic_info.db +
1279 (pd->id * dev->nic_info.db_page_size) +
1280 OCRDMA_DB_GEN2_SQ_OFFSET;
1281 qp->rq_db = dev->nic_info.db +
1282 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1283 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1284 } else {
1285 qp->sq_db = dev->nic_info.db +
1286 (pd->id * dev->nic_info.db_page_size) +
1287 OCRDMA_DB_SQ_OFFSET;
1288 qp->rq_db = dev->nic_info.db +
1289 (pd->id * dev->nic_info.db_page_size) +
1290 OCRDMA_DB_RQ_OFFSET;
1291 }
1292}
1293
1294static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1295{
1296 qp->wqe_wr_id_tbl =
1297 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1298 GFP_KERNEL);
1299 if (qp->wqe_wr_id_tbl == NULL)
1300 return -ENOMEM;
1301 qp->rqe_wr_id_tbl =
1302 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1303 if (qp->rqe_wr_id_tbl == NULL)
1304 return -ENOMEM;
1305
1306 return 0;
1307}
1308
1309static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1310 struct ocrdma_pd *pd,
1311 struct ib_qp_init_attr *attrs)
1312{
1313 qp->pd = pd;
1314 spin_lock_init(&qp->q_lock);
1315 INIT_LIST_HEAD(&qp->sq_entry);
1316 INIT_LIST_HEAD(&qp->rq_entry);
1317
1318 qp->qp_type = attrs->qp_type;
1319 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1320 qp->max_inline_data = attrs->cap.max_inline_data;
1321 qp->sq.max_sges = attrs->cap.max_send_sge;
1322 qp->rq.max_sges = attrs->cap.max_recv_sge;
1323 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1324 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1325}
1326
fe2caefc
PP		 1327static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1328 struct ib_qp_init_attr *attrs)
1329{
1330 if (attrs->qp_type == IB_QPT_GSI) {
1331 dev->gsi_qp_created = 1;
1332 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1333 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1334 }
1335}
1336
1337struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1338 struct ib_qp_init_attr *attrs,
1339 struct ib_udata *udata)
1340{
1341 int status;
1342 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1343 struct ocrdma_qp *qp;
f99b1649 1344 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1345 struct ocrdma_create_qp_ureq ureq;
1346 u16 dpp_credit_lmt, dpp_offset;
1347
1348 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1349 if (status)
1350 goto gen_err;
1351
1352 memset(&ureq, 0, sizeof(ureq));
1353 if (udata) {
1354 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1355 return ERR_PTR(-EFAULT);
1356 }
1357 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1358 if (!qp) {
1359 status = -ENOMEM;
1360 goto gen_err;
1361 }
fe2caefc 1362 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1363 if (udata == NULL)
1364 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1365 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1366
1367 mutex_lock(&dev->dev_lock);
1368 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1369 ureq.dpp_cq_id,
1370 &dpp_offset, &dpp_credit_lmt);
1371 if (status)
1372 goto mbx_err;
1373
1374 /* user space QP's wr_id table are managed in library */
1375 if (udata == NULL) {
fe2caefc
PP		 1376 status = ocrdma_alloc_wr_id_tbl(qp);
1377 if (status)
1378 goto map_err;
1379 }
1380
1381 status = ocrdma_add_qpn_map(dev, qp);
1382 if (status)
1383 goto map_err;
1384 ocrdma_set_qp_db(dev, qp, pd);
1385 if (udata) {
1386 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1387 dpp_credit_lmt,
1388 (attrs->srq != NULL));
1389 if (status)
1390 goto cpy_err;
1391 }
1392 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1393 qp->ibqp.qp_num = qp->id;
fe2caefc
PP		 1394 mutex_unlock(&dev->dev_lock);
1395 return &qp->ibqp;
1396
1397cpy_err:
1398 ocrdma_del_qpn_map(dev, qp);
1399map_err:
1400 ocrdma_mbx_destroy_qp(dev, qp);
1401mbx_err:
1402 mutex_unlock(&dev->dev_lock);
1403 kfree(qp->wqe_wr_id_tbl);
1404 kfree(qp->rqe_wr_id_tbl);
1405 kfree(qp);
ef99c4c2 1406 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc
PP		 1407gen_err:
1408 return ERR_PTR(status);
1409}
1410
1411int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1412 int attr_mask)
1413{
1414 int status = 0;
1415 struct ocrdma_qp *qp;
1416 struct ocrdma_dev *dev;
1417 enum ib_qp_state old_qps;
1418
1419 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1420 dev = get_ocrdma_dev(ibqp->device);
fe2caefc 1421 if (attr_mask & IB_QP_STATE)
057729cb 1422 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1423 /* if new and previous states are same hw doesn't need to
1424 * know about it.
1425 */
1426 if (status < 0)
1427 return status;
bc1b04ab 1428 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
45e86b33 1429
fe2caefc
PP		 1430 return status;
1431}
1432
1433int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1434 int attr_mask, struct ib_udata *udata)
1435{
1436 unsigned long flags;
1437 int status = -EINVAL;
1438 struct ocrdma_qp *qp;
1439 struct ocrdma_dev *dev;
1440 enum ib_qp_state old_qps, new_qps;
1441
1442 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1443 dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1444
1445 /* syncronize with multiple context trying to change, retrive qps */
1446 mutex_lock(&dev->dev_lock);
1447 /* syncronize with wqe, rqe posting and cqe processing contexts */
1448 spin_lock_irqsave(&qp->q_lock, flags);
1449 old_qps = get_ibqp_state(qp->state);
1450 if (attr_mask & IB_QP_STATE)
1451 new_qps = attr->qp_state;
1452 else
1453 new_qps = old_qps;
1454 spin_unlock_irqrestore(&qp->q_lock, flags);
1455
dd5f03be 1456 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
37721d85 1457 IB_LINK_LAYER_ETHERNET)) {
ef99c4c2
NG		 1458 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1459 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1460 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1461 old_qps, new_qps);
fe2caefc
PP		 1462 goto param_err;
1463 }
1464
1465 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1466 if (status > 0)
1467 status = 0;
1468param_err:
1469 mutex_unlock(&dev->dev_lock);
1470 return status;
1471}
1472
1473static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1474{
1475 switch (mtu) {
1476 case 256:
1477 return IB_MTU_256;
1478 case 512:
1479 return IB_MTU_512;
1480 case 1024:
1481 return IB_MTU_1024;
1482 case 2048:
1483 return IB_MTU_2048;
1484 case 4096:
1485 return IB_MTU_4096;
1486 default:
1487 return IB_MTU_1024;
1488 }
1489}
1490
1491static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1492{
1493 int ib_qp_acc_flags = 0;
1494
1495 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1496 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1497 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1498 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1499 return ib_qp_acc_flags;
1500}
1501
1502int ocrdma_query_qp(struct ib_qp *ibqp,
1503 struct ib_qp_attr *qp_attr,
1504 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1505{
1506 int status;
1507 u32 qp_state;
1508 struct ocrdma_qp_params params;
1509 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1510 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1511
1512 memset(&params, 0, sizeof(params));
1513 mutex_lock(&dev->dev_lock);
1514 status = ocrdma_mbx_query_qp(dev, qp, &params);
1515 mutex_unlock(&dev->dev_lock);
1516 if (status)
1517 goto mbx_err;
95bf0093
MA		 1518 if (qp->qp_type == IB_QPT_UD)
1519 qp_attr->qkey = params.qkey;
fe2caefc
PP		 1520 qp_attr->path_mtu =
1521 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1522 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1523 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1524 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1525 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1526 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1527 qp_attr->dest_qp_num =
1528 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1529
1530 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1531 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1532 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1533 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1534 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1535 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc
PP		 1536 qp_init_attr->cap = qp_attr->cap;
1537 memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
1538 sizeof(params.dgid));
1539 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1540 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1541 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1542 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1543 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1544 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1545 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
a61d93d9 1546 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
fe2caefc
PP		 1547 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1548
1549 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1550 qp_attr->ah_attr.port_num = 1;
1551 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1552 OCRDMA_QP_PARAMS_SL_MASK) >>
1553 OCRDMA_QP_PARAMS_SL_SHIFT;
1554 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1555 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1556 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1557 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1558 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1559 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1560 qp_attr->retry_cnt =
1561 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1562 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1563 qp_attr->min_rnr_timer = 0;
1564 qp_attr->pkey_index = 0;
1565 qp_attr->port_num = 1;
1566 qp_attr->ah_attr.src_path_bits = 0;
1567 qp_attr->ah_attr.static_rate = 0;
1568 qp_attr->alt_pkey_index = 0;
1569 qp_attr->alt_port_num = 0;
1570 qp_attr->alt_timeout = 0;
1571 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1572 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1573 OCRDMA_QP_PARAMS_STATE_SHIFT;
43c706b1
PR		 1574 qp_attr->qp_state = get_ibqp_state(qp_state);
1575 qp_attr->cur_qp_state = qp_attr->qp_state;
fe2caefc
PP		 1576 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1577 qp_attr->max_dest_rd_atomic =
1578 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1579 qp_attr->max_rd_atomic =
1580 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1581 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1582 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
43c706b1
PR		 1583 /* Sync driver QP state with FW */
1584 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
fe2caefc
PP		 1585mbx_err:
1586 return status;
1587}
1588
1589static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
1590{
1591 int i = idx / 32;
1592 unsigned int mask = (1 << (idx % 32));
1593
ba64fdca 1594 srq->idx_bit_fields[i] ^= mask;
fe2caefc
PP		 1595}
1596
1597static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1598{
43a6b402 1599 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1600}
1601
1602static int is_hw_sq_empty(struct ocrdma_qp *qp)
1603{
43a6b402 1604 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1605}
1606
1607static int is_hw_rq_empty(struct ocrdma_qp *qp)
1608{
43a6b402 1609 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1610}
1611
1612static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1613{
1614 return q->va + (q->head * q->entry_size);
1615}
1616
1617static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1618 u32 idx)
1619{
1620 return q->va + (idx * q->entry_size);
1621}
1622
1623static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1624{
1625 q->head = (q->head + 1) & q->max_wqe_idx;
1626}
1627
1628static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1629{
1630 q->tail = (q->tail + 1) & q->max_wqe_idx;
1631}
1632
1633/* discard the cqe for a given QP */
1634static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1635{
1636 unsigned long cq_flags;
1637 unsigned long flags;
1638 int discard_cnt = 0;
1639 u32 cur_getp, stop_getp;
1640 struct ocrdma_cqe *cqe;
cf5788ad 1641 u32 qpn = 0, wqe_idx = 0;
fe2caefc
PP		 1642
1643 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1644
1645 /* traverse through the CQEs in the hw CQ,
1646 * find the matching CQE for a given qp,
1647 * mark the matching one discarded by clearing qpn.
1648 * ring the doorbell in the poll_cq() as
1649 * we don't complete out of order cqe.
1650 */
1651
1652 cur_getp = cq->getp;
1653 /* find upto when do we reap the cq. */
1654 stop_getp = cur_getp;
1655 do {
1656 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1657 break;
1658
1659 cqe = cq->va + cur_getp;
1660 /* if (a) done reaping whole hw cq, or
1661 * (b) qp_xq becomes empty.
1662 * then exit
1663 */
1664 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1665 /* if previously discarded cqe found, skip that too. */
1666 /* check for matching qp */
1667 if (qpn == 0 || qpn != qp->id)
1668 goto skip_cqe;
1669
f99b1649 1670 if (is_cqe_for_sq(cqe)) {
fe2caefc 1671 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1672 } else {
fe2caefc 1673 if (qp->srq) {
cf5788ad
SX		 1674 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1675 OCRDMA_CQE_BUFTAG_SHIFT) &
1676 qp->srq->rq.max_wqe_idx;
1677 if (wqe_idx < 1)
1678 BUG();
fe2caefc
PP		 1679 spin_lock_irqsave(&qp->srq->q_lock, flags);
1680 ocrdma_hwq_inc_tail(&qp->srq->rq);
cf5788ad 1681 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
fe2caefc
PP		 1682 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1683
f99b1649 1684 } else {
fe2caefc 1685 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1686 }
fe2caefc 1687 }
cf5788ad
SX		 1688 /* mark cqe discarded so that it is not picked up later
1689 * in the poll_cq().
1690 */
1691 discard_cnt += 1;
1692 cqe->cmn.qpn = 0;
fe2caefc
PP		 1693skip_cqe:
1694 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1695 } while (cur_getp != stop_getp);
1696 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1697}
1698
f11220ee 1699void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1700{
1701 int found = false;
1702 unsigned long flags;
d2b8f7b1 1703 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 1704 /* sync with any active CQ poll */
1705
1706 spin_lock_irqsave(&dev->flush_q_lock, flags);
1707 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1708 if (found)
1709 list_del(&qp->sq_entry);
1710 if (!qp->srq) {
1711 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1712 if (found)
1713 list_del(&qp->rq_entry);
1714 }
1715 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1716}
1717
1718int ocrdma_destroy_qp(struct ib_qp *ibqp)
1719{
fe2caefc
PP		 1720 struct ocrdma_pd *pd;
1721 struct ocrdma_qp *qp;
1722 struct ocrdma_dev *dev;
1723 struct ib_qp_attr attrs;
1724 int attr_mask = IB_QP_STATE;
d19081e0 1725 unsigned long flags;
fe2caefc
PP		 1726
1727 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1728 dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1729
1730 attrs.qp_state = IB_QPS_ERR;
1731 pd = qp->pd;
1732
1733 /* change the QP state to ERROR */
1734 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1735
1736 /* ensure that CQEs for newly created QP (whose id may be same with
1737 * one which just getting destroyed are same), dont get
1738 * discarded until the old CQEs are discarded.
1739 */
1740 mutex_lock(&dev->dev_lock);
4b8180aa 1741 (void) ocrdma_mbx_destroy_qp(dev, qp);
fe2caefc
PP		 1742
1743 /*
1744 * acquire CQ lock while destroy is in progress, in order to
1745 * protect against proessing in-flight CQEs for this QP.
1746 */
d19081e0 1747 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
fe2caefc 1748 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0 1749 spin_lock(&qp->rq_cq->cq_lock);
fe2caefc
PP		 1750
1751 ocrdma_del_qpn_map(dev, qp);
1752
1753 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0
DC		 1754 spin_unlock(&qp->rq_cq->cq_lock);
1755 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1756
1757 if (!pd->uctx) {
1758 ocrdma_discard_cqes(qp, qp->sq_cq);
1759 ocrdma_discard_cqes(qp, qp->rq_cq);
1760 }
1761 mutex_unlock(&dev->dev_lock);
1762
1763 if (pd->uctx) {
43a6b402
NG		 1764 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1765 PAGE_ALIGN(qp->sq.len));
fe2caefc 1766 if (!qp->srq)
43a6b402
NG		 1767 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1768 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1769 }
1770
1771 ocrdma_del_flush_qp(qp);
1772
fe2caefc
PP		 1773 kfree(qp->wqe_wr_id_tbl);
1774 kfree(qp->rqe_wr_id_tbl);
1775 kfree(qp);
4b8180aa 1776 return 0;
fe2caefc
PP		 1777}
1778
1afc0454
NG		 1779static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1780 struct ib_udata *udata)
fe2caefc
PP		 1781{
1782 int status;
1783 struct ocrdma_create_srq_uresp uresp;
1784
63ea3749 1785 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1786 uresp.rq_dbid = srq->rq.dbid;
1787 uresp.num_rq_pages = 1;
1b76d383 1788 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
fe2caefc 1789 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1790 uresp.db_page_addr = dev->nic_info.unmapped_db +
1791 (srq->pd->id * dev->nic_info.db_page_size);
1792 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1793 uresp.num_rqe_allocated = srq->rq.max_cnt;
21c3391a 1794 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
f11220ee 1795 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1796 uresp.db_shift = 24;
1797 } else {
1798 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1799 uresp.db_shift = 16;
1800 }
1801
1802 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1803 if (status)
1804 return status;
1805 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1806 uresp.rq_page_size);
1807 if (status)
1808 return status;
1809 return status;
1810}
1811
1812struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1813 struct ib_srq_init_attr *init_attr,
1814 struct ib_udata *udata)
1815{
1816 int status = -ENOMEM;
1817 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 1818 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1819 struct ocrdma_srq *srq;
1820
1821 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1822 return ERR_PTR(-EINVAL);
1823 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1824 return ERR_PTR(-EINVAL);
1825
1826 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1827 if (!srq)
1828 return ERR_PTR(status);
1829
1830 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1831 srq->pd = pd;
1832 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1833 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc
PP		 1834 if (status)
1835 goto err;
1836
1837 if (udata == NULL) {
1838 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1839 GFP_KERNEL);
1840 if (srq->rqe_wr_id_tbl == NULL)
1841 goto arm_err;
1842
1843 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1844 (srq->rq.max_cnt % 32 ? 1 : 0);
1845 srq->idx_bit_fields =
1846 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1847 if (srq->idx_bit_fields == NULL)
1848 goto arm_err;
1849 memset(srq->idx_bit_fields, 0xff,
1850 srq->bit_fields_len * sizeof(u32));
1851 }
1852
1853 if (init_attr->attr.srq_limit) {
1854 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1855 if (status)
1856 goto arm_err;
1857 }
1858
fe2caefc 1859 if (udata) {
1afc0454 1860 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1861 if (status)
1862 goto arm_err;
1863 }
1864
fe2caefc
PP		 1865 return &srq->ibsrq;
1866
1867arm_err:
1868 ocrdma_mbx_destroy_srq(dev, srq);
1869err:
1870 kfree(srq->rqe_wr_id_tbl);
1871 kfree(srq->idx_bit_fields);
1872 kfree(srq);
1873 return ERR_PTR(status);
1874}
1875
1876int ocrdma_modify_srq(struct ib_srq *ibsrq,
1877 struct ib_srq_attr *srq_attr,
1878 enum ib_srq_attr_mask srq_attr_mask,
1879 struct ib_udata *udata)
1880{
1881 int status = 0;
1882 struct ocrdma_srq *srq;
fe2caefc
PP		 1883
1884 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1885 if (srq_attr_mask & IB_SRQ_MAX_WR)
1886 status = -EINVAL;
1887 else
1888 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1889 return status;
1890}
1891
1892int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1893{
1894 int status;
1895 struct ocrdma_srq *srq;
fe2caefc
PP		 1896
1897 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1898 status = ocrdma_mbx_query_srq(srq, srq_attr);
1899 return status;
1900}
1901
1902int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1903{
1904 int status;
1905 struct ocrdma_srq *srq;
1afc0454 1906 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1907
1908 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1909
1910 status = ocrdma_mbx_destroy_srq(dev, srq);
1911
1912 if (srq->pd->uctx)
43a6b402
NG		 1913 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1914 PAGE_ALIGN(srq->rq.len));
fe2caefc 1915
fe2caefc
PP		 1916 kfree(srq->idx_bit_fields);
1917 kfree(srq->rqe_wr_id_tbl);
1918 kfree(srq);
1919 return status;
1920}
1921
1922/* unprivileged verbs and their support functions. */
1923static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1924 struct ocrdma_hdr_wqe *hdr,
1925 struct ib_send_wr *wr)
1926{
1927 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1928 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1929 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
1930
1931 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
1932 if (qp->qp_type == IB_QPT_GSI)
1933 ud_hdr->qkey = qp->qkey;
1934 else
1935 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1936 ud_hdr->rsvd_ahid = ah->id;
29565f2f
DS		 1937 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
1938 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
fe2caefc
PP		 1939}
1940
1941static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1942 struct ocrdma_sge *sge, int num_sge,
1943 struct ib_sge *sg_list)
1944{
1945 int i;
1946
1947 for (i = 0; i < num_sge; i++) {
1948 sge[i].lrkey = sg_list[i].lkey;
1949 sge[i].addr_lo = sg_list[i].addr;
1950 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1951 sge[i].len = sg_list[i].length;
1952 hdr->total_len += sg_list[i].length;
1953 }
1954 if (num_sge == 0)
1955 memset(sge, 0, sizeof(*sge));
1956}
1957
117e6dd1
NG		 1958static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1959{
1960 uint32_t total_len = 0, i;
1961
1962 for (i = 0; i < num_sge; i++)
1963 total_len += sg_list[i].length;
1964 return total_len;
1965}
1966
1967
fe2caefc
PP		 1968static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1969 struct ocrdma_hdr_wqe *hdr,
1970 struct ocrdma_sge *sge,
1971 struct ib_send_wr *wr, u32 wqe_size)
1972{
117e6dd1
NG		 1973 int i;
1974 char *dpp_addr;
1975
43a6b402 1976 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1977 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1978 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2 1979 pr_err("%s() supported_len=0x%x,\n"
1a84db56 1980 " unsupported len req=0x%x\n", __func__,
117e6dd1 1981 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1982 return -EINVAL;
1983 }
117e6dd1
NG		 1984 dpp_addr = (char *)sge;
1985 for (i = 0; i < wr->num_sge; i++) {
1986 memcpy(dpp_addr,
1987 (void *)(unsigned long)wr->sg_list[i].addr,
1988 wr->sg_list[i].length);
1989 dpp_addr += wr->sg_list[i].length;
1990 }
1991
fe2caefc 1992 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1993 if (0 == hdr->total_len)
43a6b402 1994 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1995 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1996 } else {
1997 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1998 if (wr->num_sge)
1999 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
2000 else
2001 wqe_size += sizeof(struct ocrdma_sge);
2002 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2003 }
2004 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2005 return 0;
2006}
2007
2008static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2009 struct ib_send_wr *wr)
2010{
2011 int status;
2012 struct ocrdma_sge *sge;
2013 u32 wqe_size = sizeof(*hdr);
2014
2015 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2016 ocrdma_build_ud_hdr(qp, hdr, wr);
2017 sge = (struct ocrdma_sge *)(hdr + 2);
2018 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 2019 } else {
fe2caefc 2020 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 2021 }
fe2caefc
PP		 2022
2023 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2024 return status;
2025}
2026
2027static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2028 struct ib_send_wr *wr)
2029{
2030 int status;
2031 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2032 struct ocrdma_sge *sge = ext_rw + 1;
2033 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
2034
2035 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2036 if (status)
2037 return status;
2038 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
2039 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
2040 ext_rw->lrkey = wr->wr.rdma.rkey;
2041 ext_rw->len = hdr->total_len;
2042 return 0;
2043}
2044
2045static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2046 struct ib_send_wr *wr)
2047{
2048 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2049 struct ocrdma_sge *sge = ext_rw + 1;
2050 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2051 sizeof(struct ocrdma_hdr_wqe);
2052
2053 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2054 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2055 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2056 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2057
2058 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
2059 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
2060 ext_rw->lrkey = wr->wr.rdma.rkey;
2061 ext_rw->len = hdr->total_len;
2062}
2063
7c33880c
NG		 2064static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
2065 struct ocrdma_hw_mr *hwmr)
2066{
2067 int i;
2068 u64 buf_addr = 0;
2069 int num_pbes;
2070 struct ocrdma_pbe *pbe;
2071
2072 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2073 num_pbes = 0;
2074
2075 /* go through the OS phy regions & fill hw pbe entries into pbls. */
2076 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
2077 /* number of pbes can be more for one OS buf, when
2078 * buffers are of different sizes.
2079 * split the ib_buf to one or more pbes.
2080 */
2081 buf_addr = wr->wr.fast_reg.page_list->page_list[i];
2082 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2083 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2084 num_pbes += 1;
2085 pbe++;
2086
2087 /* if the pbl is full storing the pbes,
2088 * move to next pbl.
2089 */
2090 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
2091 pbl_tbl++;
2092 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2093 }
2094 }
2095 return;
2096}
2097
2098static int get_encoded_page_size(int pg_sz)
2099{
2100 /* Max size is 256M 4096 << 16 */
2101 int i = 0;
2102 for (; i < 17; i++)
2103 if (pg_sz == (4096 << i))
2104 break;
2105 return i;
2106}
2107
2108
2109static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2110 struct ib_send_wr *wr)
2111{
2112 u64 fbo;
2113 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2114 struct ocrdma_mr *mr;
d2b8f7b1 2115 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
7c33880c
NG		 2116 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2117
2118 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2119
d2b8f7b1 2120 if (wr->wr.fast_reg.page_list_len > dev->attr.max_pages_per_frmr)
7c33880c
NG		 2121 return -EINVAL;
2122
2123 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2124 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2125
2126 if (wr->wr.fast_reg.page_list_len == 0)
2127 BUG();
2128 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
2129 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2130 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
2131 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2132 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
2133 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2134 hdr->lkey = wr->wr.fast_reg.rkey;
2135 hdr->total_len = wr->wr.fast_reg.length;
2136
2137 fbo = wr->wr.fast_reg.iova_start -
2138 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
2139
2140 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
2141 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
2142 fast_reg->fbo_hi = upper_32_bits(fbo);
2143 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2144 fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
2145 fast_reg->size_sge =
2146 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
7a1e89d8 2147 mr = (struct ocrdma_mr *) (unsigned long)
d2b8f7b1 2148 dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)];
7c33880c
NG		 2149 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2150 return 0;
2151}
2152
fe2caefc
PP		 2153static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2154{
2df84fa8 2155 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
fe2caefc
PP		 2156
2157 iowrite32(val, qp->sq_db);
2158}
2159
2160int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2161 struct ib_send_wr **bad_wr)
2162{
2163 int status = 0;
2164 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2165 struct ocrdma_hdr_wqe *hdr;
2166 unsigned long flags;
2167
2168 spin_lock_irqsave(&qp->q_lock, flags);
2169 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2170 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2171 *bad_wr = wr;
fe2caefc
PP		 2172 return -EINVAL;
2173 }
2174
2175 while (wr) {
f252b5dc
MA		 2176 if (qp->qp_type == IB_QPT_UD &&
2177 (wr->opcode != IB_WR_SEND &&
2178 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2179 *bad_wr = wr;
2180 status = -EINVAL;
2181 break;
2182 }
fe2caefc
PP		 2183 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2184 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2185 *bad_wr = wr;
fe2caefc
PP		 2186 status = -ENOMEM;
2187 break;
2188 }
2189 hdr = ocrdma_hwq_head(&qp->sq);
2190 hdr->cw = 0;
2b51a9b9 2191 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2192 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2193 if (wr->send_flags & IB_SEND_FENCE)
2194 hdr->cw |=
2195 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2196 if (wr->send_flags & IB_SEND_SOLICITED)
2197 hdr->cw |=
2198 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2199 hdr->total_len = 0;
2200 switch (wr->opcode) {
2201 case IB_WR_SEND_WITH_IMM:
2202 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2203 hdr->immdt = ntohl(wr->ex.imm_data);
2204 case IB_WR_SEND:
2205 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2206 ocrdma_build_send(qp, hdr, wr);
2207 break;
2208 case IB_WR_SEND_WITH_INV:
2209 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2210 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2211 hdr->lkey = wr->ex.invalidate_rkey;
2212 status = ocrdma_build_send(qp, hdr, wr);
2213 break;
2214 case IB_WR_RDMA_WRITE_WITH_IMM:
2215 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2216 hdr->immdt = ntohl(wr->ex.imm_data);
2217 case IB_WR_RDMA_WRITE:
2218 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2219 status = ocrdma_build_write(qp, hdr, wr);
2220 break;
fe2caefc
PP		 2221 case IB_WR_RDMA_READ:
2222 ocrdma_build_read(qp, hdr, wr);
2223 break;
2224 case IB_WR_LOCAL_INV:
2225 hdr->cw |=
2226 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2227 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2228 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2229 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2230 hdr->lkey = wr->ex.invalidate_rkey;
2231 break;
7c33880c
NG		 2232 case IB_WR_FAST_REG_MR:
2233 status = ocrdma_build_fr(qp, hdr, wr);
2234 break;
fe2caefc
PP		 2235 default:
2236 status = -EINVAL;
2237 break;
2238 }
2239 if (status) {
2240 *bad_wr = wr;
2241 break;
2242 }
2b51a9b9 2243 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2244 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2245 else
2246 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2247 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2248 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2249 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2250 /* make sure wqe is written before adapter can access it */
2251 wmb();
2252 /* inform hw to start processing it */
2253 ocrdma_ring_sq_db(qp);
2254
2255 /* update pointer, counter for next wr */
2256 ocrdma_hwq_inc_head(&qp->sq);
2257 wr = wr->next;
2258 }
2259 spin_unlock_irqrestore(&qp->q_lock, flags);
2260 return status;
2261}
2262
2263static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2264{
2df84fa8 2265 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
fe2caefc 2266
2df84fa8 2267 iowrite32(val, qp->rq_db);
fe2caefc
PP		 2268}
2269
2270static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2271 u16 tag)
2272{
2273 u32 wqe_size = 0;
2274 struct ocrdma_sge *sge;
2275 if (wr->num_sge)
2276 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2277 else
2278 wqe_size = sizeof(*sge) + sizeof(*rqe);
2279
2280 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2281 OCRDMA_WQE_SIZE_SHIFT);
2282 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2283 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2284 rqe->total_len = 0;
2285 rqe->rsvd_tag = tag;
2286 sge = (struct ocrdma_sge *)(rqe + 1);
2287 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2288 ocrdma_cpu_to_le32(rqe, wqe_size);
2289}
2290
2291int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2292 struct ib_recv_wr **bad_wr)
2293{
2294 int status = 0;
2295 unsigned long flags;
2296 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2297 struct ocrdma_hdr_wqe *rqe;
2298
2299 spin_lock_irqsave(&qp->q_lock, flags);
2300 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2301 spin_unlock_irqrestore(&qp->q_lock, flags);
2302 *bad_wr = wr;
2303 return -EINVAL;
2304 }
2305 while (wr) {
2306 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2307 wr->num_sge > qp->rq.max_sges) {
2308 *bad_wr = wr;
2309 status = -ENOMEM;
2310 break;
2311 }
2312 rqe = ocrdma_hwq_head(&qp->rq);
2313 ocrdma_build_rqe(rqe, wr, 0);
2314
2315 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2316 /* make sure rqe is written before adapter can access it */
2317 wmb();
2318
2319 /* inform hw to start processing it */
2320 ocrdma_ring_rq_db(qp);
2321
2322 /* update pointer, counter for next wr */
2323 ocrdma_hwq_inc_head(&qp->rq);
2324 wr = wr->next;
2325 }
2326 spin_unlock_irqrestore(&qp->q_lock, flags);
2327 return status;
2328}
2329
2330/* cqe for srq's rqe can potentially arrive out of order.
2331 * index gives the entry in the shadow table where to store
2332 * the wr_id. tag/index is returned in cqe to reference back
2333 * for a given rqe.
2334 */
2335static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2336{
2337 int row = 0;
2338 int indx = 0;
2339
2340 for (row = 0; row < srq->bit_fields_len; row++) {
2341 if (srq->idx_bit_fields[row]) {
2342 indx = ffs(srq->idx_bit_fields[row]);
2343 indx = (row * 32) + (indx - 1);
2344 if (indx >= srq->rq.max_cnt)
2345 BUG();
2346 ocrdma_srq_toggle_bit(srq, indx);
2347 break;
2348 }
2349 }
2350
2351 if (row == srq->bit_fields_len)
2352 BUG();
cf5788ad 2353 return indx + 1; /* Use from index 1 */
fe2caefc
PP		 2354}
2355
2356static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2357{
2358 u32 val = srq->rq.dbid | (1 << 16);
2359
2360 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2361}
2362
2363int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2364 struct ib_recv_wr **bad_wr)
2365{
2366 int status = 0;
2367 unsigned long flags;
2368 struct ocrdma_srq *srq;
2369 struct ocrdma_hdr_wqe *rqe;
2370 u16 tag;
2371
2372 srq = get_ocrdma_srq(ibsrq);
2373
2374 spin_lock_irqsave(&srq->q_lock, flags);
2375 while (wr) {
2376 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2377 wr->num_sge > srq->rq.max_sges) {
2378 status = -ENOMEM;
2379 *bad_wr = wr;
2380 break;
2381 }
2382 tag = ocrdma_srq_get_idx(srq);
2383 rqe = ocrdma_hwq_head(&srq->rq);
2384 ocrdma_build_rqe(rqe, wr, tag);
2385
2386 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2387 /* make sure rqe is written before adapter can perform DMA */
2388 wmb();
2389 /* inform hw to start processing it */
2390 ocrdma_ring_srq_db(srq);
2391 /* update pointer, counter for next wr */
2392 ocrdma_hwq_inc_head(&srq->rq);
2393 wr = wr->next;
2394 }
2395 spin_unlock_irqrestore(&srq->q_lock, flags);
2396 return status;
2397}
2398
2399static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2400{
f99b1649 2401 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2402
2403 switch (status) {
2404 case OCRDMA_CQE_GENERAL_ERR:
2405 ibwc_status = IB_WC_GENERAL_ERR;
2406 break;
2407 case OCRDMA_CQE_LOC_LEN_ERR:
2408 ibwc_status = IB_WC_LOC_LEN_ERR;
2409 break;
2410 case OCRDMA_CQE_LOC_QP_OP_ERR:
2411 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2412 break;
2413 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2414 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2415 break;
2416 case OCRDMA_CQE_LOC_PROT_ERR:
2417 ibwc_status = IB_WC_LOC_PROT_ERR;
2418 break;
2419 case OCRDMA_CQE_WR_FLUSH_ERR:
2420 ibwc_status = IB_WC_WR_FLUSH_ERR;
2421 break;
2422 case OCRDMA_CQE_MW_BIND_ERR:
2423 ibwc_status = IB_WC_MW_BIND_ERR;
2424 break;
2425 case OCRDMA_CQE_BAD_RESP_ERR:
2426 ibwc_status = IB_WC_BAD_RESP_ERR;
2427 break;
2428 case OCRDMA_CQE_LOC_ACCESS_ERR:
2429 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2430 break;
2431 case OCRDMA_CQE_REM_INV_REQ_ERR:
2432 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2433 break;
2434 case OCRDMA_CQE_REM_ACCESS_ERR:
2435 ibwc_status = IB_WC_REM_ACCESS_ERR;
2436 break;
2437 case OCRDMA_CQE_REM_OP_ERR:
2438 ibwc_status = IB_WC_REM_OP_ERR;
2439 break;
2440 case OCRDMA_CQE_RETRY_EXC_ERR:
2441 ibwc_status = IB_WC_RETRY_EXC_ERR;
2442 break;
2443 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2444 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2445 break;
2446 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2447 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2448 break;
2449 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2450 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2451 break;
2452 case OCRDMA_CQE_REM_ABORT_ERR:
2453 ibwc_status = IB_WC_REM_ABORT_ERR;
2454 break;
2455 case OCRDMA_CQE_INV_EECN_ERR:
2456 ibwc_status = IB_WC_INV_EECN_ERR;
2457 break;
2458 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2459 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2460 break;
2461 case OCRDMA_CQE_FATAL_ERR:
2462 ibwc_status = IB_WC_FATAL_ERR;
2463 break;
2464 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2465 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2466 break;
2467 default:
2468 ibwc_status = IB_WC_GENERAL_ERR;
2469 break;
2b50176d 2470 }
fe2caefc
PP		 2471 return ibwc_status;
2472}
2473
2474static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2475 u32 wqe_idx)
2476{
2477 struct ocrdma_hdr_wqe *hdr;
2478 struct ocrdma_sge *rw;
2479 int opcode;
2480
2481 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2482
2483 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2484 /* Undo the hdr->cw swap */
2485 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2486 switch (opcode) {
2487 case OCRDMA_WRITE:
2488 ibwc->opcode = IB_WC_RDMA_WRITE;
2489 break;
2490 case OCRDMA_READ:
2491 rw = (struct ocrdma_sge *)(hdr + 1);
2492 ibwc->opcode = IB_WC_RDMA_READ;
2493 ibwc->byte_len = rw->len;
2494 break;
2495 case OCRDMA_SEND:
2496 ibwc->opcode = IB_WC_SEND;
2497 break;
7c33880c
NG		 2498 case OCRDMA_FR_MR:
2499 ibwc->opcode = IB_WC_FAST_REG_MR;
2500 break;
fe2caefc
PP		 2501 case OCRDMA_LKEY_INV:
2502 ibwc->opcode = IB_WC_LOCAL_INV;
2503 break;
2504 default:
2505 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2506 pr_err("%s() invalid opcode received = 0x%x\n",
2507 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2508 break;
2b50176d 2509 }
fe2caefc
PP		 2510}
2511
2512static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2513 struct ocrdma_cqe *cqe)
2514{
2515 if (is_cqe_for_sq(cqe)) {
2516 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2517 cqe->flags_status_srcqpn) &
2518 ~OCRDMA_CQE_STATUS_MASK);
2519 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2520 cqe->flags_status_srcqpn) |
2521 (OCRDMA_CQE_WR_FLUSH_ERR <<
2522 OCRDMA_CQE_STATUS_SHIFT));
2523 } else {
2524 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2525 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2526 cqe->flags_status_srcqpn) &
2527 ~OCRDMA_CQE_UD_STATUS_MASK);
2528 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2529 cqe->flags_status_srcqpn) |
2530 (OCRDMA_CQE_WR_FLUSH_ERR <<
2531 OCRDMA_CQE_UD_STATUS_SHIFT));
2532 } else {
2533 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2534 cqe->flags_status_srcqpn) &
2535 ~OCRDMA_CQE_STATUS_MASK);
2536 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2537 cqe->flags_status_srcqpn) |
2538 (OCRDMA_CQE_WR_FLUSH_ERR <<
2539 OCRDMA_CQE_STATUS_SHIFT));
2540 }
2541 }
2542}
2543
2544static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2545 struct ocrdma_qp *qp, int status)
2546{
2547 bool expand = false;
2548
2549 ibwc->byte_len = 0;
2550 ibwc->qp = &qp->ibqp;
2551 ibwc->status = ocrdma_to_ibwc_err(status);
2552
2553 ocrdma_flush_qp(qp);
057729cb 2554 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2555
2556 /* if wqe/rqe pending for which cqe needs to be returned,
2557 * trigger inflating it.
2558 */
2559 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2560 expand = true;
2561 ocrdma_set_cqe_status_flushed(qp, cqe);
2562 }
2563 return expand;
2564}
2565
2566static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2567 struct ocrdma_qp *qp, int status)
2568{
2569 ibwc->opcode = IB_WC_RECV;
2570 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2571 ocrdma_hwq_inc_tail(&qp->rq);
2572
2573 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2574}
2575
2576static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2577 struct ocrdma_qp *qp, int status)
2578{
2579 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2580 ocrdma_hwq_inc_tail(&qp->sq);
2581
2582 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2583}
2584
2585
2586static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2587 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2588 bool *polled, bool *stop)
2589{
2590 bool expand;
ad56ebb4 2591 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 2592 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2593 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
ad56ebb4
SX		 2594 if (status < OCRDMA_MAX_CQE_ERR)
2595 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2596
2597 /* when hw sq is empty, but rq is not empty, so we continue
2598 * to keep the cqe in order to get the cq event again.
2599 */
2600 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2601 /* when cq for rq and sq is same, it is safe to return
2602 * flush cqe for RQEs.
2603 */
2604 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2605 *polled = true;
2606 status = OCRDMA_CQE_WR_FLUSH_ERR;
2607 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2608 } else {
2609 /* stop processing further cqe as this cqe is used for
2610 * triggering cq event on buddy cq of RQ.
2611 * When QP is destroyed, this cqe will be removed
2612 * from the cq's hardware q.
2613 */
2614 *polled = false;
2615 *stop = true;
2616 expand = false;
2617 }
a96ffb1d
SX		 2618 } else if (is_hw_sq_empty(qp)) {
2619 /* Do nothing */
2620 expand = false;
2621 *polled = false;
2622 *stop = false;
fe2caefc
PP		 2623 } else {
2624 *polled = true;
2625 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2626 }
2627 return expand;
2628}
2629
2630static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2631 struct ocrdma_cqe *cqe,
2632 struct ib_wc *ibwc, bool *polled)
2633{
2634 bool expand = false;
2635 int tail = qp->sq.tail;
2636 u32 wqe_idx;
2637
2638 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2639 *polled = false; /* WC cannot be consumed yet */
2640 } else {
2641 ibwc->status = IB_WC_SUCCESS;
2642 ibwc->wc_flags = 0;
2643 ibwc->qp = &qp->ibqp;
2644 ocrdma_update_wc(qp, ibwc, tail);
2645 *polled = true;
fe2caefc 2646 }
43a6b402
NG		 2647 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2648 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2649 if (tail != wqe_idx)
2650 expand = true; /* Coalesced CQE can't be consumed yet */
2651
fe2caefc
PP		 2652 ocrdma_hwq_inc_tail(&qp->sq);
2653 return expand;
2654}
2655
2656static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2657 struct ib_wc *ibwc, bool *polled, bool *stop)
2658{
2659 int status;
2660 bool expand;
2661
2662 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2663 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2664
2665 if (status == OCRDMA_CQE_SUCCESS)
2666 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2667 else
2668 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2669 return expand;
2670}
2671
2672static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2673{
2674 int status;
2675
2676 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2677 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2678 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2679 OCRDMA_CQE_SRCQP_MASK;
2680 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2681 OCRDMA_CQE_PKEY_MASK;
2682 ibwc->wc_flags = IB_WC_GRH;
2683 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2684 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2685 return status;
2686}
2687
2688static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2689 struct ocrdma_cqe *cqe,
2690 struct ocrdma_qp *qp)
2691{
2692 unsigned long flags;
2693 struct ocrdma_srq *srq;
2694 u32 wqe_idx;
2695
2696 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402 2697 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
cf5788ad
SX		 2698 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
2699 if (wqe_idx < 1)
2700 BUG();
2701
fe2caefc
PP		 2702 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2703 spin_lock_irqsave(&srq->q_lock, flags);
cf5788ad 2704 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
fe2caefc
PP		 2705 spin_unlock_irqrestore(&srq->q_lock, flags);
2706 ocrdma_hwq_inc_tail(&srq->rq);
2707}
2708
2709static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2710 struct ib_wc *ibwc, bool *polled, bool *stop,
2711 int status)
2712{
2713 bool expand;
ad56ebb4
SX		 2714 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2715
2716 if (status < OCRDMA_MAX_CQE_ERR)
2717 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2718
2719 /* when hw_rq is empty, but wq is not empty, so continue
2720 * to keep the cqe to get the cq event again.
2721 */
2722 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2723 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2724 *polled = true;
2725 status = OCRDMA_CQE_WR_FLUSH_ERR;
2726 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2727 } else {
2728 *polled = false;
2729 *stop = true;
2730 expand = false;
2731 }
a96ffb1d
SX		 2732 } else if (is_hw_rq_empty(qp)) {
2733 /* Do nothing */
2734 expand = false;
2735 *polled = false;
2736 *stop = false;
a3698a9b
PP		 2737 } else {
2738 *polled = true;
fe2caefc 2739 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2740 }
fe2caefc
PP		 2741 return expand;
2742}
2743
2744static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2745 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2746{
2747 ibwc->opcode = IB_WC_RECV;
2748 ibwc->qp = &qp->ibqp;
2749 ibwc->status = IB_WC_SUCCESS;
2750
2751 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2752 ocrdma_update_ud_rcqe(ibwc, cqe);
2753 else
2754 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2755
2756 if (is_cqe_imm(cqe)) {
2757 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2758 ibwc->wc_flags |= IB_WC_WITH_IMM;
2759 } else if (is_cqe_wr_imm(cqe)) {
2760 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2761 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2762 ibwc->wc_flags |= IB_WC_WITH_IMM;
2763 } else if (is_cqe_invalidated(cqe)) {
2764 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2765 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2766 }
f99b1649 2767 if (qp->ibqp.srq) {
fe2caefc 2768 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2769 } else {
fe2caefc
PP		 2770 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2771 ocrdma_hwq_inc_tail(&qp->rq);
2772 }
2773}
2774
2775static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2776 struct ib_wc *ibwc, bool *polled, bool *stop)
2777{
2778 int status;
2779 bool expand = false;
2780
2781 ibwc->wc_flags = 0;
f99b1649 2782 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2783 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2784 OCRDMA_CQE_UD_STATUS_MASK) >>
2785 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2786 } else {
fe2caefc
PP		 2787 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2788 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2789 }
fe2caefc
PP		 2790
2791 if (status == OCRDMA_CQE_SUCCESS) {
2792 *polled = true;
2793 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2794 } else {
2795 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2796 status);
2797 }
2798 return expand;
2799}
2800
2801static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2802 u16 cur_getp)
2803{
2804 if (cq->phase_change) {
2805 if (cur_getp == 0)
2806 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2807 } else {
fe2caefc
PP		 2808 /* clear valid bit */
2809 cqe->flags_status_srcqpn = 0;
f99b1649 2810 }
fe2caefc
PP		 2811}
2812
2813static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2814 struct ib_wc *ibwc)
2815{
2816 u16 qpn = 0;
2817 int i = 0;
2818 bool expand = false;
2819 int polled_hw_cqes = 0;
2820 struct ocrdma_qp *qp = NULL;
1afc0454 2821 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2822 struct ocrdma_cqe *cqe;
2823 u16 cur_getp; bool polled = false; bool stop = false;
2824
2825 cur_getp = cq->getp;
2826 while (num_entries) {
2827 cqe = cq->va + cur_getp;
2828 /* check whether valid cqe or not */
2829 if (!is_cqe_valid(cq, cqe))
2830 break;
2831 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2832 /* ignore discarded cqe */
2833 if (qpn == 0)
2834 goto skip_cqe;
2835 qp = dev->qp_tbl[qpn];
2836 BUG_ON(qp == NULL);
2837
2838 if (is_cqe_for_sq(cqe)) {
2839 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2840 &stop);
2841 } else {
2842 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2843 &stop);
2844 }
2845 if (expand)
2846 goto expand_cqe;
2847 if (stop)
2848 goto stop_cqe;
2849 /* clear qpn to avoid duplicate processing by discard_cqe() */
2850 cqe->cmn.qpn = 0;
2851skip_cqe:
2852 polled_hw_cqes += 1;
2853 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2854 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2855expand_cqe:
2856 if (polled) {
2857 num_entries -= 1;
2858 i += 1;
2859 ibwc = ibwc + 1;
2860 polled = false;
2861 }
2862 }
2863stop_cqe:
2864 cq->getp = cur_getp;
ea617626
DS		 2865 if (cq->deferred_arm) {
2866 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
fe2caefc 2867 polled_hw_cqes);
ea617626
DS		 2868 cq->deferred_arm = false;
2869 cq->deferred_sol = false;
2870 } else {
2871 /* We need to pop the CQE. No need to arm */
2872 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
fe2caefc 2873 polled_hw_cqes);
ea617626 2874 cq->deferred_sol = false;
fe2caefc 2875 }
ea617626 2876
fe2caefc
PP		 2877 return i;
2878}
2879
2880/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2881static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2882 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2883{
2884 int err_cqes = 0;
2885
2886 while (num_entries) {
2887 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2888 break;
2889 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2890 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2891 ocrdma_hwq_inc_tail(&qp->sq);
2892 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2893 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2894 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2895 } else {
fe2caefc 2896 return err_cqes;
f99b1649 2897 }
fe2caefc
PP		 2898 ibwc->byte_len = 0;
2899 ibwc->status = IB_WC_WR_FLUSH_ERR;
2900 ibwc = ibwc + 1;
2901 err_cqes += 1;
2902 num_entries -= 1;
2903 }
2904 return err_cqes;
2905}
2906
2907int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2908{
2909 int cqes_to_poll = num_entries;
1afc0454
NG		 2910 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2911 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2912 int num_os_cqe = 0, err_cqes = 0;
2913 struct ocrdma_qp *qp;
1afc0454 2914 unsigned long flags;
fe2caefc
PP		 2915
2916 /* poll cqes from adapter CQ */
2917 spin_lock_irqsave(&cq->cq_lock, flags);
2918 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2919 spin_unlock_irqrestore(&cq->cq_lock, flags);
2920 cqes_to_poll -= num_os_cqe;
2921
2922 if (cqes_to_poll) {
2923 wc = wc + num_os_cqe;
2924 /* adapter returns single error cqe when qp moves to
2925 * error state. So insert error cqes with wc_status as
2926 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2927 * respectively which uses this CQ.
2928 */
2929 spin_lock_irqsave(&dev->flush_q_lock, flags);
2930 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2931 if (cqes_to_poll == 0)
2932 break;
2933 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2934 cqes_to_poll -= err_cqes;
2935 num_os_cqe += err_cqes;
2936 wc = wc + err_cqes;
2937 }
2938 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2939 }
2940 return num_os_cqe;
2941}
2942
2943int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2944{
1afc0454
NG		 2945 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2946 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2947 u16 cq_id;
1afc0454 2948 unsigned long flags;
ea617626 2949 bool arm_needed = false, sol_needed = false;
fe2caefc 2950
fe2caefc 2951 cq_id = cq->id;
fe2caefc
PP		 2952
2953 spin_lock_irqsave(&cq->cq_lock, flags);
2954 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2955 arm_needed = true;
fe2caefc 2956 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2957 sol_needed = true;
fe2caefc 2958
ea617626
DS		 2959 if (cq->first_arm) {
2960 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
2961 cq->first_arm = false;
fe2caefc 2962 }
ea617626 2963
f93439e4 2964 cq->deferred_arm = true;
ea617626 2965 cq->deferred_sol = sol_needed;
fe2caefc 2966 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2967
fe2caefc
PP		 2968 return 0;
2969}
7c33880c
NG		 2970
2971struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
2972{
2973 int status;
2974 struct ocrdma_mr *mr;
2975 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2976 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2977
2978 if (max_page_list_len > dev->attr.max_pages_per_frmr)
2979 return ERR_PTR(-EINVAL);
2980
2981 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2982 if (!mr)
2983 return ERR_PTR(-ENOMEM);
2984
2985 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
2986 if (status)
2987 goto pbl_err;
2988 mr->hwmr.fr_mr = 1;
2989 mr->hwmr.remote_rd = 0;
2990 mr->hwmr.remote_wr = 0;
2991 mr->hwmr.local_rd = 0;
2992 mr->hwmr.local_wr = 0;
2993 mr->hwmr.mw_bind = 0;
2994 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2995 if (status)
2996 goto pbl_err;
2997 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2998 if (status)
2999 goto mbx_err;
3000 mr->ibmr.rkey = mr->hwmr.lkey;
3001 mr->ibmr.lkey = mr->hwmr.lkey;
7a1e89d8
RD		 3002 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
3003 (unsigned long) mr;
7c33880c
NG		 3004 return &mr->ibmr;
3005mbx_err:
3006 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3007pbl_err:
3008 kfree(mr);
3009 return ERR_PTR(-ENOMEM);
3010}
3011
3012struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
3013 *ibdev,
3014 int page_list_len)
3015{
3016 struct ib_fast_reg_page_list *frmr_list;
3017 int size;
3018
3019 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
3020 frmr_list = kzalloc(size, GFP_KERNEL);
3021 if (!frmr_list)
3022 return ERR_PTR(-ENOMEM);
3023 frmr_list->page_list = (u64 *)(frmr_list + 1);
3024 return frmr_list;
3025}
3026
3027void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
3028{
3029 kfree(page_list);
3030}
cffce990
NG		 3031
3032#define MAX_KERNEL_PBE_SIZE 65536
3033static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
3034 int buf_cnt, u32 *pbe_size)
3035{
3036 u64 total_size = 0;
3037 u64 buf_size = 0;
3038 int i;
3039 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
3040 *pbe_size = roundup_pow_of_two(*pbe_size);
3041
3042 /* find the smallest PBE size that we can have */
3043 for (i = 0; i < buf_cnt; i++) {
3044 /* first addr may not be page aligned, so ignore checking */
3045 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
3046 (buf_list[i].size & ~PAGE_MASK))) {
3047 return 0;
3048 }
3049
3050 /* if configured PBE size is greater then the chosen one,
3051 * reduce the PBE size.
3052 */
3053 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
3054 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
3055 buf_size = roundup_pow_of_two(buf_size);
3056 if (*pbe_size > buf_size)
3057 *pbe_size = buf_size;
3058
3059 total_size += buf_size;
3060 }
3061 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
3062 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
3063
3064 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
3065
3066 return total_size >> ilog2(*pbe_size);
3067}
3068
3069static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
3070 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
3071 struct ocrdma_hw_mr *hwmr)
3072{
3073 int i;
3074 int idx;
3075 int pbes_per_buf = 0;
3076 u64 buf_addr = 0;
3077 int num_pbes;
3078 struct ocrdma_pbe *pbe;
3079 int total_num_pbes = 0;
3080
3081 if (!hwmr->num_pbes)
3082 return;
3083
3084 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3085 num_pbes = 0;
3086
3087 /* go through the OS phy regions & fill hw pbe entries into pbls. */
3088 for (i = 0; i < ib_buf_cnt; i++) {
3089 buf_addr = buf_list[i].addr;
3090 pbes_per_buf =
3091 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
3092 pbe_size;
3093 hwmr->len += buf_list[i].size;
3094 /* number of pbes can be more for one OS buf, when
3095 * buffers are of different sizes.
3096 * split the ib_buf to one or more pbes.
3097 */
3098 for (idx = 0; idx < pbes_per_buf; idx++) {
3099 /* we program always page aligned addresses,
3100 * first unaligned address is taken care by fbo.
3101 */
3102 if (i == 0) {
3103 /* for non zero fbo, assign the
3104 * start of the page.
3105 */
3106 pbe->pa_lo =
3107 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
3108 pbe->pa_hi =
3109 cpu_to_le32((u32) upper_32_bits(buf_addr));
3110 } else {
3111 pbe->pa_lo =
3112 cpu_to_le32((u32) (buf_addr & 0xffffffff));
3113 pbe->pa_hi =
3114 cpu_to_le32((u32) upper_32_bits(buf_addr));
3115 }
3116 buf_addr += pbe_size;
3117 num_pbes += 1;
3118 total_num_pbes += 1;
3119 pbe++;
3120
3121 if (total_num_pbes == hwmr->num_pbes)
3122 goto mr_tbl_done;
3123 /* if the pbl is full storing the pbes,
3124 * move to next pbl.
3125 */
3126 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
3127 pbl_tbl++;
3128 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3129 num_pbes = 0;
3130 }
3131 }
3132 }
3133mr_tbl_done:
3134 return;
3135}
3136
3137struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3138 struct ib_phys_buf *buf_list,
3139 int buf_cnt, int acc, u64 *iova_start)
3140{
3141 int status = -ENOMEM;
3142 struct ocrdma_mr *mr;
3143 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3144 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3145 u32 num_pbes;
3146 u32 pbe_size = 0;
3147
3148 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3149 return ERR_PTR(-EINVAL);
3150
3151 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3152 if (!mr)
3153 return ERR_PTR(status);
3154
3155 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3156 if (num_pbes == 0) {
3157 status = -EINVAL;
3158 goto pbl_err;
3159 }
3160 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3161 if (status)
3162 goto pbl_err;
3163
3164 mr->hwmr.pbe_size = pbe_size;
3165 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3166 mr->hwmr.va = *iova_start;
3167 mr->hwmr.local_rd = 1;
3168 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3169 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3170 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3171 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3172 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3173
3174 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3175 if (status)
3176 goto pbl_err;
3177 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3178 &mr->hwmr);
3179 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3180 if (status)
3181 goto mbx_err;
3182
3183 mr->ibmr.lkey = mr->hwmr.lkey;
3184 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3185 mr->ibmr.rkey = mr->hwmr.lkey;
3186 return &mr->ibmr;
3187
3188mbx_err:
3189 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3190pbl_err:
3191 kfree(mr);
3192 return ERR_PTR(status);
3193}
Linux kernel - Deliverables
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