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RDMA/ocrdma: EQ full catastrophe avoidance
[deliverable/linux.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
CommitLineData
fe2caefc
PP		 1/*******************************************************************
2 * This file is part of the Emulex RoCE Device Driver for *
3 * RoCE (RDMA over Converged Ethernet) adapters. *
4 * Copyright (C) 2008-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *
20 * Contact Information:
21 * linux-drivers@emulex.com
22 *
23 * Emulex
24 * 3333 Susan Street
25 * Costa Mesa, CA 92626
26 *******************************************************************/
27
28#include <linux/dma-mapping.h>
29#include <rdma/ib_verbs.h>
30#include <rdma/ib_user_verbs.h>
31#include <rdma/iw_cm.h>
32#include <rdma/ib_umem.h>
33#include <rdma/ib_addr.h>
34
35#include "ocrdma.h"
36#include "ocrdma_hw.h"
37#include "ocrdma_verbs.h"
38#include "ocrdma_abi.h"
39
40int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
41{
42 if (index > 1)
43 return -EINVAL;
44
45 *pkey = 0xffff;
46 return 0;
47}
48
49int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
50 int index, union ib_gid *sgid)
51{
52 struct ocrdma_dev *dev;
53
54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid));
7b33dc2b 56 if (index >= OCRDMA_MAX_SGID)
fe2caefc
PP		 57 return -EINVAL;
58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
60
61 return 0;
62}
63
64int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
65{
66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
67
68 memset(attr, 0, sizeof *attr);
69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
72 attr->max_mr_size = ~0ull;
73 attr->page_size_cap = 0xffff000;
74 attr->vendor_id = dev->nic_info.pdev->vendor;
75 attr->vendor_part_id = dev->nic_info.pdev->device;
76 attr->hw_ver = 0;
77 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 78 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 79 attr->max_qp_wr = dev->attr.max_wqe;
80
81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
82 IB_DEVICE_RC_RNR_NAK_GEN |
83 IB_DEVICE_SHUTDOWN_PORT |
84 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 85 IB_DEVICE_LOCAL_DMA_LKEY |
86 IB_DEVICE_MEM_MGT_EXTENSIONS;
634c5796 87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
c43e9ab8 88 attr->max_sge_rd = 0;
fe2caefc
PP		 89 attr->max_cq = dev->attr.max_cq;
90 attr->max_cqe = dev->attr.max_cqe;
91 attr->max_mr = dev->attr.max_mr;
92 attr->max_mw = 0;
93 attr->max_pd = dev->attr.max_pd;
94 attr->atomic_cap = 0;
95 attr->max_fmr = 0;
96 attr->max_map_per_fmr = 0;
97 attr->max_qp_rd_atom =
98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 100 attr->max_srq = dev->attr.max_srq;
d1e09ebf 101 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 102 attr->max_srq_wr = dev->attr.max_rqe;
103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
104 attr->max_fast_reg_page_list_len = 0;
105 attr->max_pkeys = 1;
106 return 0;
107}
108
f24ceba6
NG		 109static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
110 u8 *ib_speed, u8 *ib_width)
111{
112 int status;
113 u8 speed;
114
115 status = ocrdma_mbx_get_link_speed(dev, &speed);
116 if (status)
117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
118
119 switch (speed) {
120 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
121 *ib_speed = IB_SPEED_SDR;
122 *ib_width = IB_WIDTH_1X;
123 break;
124
125 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
126 *ib_speed = IB_SPEED_QDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
131 *ib_speed = IB_SPEED_DDR;
132 *ib_width = IB_WIDTH_4X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
136 *ib_speed = IB_SPEED_QDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 default:
141 /* Unsupported */
142 *ib_speed = IB_SPEED_SDR;
143 *ib_width = IB_WIDTH_1X;
2b50176d 144 }
f24ceba6
NG		 145}
146
147
fe2caefc
PP		 148int ocrdma_query_port(struct ib_device *ibdev,
149 u8 port, struct ib_port_attr *props)
150{
151 enum ib_port_state port_state;
152 struct ocrdma_dev *dev;
153 struct net_device *netdev;
154
155 dev = get_ocrdma_dev(ibdev);
156 if (port > 1) {
ef99c4c2
NG		 157 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
158 dev->id, port);
fe2caefc
PP		 159 return -EINVAL;
160 }
161 netdev = dev->nic_info.netdev;
162 if (netif_running(netdev) && netif_oper_up(netdev)) {
163 port_state = IB_PORT_ACTIVE;
164 props->phys_state = 5;
165 } else {
166 port_state = IB_PORT_DOWN;
167 props->phys_state = 3;
168 }
169 props->max_mtu = IB_MTU_4096;
170 props->active_mtu = iboe_get_mtu(netdev->mtu);
171 props->lid = 0;
172 props->lmc = 0;
173 props->sm_lid = 0;
174 props->sm_sl = 0;
175 props->state = port_state;
176 props->port_cap_flags =
177 IB_PORT_CM_SUP |
178 IB_PORT_REINIT_SUP |
b4a26a27 179 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
fe2caefc
PP		 180 props->gid_tbl_len = OCRDMA_MAX_SGID;
181 props->pkey_tbl_len = 1;
182 props->bad_pkey_cntr = 0;
183 props->qkey_viol_cntr = 0;
f24ceba6
NG		 184 get_link_speed_and_width(dev, &props->active_speed,
185 &props->active_width);
fe2caefc
PP		 186 props->max_msg_sz = 0x80000000;
187 props->max_vl_num = 4;
188 return 0;
189}
190
191int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
192 struct ib_port_modify *props)
193{
194 struct ocrdma_dev *dev;
195
196 dev = get_ocrdma_dev(ibdev);
197 if (port > 1) {
ef99c4c2 198 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
fe2caefc
PP		 199 return -EINVAL;
200 }
201 return 0;
202}
203
204static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
205 unsigned long len)
206{
207 struct ocrdma_mm *mm;
208
209 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
210 if (mm == NULL)
211 return -ENOMEM;
212 mm->key.phy_addr = phy_addr;
213 mm->key.len = len;
214 INIT_LIST_HEAD(&mm->entry);
215
216 mutex_lock(&uctx->mm_list_lock);
217 list_add_tail(&mm->entry, &uctx->mm_head);
218 mutex_unlock(&uctx->mm_list_lock);
219 return 0;
220}
221
222static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
223 unsigned long len)
224{
225 struct ocrdma_mm *mm, *tmp;
226
227 mutex_lock(&uctx->mm_list_lock);
228 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 229 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 230 continue;
231
232 list_del(&mm->entry);
233 kfree(mm);
234 break;
235 }
236 mutex_unlock(&uctx->mm_list_lock);
237}
238
239static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
240 unsigned long len)
241{
242 bool found = false;
243 struct ocrdma_mm *mm;
244
245 mutex_lock(&uctx->mm_list_lock);
246 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 247 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 248 continue;
249
250 found = true;
251 break;
252 }
253 mutex_unlock(&uctx->mm_list_lock);
254 return found;
255}
256
cffce990
NG		 257static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
258 struct ocrdma_ucontext *uctx,
259 struct ib_udata *udata)
260{
261 struct ocrdma_pd *pd = NULL;
262 int status = 0;
263
264 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
265 if (!pd)
266 return ERR_PTR(-ENOMEM);
267
268 if (udata && uctx) {
269 pd->dpp_enabled =
270 dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY;
271 pd->num_dpp_qp =
272 pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;
273 }
274
275retry:
276 status = ocrdma_mbx_alloc_pd(dev, pd);
277 if (status) {
278 if (pd->dpp_enabled) {
279 pd->dpp_enabled = false;
280 pd->num_dpp_qp = 0;
281 goto retry;
282 } else {
283 kfree(pd);
284 return ERR_PTR(status);
285 }
286 }
287
288 return pd;
289}
290
291static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
292 struct ocrdma_pd *pd)
293{
294 return (uctx->cntxt_pd == pd ? true : false);
295}
296
297static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
298 struct ocrdma_pd *pd)
299{
300 int status = 0;
301
302 status = ocrdma_mbx_dealloc_pd(dev, pd);
303 kfree(pd);
304 return status;
305}
306
307static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
308 struct ocrdma_ucontext *uctx,
309 struct ib_udata *udata)
310{
311 int status = 0;
312
313 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
314 if (IS_ERR(uctx->cntxt_pd)) {
315 status = PTR_ERR(uctx->cntxt_pd);
316 uctx->cntxt_pd = NULL;
317 goto err;
318 }
319
320 uctx->cntxt_pd->uctx = uctx;
321 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
322err:
323 return status;
324}
325
326static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
327{
328 int status = 0;
329 struct ocrdma_pd *pd = uctx->cntxt_pd;
330 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
331
332 BUG_ON(uctx->pd_in_use);
333 uctx->cntxt_pd = NULL;
334 status = _ocrdma_dealloc_pd(dev, pd);
335 return status;
336}
337
338static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
339{
340 struct ocrdma_pd *pd = NULL;
341
342 mutex_lock(&uctx->mm_list_lock);
343 if (!uctx->pd_in_use) {
344 uctx->pd_in_use = true;
345 pd = uctx->cntxt_pd;
346 }
347 mutex_unlock(&uctx->mm_list_lock);
348
349 return pd;
350}
351
352static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
353{
354 mutex_lock(&uctx->mm_list_lock);
355 uctx->pd_in_use = false;
356 mutex_unlock(&uctx->mm_list_lock);
357}
358
fe2caefc
PP		 359struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
360 struct ib_udata *udata)
361{
362 int status;
363 struct ocrdma_ucontext *ctx;
364 struct ocrdma_alloc_ucontext_resp resp;
365 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
366 struct pci_dev *pdev = dev->nic_info.pdev;
367 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
368
369 if (!udata)
370 return ERR_PTR(-EFAULT);
371 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
372 if (!ctx)
373 return ERR_PTR(-ENOMEM);
fe2caefc
PP		 374 INIT_LIST_HEAD(&ctx->mm_head);
375 mutex_init(&ctx->mm_list_lock);
376
377 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
378 &ctx->ah_tbl.pa, GFP_KERNEL);
379 if (!ctx->ah_tbl.va) {
380 kfree(ctx);
381 return ERR_PTR(-ENOMEM);
382 }
383 memset(ctx->ah_tbl.va, 0, map_len);
384 ctx->ah_tbl.len = map_len;
385
63ea3749 386 memset(&resp, 0, sizeof(resp));
fe2caefc
PP		 387 resp.ah_tbl_len = ctx->ah_tbl.len;
388 resp.ah_tbl_page = ctx->ah_tbl.pa;
389
390 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
391 if (status)
392 goto map_err;
cffce990
NG		 393
394 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
395 if (status)
396 goto pd_err;
397
fe2caefc
PP		 398 resp.dev_id = dev->id;
399 resp.max_inline_data = dev->attr.max_inline_data;
400 resp.wqe_size = dev->attr.wqe_size;
401 resp.rqe_size = dev->attr.rqe_size;
402 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 403
404 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
405 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
406 if (status)
407 goto cpy_err;
408 return &ctx->ibucontext;
409
410cpy_err:
cffce990 411pd_err:
fe2caefc
PP		 412 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
413map_err:
414 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
415 ctx->ah_tbl.pa);
416 kfree(ctx);
417 return ERR_PTR(status);
418}
419
420int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
421{
cffce990 422 int status = 0;
fe2caefc
PP		 423 struct ocrdma_mm *mm, *tmp;
424 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 425 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
426 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 427
cffce990
NG		 428 status = ocrdma_dealloc_ucontext_pd(uctx);
429
fe2caefc
PP		 430 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
431 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
432 uctx->ah_tbl.pa);
433
434 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
435 list_del(&mm->entry);
436 kfree(mm);
437 }
438 kfree(uctx);
cffce990 439 return status;
fe2caefc
PP		 440}
441
442int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
443{
444 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 445 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 446 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
447 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
448 unsigned long len = (vma->vm_end - vma->vm_start);
449 int status = 0;
450 bool found;
451
452 if (vma->vm_start & (PAGE_SIZE - 1))
453 return -EINVAL;
454 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
455 if (!found)
456 return -EINVAL;
457
458 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
459 dev->nic_info.db_total_size)) &&
460 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 461 if (vma->vm_flags & VM_READ)
462 return -EPERM;
463
464 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 465 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
466 len, vma->vm_page_prot);
467 } else if (dev->nic_info.dpp_unmapped_len &&
468 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
469 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
470 dev->nic_info.dpp_unmapped_len)) &&
471 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 472 if (vma->vm_flags & VM_READ)
473 return -EPERM;
474
fe2caefc
PP		 475 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
476 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
477 len, vma->vm_page_prot);
478 } else {
fe2caefc
PP		 479 status = remap_pfn_range(vma, vma->vm_start,
480 vma->vm_pgoff, len, vma->vm_page_prot);
481 }
482 return status;
483}
484
45e86b33 485static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 486 struct ib_ucontext *ib_ctx,
487 struct ib_udata *udata)
488{
489 int status;
490 u64 db_page_addr;
da496438 491 u64 dpp_page_addr = 0;
fe2caefc
PP		 492 u32 db_page_size;
493 struct ocrdma_alloc_pd_uresp rsp;
494 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
495
63ea3749 496 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 497 rsp.id = pd->id;
498 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 499 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 500 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 501
502 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
503 if (status)
504 return status;
505
506 if (pd->dpp_enabled) {
f99b1649 507 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 508 (pd->id * PAGE_SIZE);
fe2caefc 509 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 510 PAGE_SIZE);
fe2caefc
PP		 511 if (status)
512 goto dpp_map_err;
513 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
514 rsp.dpp_page_addr_lo = dpp_page_addr;
515 }
516
517 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
518 if (status)
519 goto ucopy_err;
520
521 pd->uctx = uctx;
522 return 0;
523
524ucopy_err:
da496438 525 if (pd->dpp_enabled)
43a6b402 526 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 527dpp_map_err:
528 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
529 return status;
530}
531
532struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
533 struct ib_ucontext *context,
534 struct ib_udata *udata)
535{
536 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
537 struct ocrdma_pd *pd;
cffce990 538 struct ocrdma_ucontext *uctx = NULL;
fe2caefc 539 int status;
cffce990 540 u8 is_uctx_pd = false;
fe2caefc 541
fe2caefc 542 if (udata && context) {
cffce990
NG		 543 uctx = get_ocrdma_ucontext(context);
544 pd = ocrdma_get_ucontext_pd(uctx);
545 if (pd) {
546 is_uctx_pd = true;
547 goto pd_mapping;
43a6b402 548 }
fe2caefc 549 }
fe2caefc 550
cffce990
NG		 551 pd = _ocrdma_alloc_pd(dev, uctx, udata);
552 if (IS_ERR(pd)) {
553 status = PTR_ERR(pd);
554 goto exit;
555 }
556
557pd_mapping:
fe2caefc 558 if (udata && context) {
45e86b33 559 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
fe2caefc
PP		 560 if (status)
561 goto err;
562 }
563 return &pd->ibpd;
564
565err:
cffce990
NG		 566 if (is_uctx_pd) {
567 ocrdma_release_ucontext_pd(uctx);
568 } else {
569 status = ocrdma_mbx_dealloc_pd(dev, pd);
570 kfree(pd);
571 }
572exit:
fe2caefc
PP		 573 return ERR_PTR(status);
574}
575
576int ocrdma_dealloc_pd(struct ib_pd *ibpd)
577{
578 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 579 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990
NG		 580 struct ocrdma_ucontext *uctx = NULL;
581 int status = 0;
fe2caefc
PP		 582 u64 usr_db;
583
cffce990
NG		 584 uctx = pd->uctx;
585 if (uctx) {
fe2caefc 586 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 587 (pd->id * PAGE_SIZE);
fe2caefc 588 if (pd->dpp_enabled)
43a6b402 589 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 590 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 591 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 592
593 if (is_ucontext_pd(uctx, pd)) {
594 ocrdma_release_ucontext_pd(uctx);
595 return status;
596 }
fe2caefc 597 }
cffce990 598 status = _ocrdma_dealloc_pd(dev, pd);
fe2caefc
PP		 599 return status;
600}
601
1afc0454
NG		 602static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
603 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 604{
605 int status;
fe2caefc 606
fe2caefc
PP		 607 mr->hwmr.fr_mr = 0;
608 mr->hwmr.local_rd = 1;
609 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
610 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
611 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
612 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
613 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
614 mr->hwmr.num_pbls = num_pbls;
615
f99b1649
NG		 616 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
617 if (status)
618 return status;
619
fe2caefc
PP		 620 mr->ibmr.lkey = mr->hwmr.lkey;
621 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
622 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 623 return 0;
fe2caefc
PP		 624}
625
626struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
627{
f99b1649 628 int status;
fe2caefc 629 struct ocrdma_mr *mr;
f99b1649
NG		 630 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
631 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
632
633 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
634 pr_err("%s err, invalid access rights\n", __func__);
635 return ERR_PTR(-EINVAL);
636 }
fe2caefc 637
f99b1649
NG		 638 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
639 if (!mr)
640 return ERR_PTR(-ENOMEM);
641
1afc0454 642 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 643 OCRDMA_ADDR_CHECK_DISABLE);
644 if (status) {
645 kfree(mr);
646 return ERR_PTR(status);
647 }
fe2caefc
PP		 648
649 return &mr->ibmr;
650}
651
652static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
653 struct ocrdma_hw_mr *mr)
654{
655 struct pci_dev *pdev = dev->nic_info.pdev;
656 int i = 0;
657
658 if (mr->pbl_table) {
659 for (i = 0; i < mr->num_pbls; i++) {
660 if (!mr->pbl_table[i].va)
661 continue;
662 dma_free_coherent(&pdev->dev, mr->pbl_size,
663 mr->pbl_table[i].va,
664 mr->pbl_table[i].pa);
665 }
666 kfree(mr->pbl_table);
667 mr->pbl_table = NULL;
668 }
669}
670
1afc0454
NG		 671static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
672 u32 num_pbes)
fe2caefc
PP		 673{
674 u32 num_pbls = 0;
675 u32 idx = 0;
676 int status = 0;
677 u32 pbl_size;
678
679 do {
680 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
681 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
682 status = -EFAULT;
683 break;
684 }
685 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
686 num_pbls = num_pbls / (pbl_size / sizeof(u64));
687 idx++;
1afc0454 688 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 689
690 mr->hwmr.num_pbes = num_pbes;
691 mr->hwmr.num_pbls = num_pbls;
692 mr->hwmr.pbl_size = pbl_size;
693 return status;
694}
695
696static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
697{
698 int status = 0;
699 int i;
700 u32 dma_len = mr->pbl_size;
701 struct pci_dev *pdev = dev->nic_info.pdev;
702 void *va;
703 dma_addr_t pa;
704
705 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
706 mr->num_pbls, GFP_KERNEL);
707
708 if (!mr->pbl_table)
709 return -ENOMEM;
710
711 for (i = 0; i < mr->num_pbls; i++) {
712 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
713 if (!va) {
714 ocrdma_free_mr_pbl_tbl(dev, mr);
715 status = -ENOMEM;
716 break;
717 }
718 memset(va, 0, dma_len);
719 mr->pbl_table[i].va = va;
720 mr->pbl_table[i].pa = pa;
721 }
722 return status;
723}
724
725static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
726 u32 num_pbes)
727{
728 struct ocrdma_pbe *pbe;
729 struct ib_umem_chunk *chunk;
730 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
731 struct ib_umem *umem = mr->umem;
732 int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
733
734 if (!mr->hwmr.num_pbes)
735 return;
736
737 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
738 pbe_cnt = 0;
739
740 shift = ilog2(umem->page_size);
741
742 list_for_each_entry(chunk, &umem->chunk_list, list) {
743 /* get all the dma regions from the chunk. */
744 for (i = 0; i < chunk->nmap; i++) {
745 pages = sg_dma_len(&chunk->page_list[i]) >> shift;
746 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
747 /* store the page address in pbe */
748 pbe->pa_lo =
749 cpu_to_le32(sg_dma_address
750 (&chunk->page_list[i]) +
751 (umem->page_size * pg_cnt));
752 pbe->pa_hi =
753 cpu_to_le32(upper_32_bits
754 ((sg_dma_address
755 (&chunk->page_list[i]) +
756 umem->page_size * pg_cnt)));
757 pbe_cnt += 1;
758 total_num_pbes += 1;
759 pbe++;
760
761 /* if done building pbes, issue the mbx cmd. */
762 if (total_num_pbes == num_pbes)
763 return;
764
765 /* if the given pbl is full storing the pbes,
766 * move to next pbl.
767 */
768 if (pbe_cnt ==
769 (mr->hwmr.pbl_size / sizeof(u64))) {
770 pbl_tbl++;
771 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
772 pbe_cnt = 0;
773 }
774 }
775 }
776 }
777}
778
779struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
780 u64 usr_addr, int acc, struct ib_udata *udata)
781{
782 int status = -ENOMEM;
f99b1649 783 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 784 struct ocrdma_mr *mr;
785 struct ocrdma_pd *pd;
fe2caefc
PP		 786 u32 num_pbes;
787
788 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 789
790 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
791 return ERR_PTR(-EINVAL);
792
793 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
794 if (!mr)
795 return ERR_PTR(status);
fe2caefc
PP		 796 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
797 if (IS_ERR(mr->umem)) {
798 status = -EFAULT;
799 goto umem_err;
800 }
801 num_pbes = ib_umem_page_count(mr->umem);
1afc0454 802 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
fe2caefc
PP		 803 if (status)
804 goto umem_err;
805
806 mr->hwmr.pbe_size = mr->umem->page_size;
807 mr->hwmr.fbo = mr->umem->offset;
808 mr->hwmr.va = usr_addr;
809 mr->hwmr.len = len;
810 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
811 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
812 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
813 mr->hwmr.local_rd = 1;
814 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
815 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
816 if (status)
817 goto umem_err;
818 build_user_pbes(dev, mr, num_pbes);
819 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
820 if (status)
821 goto mbx_err;
fe2caefc
PP		 822 mr->ibmr.lkey = mr->hwmr.lkey;
823 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
824 mr->ibmr.rkey = mr->hwmr.lkey;
825
826 return &mr->ibmr;
827
828mbx_err:
829 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
830umem_err:
831 kfree(mr);
832 return ERR_PTR(status);
833}
834
835int ocrdma_dereg_mr(struct ib_mr *ib_mr)
836{
837 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 838 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc
PP		 839 int status;
840
841 status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
842
843 if (mr->hwmr.fr_mr == 0)
844 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
845
fe2caefc
PP		 846 /* it could be user registered memory. */
847 if (mr->umem)
848 ib_umem_release(mr->umem);
849 kfree(mr);
850 return status;
851}
852
1afc0454
NG		 853static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
854 struct ib_udata *udata,
fe2caefc
PP		 855 struct ib_ucontext *ib_ctx)
856{
857 int status;
cffce990 858 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
fe2caefc
PP		 859 struct ocrdma_create_cq_uresp uresp;
860
63ea3749 861 memset(&uresp, 0, sizeof(uresp));
fe2caefc 862 uresp.cq_id = cq->id;
43a6b402 863 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 864 uresp.num_pages = 1;
865 uresp.max_hw_cqe = cq->max_hw_cqe;
866 uresp.page_addr[0] = cq->pa;
cffce990 867 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 868 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 869 uresp.phase_change = cq->phase_change ? 1 : 0;
870 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
871 if (status) {
ef99c4c2 872 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 873 __func__, dev->id, cq->id);
fe2caefc
PP		 874 goto err;
875 }
fe2caefc
PP		 876 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
877 if (status)
878 goto err;
879 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
880 if (status) {
881 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
882 goto err;
883 }
884 cq->ucontext = uctx;
885err:
886 return status;
887}
888
889struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
890 struct ib_ucontext *ib_ctx,
891 struct ib_udata *udata)
892{
893 struct ocrdma_cq *cq;
894 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
cffce990
NG		 895 struct ocrdma_ucontext *uctx = NULL;
896 u16 pd_id = 0;
fe2caefc
PP		 897 int status;
898 struct ocrdma_create_cq_ureq ureq;
899
900 if (udata) {
901 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
902 return ERR_PTR(-EFAULT);
903 } else
904 ureq.dpp_cq = 0;
905 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
906 if (!cq)
907 return ERR_PTR(-ENOMEM);
908
909 spin_lock_init(&cq->cq_lock);
910 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 911 INIT_LIST_HEAD(&cq->sq_head);
912 INIT_LIST_HEAD(&cq->rq_head);
ea617626 913 cq->first_arm = true;
fe2caefc 914
cffce990
NG		 915 if (ib_ctx) {
916 uctx = get_ocrdma_ucontext(ib_ctx);
917 pd_id = uctx->cntxt_pd->id;
918 }
919
920 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
fe2caefc
PP		 921 if (status) {
922 kfree(cq);
923 return ERR_PTR(status);
924 }
925 if (ib_ctx) {
1afc0454 926 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
fe2caefc
PP		 927 if (status)
928 goto ctx_err;
929 }
930 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 931 dev->cq_tbl[cq->id] = cq;
fe2caefc
PP		 932 return &cq->ibcq;
933
934ctx_err:
935 ocrdma_mbx_destroy_cq(dev, cq);
936 kfree(cq);
937 return ERR_PTR(status);
938}
939
940int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
941 struct ib_udata *udata)
942{
943 int status = 0;
944 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
945
946 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
947 status = -EINVAL;
948 return status;
949 }
950 ibcq->cqe = new_cnt;
951 return status;
952}
953
ea617626
DS		 954static void ocrdma_flush_cq(struct ocrdma_cq *cq)
955{
956 int cqe_cnt;
957 int valid_count = 0;
958 unsigned long flags;
959
960 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
961 struct ocrdma_cqe *cqe = NULL;
962
963 cqe = cq->va;
964 cqe_cnt = cq->cqe_cnt;
965
966 /* Last irq might have scheduled a polling thread
967 * sync-up with it before hard flushing.
968 */
969 spin_lock_irqsave(&cq->cq_lock, flags);
970 while (cqe_cnt) {
971 if (is_cqe_valid(cq, cqe))
972 valid_count++;
973 cqe++;
974 cqe_cnt--;
975 }
976 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
977 spin_unlock_irqrestore(&cq->cq_lock, flags);
978}
979
fe2caefc
PP		 980int ocrdma_destroy_cq(struct ib_cq *ibcq)
981{
982 int status;
983 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 984 struct ocrdma_eq *eq = NULL;
1afc0454 985 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 986 int pdid = 0;
ea617626 987 u32 irq, indx;
fe2caefc 988
ea617626
DS		 989 dev->cq_tbl[cq->id] = NULL;
990 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
991 if (indx == -EINVAL)
992 BUG();
fe2caefc 993
ea617626
DS		 994 eq = &dev->eq_tbl[indx];
995 irq = ocrdma_get_irq(dev, eq);
996 synchronize_irq(irq);
997 ocrdma_flush_cq(cq);
998
999 status = ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 1000 if (cq->ucontext) {
cffce990 1001 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1002 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1003 PAGE_ALIGN(cq->len));
cffce990
NG		 1004 ocrdma_del_mmap(cq->ucontext,
1005 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1006 dev->nic_info.db_page_size);
1007 }
fe2caefc
PP		 1008
1009 kfree(cq);
1010 return status;
1011}
1012
1013static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1014{
1015 int status = -EINVAL;
1016
1017 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1018 dev->qp_tbl[qp->id] = qp;
1019 status = 0;
1020 }
1021 return status;
1022}
1023
1024static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1025{
1026 dev->qp_tbl[qp->id] = NULL;
1027}
1028
1029static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1030 struct ib_qp_init_attr *attrs)
1031{
43a6b402
NG		 1032 if ((attrs->qp_type != IB_QPT_GSI) &&
1033 (attrs->qp_type != IB_QPT_RC) &&
1034 (attrs->qp_type != IB_QPT_UC) &&
1035 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1036 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1037 __func__, dev->id, attrs->qp_type);
fe2caefc
PP		 1038 return -EINVAL;
1039 }
43a6b402
NG		 1040 /* Skip the check for QP1 to support CM size of 128 */
1041 if ((attrs->qp_type != IB_QPT_GSI) &&
1042 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1043 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1044 __func__, dev->id, attrs->cap.max_send_wr);
1045 pr_err("%s(%d) supported send_wr=0x%x\n",
1046 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1047 return -EINVAL;
1048 }
1049 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1050 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1051 __func__, dev->id, attrs->cap.max_recv_wr);
1052 pr_err("%s(%d) supported recv_wr=0x%x\n",
1053 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1054 return -EINVAL;
1055 }
1056 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1057 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1058 __func__, dev->id, attrs->cap.max_inline_data);
1059 pr_err("%s(%d) supported inline data size=0x%x\n",
1060 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1061 return -EINVAL;
1062 }
1063 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1064 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1065 __func__, dev->id, attrs->cap.max_send_sge);
1066 pr_err("%s(%d) supported send_sge=0x%x\n",
1067 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1068 return -EINVAL;
1069 }
1070 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1071 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1072 __func__, dev->id, attrs->cap.max_recv_sge);
1073 pr_err("%s(%d) supported recv_sge=0x%x\n",
1074 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1075 return -EINVAL;
1076 }
1077 /* unprivileged user space cannot create special QP */
1078 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1079 pr_err
fe2caefc
PP		 1080 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1081 __func__, dev->id, attrs->qp_type);
1082 return -EINVAL;
1083 }
1084 /* allow creating only one GSI type of QP */
1085 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1086 pr_err("%s(%d) GSI special QPs already created.\n",
1087 __func__, dev->id);
fe2caefc
PP		 1088 return -EINVAL;
1089 }
1090 /* verify consumer QPs are not trying to use GSI QP's CQ */
1091 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1092 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1093 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1094 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1095 __func__, dev->id);
fe2caefc
PP		 1096 return -EINVAL;
1097 }
1098 }
1099 return 0;
1100}
1101
1102static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1103 struct ib_udata *udata, int dpp_offset,
1104 int dpp_credit_lmt, int srq)
1105{
1106 int status = 0;
1107 u64 usr_db;
1108 struct ocrdma_create_qp_uresp uresp;
1109 struct ocrdma_dev *dev = qp->dev;
1110 struct ocrdma_pd *pd = qp->pd;
1111
1112 memset(&uresp, 0, sizeof(uresp));
1113 usr_db = dev->nic_info.unmapped_db +
1114 (pd->id * dev->nic_info.db_page_size);
1115 uresp.qp_id = qp->id;
1116 uresp.sq_dbid = qp->sq.dbid;
1117 uresp.num_sq_pages = 1;
43a6b402 1118 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
fe2caefc
PP		 1119 uresp.sq_page_addr[0] = qp->sq.pa;
1120 uresp.num_wqe_allocated = qp->sq.max_cnt;
1121 if (!srq) {
1122 uresp.rq_dbid = qp->rq.dbid;
1123 uresp.num_rq_pages = 1;
43a6b402 1124 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
fe2caefc
PP		 1125 uresp.rq_page_addr[0] = qp->rq.pa;
1126 uresp.num_rqe_allocated = qp->rq.max_cnt;
1127 }
1128 uresp.db_page_addr = usr_db;
1129 uresp.db_page_size = dev->nic_info.db_page_size;
1130 if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
1131 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
f11220ee
NG		 1132 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1133 uresp.db_shift = 24;
fe2caefc
PP		 1134 } else {
1135 uresp.db_sq_offset = OCRDMA_DB_SQ_OFFSET;
1136 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1137 uresp.db_shift = 16;
1138 }
fe2caefc
PP		 1139
1140 if (qp->dpp_enabled) {
1141 uresp.dpp_credit = dpp_credit_lmt;
1142 uresp.dpp_offset = dpp_offset;
1143 }
1144 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1145 if (status) {
ef99c4c2 1146 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1147 goto err;
1148 }
1149 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1150 uresp.sq_page_size);
1151 if (status)
1152 goto err;
1153
1154 if (!srq) {
1155 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1156 uresp.rq_page_size);
1157 if (status)
1158 goto rq_map_err;
1159 }
1160 return status;
1161rq_map_err:
1162 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1163err:
1164 return status;
1165}
1166
1167static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1168 struct ocrdma_pd *pd)
1169{
1170 if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
1171 qp->sq_db = dev->nic_info.db +
1172 (pd->id * dev->nic_info.db_page_size) +
1173 OCRDMA_DB_GEN2_SQ_OFFSET;
1174 qp->rq_db = dev->nic_info.db +
1175 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1176 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1177 } else {
1178 qp->sq_db = dev->nic_info.db +
1179 (pd->id * dev->nic_info.db_page_size) +
1180 OCRDMA_DB_SQ_OFFSET;
1181 qp->rq_db = dev->nic_info.db +
1182 (pd->id * dev->nic_info.db_page_size) +
1183 OCRDMA_DB_RQ_OFFSET;
1184 }
1185}
1186
1187static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1188{
1189 qp->wqe_wr_id_tbl =
1190 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1191 GFP_KERNEL);
1192 if (qp->wqe_wr_id_tbl == NULL)
1193 return -ENOMEM;
1194 qp->rqe_wr_id_tbl =
1195 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1196 if (qp->rqe_wr_id_tbl == NULL)
1197 return -ENOMEM;
1198
1199 return 0;
1200}
1201
1202static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1203 struct ocrdma_pd *pd,
1204 struct ib_qp_init_attr *attrs)
1205{
1206 qp->pd = pd;
1207 spin_lock_init(&qp->q_lock);
1208 INIT_LIST_HEAD(&qp->sq_entry);
1209 INIT_LIST_HEAD(&qp->rq_entry);
1210
1211 qp->qp_type = attrs->qp_type;
1212 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1213 qp->max_inline_data = attrs->cap.max_inline_data;
1214 qp->sq.max_sges = attrs->cap.max_send_sge;
1215 qp->rq.max_sges = attrs->cap.max_recv_sge;
1216 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1217 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1218}
1219
fe2caefc
PP		 1220
1221static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1222 struct ib_qp_init_attr *attrs)
1223{
1224 if (attrs->qp_type == IB_QPT_GSI) {
1225 dev->gsi_qp_created = 1;
1226 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1227 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1228 }
1229}
1230
1231struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1232 struct ib_qp_init_attr *attrs,
1233 struct ib_udata *udata)
1234{
1235 int status;
1236 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1237 struct ocrdma_qp *qp;
f99b1649 1238 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1239 struct ocrdma_create_qp_ureq ureq;
1240 u16 dpp_credit_lmt, dpp_offset;
1241
1242 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1243 if (status)
1244 goto gen_err;
1245
1246 memset(&ureq, 0, sizeof(ureq));
1247 if (udata) {
1248 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1249 return ERR_PTR(-EFAULT);
1250 }
1251 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1252 if (!qp) {
1253 status = -ENOMEM;
1254 goto gen_err;
1255 }
1256 qp->dev = dev;
1257 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1258 if (udata == NULL)
1259 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1260 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1261
1262 mutex_lock(&dev->dev_lock);
1263 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1264 ureq.dpp_cq_id,
1265 &dpp_offset, &dpp_credit_lmt);
1266 if (status)
1267 goto mbx_err;
1268
1269 /* user space QP's wr_id table are managed in library */
1270 if (udata == NULL) {
fe2caefc
PP		 1271 status = ocrdma_alloc_wr_id_tbl(qp);
1272 if (status)
1273 goto map_err;
1274 }
1275
1276 status = ocrdma_add_qpn_map(dev, qp);
1277 if (status)
1278 goto map_err;
1279 ocrdma_set_qp_db(dev, qp, pd);
1280 if (udata) {
1281 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1282 dpp_credit_lmt,
1283 (attrs->srq != NULL));
1284 if (status)
1285 goto cpy_err;
1286 }
1287 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1288 qp->ibqp.qp_num = qp->id;
fe2caefc
PP		 1289 mutex_unlock(&dev->dev_lock);
1290 return &qp->ibqp;
1291
1292cpy_err:
1293 ocrdma_del_qpn_map(dev, qp);
1294map_err:
1295 ocrdma_mbx_destroy_qp(dev, qp);
1296mbx_err:
1297 mutex_unlock(&dev->dev_lock);
1298 kfree(qp->wqe_wr_id_tbl);
1299 kfree(qp->rqe_wr_id_tbl);
1300 kfree(qp);
ef99c4c2 1301 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc
PP		 1302gen_err:
1303 return ERR_PTR(status);
1304}
1305
45e86b33
NG		 1306
1307static void ocrdma_flush_rq_db(struct ocrdma_qp *qp)
1308{
1309 if (qp->db_cache) {
1310 u32 val = qp->rq.dbid | (qp->db_cache <<
1311 ocrdma_get_num_posted_shift(qp));
1312 iowrite32(val, qp->rq_db);
1313 qp->db_cache = 0;
1314 }
1315}
1316
fe2caefc
PP		 1317int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1318 int attr_mask)
1319{
1320 int status = 0;
1321 struct ocrdma_qp *qp;
1322 struct ocrdma_dev *dev;
1323 enum ib_qp_state old_qps;
1324
1325 qp = get_ocrdma_qp(ibqp);
1326 dev = qp->dev;
1327 if (attr_mask & IB_QP_STATE)
057729cb 1328 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1329 /* if new and previous states are same hw doesn't need to
1330 * know about it.
1331 */
1332 if (status < 0)
1333 return status;
bc1b04ab 1334 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
45e86b33
NG		 1335 if (!status && attr_mask & IB_QP_STATE && attr->qp_state == IB_QPS_RTR)
1336 ocrdma_flush_rq_db(qp);
1337
fe2caefc
PP		 1338 return status;
1339}
1340
1341int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1342 int attr_mask, struct ib_udata *udata)
1343{
1344 unsigned long flags;
1345 int status = -EINVAL;
1346 struct ocrdma_qp *qp;
1347 struct ocrdma_dev *dev;
1348 enum ib_qp_state old_qps, new_qps;
1349
1350 qp = get_ocrdma_qp(ibqp);
1351 dev = qp->dev;
1352
1353 /* syncronize with multiple context trying to change, retrive qps */
1354 mutex_lock(&dev->dev_lock);
1355 /* syncronize with wqe, rqe posting and cqe processing contexts */
1356 spin_lock_irqsave(&qp->q_lock, flags);
1357 old_qps = get_ibqp_state(qp->state);
1358 if (attr_mask & IB_QP_STATE)
1359 new_qps = attr->qp_state;
1360 else
1361 new_qps = old_qps;
1362 spin_unlock_irqrestore(&qp->q_lock, flags);
1363
dd5f03be 1364 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
37721d85 1365 IB_LINK_LAYER_ETHERNET)) {
ef99c4c2
NG		 1366 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1367 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1368 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1369 old_qps, new_qps);
fe2caefc
PP		 1370 goto param_err;
1371 }
1372
1373 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1374 if (status > 0)
1375 status = 0;
1376param_err:
1377 mutex_unlock(&dev->dev_lock);
1378 return status;
1379}
1380
1381static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1382{
1383 switch (mtu) {
1384 case 256:
1385 return IB_MTU_256;
1386 case 512:
1387 return IB_MTU_512;
1388 case 1024:
1389 return IB_MTU_1024;
1390 case 2048:
1391 return IB_MTU_2048;
1392 case 4096:
1393 return IB_MTU_4096;
1394 default:
1395 return IB_MTU_1024;
1396 }
1397}
1398
1399static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1400{
1401 int ib_qp_acc_flags = 0;
1402
1403 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1404 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1405 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1406 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1407 return ib_qp_acc_flags;
1408}
1409
1410int ocrdma_query_qp(struct ib_qp *ibqp,
1411 struct ib_qp_attr *qp_attr,
1412 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1413{
1414 int status;
1415 u32 qp_state;
1416 struct ocrdma_qp_params params;
1417 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1418 struct ocrdma_dev *dev = qp->dev;
1419
1420 memset(&params, 0, sizeof(params));
1421 mutex_lock(&dev->dev_lock);
1422 status = ocrdma_mbx_query_qp(dev, qp, &params);
1423 mutex_unlock(&dev->dev_lock);
1424 if (status)
1425 goto mbx_err;
1426 qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
1427 qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
1428 qp_attr->path_mtu =
1429 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1430 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1431 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1432 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1433 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1434 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1435 qp_attr->dest_qp_num =
1436 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1437
1438 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1439 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1440 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1441 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1442 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1443 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc
PP		 1444 qp_init_attr->cap = qp_attr->cap;
1445 memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
1446 sizeof(params.dgid));
1447 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1448 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1449 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1450 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1451 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1452 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1453 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
a61d93d9 1454 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
fe2caefc
PP		 1455 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1456
1457 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1458 qp_attr->ah_attr.port_num = 1;
1459 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1460 OCRDMA_QP_PARAMS_SL_MASK) >>
1461 OCRDMA_QP_PARAMS_SL_SHIFT;
1462 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1463 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1464 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1465 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1466 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1467 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1468 qp_attr->retry_cnt =
1469 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1470 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1471 qp_attr->min_rnr_timer = 0;
1472 qp_attr->pkey_index = 0;
1473 qp_attr->port_num = 1;
1474 qp_attr->ah_attr.src_path_bits = 0;
1475 qp_attr->ah_attr.static_rate = 0;
1476 qp_attr->alt_pkey_index = 0;
1477 qp_attr->alt_port_num = 0;
1478 qp_attr->alt_timeout = 0;
1479 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1480 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1481 OCRDMA_QP_PARAMS_STATE_SHIFT;
1482 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1483 qp_attr->max_dest_rd_atomic =
1484 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1485 qp_attr->max_rd_atomic =
1486 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1487 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1488 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1489mbx_err:
1490 return status;
1491}
1492
1493static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
1494{
1495 int i = idx / 32;
1496 unsigned int mask = (1 << (idx % 32));
1497
1498 if (srq->idx_bit_fields[i] & mask)
1499 srq->idx_bit_fields[i] &= ~mask;
1500 else
1501 srq->idx_bit_fields[i] |= mask;
1502}
1503
1504static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1505{
43a6b402 1506 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1507}
1508
1509static int is_hw_sq_empty(struct ocrdma_qp *qp)
1510{
43a6b402 1511 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1512}
1513
1514static int is_hw_rq_empty(struct ocrdma_qp *qp)
1515{
43a6b402 1516 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1517}
1518
1519static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1520{
1521 return q->va + (q->head * q->entry_size);
1522}
1523
1524static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1525 u32 idx)
1526{
1527 return q->va + (idx * q->entry_size);
1528}
1529
1530static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1531{
1532 q->head = (q->head + 1) & q->max_wqe_idx;
1533}
1534
1535static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1536{
1537 q->tail = (q->tail + 1) & q->max_wqe_idx;
1538}
1539
1540/* discard the cqe for a given QP */
1541static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1542{
1543 unsigned long cq_flags;
1544 unsigned long flags;
1545 int discard_cnt = 0;
1546 u32 cur_getp, stop_getp;
1547 struct ocrdma_cqe *cqe;
1548 u32 qpn = 0;
1549
1550 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1551
1552 /* traverse through the CQEs in the hw CQ,
1553 * find the matching CQE for a given qp,
1554 * mark the matching one discarded by clearing qpn.
1555 * ring the doorbell in the poll_cq() as
1556 * we don't complete out of order cqe.
1557 */
1558
1559 cur_getp = cq->getp;
1560 /* find upto when do we reap the cq. */
1561 stop_getp = cur_getp;
1562 do {
1563 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1564 break;
1565
1566 cqe = cq->va + cur_getp;
1567 /* if (a) done reaping whole hw cq, or
1568 * (b) qp_xq becomes empty.
1569 * then exit
1570 */
1571 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1572 /* if previously discarded cqe found, skip that too. */
1573 /* check for matching qp */
1574 if (qpn == 0 || qpn != qp->id)
1575 goto skip_cqe;
1576
1577 /* mark cqe discarded so that it is not picked up later
1578 * in the poll_cq().
1579 */
1580 discard_cnt += 1;
1581 cqe->cmn.qpn = 0;
f99b1649 1582 if (is_cqe_for_sq(cqe)) {
fe2caefc 1583 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1584 } else {
fe2caefc
PP		 1585 if (qp->srq) {
1586 spin_lock_irqsave(&qp->srq->q_lock, flags);
1587 ocrdma_hwq_inc_tail(&qp->srq->rq);
1588 ocrdma_srq_toggle_bit(qp->srq, cur_getp);
1589 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1590
f99b1649 1591 } else {
fe2caefc 1592 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1593 }
fe2caefc
PP		 1594 }
1595skip_cqe:
1596 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1597 } while (cur_getp != stop_getp);
1598 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1599}
1600
f11220ee 1601void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1602{
1603 int found = false;
1604 unsigned long flags;
1605 struct ocrdma_dev *dev = qp->dev;
1606 /* sync with any active CQ poll */
1607
1608 spin_lock_irqsave(&dev->flush_q_lock, flags);
1609 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1610 if (found)
1611 list_del(&qp->sq_entry);
1612 if (!qp->srq) {
1613 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1614 if (found)
1615 list_del(&qp->rq_entry);
1616 }
1617 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1618}
1619
1620int ocrdma_destroy_qp(struct ib_qp *ibqp)
1621{
1622 int status;
1623 struct ocrdma_pd *pd;
1624 struct ocrdma_qp *qp;
1625 struct ocrdma_dev *dev;
1626 struct ib_qp_attr attrs;
1627 int attr_mask = IB_QP_STATE;
d19081e0 1628 unsigned long flags;
fe2caefc
PP		 1629
1630 qp = get_ocrdma_qp(ibqp);
1631 dev = qp->dev;
1632
1633 attrs.qp_state = IB_QPS_ERR;
1634 pd = qp->pd;
1635
1636 /* change the QP state to ERROR */
1637 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1638
1639 /* ensure that CQEs for newly created QP (whose id may be same with
1640 * one which just getting destroyed are same), dont get
1641 * discarded until the old CQEs are discarded.
1642 */
1643 mutex_lock(&dev->dev_lock);
1644 status = ocrdma_mbx_destroy_qp(dev, qp);
1645
1646 /*
1647 * acquire CQ lock while destroy is in progress, in order to
1648 * protect against proessing in-flight CQEs for this QP.
1649 */
d19081e0 1650 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
fe2caefc 1651 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0 1652 spin_lock(&qp->rq_cq->cq_lock);
fe2caefc
PP		 1653
1654 ocrdma_del_qpn_map(dev, qp);
1655
1656 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
d19081e0
DC		 1657 spin_unlock(&qp->rq_cq->cq_lock);
1658 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1659
1660 if (!pd->uctx) {
1661 ocrdma_discard_cqes(qp, qp->sq_cq);
1662 ocrdma_discard_cqes(qp, qp->rq_cq);
1663 }
1664 mutex_unlock(&dev->dev_lock);
1665
1666 if (pd->uctx) {
43a6b402
NG		 1667 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1668 PAGE_ALIGN(qp->sq.len));
fe2caefc 1669 if (!qp->srq)
43a6b402
NG		 1670 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1671 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1672 }
1673
1674 ocrdma_del_flush_qp(qp);
1675
fe2caefc
PP		 1676 kfree(qp->wqe_wr_id_tbl);
1677 kfree(qp->rqe_wr_id_tbl);
1678 kfree(qp);
1679 return status;
1680}
1681
1afc0454
NG		 1682static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1683 struct ib_udata *udata)
fe2caefc
PP		 1684{
1685 int status;
1686 struct ocrdma_create_srq_uresp uresp;
1687
63ea3749 1688 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1689 uresp.rq_dbid = srq->rq.dbid;
1690 uresp.num_rq_pages = 1;
1691 uresp.rq_page_addr[0] = srq->rq.pa;
1692 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1693 uresp.db_page_addr = dev->nic_info.unmapped_db +
1694 (srq->pd->id * dev->nic_info.db_page_size);
1695 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1696 uresp.num_rqe_allocated = srq->rq.max_cnt;
1afc0454 1697 if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
f11220ee 1698 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1699 uresp.db_shift = 24;
1700 } else {
1701 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1702 uresp.db_shift = 16;
1703 }
1704
1705 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1706 if (status)
1707 return status;
1708 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1709 uresp.rq_page_size);
1710 if (status)
1711 return status;
1712 return status;
1713}
1714
1715struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1716 struct ib_srq_init_attr *init_attr,
1717 struct ib_udata *udata)
1718{
1719 int status = -ENOMEM;
1720 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 1721 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1722 struct ocrdma_srq *srq;
1723
1724 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1725 return ERR_PTR(-EINVAL);
1726 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1727 return ERR_PTR(-EINVAL);
1728
1729 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1730 if (!srq)
1731 return ERR_PTR(status);
1732
1733 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1734 srq->pd = pd;
1735 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1736 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc
PP		 1737 if (status)
1738 goto err;
1739
1740 if (udata == NULL) {
1741 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1742 GFP_KERNEL);
1743 if (srq->rqe_wr_id_tbl == NULL)
1744 goto arm_err;
1745
1746 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1747 (srq->rq.max_cnt % 32 ? 1 : 0);
1748 srq->idx_bit_fields =
1749 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1750 if (srq->idx_bit_fields == NULL)
1751 goto arm_err;
1752 memset(srq->idx_bit_fields, 0xff,
1753 srq->bit_fields_len * sizeof(u32));
1754 }
1755
1756 if (init_attr->attr.srq_limit) {
1757 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1758 if (status)
1759 goto arm_err;
1760 }
1761
fe2caefc 1762 if (udata) {
1afc0454 1763 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1764 if (status)
1765 goto arm_err;
1766 }
1767
fe2caefc
PP		 1768 return &srq->ibsrq;
1769
1770arm_err:
1771 ocrdma_mbx_destroy_srq(dev, srq);
1772err:
1773 kfree(srq->rqe_wr_id_tbl);
1774 kfree(srq->idx_bit_fields);
1775 kfree(srq);
1776 return ERR_PTR(status);
1777}
1778
1779int ocrdma_modify_srq(struct ib_srq *ibsrq,
1780 struct ib_srq_attr *srq_attr,
1781 enum ib_srq_attr_mask srq_attr_mask,
1782 struct ib_udata *udata)
1783{
1784 int status = 0;
1785 struct ocrdma_srq *srq;
fe2caefc
PP		 1786
1787 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1788 if (srq_attr_mask & IB_SRQ_MAX_WR)
1789 status = -EINVAL;
1790 else
1791 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1792 return status;
1793}
1794
1795int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1796{
1797 int status;
1798 struct ocrdma_srq *srq;
fe2caefc
PP		 1799
1800 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1801 status = ocrdma_mbx_query_srq(srq, srq_attr);
1802 return status;
1803}
1804
1805int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1806{
1807 int status;
1808 struct ocrdma_srq *srq;
1afc0454 1809 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1810
1811 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1812
1813 status = ocrdma_mbx_destroy_srq(dev, srq);
1814
1815 if (srq->pd->uctx)
43a6b402
NG		 1816 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1817 PAGE_ALIGN(srq->rq.len));
fe2caefc 1818
fe2caefc
PP		 1819 kfree(srq->idx_bit_fields);
1820 kfree(srq->rqe_wr_id_tbl);
1821 kfree(srq);
1822 return status;
1823}
1824
1825/* unprivileged verbs and their support functions. */
1826static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1827 struct ocrdma_hdr_wqe *hdr,
1828 struct ib_send_wr *wr)
1829{
1830 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1831 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1832 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
1833
1834 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
1835 if (qp->qp_type == IB_QPT_GSI)
1836 ud_hdr->qkey = qp->qkey;
1837 else
1838 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1839 ud_hdr->rsvd_ahid = ah->id;
1840}
1841
1842static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1843 struct ocrdma_sge *sge, int num_sge,
1844 struct ib_sge *sg_list)
1845{
1846 int i;
1847
1848 for (i = 0; i < num_sge; i++) {
1849 sge[i].lrkey = sg_list[i].lkey;
1850 sge[i].addr_lo = sg_list[i].addr;
1851 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1852 sge[i].len = sg_list[i].length;
1853 hdr->total_len += sg_list[i].length;
1854 }
1855 if (num_sge == 0)
1856 memset(sge, 0, sizeof(*sge));
1857}
1858
117e6dd1
NG		 1859static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1860{
1861 uint32_t total_len = 0, i;
1862
1863 for (i = 0; i < num_sge; i++)
1864 total_len += sg_list[i].length;
1865 return total_len;
1866}
1867
1868
fe2caefc
PP		 1869static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1870 struct ocrdma_hdr_wqe *hdr,
1871 struct ocrdma_sge *sge,
1872 struct ib_send_wr *wr, u32 wqe_size)
1873{
117e6dd1
NG		 1874 int i;
1875 char *dpp_addr;
1876
43a6b402 1877 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1878 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1879 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2
NG		 1880 pr_err("%s() supported_len=0x%x,\n"
1881 " unspported len req=0x%x\n", __func__,
117e6dd1 1882 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1883 return -EINVAL;
1884 }
117e6dd1
NG		 1885 dpp_addr = (char *)sge;
1886 for (i = 0; i < wr->num_sge; i++) {
1887 memcpy(dpp_addr,
1888 (void *)(unsigned long)wr->sg_list[i].addr,
1889 wr->sg_list[i].length);
1890 dpp_addr += wr->sg_list[i].length;
1891 }
1892
fe2caefc 1893 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1894 if (0 == hdr->total_len)
43a6b402 1895 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1896 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1897 } else {
1898 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1899 if (wr->num_sge)
1900 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
1901 else
1902 wqe_size += sizeof(struct ocrdma_sge);
1903 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1904 }
1905 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1906 return 0;
1907}
1908
1909static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1910 struct ib_send_wr *wr)
1911{
1912 int status;
1913 struct ocrdma_sge *sge;
1914 u32 wqe_size = sizeof(*hdr);
1915
1916 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
1917 ocrdma_build_ud_hdr(qp, hdr, wr);
1918 sge = (struct ocrdma_sge *)(hdr + 2);
1919 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 1920 } else {
fe2caefc 1921 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 1922 }
fe2caefc
PP		 1923
1924 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1925 return status;
1926}
1927
1928static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1929 struct ib_send_wr *wr)
1930{
1931 int status;
1932 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1933 struct ocrdma_sge *sge = ext_rw + 1;
1934 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
1935
1936 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1937 if (status)
1938 return status;
1939 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1940 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1941 ext_rw->lrkey = wr->wr.rdma.rkey;
1942 ext_rw->len = hdr->total_len;
1943 return 0;
1944}
1945
1946static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
1947 struct ib_send_wr *wr)
1948{
1949 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1950 struct ocrdma_sge *sge = ext_rw + 1;
1951 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
1952 sizeof(struct ocrdma_hdr_wqe);
1953
1954 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1955 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1956 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
1957 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1958
1959 ext_rw->addr_lo = wr->wr.rdma.remote_addr;
1960 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
1961 ext_rw->lrkey = wr->wr.rdma.rkey;
1962 ext_rw->len = hdr->total_len;
1963}
1964
7c33880c
NG		 1965static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
1966 struct ocrdma_hw_mr *hwmr)
1967{
1968 int i;
1969 u64 buf_addr = 0;
1970 int num_pbes;
1971 struct ocrdma_pbe *pbe;
1972
1973 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1974 num_pbes = 0;
1975
1976 /* go through the OS phy regions & fill hw pbe entries into pbls. */
1977 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
1978 /* number of pbes can be more for one OS buf, when
1979 * buffers are of different sizes.
1980 * split the ib_buf to one or more pbes.
1981 */
1982 buf_addr = wr->wr.fast_reg.page_list->page_list[i];
1983 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
1984 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
1985 num_pbes += 1;
1986 pbe++;
1987
1988 /* if the pbl is full storing the pbes,
1989 * move to next pbl.
1990 */
1991 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
1992 pbl_tbl++;
1993 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
1994 }
1995 }
1996 return;
1997}
1998
1999static int get_encoded_page_size(int pg_sz)
2000{
2001 /* Max size is 256M 4096 << 16 */
2002 int i = 0;
2003 for (; i < 17; i++)
2004 if (pg_sz == (4096 << i))
2005 break;
2006 return i;
2007}
2008
2009
2010static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2011 struct ib_send_wr *wr)
2012{
2013 u64 fbo;
2014 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2015 struct ocrdma_mr *mr;
2016 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2017
2018 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2019
d5e3f378 2020 if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr)
7c33880c
NG		 2021 return -EINVAL;
2022
2023 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2024 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2025
2026 if (wr->wr.fast_reg.page_list_len == 0)
2027 BUG();
2028 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
2029 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2030 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
2031 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2032 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
2033 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2034 hdr->lkey = wr->wr.fast_reg.rkey;
2035 hdr->total_len = wr->wr.fast_reg.length;
2036
2037 fbo = wr->wr.fast_reg.iova_start -
2038 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
2039
2040 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
2041 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
2042 fast_reg->fbo_hi = upper_32_bits(fbo);
2043 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2044 fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
2045 fast_reg->size_sge =
2046 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
33ccbd85 2047 mr = (struct ocrdma_mr *) (unsigned long) qp->dev->stag_arr[(hdr->lkey >> 8) &
7c33880c
NG		 2048 (OCRDMA_MAX_STAG - 1)];
2049 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2050 return 0;
2051}
2052
fe2caefc
PP		 2053static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2054{
2055 u32 val = qp->sq.dbid | (1 << 16);
2056
2057 iowrite32(val, qp->sq_db);
2058}
2059
2060int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2061 struct ib_send_wr **bad_wr)
2062{
2063 int status = 0;
2064 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2065 struct ocrdma_hdr_wqe *hdr;
2066 unsigned long flags;
2067
2068 spin_lock_irqsave(&qp->q_lock, flags);
2069 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2070 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2071 *bad_wr = wr;
fe2caefc
PP		 2072 return -EINVAL;
2073 }
2074
2075 while (wr) {
2076 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2077 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2078 *bad_wr = wr;
fe2caefc
PP		 2079 status = -ENOMEM;
2080 break;
2081 }
2082 hdr = ocrdma_hwq_head(&qp->sq);
2083 hdr->cw = 0;
2b51a9b9 2084 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2085 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2086 if (wr->send_flags & IB_SEND_FENCE)
2087 hdr->cw |=
2088 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2089 if (wr->send_flags & IB_SEND_SOLICITED)
2090 hdr->cw |=
2091 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2092 hdr->total_len = 0;
2093 switch (wr->opcode) {
2094 case IB_WR_SEND_WITH_IMM:
2095 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2096 hdr->immdt = ntohl(wr->ex.imm_data);
2097 case IB_WR_SEND:
2098 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2099 ocrdma_build_send(qp, hdr, wr);
2100 break;
2101 case IB_WR_SEND_WITH_INV:
2102 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2103 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2104 hdr->lkey = wr->ex.invalidate_rkey;
2105 status = ocrdma_build_send(qp, hdr, wr);
2106 break;
2107 case IB_WR_RDMA_WRITE_WITH_IMM:
2108 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2109 hdr->immdt = ntohl(wr->ex.imm_data);
2110 case IB_WR_RDMA_WRITE:
2111 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2112 status = ocrdma_build_write(qp, hdr, wr);
2113 break;
2114 case IB_WR_RDMA_READ_WITH_INV:
2115 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2116 case IB_WR_RDMA_READ:
2117 ocrdma_build_read(qp, hdr, wr);
2118 break;
2119 case IB_WR_LOCAL_INV:
2120 hdr->cw |=
2121 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2122 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2123 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2124 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2125 hdr->lkey = wr->ex.invalidate_rkey;
2126 break;
7c33880c
NG		 2127 case IB_WR_FAST_REG_MR:
2128 status = ocrdma_build_fr(qp, hdr, wr);
2129 break;
fe2caefc
PP		 2130 default:
2131 status = -EINVAL;
2132 break;
2133 }
2134 if (status) {
2135 *bad_wr = wr;
2136 break;
2137 }
2b51a9b9 2138 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2139 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2140 else
2141 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2142 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2143 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2144 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2145 /* make sure wqe is written before adapter can access it */
2146 wmb();
2147 /* inform hw to start processing it */
2148 ocrdma_ring_sq_db(qp);
2149
2150 /* update pointer, counter for next wr */
2151 ocrdma_hwq_inc_head(&qp->sq);
2152 wr = wr->next;
2153 }
2154 spin_unlock_irqrestore(&qp->q_lock, flags);
2155 return status;
2156}
2157
2158static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2159{
df176ea0 2160 u32 val = qp->rq.dbid | (1 << ocrdma_get_num_posted_shift(qp));
fe2caefc 2161
45e86b33
NG		 2162 if (qp->state != OCRDMA_QPS_INIT)
2163 iowrite32(val, qp->rq_db);
2164 else
2165 qp->db_cache++;
fe2caefc
PP		 2166}
2167
2168static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2169 u16 tag)
2170{
2171 u32 wqe_size = 0;
2172 struct ocrdma_sge *sge;
2173 if (wr->num_sge)
2174 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2175 else
2176 wqe_size = sizeof(*sge) + sizeof(*rqe);
2177
2178 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2179 OCRDMA_WQE_SIZE_SHIFT);
2180 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2181 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2182 rqe->total_len = 0;
2183 rqe->rsvd_tag = tag;
2184 sge = (struct ocrdma_sge *)(rqe + 1);
2185 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2186 ocrdma_cpu_to_le32(rqe, wqe_size);
2187}
2188
2189int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2190 struct ib_recv_wr **bad_wr)
2191{
2192 int status = 0;
2193 unsigned long flags;
2194 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2195 struct ocrdma_hdr_wqe *rqe;
2196
2197 spin_lock_irqsave(&qp->q_lock, flags);
2198 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2199 spin_unlock_irqrestore(&qp->q_lock, flags);
2200 *bad_wr = wr;
2201 return -EINVAL;
2202 }
2203 while (wr) {
2204 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2205 wr->num_sge > qp->rq.max_sges) {
2206 *bad_wr = wr;
2207 status = -ENOMEM;
2208 break;
2209 }
2210 rqe = ocrdma_hwq_head(&qp->rq);
2211 ocrdma_build_rqe(rqe, wr, 0);
2212
2213 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2214 /* make sure rqe is written before adapter can access it */
2215 wmb();
2216
2217 /* inform hw to start processing it */
2218 ocrdma_ring_rq_db(qp);
2219
2220 /* update pointer, counter for next wr */
2221 ocrdma_hwq_inc_head(&qp->rq);
2222 wr = wr->next;
2223 }
2224 spin_unlock_irqrestore(&qp->q_lock, flags);
2225 return status;
2226}
2227
2228/* cqe for srq's rqe can potentially arrive out of order.
2229 * index gives the entry in the shadow table where to store
2230 * the wr_id. tag/index is returned in cqe to reference back
2231 * for a given rqe.
2232 */
2233static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2234{
2235 int row = 0;
2236 int indx = 0;
2237
2238 for (row = 0; row < srq->bit_fields_len; row++) {
2239 if (srq->idx_bit_fields[row]) {
2240 indx = ffs(srq->idx_bit_fields[row]);
2241 indx = (row * 32) + (indx - 1);
2242 if (indx >= srq->rq.max_cnt)
2243 BUG();
2244 ocrdma_srq_toggle_bit(srq, indx);
2245 break;
2246 }
2247 }
2248
2249 if (row == srq->bit_fields_len)
2250 BUG();
2251 return indx;
2252}
2253
2254static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2255{
2256 u32 val = srq->rq.dbid | (1 << 16);
2257
2258 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2259}
2260
2261int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2262 struct ib_recv_wr **bad_wr)
2263{
2264 int status = 0;
2265 unsigned long flags;
2266 struct ocrdma_srq *srq;
2267 struct ocrdma_hdr_wqe *rqe;
2268 u16 tag;
2269
2270 srq = get_ocrdma_srq(ibsrq);
2271
2272 spin_lock_irqsave(&srq->q_lock, flags);
2273 while (wr) {
2274 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2275 wr->num_sge > srq->rq.max_sges) {
2276 status = -ENOMEM;
2277 *bad_wr = wr;
2278 break;
2279 }
2280 tag = ocrdma_srq_get_idx(srq);
2281 rqe = ocrdma_hwq_head(&srq->rq);
2282 ocrdma_build_rqe(rqe, wr, tag);
2283
2284 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2285 /* make sure rqe is written before adapter can perform DMA */
2286 wmb();
2287 /* inform hw to start processing it */
2288 ocrdma_ring_srq_db(srq);
2289 /* update pointer, counter for next wr */
2290 ocrdma_hwq_inc_head(&srq->rq);
2291 wr = wr->next;
2292 }
2293 spin_unlock_irqrestore(&srq->q_lock, flags);
2294 return status;
2295}
2296
2297static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2298{
f99b1649 2299 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2300
2301 switch (status) {
2302 case OCRDMA_CQE_GENERAL_ERR:
2303 ibwc_status = IB_WC_GENERAL_ERR;
2304 break;
2305 case OCRDMA_CQE_LOC_LEN_ERR:
2306 ibwc_status = IB_WC_LOC_LEN_ERR;
2307 break;
2308 case OCRDMA_CQE_LOC_QP_OP_ERR:
2309 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2310 break;
2311 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2312 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2313 break;
2314 case OCRDMA_CQE_LOC_PROT_ERR:
2315 ibwc_status = IB_WC_LOC_PROT_ERR;
2316 break;
2317 case OCRDMA_CQE_WR_FLUSH_ERR:
2318 ibwc_status = IB_WC_WR_FLUSH_ERR;
2319 break;
2320 case OCRDMA_CQE_MW_BIND_ERR:
2321 ibwc_status = IB_WC_MW_BIND_ERR;
2322 break;
2323 case OCRDMA_CQE_BAD_RESP_ERR:
2324 ibwc_status = IB_WC_BAD_RESP_ERR;
2325 break;
2326 case OCRDMA_CQE_LOC_ACCESS_ERR:
2327 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2328 break;
2329 case OCRDMA_CQE_REM_INV_REQ_ERR:
2330 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2331 break;
2332 case OCRDMA_CQE_REM_ACCESS_ERR:
2333 ibwc_status = IB_WC_REM_ACCESS_ERR;
2334 break;
2335 case OCRDMA_CQE_REM_OP_ERR:
2336 ibwc_status = IB_WC_REM_OP_ERR;
2337 break;
2338 case OCRDMA_CQE_RETRY_EXC_ERR:
2339 ibwc_status = IB_WC_RETRY_EXC_ERR;
2340 break;
2341 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2342 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2343 break;
2344 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2345 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2346 break;
2347 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2348 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2349 break;
2350 case OCRDMA_CQE_REM_ABORT_ERR:
2351 ibwc_status = IB_WC_REM_ABORT_ERR;
2352 break;
2353 case OCRDMA_CQE_INV_EECN_ERR:
2354 ibwc_status = IB_WC_INV_EECN_ERR;
2355 break;
2356 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2357 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2358 break;
2359 case OCRDMA_CQE_FATAL_ERR:
2360 ibwc_status = IB_WC_FATAL_ERR;
2361 break;
2362 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2363 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2364 break;
2365 default:
2366 ibwc_status = IB_WC_GENERAL_ERR;
2367 break;
2b50176d 2368 }
fe2caefc
PP		 2369 return ibwc_status;
2370}
2371
2372static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2373 u32 wqe_idx)
2374{
2375 struct ocrdma_hdr_wqe *hdr;
2376 struct ocrdma_sge *rw;
2377 int opcode;
2378
2379 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2380
2381 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2382 /* Undo the hdr->cw swap */
2383 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2384 switch (opcode) {
2385 case OCRDMA_WRITE:
2386 ibwc->opcode = IB_WC_RDMA_WRITE;
2387 break;
2388 case OCRDMA_READ:
2389 rw = (struct ocrdma_sge *)(hdr + 1);
2390 ibwc->opcode = IB_WC_RDMA_READ;
2391 ibwc->byte_len = rw->len;
2392 break;
2393 case OCRDMA_SEND:
2394 ibwc->opcode = IB_WC_SEND;
2395 break;
7c33880c
NG		 2396 case OCRDMA_FR_MR:
2397 ibwc->opcode = IB_WC_FAST_REG_MR;
2398 break;
fe2caefc
PP		 2399 case OCRDMA_LKEY_INV:
2400 ibwc->opcode = IB_WC_LOCAL_INV;
2401 break;
2402 default:
2403 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2404 pr_err("%s() invalid opcode received = 0x%x\n",
2405 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2406 break;
2b50176d 2407 }
fe2caefc
PP		 2408}
2409
2410static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2411 struct ocrdma_cqe *cqe)
2412{
2413 if (is_cqe_for_sq(cqe)) {
2414 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2415 cqe->flags_status_srcqpn) &
2416 ~OCRDMA_CQE_STATUS_MASK);
2417 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2418 cqe->flags_status_srcqpn) |
2419 (OCRDMA_CQE_WR_FLUSH_ERR <<
2420 OCRDMA_CQE_STATUS_SHIFT));
2421 } else {
2422 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2423 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2424 cqe->flags_status_srcqpn) &
2425 ~OCRDMA_CQE_UD_STATUS_MASK);
2426 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2427 cqe->flags_status_srcqpn) |
2428 (OCRDMA_CQE_WR_FLUSH_ERR <<
2429 OCRDMA_CQE_UD_STATUS_SHIFT));
2430 } else {
2431 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2432 cqe->flags_status_srcqpn) &
2433 ~OCRDMA_CQE_STATUS_MASK);
2434 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2435 cqe->flags_status_srcqpn) |
2436 (OCRDMA_CQE_WR_FLUSH_ERR <<
2437 OCRDMA_CQE_STATUS_SHIFT));
2438 }
2439 }
2440}
2441
2442static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2443 struct ocrdma_qp *qp, int status)
2444{
2445 bool expand = false;
2446
2447 ibwc->byte_len = 0;
2448 ibwc->qp = &qp->ibqp;
2449 ibwc->status = ocrdma_to_ibwc_err(status);
2450
2451 ocrdma_flush_qp(qp);
057729cb 2452 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2453
2454 /* if wqe/rqe pending for which cqe needs to be returned,
2455 * trigger inflating it.
2456 */
2457 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2458 expand = true;
2459 ocrdma_set_cqe_status_flushed(qp, cqe);
2460 }
2461 return expand;
2462}
2463
2464static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2465 struct ocrdma_qp *qp, int status)
2466{
2467 ibwc->opcode = IB_WC_RECV;
2468 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2469 ocrdma_hwq_inc_tail(&qp->rq);
2470
2471 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2472}
2473
2474static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2475 struct ocrdma_qp *qp, int status)
2476{
2477 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2478 ocrdma_hwq_inc_tail(&qp->sq);
2479
2480 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2481}
2482
2483
2484static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2485 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2486 bool *polled, bool *stop)
2487{
2488 bool expand;
2489 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2490 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2491
2492 /* when hw sq is empty, but rq is not empty, so we continue
2493 * to keep the cqe in order to get the cq event again.
2494 */
2495 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2496 /* when cq for rq and sq is same, it is safe to return
2497 * flush cqe for RQEs.
2498 */
2499 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2500 *polled = true;
2501 status = OCRDMA_CQE_WR_FLUSH_ERR;
2502 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2503 } else {
2504 /* stop processing further cqe as this cqe is used for
2505 * triggering cq event on buddy cq of RQ.
2506 * When QP is destroyed, this cqe will be removed
2507 * from the cq's hardware q.
2508 */
2509 *polled = false;
2510 *stop = true;
2511 expand = false;
2512 }
2513 } else {
2514 *polled = true;
2515 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2516 }
2517 return expand;
2518}
2519
2520static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2521 struct ocrdma_cqe *cqe,
2522 struct ib_wc *ibwc, bool *polled)
2523{
2524 bool expand = false;
2525 int tail = qp->sq.tail;
2526 u32 wqe_idx;
2527
2528 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2529 *polled = false; /* WC cannot be consumed yet */
2530 } else {
2531 ibwc->status = IB_WC_SUCCESS;
2532 ibwc->wc_flags = 0;
2533 ibwc->qp = &qp->ibqp;
2534 ocrdma_update_wc(qp, ibwc, tail);
2535 *polled = true;
fe2caefc 2536 }
43a6b402
NG		 2537 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2538 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2539 if (tail != wqe_idx)
2540 expand = true; /* Coalesced CQE can't be consumed yet */
2541
fe2caefc
PP		 2542 ocrdma_hwq_inc_tail(&qp->sq);
2543 return expand;
2544}
2545
2546static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2547 struct ib_wc *ibwc, bool *polled, bool *stop)
2548{
2549 int status;
2550 bool expand;
2551
2552 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2553 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2554
2555 if (status == OCRDMA_CQE_SUCCESS)
2556 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2557 else
2558 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2559 return expand;
2560}
2561
2562static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2563{
2564 int status;
2565
2566 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2567 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2568 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2569 OCRDMA_CQE_SRCQP_MASK;
2570 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2571 OCRDMA_CQE_PKEY_MASK;
2572 ibwc->wc_flags = IB_WC_GRH;
2573 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2574 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2575 return status;
2576}
2577
2578static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2579 struct ocrdma_cqe *cqe,
2580 struct ocrdma_qp *qp)
2581{
2582 unsigned long flags;
2583 struct ocrdma_srq *srq;
2584 u32 wqe_idx;
2585
2586 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402
NG		 2587 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2588 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
fe2caefc
PP		 2589 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2590 spin_lock_irqsave(&srq->q_lock, flags);
2591 ocrdma_srq_toggle_bit(srq, wqe_idx);
2592 spin_unlock_irqrestore(&srq->q_lock, flags);
2593 ocrdma_hwq_inc_tail(&srq->rq);
2594}
2595
2596static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2597 struct ib_wc *ibwc, bool *polled, bool *stop,
2598 int status)
2599{
2600 bool expand;
2601
2602 /* when hw_rq is empty, but wq is not empty, so continue
2603 * to keep the cqe to get the cq event again.
2604 */
2605 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2606 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2607 *polled = true;
2608 status = OCRDMA_CQE_WR_FLUSH_ERR;
2609 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2610 } else {
2611 *polled = false;
2612 *stop = true;
2613 expand = false;
2614 }
a3698a9b
PP		 2615 } else {
2616 *polled = true;
fe2caefc 2617 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2618 }
fe2caefc
PP		 2619 return expand;
2620}
2621
2622static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2623 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2624{
2625 ibwc->opcode = IB_WC_RECV;
2626 ibwc->qp = &qp->ibqp;
2627 ibwc->status = IB_WC_SUCCESS;
2628
2629 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2630 ocrdma_update_ud_rcqe(ibwc, cqe);
2631 else
2632 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2633
2634 if (is_cqe_imm(cqe)) {
2635 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2636 ibwc->wc_flags |= IB_WC_WITH_IMM;
2637 } else if (is_cqe_wr_imm(cqe)) {
2638 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2639 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2640 ibwc->wc_flags |= IB_WC_WITH_IMM;
2641 } else if (is_cqe_invalidated(cqe)) {
2642 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2643 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2644 }
f99b1649 2645 if (qp->ibqp.srq) {
fe2caefc 2646 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2647 } else {
fe2caefc
PP		 2648 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2649 ocrdma_hwq_inc_tail(&qp->rq);
2650 }
2651}
2652
2653static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2654 struct ib_wc *ibwc, bool *polled, bool *stop)
2655{
2656 int status;
2657 bool expand = false;
2658
2659 ibwc->wc_flags = 0;
f99b1649 2660 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2661 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2662 OCRDMA_CQE_UD_STATUS_MASK) >>
2663 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2664 } else {
fe2caefc
PP		 2665 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2666 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2667 }
fe2caefc
PP		 2668
2669 if (status == OCRDMA_CQE_SUCCESS) {
2670 *polled = true;
2671 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2672 } else {
2673 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2674 status);
2675 }
2676 return expand;
2677}
2678
2679static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2680 u16 cur_getp)
2681{
2682 if (cq->phase_change) {
2683 if (cur_getp == 0)
2684 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2685 } else {
fe2caefc
PP		 2686 /* clear valid bit */
2687 cqe->flags_status_srcqpn = 0;
f99b1649 2688 }
fe2caefc
PP		 2689}
2690
2691static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2692 struct ib_wc *ibwc)
2693{
2694 u16 qpn = 0;
2695 int i = 0;
2696 bool expand = false;
2697 int polled_hw_cqes = 0;
2698 struct ocrdma_qp *qp = NULL;
1afc0454 2699 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2700 struct ocrdma_cqe *cqe;
2701 u16 cur_getp; bool polled = false; bool stop = false;
2702
2703 cur_getp = cq->getp;
2704 while (num_entries) {
2705 cqe = cq->va + cur_getp;
2706 /* check whether valid cqe or not */
2707 if (!is_cqe_valid(cq, cqe))
2708 break;
2709 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2710 /* ignore discarded cqe */
2711 if (qpn == 0)
2712 goto skip_cqe;
2713 qp = dev->qp_tbl[qpn];
2714 BUG_ON(qp == NULL);
2715
2716 if (is_cqe_for_sq(cqe)) {
2717 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2718 &stop);
2719 } else {
2720 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2721 &stop);
2722 }
2723 if (expand)
2724 goto expand_cqe;
2725 if (stop)
2726 goto stop_cqe;
2727 /* clear qpn to avoid duplicate processing by discard_cqe() */
2728 cqe->cmn.qpn = 0;
2729skip_cqe:
2730 polled_hw_cqes += 1;
2731 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2732 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2733expand_cqe:
2734 if (polled) {
2735 num_entries -= 1;
2736 i += 1;
2737 ibwc = ibwc + 1;
2738 polled = false;
2739 }
2740 }
2741stop_cqe:
2742 cq->getp = cur_getp;
ea617626
DS		 2743 if (cq->deferred_arm) {
2744 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
2745 polled_hw_cqes);
2746 cq->deferred_arm = false;
2747 cq->deferred_sol = false;
2748 } else {
2749 /* We need to pop the CQE. No need to arm */
2750 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
fe2caefc 2751 polled_hw_cqes);
ea617626 2752 cq->deferred_sol = false;
fe2caefc 2753 }
ea617626 2754
fe2caefc
PP		 2755 return i;
2756}
2757
2758/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2759static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2760 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2761{
2762 int err_cqes = 0;
2763
2764 while (num_entries) {
2765 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2766 break;
2767 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2768 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2769 ocrdma_hwq_inc_tail(&qp->sq);
2770 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2771 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2772 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2773 } else {
fe2caefc 2774 return err_cqes;
f99b1649 2775 }
fe2caefc
PP		 2776 ibwc->byte_len = 0;
2777 ibwc->status = IB_WC_WR_FLUSH_ERR;
2778 ibwc = ibwc + 1;
2779 err_cqes += 1;
2780 num_entries -= 1;
2781 }
2782 return err_cqes;
2783}
2784
2785int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2786{
2787 int cqes_to_poll = num_entries;
1afc0454
NG		 2788 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2789 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2790 int num_os_cqe = 0, err_cqes = 0;
2791 struct ocrdma_qp *qp;
1afc0454 2792 unsigned long flags;
fe2caefc
PP		 2793
2794 /* poll cqes from adapter CQ */
2795 spin_lock_irqsave(&cq->cq_lock, flags);
2796 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2797 spin_unlock_irqrestore(&cq->cq_lock, flags);
2798 cqes_to_poll -= num_os_cqe;
2799
2800 if (cqes_to_poll) {
2801 wc = wc + num_os_cqe;
2802 /* adapter returns single error cqe when qp moves to
2803 * error state. So insert error cqes with wc_status as
2804 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2805 * respectively which uses this CQ.
2806 */
2807 spin_lock_irqsave(&dev->flush_q_lock, flags);
2808 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2809 if (cqes_to_poll == 0)
2810 break;
2811 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2812 cqes_to_poll -= err_cqes;
2813 num_os_cqe += err_cqes;
2814 wc = wc + err_cqes;
2815 }
2816 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2817 }
2818 return num_os_cqe;
2819}
2820
2821int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2822{
1afc0454
NG		 2823 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2824 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2825 u16 cq_id;
1afc0454 2826 unsigned long flags;
ea617626 2827 bool arm_needed = false, sol_needed = false;
fe2caefc 2828
fe2caefc 2829 cq_id = cq->id;
fe2caefc
PP		 2830
2831 spin_lock_irqsave(&cq->cq_lock, flags);
2832 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2833 arm_needed = true;
fe2caefc 2834 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2835 sol_needed = true;
fe2caefc 2836
ea617626
DS		 2837 if (cq->first_arm) {
2838 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
2839 cq->first_arm = false;
2840 goto skip_defer;
fe2caefc 2841 }
ea617626
DS		 2842 cq->deferred_arm = true;
2843
2844skip_defer:
2845 cq->deferred_sol = sol_needed;
fe2caefc 2846 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2847
fe2caefc
PP		 2848 return 0;
2849}
7c33880c
NG		 2850
2851struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
2852{
2853 int status;
2854 struct ocrdma_mr *mr;
2855 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2856 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2857
2858 if (max_page_list_len > dev->attr.max_pages_per_frmr)
2859 return ERR_PTR(-EINVAL);
2860
2861 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2862 if (!mr)
2863 return ERR_PTR(-ENOMEM);
2864
2865 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
2866 if (status)
2867 goto pbl_err;
2868 mr->hwmr.fr_mr = 1;
2869 mr->hwmr.remote_rd = 0;
2870 mr->hwmr.remote_wr = 0;
2871 mr->hwmr.local_rd = 0;
2872 mr->hwmr.local_wr = 0;
2873 mr->hwmr.mw_bind = 0;
2874 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2875 if (status)
2876 goto pbl_err;
2877 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2878 if (status)
2879 goto mbx_err;
2880 mr->ibmr.rkey = mr->hwmr.lkey;
2881 mr->ibmr.lkey = mr->hwmr.lkey;
1852d1da 2882 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = mr;
7c33880c
NG		 2883 return &mr->ibmr;
2884mbx_err:
2885 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
2886pbl_err:
2887 kfree(mr);
2888 return ERR_PTR(-ENOMEM);
2889}
2890
2891struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
2892 *ibdev,
2893 int page_list_len)
2894{
2895 struct ib_fast_reg_page_list *frmr_list;
2896 int size;
2897
2898 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
2899 frmr_list = kzalloc(size, GFP_KERNEL);
2900 if (!frmr_list)
2901 return ERR_PTR(-ENOMEM);
2902 frmr_list->page_list = (u64 *)(frmr_list + 1);
2903 return frmr_list;
2904}
2905
2906void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
2907{
2908 kfree(page_list);
2909}
cffce990
NG		 2910
2911#define MAX_KERNEL_PBE_SIZE 65536
2912static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
2913 int buf_cnt, u32 *pbe_size)
2914{
2915 u64 total_size = 0;
2916 u64 buf_size = 0;
2917 int i;
2918 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
2919 *pbe_size = roundup_pow_of_two(*pbe_size);
2920
2921 /* find the smallest PBE size that we can have */
2922 for (i = 0; i < buf_cnt; i++) {
2923 /* first addr may not be page aligned, so ignore checking */
2924 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
2925 (buf_list[i].size & ~PAGE_MASK))) {
2926 return 0;
2927 }
2928
2929 /* if configured PBE size is greater then the chosen one,
2930 * reduce the PBE size.
2931 */
2932 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
2933 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
2934 buf_size = roundup_pow_of_two(buf_size);
2935 if (*pbe_size > buf_size)
2936 *pbe_size = buf_size;
2937
2938 total_size += buf_size;
2939 }
2940 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
2941 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
2942
2943 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
2944
2945 return total_size >> ilog2(*pbe_size);
2946}
2947
2948static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
2949 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
2950 struct ocrdma_hw_mr *hwmr)
2951{
2952 int i;
2953 int idx;
2954 int pbes_per_buf = 0;
2955 u64 buf_addr = 0;
2956 int num_pbes;
2957 struct ocrdma_pbe *pbe;
2958 int total_num_pbes = 0;
2959
2960 if (!hwmr->num_pbes)
2961 return;
2962
2963 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2964 num_pbes = 0;
2965
2966 /* go through the OS phy regions & fill hw pbe entries into pbls. */
2967 for (i = 0; i < ib_buf_cnt; i++) {
2968 buf_addr = buf_list[i].addr;
2969 pbes_per_buf =
2970 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
2971 pbe_size;
2972 hwmr->len += buf_list[i].size;
2973 /* number of pbes can be more for one OS buf, when
2974 * buffers are of different sizes.
2975 * split the ib_buf to one or more pbes.
2976 */
2977 for (idx = 0; idx < pbes_per_buf; idx++) {
2978 /* we program always page aligned addresses,
2979 * first unaligned address is taken care by fbo.
2980 */
2981 if (i == 0) {
2982 /* for non zero fbo, assign the
2983 * start of the page.
2984 */
2985 pbe->pa_lo =
2986 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2987 pbe->pa_hi =
2988 cpu_to_le32((u32) upper_32_bits(buf_addr));
2989 } else {
2990 pbe->pa_lo =
2991 cpu_to_le32((u32) (buf_addr & 0xffffffff));
2992 pbe->pa_hi =
2993 cpu_to_le32((u32) upper_32_bits(buf_addr));
2994 }
2995 buf_addr += pbe_size;
2996 num_pbes += 1;
2997 total_num_pbes += 1;
2998 pbe++;
2999
3000 if (total_num_pbes == hwmr->num_pbes)
3001 goto mr_tbl_done;
3002 /* if the pbl is full storing the pbes,
3003 * move to next pbl.
3004 */
3005 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
3006 pbl_tbl++;
3007 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3008 num_pbes = 0;
3009 }
3010 }
3011 }
3012mr_tbl_done:
3013 return;
3014}
3015
3016struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3017 struct ib_phys_buf *buf_list,
3018 int buf_cnt, int acc, u64 *iova_start)
3019{
3020 int status = -ENOMEM;
3021 struct ocrdma_mr *mr;
3022 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3023 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3024 u32 num_pbes;
3025 u32 pbe_size = 0;
3026
3027 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3028 return ERR_PTR(-EINVAL);
3029
3030 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3031 if (!mr)
3032 return ERR_PTR(status);
3033
3034 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3035 if (num_pbes == 0) {
3036 status = -EINVAL;
3037 goto pbl_err;
3038 }
3039 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3040 if (status)
3041 goto pbl_err;
3042
3043 mr->hwmr.pbe_size = pbe_size;
3044 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3045 mr->hwmr.va = *iova_start;
3046 mr->hwmr.local_rd = 1;
3047 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3048 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3049 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3050 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3051 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3052
3053 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3054 if (status)
3055 goto pbl_err;
3056 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3057 &mr->hwmr);
3058 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3059 if (status)
3060 goto mbx_err;
3061
3062 mr->ibmr.lkey = mr->hwmr.lkey;
3063 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3064 mr->ibmr.rkey = mr->hwmr.lkey;
3065 return &mr->ibmr;
3066
3067mbx_err:
3068 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3069pbl_err:
3070 kfree(mr);
3071 return ERR_PTR(status);
3072}
Linux kernel - Deliverables
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