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IB/qib: Unnecessary delayed completions on RC connection
[deliverable/linux.git] / drivers / infiniband / hw / qib / qib_rc.c
CommitLineData
f931551b
RC		 1/*
2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/io.h>
35
36#include "qib.h"
37
38/* cut down ridiculously long IB macro names */
39#define OP(x) IB_OPCODE_RC_##x
40
41static void rc_timeout(unsigned long arg);
42
43static u32 restart_sge(struct qib_sge_state *ss, struct qib_swqe *wqe,
44 u32 psn, u32 pmtu)
45{
46 u32 len;
47
48 len = ((psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
49 ss->sge = wqe->sg_list[0];
50 ss->sg_list = wqe->sg_list + 1;
51 ss->num_sge = wqe->wr.num_sge;
52 ss->total_len = wqe->length;
53 qib_skip_sge(ss, len, 0);
54 return wqe->length - len;
55}
56
57static void start_timer(struct qib_qp *qp)
58{
59 qp->s_flags |= QIB_S_TIMER;
60 qp->s_timer.function = rc_timeout;
61 /* 4.096 usec. * (1 << qp->timeout) */
62 qp->s_timer.expires = jiffies +
63 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1000UL);
64 add_timer(&qp->s_timer);
65}
66
67/**
68 * qib_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
69 * @dev: the device for this QP
70 * @qp: a pointer to the QP
71 * @ohdr: a pointer to the IB header being constructed
72 * @pmtu: the path MTU
73 *
74 * Return 1 if constructed; otherwise, return 0.
75 * Note that we are in the responder's side of the QP context.
76 * Note the QP s_lock must be held.
77 */
78static int qib_make_rc_ack(struct qib_ibdev *dev, struct qib_qp *qp,
79 struct qib_other_headers *ohdr, u32 pmtu)
80{
81 struct qib_ack_entry *e;
82 u32 hwords;
83 u32 len;
84 u32 bth0;
85 u32 bth2;
86
87 /* Don't send an ACK if we aren't supposed to. */
88 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
89 goto bail;
90
91 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
92 hwords = 5;
93
94 switch (qp->s_ack_state) {
95 case OP(RDMA_READ_RESPONSE_LAST):
96 case OP(RDMA_READ_RESPONSE_ONLY):
97 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
98 if (e->rdma_sge.mr) {
99 atomic_dec(&e->rdma_sge.mr->refcount);
100 e->rdma_sge.mr = NULL;
101 }
102 /* FALLTHROUGH */
103 case OP(ATOMIC_ACKNOWLEDGE):
104 /*
105 * We can increment the tail pointer now that the last
106 * response has been sent instead of only being
107 * constructed.
108 */
109 if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
110 qp->s_tail_ack_queue = 0;
111 /* FALLTHROUGH */
112 case OP(SEND_ONLY):
113 case OP(ACKNOWLEDGE):
114 /* Check for no next entry in the queue. */
115 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
116 if (qp->s_flags & QIB_S_ACK_PENDING)
117 goto normal;
118 goto bail;
119 }
120
121 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
122 if (e->opcode == OP(RDMA_READ_REQUEST)) {
123 /*
124 * If a RDMA read response is being resent and
125 * we haven't seen the duplicate request yet,
126 * then stop sending the remaining responses the
127 * responder has seen until the requester resends it.
128 */
129 len = e->rdma_sge.sge_length;
130 if (len && !e->rdma_sge.mr) {
131 qp->s_tail_ack_queue = qp->r_head_ack_queue;
132 goto bail;
133 }
134 /* Copy SGE state in case we need to resend */
135 qp->s_rdma_mr = e->rdma_sge.mr;
136 if (qp->s_rdma_mr)
137 atomic_inc(&qp->s_rdma_mr->refcount);
138 qp->s_ack_rdma_sge.sge = e->rdma_sge;
139 qp->s_ack_rdma_sge.num_sge = 1;
140 qp->s_cur_sge = &qp->s_ack_rdma_sge;
141 if (len > pmtu) {
142 len = pmtu;
143 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
144 } else {
145 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
146 e->sent = 1;
147 }
148 ohdr->u.aeth = qib_compute_aeth(qp);
149 hwords++;
150 qp->s_ack_rdma_psn = e->psn;
151 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
152 } else {
153 /* COMPARE_SWAP or FETCH_ADD */
154 qp->s_cur_sge = NULL;
155 len = 0;
156 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
157 ohdr->u.at.aeth = qib_compute_aeth(qp);
158 ohdr->u.at.atomic_ack_eth[0] =
159 cpu_to_be32(e->atomic_data >> 32);
160 ohdr->u.at.atomic_ack_eth[1] =
161 cpu_to_be32(e->atomic_data);
162 hwords += sizeof(ohdr->u.at) / sizeof(u32);
163 bth2 = e->psn & QIB_PSN_MASK;
164 e->sent = 1;
165 }
166 bth0 = qp->s_ack_state << 24;
167 break;
168
169 case OP(RDMA_READ_RESPONSE_FIRST):
170 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
171 /* FALLTHROUGH */
172 case OP(RDMA_READ_RESPONSE_MIDDLE):
173 qp->s_cur_sge = &qp->s_ack_rdma_sge;
174 qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
175 if (qp->s_rdma_mr)
176 atomic_inc(&qp->s_rdma_mr->refcount);
177 len = qp->s_ack_rdma_sge.sge.sge_length;
178 if (len > pmtu)
179 len = pmtu;
180 else {
181 ohdr->u.aeth = qib_compute_aeth(qp);
182 hwords++;
183 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
184 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
185 e->sent = 1;
186 }
187 bth0 = qp->s_ack_state << 24;
188 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
189 break;
190
191 default:
192normal:
193 /*
194 * Send a regular ACK.
195 * Set the s_ack_state so we wait until after sending
196 * the ACK before setting s_ack_state to ACKNOWLEDGE
197 * (see above).
198 */
199 qp->s_ack_state = OP(SEND_ONLY);
200 qp->s_flags &= ~QIB_S_ACK_PENDING;
201 qp->s_cur_sge = NULL;
202 if (qp->s_nak_state)
203 ohdr->u.aeth =
204 cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
205 (qp->s_nak_state <<
206 QIB_AETH_CREDIT_SHIFT));
207 else
208 ohdr->u.aeth = qib_compute_aeth(qp);
209 hwords++;
210 len = 0;
211 bth0 = OP(ACKNOWLEDGE) << 24;
212 bth2 = qp->s_ack_psn & QIB_PSN_MASK;
213 }
214 qp->s_rdma_ack_cnt++;
215 qp->s_hdrwords = hwords;
216 qp->s_cur_size = len;
217 qib_make_ruc_header(qp, ohdr, bth0, bth2);
218 return 1;
219
220bail:
221 qp->s_ack_state = OP(ACKNOWLEDGE);
222 qp->s_flags &= ~(QIB_S_RESP_PENDING | QIB_S_ACK_PENDING);
223 return 0;
224}
225
226/**
227 * qib_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
228 * @qp: a pointer to the QP
229 *
230 * Return 1 if constructed; otherwise, return 0.
231 */
232int qib_make_rc_req(struct qib_qp *qp)
233{
234 struct qib_ibdev *dev = to_idev(qp->ibqp.device);
235 struct qib_other_headers *ohdr;
236 struct qib_sge_state *ss;
237 struct qib_swqe *wqe;
238 u32 hwords;
239 u32 len;
240 u32 bth0;
241 u32 bth2;
242 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
243 char newreq;
244 unsigned long flags;
245 int ret = 0;
246 int delta;
247
248 ohdr = &qp->s_hdr.u.oth;
249 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
250 ohdr = &qp->s_hdr.u.l.oth;
251
252 /*
253 * The lock is needed to synchronize between the sending tasklet,
254 * the receive interrupt handler, and timeout resends.
255 */
256 spin_lock_irqsave(&qp->s_lock, flags);
257
258 /* Sending responses has higher priority over sending requests. */
259 if ((qp->s_flags & QIB_S_RESP_PENDING) &&
260 qib_make_rc_ack(dev, qp, ohdr, pmtu))
261 goto done;
262
263 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) {
264 if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND))
265 goto bail;
266 /* We are in the error state, flush the work request. */
267 if (qp->s_last == qp->s_head)
268 goto bail;
269 /* If DMAs are in progress, we can't flush immediately. */
270 if (atomic_read(&qp->s_dma_busy)) {
271 qp->s_flags |= QIB_S_WAIT_DMA;
272 goto bail;
273 }
274 wqe = get_swqe_ptr(qp, qp->s_last);
275 while (qp->s_last != qp->s_acked) {
276 qib_send_complete(qp, wqe, IB_WC_SUCCESS);
277 if (++qp->s_last >= qp->s_size)
278 qp->s_last = 0;
279 wqe = get_swqe_ptr(qp, qp->s_last);
280 }
281 qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
282 goto done;
283 }
284
285 if (qp->s_flags & (QIB_S_WAIT_RNR | QIB_S_WAIT_ACK))
286 goto bail;
287
288 if (qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) {
289 if (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
290 qp->s_flags |= QIB_S_WAIT_PSN;
291 goto bail;
292 }
293 qp->s_sending_psn = qp->s_psn;
294 qp->s_sending_hpsn = qp->s_psn - 1;
295 }
296
297 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
298 hwords = 5;
299 bth0 = 0;
300
301 /* Send a request. */
302 wqe = get_swqe_ptr(qp, qp->s_cur);
303 switch (qp->s_state) {
304 default:
305 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_NEXT_SEND_OK))
306 goto bail;
307 /*
308 * Resend an old request or start a new one.
309 *
310 * We keep track of the current SWQE so that
311 * we don't reset the "furthest progress" state
312 * if we need to back up.
313 */
314 newreq = 0;
315 if (qp->s_cur == qp->s_tail) {
316 /* Check if send work queue is empty. */
317 if (qp->s_tail == qp->s_head)
318 goto bail;
319 /*
320 * If a fence is requested, wait for previous
321 * RDMA read and atomic operations to finish.
322 */
323 if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
324 qp->s_num_rd_atomic) {
325 qp->s_flags |= QIB_S_WAIT_FENCE;
326 goto bail;
327 }
328 wqe->psn = qp->s_next_psn;
329 newreq = 1;
330 }
331 /*
332 * Note that we have to be careful not to modify the
333 * original work request since we may need to resend
334 * it.
335 */
336 len = wqe->length;
337 ss = &qp->s_sge;
338 bth2 = qp->s_psn & QIB_PSN_MASK;
339 switch (wqe->wr.opcode) {
340 case IB_WR_SEND:
341 case IB_WR_SEND_WITH_IMM:
342 /* If no credit, return. */
343 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
344 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
345 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
346 goto bail;
347 }
348 wqe->lpsn = wqe->psn;
349 if (len > pmtu) {
350 wqe->lpsn += (len - 1) / pmtu;
351 qp->s_state = OP(SEND_FIRST);
352 len = pmtu;
353 break;
354 }
355 if (wqe->wr.opcode == IB_WR_SEND)
356 qp->s_state = OP(SEND_ONLY);
357 else {
358 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
359 /* Immediate data comes after the BTH */
360 ohdr->u.imm_data = wqe->wr.ex.imm_data;
361 hwords += 1;
362 }
363 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
364 bth0 |= IB_BTH_SOLICITED;
365 bth2 |= IB_BTH_REQ_ACK;
366 if (++qp->s_cur == qp->s_size)
367 qp->s_cur = 0;
368 break;
369
370 case IB_WR_RDMA_WRITE:
371 if (newreq && !(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
372 qp->s_lsn++;
373 /* FALLTHROUGH */
374 case IB_WR_RDMA_WRITE_WITH_IMM:
375 /* If no credit, return. */
376 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
377 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
378 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
379 goto bail;
380 }
381 ohdr->u.rc.reth.vaddr =
382 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
383 ohdr->u.rc.reth.rkey =
384 cpu_to_be32(wqe->wr.wr.rdma.rkey);
385 ohdr->u.rc.reth.length = cpu_to_be32(len);
386 hwords += sizeof(struct ib_reth) / sizeof(u32);
387 wqe->lpsn = wqe->psn;
388 if (len > pmtu) {
389 wqe->lpsn += (len - 1) / pmtu;
390 qp->s_state = OP(RDMA_WRITE_FIRST);
391 len = pmtu;
392 break;
393 }
394 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
395 qp->s_state = OP(RDMA_WRITE_ONLY);
396 else {
397 qp->s_state =
398 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
399 /* Immediate data comes after RETH */
400 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
401 hwords += 1;
402 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
403 bth0 |= IB_BTH_SOLICITED;
404 }
405 bth2 |= IB_BTH_REQ_ACK;
406 if (++qp->s_cur == qp->s_size)
407 qp->s_cur = 0;
408 break;
409
410 case IB_WR_RDMA_READ:
411 /*
412 * Don't allow more operations to be started
413 * than the QP limits allow.
414 */
415 if (newreq) {
416 if (qp->s_num_rd_atomic >=
417 qp->s_max_rd_atomic) {
418 qp->s_flags |= QIB_S_WAIT_RDMAR;
419 goto bail;
420 }
421 qp->s_num_rd_atomic++;
422 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
423 qp->s_lsn++;
424 /*
425 * Adjust s_next_psn to count the
426 * expected number of responses.
427 */
428 if (len > pmtu)
429 qp->s_next_psn += (len - 1) / pmtu;
430 wqe->lpsn = qp->s_next_psn++;
431 }
432 ohdr->u.rc.reth.vaddr =
433 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
434 ohdr->u.rc.reth.rkey =
435 cpu_to_be32(wqe->wr.wr.rdma.rkey);
436 ohdr->u.rc.reth.length = cpu_to_be32(len);
437 qp->s_state = OP(RDMA_READ_REQUEST);
438 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
439 ss = NULL;
440 len = 0;
441 bth2 |= IB_BTH_REQ_ACK;
442 if (++qp->s_cur == qp->s_size)
443 qp->s_cur = 0;
444 break;
445
446 case IB_WR_ATOMIC_CMP_AND_SWP:
447 case IB_WR_ATOMIC_FETCH_AND_ADD:
448 /*
449 * Don't allow more operations to be started
450 * than the QP limits allow.
451 */
452 if (newreq) {
453 if (qp->s_num_rd_atomic >=
454 qp->s_max_rd_atomic) {
455 qp->s_flags |= QIB_S_WAIT_RDMAR;
456 goto bail;
457 }
458 qp->s_num_rd_atomic++;
459 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
460 qp->s_lsn++;
461 wqe->lpsn = wqe->psn;
462 }
463 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
464 qp->s_state = OP(COMPARE_SWAP);
465 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
466 wqe->wr.wr.atomic.swap);
467 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
468 wqe->wr.wr.atomic.compare_add);
469 } else {
470 qp->s_state = OP(FETCH_ADD);
471 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
472 wqe->wr.wr.atomic.compare_add);
473 ohdr->u.atomic_eth.compare_data = 0;
474 }
475 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
476 wqe->wr.wr.atomic.remote_addr >> 32);
477 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
478 wqe->wr.wr.atomic.remote_addr);
479 ohdr->u.atomic_eth.rkey = cpu_to_be32(
480 wqe->wr.wr.atomic.rkey);
481 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
482 ss = NULL;
483 len = 0;
484 bth2 |= IB_BTH_REQ_ACK;
485 if (++qp->s_cur == qp->s_size)
486 qp->s_cur = 0;
487 break;
488
489 default:
490 goto bail;
491 }
492 qp->s_sge.sge = wqe->sg_list[0];
493 qp->s_sge.sg_list = wqe->sg_list + 1;
494 qp->s_sge.num_sge = wqe->wr.num_sge;
495 qp->s_sge.total_len = wqe->length;
496 qp->s_len = wqe->length;
497 if (newreq) {
498 qp->s_tail++;
499 if (qp->s_tail >= qp->s_size)
500 qp->s_tail = 0;
501 }
502 if (wqe->wr.opcode == IB_WR_RDMA_READ)
503 qp->s_psn = wqe->lpsn + 1;
504 else {
505 qp->s_psn++;
506 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
507 qp->s_next_psn = qp->s_psn;
508 }
509 break;
510
511 case OP(RDMA_READ_RESPONSE_FIRST):
512 /*
513 * qp->s_state is normally set to the opcode of the
514 * last packet constructed for new requests and therefore
515 * is never set to RDMA read response.
516 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
517 * thread to indicate a SEND needs to be restarted from an
518 * earlier PSN without interferring with the sending thread.
519 * See qib_restart_rc().
520 */
521 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
522 /* FALLTHROUGH */
523 case OP(SEND_FIRST):
524 qp->s_state = OP(SEND_MIDDLE);
525 /* FALLTHROUGH */
526 case OP(SEND_MIDDLE):
527 bth2 = qp->s_psn++ & QIB_PSN_MASK;
528 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
529 qp->s_next_psn = qp->s_psn;
530 ss = &qp->s_sge;
531 len = qp->s_len;
532 if (len > pmtu) {
533 len = pmtu;
534 break;
535 }
536 if (wqe->wr.opcode == IB_WR_SEND)
537 qp->s_state = OP(SEND_LAST);
538 else {
539 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
540 /* Immediate data comes after the BTH */
541 ohdr->u.imm_data = wqe->wr.ex.imm_data;
542 hwords += 1;
543 }
544 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
545 bth0 |= IB_BTH_SOLICITED;
546 bth2 |= IB_BTH_REQ_ACK;
547 qp->s_cur++;
548 if (qp->s_cur >= qp->s_size)
549 qp->s_cur = 0;
550 break;
551
552 case OP(RDMA_READ_RESPONSE_LAST):
553 /*
554 * qp->s_state is normally set to the opcode of the
555 * last packet constructed for new requests and therefore
556 * is never set to RDMA read response.
557 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
558 * thread to indicate a RDMA write needs to be restarted from
559 * an earlier PSN without interferring with the sending thread.
560 * See qib_restart_rc().
561 */
562 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
563 /* FALLTHROUGH */
564 case OP(RDMA_WRITE_FIRST):
565 qp->s_state = OP(RDMA_WRITE_MIDDLE);
566 /* FALLTHROUGH */
567 case OP(RDMA_WRITE_MIDDLE):
568 bth2 = qp->s_psn++ & QIB_PSN_MASK;
569 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
570 qp->s_next_psn = qp->s_psn;
571 ss = &qp->s_sge;
572 len = qp->s_len;
573 if (len > pmtu) {
574 len = pmtu;
575 break;
576 }
577 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
578 qp->s_state = OP(RDMA_WRITE_LAST);
579 else {
580 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
581 /* Immediate data comes after the BTH */
582 ohdr->u.imm_data = wqe->wr.ex.imm_data;
583 hwords += 1;
584 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
585 bth0 |= IB_BTH_SOLICITED;
586 }
587 bth2 |= IB_BTH_REQ_ACK;
588 qp->s_cur++;
589 if (qp->s_cur >= qp->s_size)
590 qp->s_cur = 0;
591 break;
592
593 case OP(RDMA_READ_RESPONSE_MIDDLE):
594 /*
595 * qp->s_state is normally set to the opcode of the
596 * last packet constructed for new requests and therefore
597 * is never set to RDMA read response.
598 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
599 * thread to indicate a RDMA read needs to be restarted from
600 * an earlier PSN without interferring with the sending thread.
601 * See qib_restart_rc().
602 */
603 len = ((qp->s_psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
604 ohdr->u.rc.reth.vaddr =
605 cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
606 ohdr->u.rc.reth.rkey =
607 cpu_to_be32(wqe->wr.wr.rdma.rkey);
608 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
609 qp->s_state = OP(RDMA_READ_REQUEST);
610 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
611 bth2 = (qp->s_psn & QIB_PSN_MASK) | IB_BTH_REQ_ACK;
612 qp->s_psn = wqe->lpsn + 1;
613 ss = NULL;
614 len = 0;
615 qp->s_cur++;
616 if (qp->s_cur == qp->s_size)
617 qp->s_cur = 0;
618 break;
619 }
620 qp->s_sending_hpsn = bth2;
621 delta = (((int) bth2 - (int) wqe->psn) << 8) >> 8;
622 if (delta && delta % QIB_PSN_CREDIT == 0)
623 bth2 |= IB_BTH_REQ_ACK;
624 if (qp->s_flags & QIB_S_SEND_ONE) {
625 qp->s_flags &= ~QIB_S_SEND_ONE;
626 qp->s_flags |= QIB_S_WAIT_ACK;
627 bth2 |= IB_BTH_REQ_ACK;
628 }
629 qp->s_len -= len;
630 qp->s_hdrwords = hwords;
631 qp->s_cur_sge = ss;
632 qp->s_cur_size = len;
633 qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);
634done:
635 ret = 1;
636 goto unlock;
637
638bail:
639 qp->s_flags &= ~QIB_S_BUSY;
640unlock:
641 spin_unlock_irqrestore(&qp->s_lock, flags);
642 return ret;
643}
644
645/**
646 * qib_send_rc_ack - Construct an ACK packet and send it
647 * @qp: a pointer to the QP
648 *
649 * This is called from qib_rc_rcv() and qib_kreceive().
650 * Note that RDMA reads and atomics are handled in the
651 * send side QP state and tasklet.
652 */
653void qib_send_rc_ack(struct qib_qp *qp)
654{
655 struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
656 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
657 struct qib_pportdata *ppd = ppd_from_ibp(ibp);
658 u64 pbc;
659 u16 lrh0;
660 u32 bth0;
661 u32 hwords;
662 u32 pbufn;
663 u32 __iomem *piobuf;
664 struct qib_ib_header hdr;
665 struct qib_other_headers *ohdr;
666 u32 control;
667 unsigned long flags;
668
669 spin_lock_irqsave(&qp->s_lock, flags);
670
671 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
672 goto unlock;
673
674 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
675 if ((qp->s_flags & QIB_S_RESP_PENDING) || qp->s_rdma_ack_cnt)
676 goto queue_ack;
677
678 /* Construct the header with s_lock held so APM doesn't change it. */
679 ohdr = &hdr.u.oth;
680 lrh0 = QIB_LRH_BTH;
681 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
682 hwords = 6;
683 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
684 hwords += qib_make_grh(ibp, &hdr.u.l.grh,
685 &qp->remote_ah_attr.grh, hwords, 0);
686 ohdr = &hdr.u.l.oth;
687 lrh0 = QIB_LRH_GRH;
688 }
689 /* read pkey_index w/o lock (its atomic) */
690 bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
691 if (qp->s_mig_state == IB_MIG_MIGRATED)
692 bth0 |= IB_BTH_MIG_REQ;
693 if (qp->r_nak_state)
694 ohdr->u.aeth = cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
695 (qp->r_nak_state <<
696 QIB_AETH_CREDIT_SHIFT));
697 else
698 ohdr->u.aeth = qib_compute_aeth(qp);
699 lrh0 |= ibp->sl_to_vl[qp->remote_ah_attr.sl] << 12 |
700 qp->remote_ah_attr.sl << 4;
701 hdr.lrh[0] = cpu_to_be16(lrh0);
702 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
703 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
704 hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
705 ohdr->bth[0] = cpu_to_be32(bth0);
706 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
707 ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & QIB_PSN_MASK);
708
709 spin_unlock_irqrestore(&qp->s_lock, flags);
710
711 /* Don't try to send ACKs if the link isn't ACTIVE */
712 if (!(ppd->lflags & QIBL_LINKACTIVE))
713 goto done;
714
715 control = dd->f_setpbc_control(ppd, hwords + SIZE_OF_CRC,
716 qp->s_srate, lrh0 >> 12);
717 /* length is + 1 for the control dword */
718 pbc = ((u64) control << 32) | (hwords + 1);
719
720 piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn);
721 if (!piobuf) {
722 /*
723 * We are out of PIO buffers at the moment.
724 * Pass responsibility for sending the ACK to the
725 * send tasklet so that when a PIO buffer becomes
726 * available, the ACK is sent ahead of other outgoing
727 * packets.
728 */
729 spin_lock_irqsave(&qp->s_lock, flags);
730 goto queue_ack;
731 }
732
733 /*
734 * Write the pbc.
735 * We have to flush after the PBC for correctness
736 * on some cpus or WC buffer can be written out of order.
737 */
738 writeq(pbc, piobuf);
739
740 if (dd->flags & QIB_PIO_FLUSH_WC) {
741 u32 *hdrp = (u32 *) &hdr;
742
743 qib_flush_wc();
744 qib_pio_copy(piobuf + 2, hdrp, hwords - 1);
745 qib_flush_wc();
746 __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
747 } else
748 qib_pio_copy(piobuf + 2, (u32 *) &hdr, hwords);
749
750 if (dd->flags & QIB_USE_SPCL_TRIG) {
751 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
752
753 qib_flush_wc();
754 __raw_writel(0xaebecede, piobuf + spcl_off);
755 }
756
757 qib_flush_wc();
758 qib_sendbuf_done(dd, pbufn);
759
760 ibp->n_unicast_xmit++;
761 goto done;
762
763queue_ack:
764 if (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK) {
765 ibp->n_rc_qacks++;
766 qp->s_flags |= QIB_S_ACK_PENDING | QIB_S_RESP_PENDING;
767 qp->s_nak_state = qp->r_nak_state;
768 qp->s_ack_psn = qp->r_ack_psn;
769
770 /* Schedule the send tasklet. */
771 qib_schedule_send(qp);
772 }
773unlock:
774 spin_unlock_irqrestore(&qp->s_lock, flags);
775done:
776 return;
777}
778
779/**
780 * reset_psn - reset the QP state to send starting from PSN
781 * @qp: the QP
782 * @psn: the packet sequence number to restart at
783 *
784 * This is called from qib_rc_rcv() to process an incoming RC ACK
785 * for the given QP.
786 * Called at interrupt level with the QP s_lock held.
787 */
788static void reset_psn(struct qib_qp *qp, u32 psn)
789{
790 u32 n = qp->s_acked;
791 struct qib_swqe *wqe = get_swqe_ptr(qp, n);
792 u32 opcode;
793
794 qp->s_cur = n;
795
796 /*
797 * If we are starting the request from the beginning,
798 * let the normal send code handle initialization.
799 */
800 if (qib_cmp24(psn, wqe->psn) <= 0) {
801 qp->s_state = OP(SEND_LAST);
802 goto done;
803 }
804
805 /* Find the work request opcode corresponding to the given PSN. */
806 opcode = wqe->wr.opcode;
807 for (;;) {
808 int diff;
809
810 if (++n == qp->s_size)
811 n = 0;
812 if (n == qp->s_tail)
813 break;
814 wqe = get_swqe_ptr(qp, n);
815 diff = qib_cmp24(psn, wqe->psn);
816 if (diff < 0)
817 break;
818 qp->s_cur = n;
819 /*
820 * If we are starting the request from the beginning,
821 * let the normal send code handle initialization.
822 */
823 if (diff == 0) {
824 qp->s_state = OP(SEND_LAST);
825 goto done;
826 }
827 opcode = wqe->wr.opcode;
828 }
829
830 /*
831 * Set the state to restart in the middle of a request.
832 * Don't change the s_sge, s_cur_sge, or s_cur_size.
833 * See qib_make_rc_req().
834 */
835 switch (opcode) {
836 case IB_WR_SEND:
837 case IB_WR_SEND_WITH_IMM:
838 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
839 break;
840
841 case IB_WR_RDMA_WRITE:
842 case IB_WR_RDMA_WRITE_WITH_IMM:
843 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
844 break;
845
846 case IB_WR_RDMA_READ:
847 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
848 break;
849
850 default:
851 /*
852 * This case shouldn't happen since its only
853 * one PSN per req.
854 */
855 qp->s_state = OP(SEND_LAST);
856 }
857done:
858 qp->s_psn = psn;
859 /*
860 * Set QIB_S_WAIT_PSN as qib_rc_complete() may start the timer
861 * asynchronously before the send tasklet can get scheduled.
862 * Doing it in qib_make_rc_req() is too late.
863 */
864 if ((qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
865 (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
866 qp->s_flags |= QIB_S_WAIT_PSN;
867}
868
869/*
870 * Back up requester to resend the last un-ACKed request.
a5210c12 871 * The QP r_lock and s_lock should be held and interrupts disabled.
f931551b
RC		 872 */
873static void qib_restart_rc(struct qib_qp *qp, u32 psn, int wait)
874{
875 struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_acked);
876 struct qib_ibport *ibp;
877
878 if (qp->s_retry == 0) {
879 if (qp->s_mig_state == IB_MIG_ARMED) {
880 qib_migrate_qp(qp);
881 qp->s_retry = qp->s_retry_cnt;
882 } else if (qp->s_last == qp->s_acked) {
883 qib_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
884 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
885 return;
886 } else /* XXX need to handle delayed completion */
887 return;
888 } else
889 qp->s_retry--;
890
891 ibp = to_iport(qp->ibqp.device, qp->port_num);
892 if (wqe->wr.opcode == IB_WR_RDMA_READ)
893 ibp->n_rc_resends++;
894 else
895 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
896
897 qp->s_flags &= ~(QIB_S_WAIT_FENCE | QIB_S_WAIT_RDMAR |
898 QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_PSN |
899 QIB_S_WAIT_ACK);
900 if (wait)
901 qp->s_flags |= QIB_S_SEND_ONE;
902 reset_psn(qp, psn);
903}
904
905/*
906 * This is called from s_timer for missing responses.
907 */
908static void rc_timeout(unsigned long arg)
909{
910 struct qib_qp *qp = (struct qib_qp *)arg;
911 struct qib_ibport *ibp;
912 unsigned long flags;
913
a5210c12
RC		 914 spin_lock_irqsave(&qp->r_lock, flags);
915 spin_lock(&qp->s_lock);
f931551b
RC		 916 if (qp->s_flags & QIB_S_TIMER) {
917 ibp = to_iport(qp->ibqp.device, qp->port_num);
918 ibp->n_rc_timeouts++;
919 qp->s_flags &= ~QIB_S_TIMER;
920 del_timer(&qp->s_timer);
921 qib_restart_rc(qp, qp->s_last_psn + 1, 1);
922 qib_schedule_send(qp);
923 }
a5210c12
RC		 924 spin_unlock(&qp->s_lock);
925 spin_unlock_irqrestore(&qp->r_lock, flags);
f931551b
RC		 926}
927
928/*
929 * This is called from s_timer for RNR timeouts.
930 */
931void qib_rc_rnr_retry(unsigned long arg)
932{
933 struct qib_qp *qp = (struct qib_qp *)arg;
934 unsigned long flags;
935
936 spin_lock_irqsave(&qp->s_lock, flags);
937 if (qp->s_flags & QIB_S_WAIT_RNR) {
938 qp->s_flags &= ~QIB_S_WAIT_RNR;
939 del_timer(&qp->s_timer);
940 qib_schedule_send(qp);
941 }
942 spin_unlock_irqrestore(&qp->s_lock, flags);
943}
944
945/*
946 * Set qp->s_sending_psn to the next PSN after the given one.
947 * This would be psn+1 except when RDMA reads are present.
948 */
949static void reset_sending_psn(struct qib_qp *qp, u32 psn)
950{
951 struct qib_swqe *wqe;
952 u32 n = qp->s_last;
953
954 /* Find the work request corresponding to the given PSN. */
955 for (;;) {
956 wqe = get_swqe_ptr(qp, n);
957 if (qib_cmp24(psn, wqe->lpsn) <= 0) {
958 if (wqe->wr.opcode == IB_WR_RDMA_READ)
959 qp->s_sending_psn = wqe->lpsn + 1;
960 else
961 qp->s_sending_psn = psn + 1;
962 break;
963 }
964 if (++n == qp->s_size)
965 n = 0;
966 if (n == qp->s_tail)
967 break;
968 }
969}
970
971/*
972 * This should be called with the QP s_lock held and interrupts disabled.
973 */
974void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr)
975{
976 struct qib_other_headers *ohdr;
977 struct qib_swqe *wqe;
978 struct ib_wc wc;
979 unsigned i;
980 u32 opcode;
981 u32 psn;
982
983 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_OR_FLUSH_SEND))
984 return;
985
986 /* Find out where the BTH is */
987 if ((be16_to_cpu(hdr->lrh[0]) & 3) == QIB_LRH_BTH)
988 ohdr = &hdr->u.oth;
989 else
990 ohdr = &hdr->u.l.oth;
991
992 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
993 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
994 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
995 WARN_ON(!qp->s_rdma_ack_cnt);
996 qp->s_rdma_ack_cnt--;
997 return;
998 }
999
1000 psn = be32_to_cpu(ohdr->bth[2]);
1001 reset_sending_psn(qp, psn);
1002
1003 /*
1004 * Start timer after a packet requesting an ACK has been sent and
1005 * there are still requests that haven't been acked.
1006 */
1007 if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1008 !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN)))
1009 start_timer(qp);
1010
1011 while (qp->s_last != qp->s_acked) {
1012 wqe = get_swqe_ptr(qp, qp->s_last);
1013 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1014 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1015 break;
1016 for (i = 0; i < wqe->wr.num_sge; i++) {
1017 struct qib_sge *sge = &wqe->sg_list[i];
1018
1019 atomic_dec(&sge->mr->refcount);
1020 }
1021 /* Post a send completion queue entry if requested. */
1022 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1023 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1024 memset(&wc, 0, sizeof wc);
1025 wc.wr_id = wqe->wr.wr_id;
1026 wc.status = IB_WC_SUCCESS;
1027 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
1028 wc.byte_len = wqe->length;
1029 wc.qp = &qp->ibqp;
1030 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1031 }
1032 if (++qp->s_last >= qp->s_size)
1033 qp->s_last = 0;
1034 }
1035 /*
1036 * If we were waiting for sends to complete before resending,
1037 * and they are now complete, restart sending.
1038 */
1039 if (qp->s_flags & QIB_S_WAIT_PSN &&
1040 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1041 qp->s_flags &= ~QIB_S_WAIT_PSN;
1042 qp->s_sending_psn = qp->s_psn;
1043 qp->s_sending_hpsn = qp->s_psn - 1;
1044 qib_schedule_send(qp);
1045 }
1046}
1047
1048static inline void update_last_psn(struct qib_qp *qp, u32 psn)
1049{
1050 qp->s_last_psn = psn;
1051}
1052
1053/*
1054 * Generate a SWQE completion.
1055 * This is similar to qib_send_complete but has to check to be sure
1056 * that the SGEs are not being referenced if the SWQE is being resent.
1057 */
1058static struct qib_swqe *do_rc_completion(struct qib_qp *qp,
1059 struct qib_swqe *wqe,
1060 struct qib_ibport *ibp)
1061{
1062 struct ib_wc wc;
1063 unsigned i;
1064
1065 /*
1066 * Don't decrement refcount and don't generate a
1067 * completion if the SWQE is being resent until the send
1068 * is finished.
1069 */
1070 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) < 0 ||
1071 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1072 for (i = 0; i < wqe->wr.num_sge; i++) {
1073 struct qib_sge *sge = &wqe->sg_list[i];
1074
1075 atomic_dec(&sge->mr->refcount);
1076 }
1077 /* Post a send completion queue entry if requested. */
1078 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1079 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1080 memset(&wc, 0, sizeof wc);
1081 wc.wr_id = wqe->wr.wr_id;
1082 wc.status = IB_WC_SUCCESS;
1083 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
1084 wc.byte_len = wqe->length;
1085 wc.qp = &qp->ibqp;
1086 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1087 }
1088 if (++qp->s_last >= qp->s_size)
1089 qp->s_last = 0;
1090 } else
1091 ibp->n_rc_delayed_comp++;
1092
1093 qp->s_retry = qp->s_retry_cnt;
1094 update_last_psn(qp, wqe->lpsn);
1095
1096 /*
1097 * If we are completing a request which is in the process of
1098 * being resent, we can stop resending it since we know the
1099 * responder has already seen it.
1100 */
1101 if (qp->s_acked == qp->s_cur) {
1102 if (++qp->s_cur >= qp->s_size)
1103 qp->s_cur = 0;
1104 qp->s_acked = qp->s_cur;
1105 wqe = get_swqe_ptr(qp, qp->s_cur);
1106 if (qp->s_acked != qp->s_tail) {
1107 qp->s_state = OP(SEND_LAST);
1108 qp->s_psn = wqe->psn;
1109 }
1110 } else {
1111 if (++qp->s_acked >= qp->s_size)
1112 qp->s_acked = 0;
1113 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1114 qp->s_draining = 0;
1115 wqe = get_swqe_ptr(qp, qp->s_acked);
1116 }
1117 return wqe;
1118}
1119
1120/**
1121 * do_rc_ack - process an incoming RC ACK
1122 * @qp: the QP the ACK came in on
1123 * @psn: the packet sequence number of the ACK
1124 * @opcode: the opcode of the request that resulted in the ACK
1125 *
1126 * This is called from qib_rc_rcv_resp() to process an incoming RC ACK
1127 * for the given QP.
1128 * Called at interrupt level with the QP s_lock held.
1129 * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1130 */
1131static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode,
1132 u64 val, struct qib_ctxtdata *rcd)
1133{
1134 struct qib_ibport *ibp;
1135 enum ib_wc_status status;
1136 struct qib_swqe *wqe;
1137 int ret = 0;
1138 u32 ack_psn;
1139 int diff;
1140
1141 /* Remove QP from retry timer */
1142 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
1143 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
1144 del_timer(&qp->s_timer);
1145 }
1146
1147 /*
1148 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1149 * requests and implicitly NAK RDMA read and atomic requests issued
1150 * before the NAK'ed request. The MSN won't include the NAK'ed
1151 * request but will include an ACK'ed request(s).
1152 */
1153 ack_psn = psn;
1154 if (aeth >> 29)
1155 ack_psn--;
1156 wqe = get_swqe_ptr(qp, qp->s_acked);
1157 ibp = to_iport(qp->ibqp.device, qp->port_num);
1158
1159 /*
1160 * The MSN might be for a later WQE than the PSN indicates so
1161 * only complete WQEs that the PSN finishes.
1162 */
1163 while ((diff = qib_cmp24(ack_psn, wqe->lpsn)) >= 0) {
1164 /*
1165 * RDMA_READ_RESPONSE_ONLY is a special case since
1166 * we want to generate completion events for everything
1167 * before the RDMA read, copy the data, then generate
1168 * the completion for the read.
1169 */
1170 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1171 opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1172 diff == 0) {
1173 ret = 1;
1174 goto bail;
1175 }
1176 /*
1177 * If this request is a RDMA read or atomic, and the ACK is
1178 * for a later operation, this ACK NAKs the RDMA read or
1179 * atomic. In other words, only a RDMA_READ_LAST or ONLY
1180 * can ACK a RDMA read and likewise for atomic ops. Note
1181 * that the NAK case can only happen if relaxed ordering is
1182 * used and requests are sent after an RDMA read or atomic
1183 * is sent but before the response is received.
1184 */
1185 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1186 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
1187 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1188 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1189 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1190 /* Retry this request. */
1191 if (!(qp->r_flags & QIB_R_RDMAR_SEQ)) {
1192 qp->r_flags |= QIB_R_RDMAR_SEQ;
1193 qib_restart_rc(qp, qp->s_last_psn + 1, 0);
1194 if (list_empty(&qp->rspwait)) {
1195 qp->r_flags |= QIB_R_RSP_SEND;
1196 atomic_inc(&qp->refcount);
1197 list_add_tail(&qp->rspwait,
1198 &rcd->qp_wait_list);
1199 }
1200 }
1201 /*
1202 * No need to process the ACK/NAK since we are
1203 * restarting an earlier request.
1204 */
1205 goto bail;
1206 }
1207 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1208 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1209 u64 *vaddr = wqe->sg_list[0].vaddr;
1210 *vaddr = val;
1211 }
1212 if (qp->s_num_rd_atomic &&
1213 (wqe->wr.opcode == IB_WR_RDMA_READ ||
1214 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1215 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1216 qp->s_num_rd_atomic--;
1217 /* Restart sending task if fence is complete */
1218 if ((qp->s_flags & QIB_S_WAIT_FENCE) &&
1219 !qp->s_num_rd_atomic) {
1220 qp->s_flags &= ~(QIB_S_WAIT_FENCE |
1221 QIB_S_WAIT_ACK);
1222 qib_schedule_send(qp);
1223 } else if (qp->s_flags & QIB_S_WAIT_RDMAR) {
1224 qp->s_flags &= ~(QIB_S_WAIT_RDMAR |
1225 QIB_S_WAIT_ACK);
1226 qib_schedule_send(qp);
1227 }
1228 }
1229 wqe = do_rc_completion(qp, wqe, ibp);
1230 if (qp->s_acked == qp->s_tail)
1231 break;
1232 }
1233
1234 switch (aeth >> 29) {
1235 case 0: /* ACK */
1236 ibp->n_rc_acks++;
1237 if (qp->s_acked != qp->s_tail) {
1238 /*
1239 * We are expecting more ACKs so
1240 * reset the retransmit timer.
1241 */
1242 start_timer(qp);
1243 /*
1244 * We can stop resending the earlier packets and
1245 * continue with the next packet the receiver wants.
1246 */
1247 if (qib_cmp24(qp->s_psn, psn) <= 0)
1248 reset_psn(qp, psn + 1);
1249 } else if (qib_cmp24(qp->s_psn, psn) <= 0) {
1250 qp->s_state = OP(SEND_LAST);
1251 qp->s_psn = psn + 1;
1252 }
1253 if (qp->s_flags & QIB_S_WAIT_ACK) {
1254 qp->s_flags &= ~QIB_S_WAIT_ACK;
1255 qib_schedule_send(qp);
1256 }
1257 qib_get_credit(qp, aeth);
1258 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1259 qp->s_retry = qp->s_retry_cnt;
1260 update_last_psn(qp, psn);
1261 ret = 1;
1262 goto bail;
1263
1264 case 1: /* RNR NAK */
1265 ibp->n_rnr_naks++;
1266 if (qp->s_acked == qp->s_tail)
1267 goto bail;
1268 if (qp->s_flags & QIB_S_WAIT_RNR)
1269 goto bail;
1270 if (qp->s_rnr_retry == 0) {
1271 status = IB_WC_RNR_RETRY_EXC_ERR;
1272 goto class_b;
1273 }
1274 if (qp->s_rnr_retry_cnt < 7)
1275 qp->s_rnr_retry--;
1276
1277 /* The last valid PSN is the previous PSN. */
1278 update_last_psn(qp, psn - 1);
1279
1280 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
1281
1282 reset_psn(qp, psn);
1283
1284 qp->s_flags &= ~(QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_ACK);
1285 qp->s_flags |= QIB_S_WAIT_RNR;
1286 qp->s_timer.function = qib_rc_rnr_retry;
1287 qp->s_timer.expires = jiffies + usecs_to_jiffies(
1288 ib_qib_rnr_table[(aeth >> QIB_AETH_CREDIT_SHIFT) &
1289 QIB_AETH_CREDIT_MASK]);
1290 add_timer(&qp->s_timer);
1291 goto bail;
1292
1293 case 3: /* NAK */
1294 if (qp->s_acked == qp->s_tail)
1295 goto bail;
1296 /* The last valid PSN is the previous PSN. */
1297 update_last_psn(qp, psn - 1);
1298 switch ((aeth >> QIB_AETH_CREDIT_SHIFT) &
1299 QIB_AETH_CREDIT_MASK) {
1300 case 0: /* PSN sequence error */
1301 ibp->n_seq_naks++;
1302 /*
1303 * Back up to the responder's expected PSN.
1304 * Note that we might get a NAK in the middle of an
1305 * RDMA READ response which terminates the RDMA
1306 * READ.
1307 */
1308 qib_restart_rc(qp, psn, 0);
1309 qib_schedule_send(qp);
1310 break;
1311
1312 case 1: /* Invalid Request */
1313 status = IB_WC_REM_INV_REQ_ERR;
1314 ibp->n_other_naks++;
1315 goto class_b;
1316
1317 case 2: /* Remote Access Error */
1318 status = IB_WC_REM_ACCESS_ERR;
1319 ibp->n_other_naks++;
1320 goto class_b;
1321
1322 case 3: /* Remote Operation Error */
1323 status = IB_WC_REM_OP_ERR;
1324 ibp->n_other_naks++;
1325class_b:
1326 if (qp->s_last == qp->s_acked) {
1327 qib_send_complete(qp, wqe, status);
1328 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1329 }
1330 break;
1331
1332 default:
1333 /* Ignore other reserved NAK error codes */
1334 goto reserved;
1335 }
1336 qp->s_retry = qp->s_retry_cnt;
1337 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1338 goto bail;
1339
1340 default: /* 2: reserved */
1341reserved:
1342 /* Ignore reserved NAK codes. */
1343 goto bail;
1344 }
1345
1346bail:
1347 return ret;
1348}
1349
1350/*
1351 * We have seen an out of sequence RDMA read middle or last packet.
1352 * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1353 */
1354static void rdma_seq_err(struct qib_qp *qp, struct qib_ibport *ibp, u32 psn,
1355 struct qib_ctxtdata *rcd)
1356{
1357 struct qib_swqe *wqe;
1358
1359 /* Remove QP from retry timer */
1360 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
1361 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
1362 del_timer(&qp->s_timer);
1363 }
1364
1365 wqe = get_swqe_ptr(qp, qp->s_acked);
1366
1367 while (qib_cmp24(psn, wqe->lpsn) > 0) {
1368 if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1369 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1370 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1371 break;
1372 wqe = do_rc_completion(qp, wqe, ibp);
1373 }
1374
1375 ibp->n_rdma_seq++;
1376 qp->r_flags |= QIB_R_RDMAR_SEQ;
1377 qib_restart_rc(qp, qp->s_last_psn + 1, 0);
1378 if (list_empty(&qp->rspwait)) {
1379 qp->r_flags |= QIB_R_RSP_SEND;
1380 atomic_inc(&qp->refcount);
1381 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1382 }
1383}
1384
1385/**
1386 * qib_rc_rcv_resp - process an incoming RC response packet
1387 * @ibp: the port this packet came in on
1388 * @ohdr: the other headers for this packet
1389 * @data: the packet data
1390 * @tlen: the packet length
1391 * @qp: the QP for this packet
1392 * @opcode: the opcode for this packet
1393 * @psn: the packet sequence number for this packet
1394 * @hdrsize: the header length
1395 * @pmtu: the path MTU
1396 *
1397 * This is called from qib_rc_rcv() to process an incoming RC response
1398 * packet for the given QP.
1399 * Called at interrupt level.
1400 */
1401static void qib_rc_rcv_resp(struct qib_ibport *ibp,
1402 struct qib_other_headers *ohdr,
1403 void *data, u32 tlen,
1404 struct qib_qp *qp,
1405 u32 opcode,
1406 u32 psn, u32 hdrsize, u32 pmtu,
1407 struct qib_ctxtdata *rcd)
1408{
1409 struct qib_swqe *wqe;
dd04e43d 1410 struct qib_pportdata *ppd = ppd_from_ibp(ibp);
f931551b
RC		 1411 enum ib_wc_status status;
1412 unsigned long flags;
1413 int diff;
1414 u32 pad;
1415 u32 aeth;
1416 u64 val;
1417
dd04e43d
MM		 1418 if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) {
1419 /*
1420 * If ACK'd PSN on SDMA busy list try to make progress to
1421 * reclaim SDMA credits.
1422 */
1423 if ((qib_cmp24(psn, qp->s_sending_psn) >= 0) &&
1424 (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) {
1425
1426 /*
1427 * If send tasklet not running attempt to progress
1428 * SDMA queue.
1429 */
1430 if (!(qp->s_flags & QIB_S_BUSY)) {
1431 /* Acquire SDMA Lock */
1432 spin_lock_irqsave(&ppd->sdma_lock, flags);
1433 /* Invoke sdma make progress */
1434 qib_sdma_make_progress(ppd);
1435 /* Release SDMA Lock */
1436 spin_unlock_irqrestore(&ppd->sdma_lock, flags);
1437 }
1438 }
1439 }
1440
f931551b
RC		 1441 spin_lock_irqsave(&qp->s_lock, flags);
1442
f931551b
RC		 1443 /* Ignore invalid responses. */
1444 if (qib_cmp24(psn, qp->s_next_psn) >= 0)
1445 goto ack_done;
1446
1447 /* Ignore duplicate responses. */
1448 diff = qib_cmp24(psn, qp->s_last_psn);
1449 if (unlikely(diff <= 0)) {
1450 /* Update credits for "ghost" ACKs */
1451 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1452 aeth = be32_to_cpu(ohdr->u.aeth);
1453 if ((aeth >> 29) == 0)
1454 qib_get_credit(qp, aeth);
1455 }
1456 goto ack_done;
1457 }
1458
1459 /*
1460 * Skip everything other than the PSN we expect, if we are waiting
1461 * for a reply to a restarted RDMA read or atomic op.
1462 */
1463 if (qp->r_flags & QIB_R_RDMAR_SEQ) {
1464 if (qib_cmp24(psn, qp->s_last_psn + 1) != 0)
1465 goto ack_done;
1466 qp->r_flags &= ~QIB_R_RDMAR_SEQ;
1467 }
1468
1469 if (unlikely(qp->s_acked == qp->s_tail))
1470 goto ack_done;
1471 wqe = get_swqe_ptr(qp, qp->s_acked);
1472 status = IB_WC_SUCCESS;
1473
1474 switch (opcode) {
1475 case OP(ACKNOWLEDGE):
1476 case OP(ATOMIC_ACKNOWLEDGE):
1477 case OP(RDMA_READ_RESPONSE_FIRST):
1478 aeth = be32_to_cpu(ohdr->u.aeth);
1479 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
1480 __be32 *p = ohdr->u.at.atomic_ack_eth;
1481
1482 val = ((u64) be32_to_cpu(p[0]) << 32) |
1483 be32_to_cpu(p[1]);
1484 } else
1485 val = 0;
1486 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
1487 opcode != OP(RDMA_READ_RESPONSE_FIRST))
1488 goto ack_done;
1489 hdrsize += 4;
1490 wqe = get_swqe_ptr(qp, qp->s_acked);
1491 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1492 goto ack_op_err;
1493 /*
1494 * If this is a response to a resent RDMA read, we
1495 * have to be careful to copy the data to the right
1496 * location.
1497 */
1498 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1499 wqe, psn, pmtu);
1500 goto read_middle;
1501
1502 case OP(RDMA_READ_RESPONSE_MIDDLE):
1503 /* no AETH, no ACK */
1504 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
1505 goto ack_seq_err;
1506 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1507 goto ack_op_err;
1508read_middle:
1509 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1510 goto ack_len_err;
1511 if (unlikely(pmtu >= qp->s_rdma_read_len))
1512 goto ack_len_err;
1513
1514 /*
1515 * We got a response so update the timeout.
1516 * 4.096 usec. * (1 << qp->timeout)
1517 */
1518 qp->s_flags |= QIB_S_TIMER;
1519 mod_timer(&qp->s_timer, jiffies +
1520 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
1521 1000UL));
1522 if (qp->s_flags & QIB_S_WAIT_ACK) {
1523 qp->s_flags &= ~QIB_S_WAIT_ACK;
1524 qib_schedule_send(qp);
1525 }
1526
1527 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1528 qp->s_retry = qp->s_retry_cnt;
1529
1530 /*
1531 * Update the RDMA receive state but do the copy w/o
1532 * holding the locks and blocking interrupts.
1533 */
1534 qp->s_rdma_read_len -= pmtu;
1535 update_last_psn(qp, psn);
1536 spin_unlock_irqrestore(&qp->s_lock, flags);
1537 qib_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
1538 goto bail;
1539
1540 case OP(RDMA_READ_RESPONSE_ONLY):
1541 aeth = be32_to_cpu(ohdr->u.aeth);
1542 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
1543 goto ack_done;
1544 /* Get the number of bytes the message was padded by. */
1545 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1546 /*
1547 * Check that the data size is >= 0 && <= pmtu.
1548 * Remember to account for the AETH header (4) and
1549 * ICRC (4).
1550 */
1551 if (unlikely(tlen < (hdrsize + pad + 8)))
1552 goto ack_len_err;
1553 /*
1554 * If this is a response to a resent RDMA read, we
1555 * have to be careful to copy the data to the right
1556 * location.
1557 */
1558 wqe = get_swqe_ptr(qp, qp->s_acked);
1559 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1560 wqe, psn, pmtu);
1561 goto read_last;
1562
1563 case OP(RDMA_READ_RESPONSE_LAST):
1564 /* ACKs READ req. */
1565 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
1566 goto ack_seq_err;
1567 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1568 goto ack_op_err;
1569 /* Get the number of bytes the message was padded by. */
1570 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1571 /*
1572 * Check that the data size is >= 1 && <= pmtu.
1573 * Remember to account for the AETH header (4) and
1574 * ICRC (4).
1575 */
1576 if (unlikely(tlen <= (hdrsize + pad + 8)))
1577 goto ack_len_err;
1578read_last:
1579 tlen -= hdrsize + pad + 8;
1580 if (unlikely(tlen != qp->s_rdma_read_len))
1581 goto ack_len_err;
1582 aeth = be32_to_cpu(ohdr->u.aeth);
1583 qib_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
1584 WARN_ON(qp->s_rdma_read_sge.num_sge);
1585 (void) do_rc_ack(qp, aeth, psn,
1586 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
1587 goto ack_done;
1588 }
1589
1590ack_op_err:
1591 status = IB_WC_LOC_QP_OP_ERR;
1592 goto ack_err;
1593
1594ack_seq_err:
1595 rdma_seq_err(qp, ibp, psn, rcd);
1596 goto ack_done;
1597
1598ack_len_err:
1599 status = IB_WC_LOC_LEN_ERR;
1600ack_err:
1601 if (qp->s_last == qp->s_acked) {
1602 qib_send_complete(qp, wqe, status);
1603 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1604 }
1605ack_done:
1606 spin_unlock_irqrestore(&qp->s_lock, flags);
1607bail:
1608 return;
1609}
1610
1611/**
1612 * qib_rc_rcv_error - process an incoming duplicate or error RC packet
1613 * @ohdr: the other headers for this packet
1614 * @data: the packet data
1615 * @qp: the QP for this packet
1616 * @opcode: the opcode for this packet
1617 * @psn: the packet sequence number for this packet
1618 * @diff: the difference between the PSN and the expected PSN
1619 *
1620 * This is called from qib_rc_rcv() to process an unexpected
1621 * incoming RC packet for the given QP.
1622 * Called at interrupt level.
1623 * Return 1 if no more processing is needed; otherwise return 0 to
1624 * schedule a response to be sent.
1625 */
1626static int qib_rc_rcv_error(struct qib_other_headers *ohdr,
1627 void *data,
1628 struct qib_qp *qp,
1629 u32 opcode,
1630 u32 psn,
1631 int diff,
1632 struct qib_ctxtdata *rcd)
1633{
1634 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1635 struct qib_ack_entry *e;
1636 unsigned long flags;
1637 u8 i, prev;
1638 int old_req;
1639
1640 if (diff > 0) {
1641 /*
1642 * Packet sequence error.
1643 * A NAK will ACK earlier sends and RDMA writes.
1644 * Don't queue the NAK if we already sent one.
1645 */
1646 if (!qp->r_nak_state) {
1647 ibp->n_rc_seqnak++;
1648 qp->r_nak_state = IB_NAK_PSN_ERROR;
1649 /* Use the expected PSN. */
1650 qp->r_ack_psn = qp->r_psn;
1651 /*
1652 * Wait to send the sequence NAK until all packets
1653 * in the receive queue have been processed.
1654 * Otherwise, we end up propagating congestion.
1655 */
1656 if (list_empty(&qp->rspwait)) {
1657 qp->r_flags |= QIB_R_RSP_NAK;
1658 atomic_inc(&qp->refcount);
1659 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1660 }
1661 }
1662 goto done;
1663 }
1664
1665 /*
1666 * Handle a duplicate request. Don't re-execute SEND, RDMA
1667 * write or atomic op. Don't NAK errors, just silently drop
1668 * the duplicate request. Note that r_sge, r_len, and
1669 * r_rcv_len may be in use so don't modify them.
1670 *
1671 * We are supposed to ACK the earliest duplicate PSN but we
1672 * can coalesce an outstanding duplicate ACK. We have to
1673 * send the earliest so that RDMA reads can be restarted at
1674 * the requester's expected PSN.
1675 *
1676 * First, find where this duplicate PSN falls within the
1677 * ACKs previously sent.
1678 * old_req is true if there is an older response that is scheduled
1679 * to be sent before sending this one.
1680 */
1681 e = NULL;
1682 old_req = 1;
1683 ibp->n_rc_dupreq++;
1684
1685 spin_lock_irqsave(&qp->s_lock, flags);
f931551b
RC		 1686
1687 for (i = qp->r_head_ack_queue; ; i = prev) {
1688 if (i == qp->s_tail_ack_queue)
1689 old_req = 0;
1690 if (i)
1691 prev = i - 1;
1692 else
1693 prev = QIB_MAX_RDMA_ATOMIC;
1694 if (prev == qp->r_head_ack_queue) {
1695 e = NULL;
1696 break;
1697 }
1698 e = &qp->s_ack_queue[prev];
1699 if (!e->opcode) {
1700 e = NULL;
1701 break;
1702 }
1703 if (qib_cmp24(psn, e->psn) >= 0) {
1704 if (prev == qp->s_tail_ack_queue &&
1705 qib_cmp24(psn, e->lpsn) <= 0)
1706 old_req = 0;
1707 break;
1708 }
1709 }
1710 switch (opcode) {
1711 case OP(RDMA_READ_REQUEST): {
1712 struct ib_reth *reth;
1713 u32 offset;
1714 u32 len;
1715
1716 /*
1717 * If we didn't find the RDMA read request in the ack queue,
1718 * we can ignore this request.
1719 */
1720 if (!e || e->opcode != OP(RDMA_READ_REQUEST))
1721 goto unlock_done;
1722 /* RETH comes after BTH */
1723 reth = &ohdr->u.rc.reth;
1724 /*
1725 * Address range must be a subset of the original
1726 * request and start on pmtu boundaries.
1727 * We reuse the old ack_queue slot since the requester
1728 * should not back up and request an earlier PSN for the
1729 * same request.
1730 */
1731 offset = ((psn - e->psn) & QIB_PSN_MASK) *
1732 ib_mtu_enum_to_int(qp->path_mtu);
1733 len = be32_to_cpu(reth->length);
1734 if (unlikely(offset + len != e->rdma_sge.sge_length))
1735 goto unlock_done;
1736 if (e->rdma_sge.mr) {
1737 atomic_dec(&e->rdma_sge.mr->refcount);
1738 e->rdma_sge.mr = NULL;
1739 }
1740 if (len != 0) {
1741 u32 rkey = be32_to_cpu(reth->rkey);
1742 u64 vaddr = be64_to_cpu(reth->vaddr);
1743 int ok;
1744
1745 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
1746 IB_ACCESS_REMOTE_READ);
1747 if (unlikely(!ok))
1748 goto unlock_done;
1749 } else {
1750 e->rdma_sge.vaddr = NULL;
1751 e->rdma_sge.length = 0;
1752 e->rdma_sge.sge_length = 0;
1753 }
1754 e->psn = psn;
1755 if (old_req)
1756 goto unlock_done;
1757 qp->s_tail_ack_queue = prev;
1758 break;
1759 }
1760
1761 case OP(COMPARE_SWAP):
1762 case OP(FETCH_ADD): {
1763 /*
1764 * If we didn't find the atomic request in the ack queue
1765 * or the send tasklet is already backed up to send an
1766 * earlier entry, we can ignore this request.
1767 */
1768 if (!e || e->opcode != (u8) opcode || old_req)
1769 goto unlock_done;
1770 qp->s_tail_ack_queue = prev;
1771 break;
1772 }
1773
1774 default:
1775 /*
1776 * Ignore this operation if it doesn't request an ACK
1777 * or an earlier RDMA read or atomic is going to be resent.
1778 */
1779 if (!(psn & IB_BTH_REQ_ACK) || old_req)
1780 goto unlock_done;
1781 /*
1782 * Resend the most recent ACK if this request is
1783 * after all the previous RDMA reads and atomics.
1784 */
1785 if (i == qp->r_head_ack_queue) {
1786 spin_unlock_irqrestore(&qp->s_lock, flags);
1787 qp->r_nak_state = 0;
1788 qp->r_ack_psn = qp->r_psn - 1;
1789 goto send_ack;
1790 }
1791 /*
1792 * Try to send a simple ACK to work around a Mellanox bug
1793 * which doesn't accept a RDMA read response or atomic
1794 * response as an ACK for earlier SENDs or RDMA writes.
1795 */
1796 if (!(qp->s_flags & QIB_S_RESP_PENDING)) {
1797 spin_unlock_irqrestore(&qp->s_lock, flags);
1798 qp->r_nak_state = 0;
1799 qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
1800 goto send_ack;
1801 }
1802 /*
1803 * Resend the RDMA read or atomic op which
1804 * ACKs this duplicate request.
1805 */
1806 qp->s_tail_ack_queue = i;
1807 break;
1808 }
1809 qp->s_ack_state = OP(ACKNOWLEDGE);
1810 qp->s_flags |= QIB_S_RESP_PENDING;
1811 qp->r_nak_state = 0;
1812 qib_schedule_send(qp);
1813
1814unlock_done:
1815 spin_unlock_irqrestore(&qp->s_lock, flags);
1816done:
1817 return 1;
1818
1819send_ack:
1820 return 0;
1821}
1822
1823void qib_rc_error(struct qib_qp *qp, enum ib_wc_status err)
1824{
1825 unsigned long flags;
1826 int lastwqe;
1827
1828 spin_lock_irqsave(&qp->s_lock, flags);
1829 lastwqe = qib_error_qp(qp, err);
1830 spin_unlock_irqrestore(&qp->s_lock, flags);
1831
1832 if (lastwqe) {
1833 struct ib_event ev;
1834
1835 ev.device = qp->ibqp.device;
1836 ev.element.qp = &qp->ibqp;
1837 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1838 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1839 }
1840}
1841
1842static inline void qib_update_ack_queue(struct qib_qp *qp, unsigned n)
1843{
1844 unsigned next;
1845
1846 next = n + 1;
1847 if (next > QIB_MAX_RDMA_ATOMIC)
1848 next = 0;
1849 qp->s_tail_ack_queue = next;
1850 qp->s_ack_state = OP(ACKNOWLEDGE);
1851}
1852
1853/**
1854 * qib_rc_rcv - process an incoming RC packet
1855 * @rcd: the context pointer
1856 * @hdr: the header of this packet
1857 * @has_grh: true if the header has a GRH
1858 * @data: the packet data
1859 * @tlen: the packet length
1860 * @qp: the QP for this packet
1861 *
1862 * This is called from qib_qp_rcv() to process an incoming RC packet
1863 * for the given QP.
1864 * Called at interrupt level.
1865 */
1866void qib_rc_rcv(struct qib_ctxtdata *rcd, struct qib_ib_header *hdr,
1867 int has_grh, void *data, u32 tlen, struct qib_qp *qp)
1868{
1869 struct qib_ibport *ibp = &rcd->ppd->ibport_data;
1870 struct qib_other_headers *ohdr;
1871 u32 opcode;
1872 u32 hdrsize;
1873 u32 psn;
1874 u32 pad;
1875 struct ib_wc wc;
1876 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
1877 int diff;
1878 struct ib_reth *reth;
1879 unsigned long flags;
1880 int ret;
1881
1882 /* Check for GRH */
1883 if (!has_grh) {
1884 ohdr = &hdr->u.oth;
1885 hdrsize = 8 + 12; /* LRH + BTH */
1886 } else {
1887 ohdr = &hdr->u.l.oth;
1888 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
1889 }
1890
1891 opcode = be32_to_cpu(ohdr->bth[0]);
1892 spin_lock_irqsave(&qp->s_lock, flags);
1893 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
1894 goto sunlock;
1895 spin_unlock_irqrestore(&qp->s_lock, flags);
1896
1897 psn = be32_to_cpu(ohdr->bth[2]);
1898 opcode >>= 24;
1899
f931551b
RC		 1900 /*
1901 * Process responses (ACKs) before anything else. Note that the
1902 * packet sequence number will be for something in the send work
1903 * queue rather than the expected receive packet sequence number.
1904 * In other words, this QP is the requester.
1905 */
1906 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1907 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1908 qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
1909 hdrsize, pmtu, rcd);
a5210c12 1910 return;
f931551b
RC		 1911 }
1912
1913 /* Compute 24 bits worth of difference. */
1914 diff = qib_cmp24(psn, qp->r_psn);
1915 if (unlikely(diff)) {
1916 if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
a5210c12 1917 return;
f931551b
RC		 1918 goto send_ack;
1919 }
1920
1921 /* Check for opcode sequence errors. */
1922 switch (qp->r_state) {
1923 case OP(SEND_FIRST):
1924 case OP(SEND_MIDDLE):
1925 if (opcode == OP(SEND_MIDDLE) ||
1926 opcode == OP(SEND_LAST) ||
1927 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
1928 break;
1929 goto nack_inv;
1930
1931 case OP(RDMA_WRITE_FIRST):
1932 case OP(RDMA_WRITE_MIDDLE):
1933 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
1934 opcode == OP(RDMA_WRITE_LAST) ||
1935 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1936 break;
1937 goto nack_inv;
1938
1939 default:
1940 if (opcode == OP(SEND_MIDDLE) ||
1941 opcode == OP(SEND_LAST) ||
1942 opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1943 opcode == OP(RDMA_WRITE_MIDDLE) ||
1944 opcode == OP(RDMA_WRITE_LAST) ||
1945 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1946 goto nack_inv;
1947 /*
1948 * Note that it is up to the requester to not send a new
1949 * RDMA read or atomic operation before receiving an ACK
1950 * for the previous operation.
1951 */
1952 break;
1953 }
1954
1955 memset(&wc, 0, sizeof wc);
1956
1957 if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) {
1958 qp->r_flags |= QIB_R_COMM_EST;
1959 if (qp->ibqp.event_handler) {
1960 struct ib_event ev;
1961
1962 ev.device = qp->ibqp.device;
1963 ev.element.qp = &qp->ibqp;
1964 ev.event = IB_EVENT_COMM_EST;
1965 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1966 }
1967 }
1968
1969 /* OK, process the packet. */
1970 switch (opcode) {
1971 case OP(SEND_FIRST):
1972 ret = qib_get_rwqe(qp, 0);
1973 if (ret < 0)
1974 goto nack_op_err;
1975 if (!ret)
1976 goto rnr_nak;
1977 qp->r_rcv_len = 0;
1978 /* FALLTHROUGH */
1979 case OP(SEND_MIDDLE):
1980 case OP(RDMA_WRITE_MIDDLE):
1981send_middle:
1982 /* Check for invalid length PMTU or posted rwqe len. */
1983 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1984 goto nack_inv;
1985 qp->r_rcv_len += pmtu;
1986 if (unlikely(qp->r_rcv_len > qp->r_len))
1987 goto nack_inv;
1988 qib_copy_sge(&qp->r_sge, data, pmtu, 1);
1989 break;
1990
1991 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
1992 /* consume RWQE */
1993 ret = qib_get_rwqe(qp, 1);
1994 if (ret < 0)
1995 goto nack_op_err;
1996 if (!ret)
1997 goto rnr_nak;
1998 goto send_last_imm;
1999
2000 case OP(SEND_ONLY):
2001 case OP(SEND_ONLY_WITH_IMMEDIATE):
2002 ret = qib_get_rwqe(qp, 0);
2003 if (ret < 0)
2004 goto nack_op_err;
2005 if (!ret)
2006 goto rnr_nak;
2007 qp->r_rcv_len = 0;
2008 if (opcode == OP(SEND_ONLY))
2009 goto send_last;
2010 /* FALLTHROUGH */
2011 case OP(SEND_LAST_WITH_IMMEDIATE):
2012send_last_imm:
2013 wc.ex.imm_data = ohdr->u.imm_data;
2014 hdrsize += 4;
2015 wc.wc_flags = IB_WC_WITH_IMM;
2016 /* FALLTHROUGH */
2017 case OP(SEND_LAST):
2018 case OP(RDMA_WRITE_LAST):
2019send_last:
2020 /* Get the number of bytes the message was padded by. */
2021 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
2022 /* Check for invalid length. */
2023 /* XXX LAST len should be >= 1 */
2024 if (unlikely(tlen < (hdrsize + pad + 4)))
2025 goto nack_inv;
2026 /* Don't count the CRC. */
2027 tlen -= (hdrsize + pad + 4);
2028 wc.byte_len = tlen + qp->r_rcv_len;
2029 if (unlikely(wc.byte_len > qp->r_len))
2030 goto nack_inv;
2031 qib_copy_sge(&qp->r_sge, data, tlen, 1);
2032 while (qp->r_sge.num_sge) {
2033 atomic_dec(&qp->r_sge.sge.mr->refcount);
2034 if (--qp->r_sge.num_sge)
2035 qp->r_sge.sge = *qp->r_sge.sg_list++;
2036 }
2037 qp->r_msn++;
2038 if (!test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags))
2039 break;
2040 wc.wr_id = qp->r_wr_id;
2041 wc.status = IB_WC_SUCCESS;
2042 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2043 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2044 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2045 else
2046 wc.opcode = IB_WC_RECV;
2047 wc.qp = &qp->ibqp;
2048 wc.src_qp = qp->remote_qpn;
2049 wc.slid = qp->remote_ah_attr.dlid;
2050 wc.sl = qp->remote_ah_attr.sl;
2051 /* Signal completion event if the solicited bit is set. */
2052 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
2053 (ohdr->bth[0] &
2054 cpu_to_be32(IB_BTH_SOLICITED)) != 0);
2055 break;
2056
2057 case OP(RDMA_WRITE_FIRST):
2058 case OP(RDMA_WRITE_ONLY):
2059 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2060 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2061 goto nack_inv;
2062 /* consume RWQE */
2063 reth = &ohdr->u.rc.reth;
2064 hdrsize += sizeof(*reth);
2065 qp->r_len = be32_to_cpu(reth->length);
2066 qp->r_rcv_len = 0;
2067 qp->r_sge.sg_list = NULL;
2068 if (qp->r_len != 0) {
2069 u32 rkey = be32_to_cpu(reth->rkey);
2070 u64 vaddr = be64_to_cpu(reth->vaddr);
2071 int ok;
2072
2073 /* Check rkey & NAK */
2074 ok = qib_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2075 rkey, IB_ACCESS_REMOTE_WRITE);
2076 if (unlikely(!ok))
2077 goto nack_acc;
2078 qp->r_sge.num_sge = 1;
2079 } else {
2080 qp->r_sge.num_sge = 0;
2081 qp->r_sge.sge.mr = NULL;
2082 qp->r_sge.sge.vaddr = NULL;
2083 qp->r_sge.sge.length = 0;
2084 qp->r_sge.sge.sge_length = 0;
2085 }
2086 if (opcode == OP(RDMA_WRITE_FIRST))
2087 goto send_middle;
2088 else if (opcode == OP(RDMA_WRITE_ONLY))
2089 goto send_last;
2090 ret = qib_get_rwqe(qp, 1);
2091 if (ret < 0)
2092 goto nack_op_err;
2093 if (!ret)
2094 goto rnr_nak;
5715f5d4
JG		 2095 wc.ex.imm_data = ohdr->u.rc.imm_data;
2096 hdrsize += 4;
2097 wc.wc_flags = IB_WC_WITH_IMM;
2098 goto send_last;
f931551b
RC		 2099
2100 case OP(RDMA_READ_REQUEST): {
2101 struct qib_ack_entry *e;
2102 u32 len;
2103 u8 next;
2104
2105 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2106 goto nack_inv;
2107 next = qp->r_head_ack_queue + 1;
2108 /* s_ack_queue is size QIB_MAX_RDMA_ATOMIC+1 so use > not >= */
2109 if (next > QIB_MAX_RDMA_ATOMIC)
2110 next = 0;
2111 spin_lock_irqsave(&qp->s_lock, flags);
f931551b
RC		 2112 if (unlikely(next == qp->s_tail_ack_queue)) {
2113 if (!qp->s_ack_queue[next].sent)
2114 goto nack_inv_unlck;
2115 qib_update_ack_queue(qp, next);
2116 }
2117 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2118 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2119 atomic_dec(&e->rdma_sge.mr->refcount);
2120 e->rdma_sge.mr = NULL;
2121 }
2122 reth = &ohdr->u.rc.reth;
2123 len = be32_to_cpu(reth->length);
2124 if (len) {
2125 u32 rkey = be32_to_cpu(reth->rkey);
2126 u64 vaddr = be64_to_cpu(reth->vaddr);
2127 int ok;
2128
2129 /* Check rkey & NAK */
2130 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2131 rkey, IB_ACCESS_REMOTE_READ);
2132 if (unlikely(!ok))
2133 goto nack_acc_unlck;
2134 /*
2135 * Update the next expected PSN. We add 1 later
2136 * below, so only add the remainder here.
2137 */
2138 if (len > pmtu)
2139 qp->r_psn += (len - 1) / pmtu;
2140 } else {
2141 e->rdma_sge.mr = NULL;
2142 e->rdma_sge.vaddr = NULL;
2143 e->rdma_sge.length = 0;
2144 e->rdma_sge.sge_length = 0;
2145 }
2146 e->opcode = opcode;
2147 e->sent = 0;
2148 e->psn = psn;
2149 e->lpsn = qp->r_psn;
2150 /*
2151 * We need to increment the MSN here instead of when we
2152 * finish sending the result since a duplicate request would
2153 * increment it more than once.
2154 */
2155 qp->r_msn++;
2156 qp->r_psn++;
2157 qp->r_state = opcode;
2158 qp->r_nak_state = 0;
2159 qp->r_head_ack_queue = next;
2160
2161 /* Schedule the send tasklet. */
2162 qp->s_flags |= QIB_S_RESP_PENDING;
2163 qib_schedule_send(qp);
2164
a5210c12 2165 goto sunlock;
f931551b
RC		 2166 }
2167
2168 case OP(COMPARE_SWAP):
2169 case OP(FETCH_ADD): {
2170 struct ib_atomic_eth *ateth;
2171 struct qib_ack_entry *e;
2172 u64 vaddr;
2173 atomic64_t *maddr;
2174 u64 sdata;
2175 u32 rkey;
2176 u8 next;
2177
2178 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
2179 goto nack_inv;
2180 next = qp->r_head_ack_queue + 1;
2181 if (next > QIB_MAX_RDMA_ATOMIC)
2182 next = 0;
2183 spin_lock_irqsave(&qp->s_lock, flags);
f931551b
RC		 2184 if (unlikely(next == qp->s_tail_ack_queue)) {
2185 if (!qp->s_ack_queue[next].sent)
2186 goto nack_inv_unlck;
2187 qib_update_ack_queue(qp, next);
2188 }
2189 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2190 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2191 atomic_dec(&e->rdma_sge.mr->refcount);
2192 e->rdma_sge.mr = NULL;
2193 }
2194 ateth = &ohdr->u.atomic_eth;
2195 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
2196 be32_to_cpu(ateth->vaddr[1]);
2197 if (unlikely(vaddr & (sizeof(u64) - 1)))
2198 goto nack_inv_unlck;
2199 rkey = be32_to_cpu(ateth->rkey);
2200 /* Check rkey & NAK */
2201 if (unlikely(!qib_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2202 vaddr, rkey,
2203 IB_ACCESS_REMOTE_ATOMIC)))
2204 goto nack_acc_unlck;
2205 /* Perform atomic OP and save result. */
2206 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
2207 sdata = be64_to_cpu(ateth->swap_data);
2208 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2209 (u64) atomic64_add_return(sdata, maddr) - sdata :
2210 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
2211 be64_to_cpu(ateth->compare_data),
2212 sdata);
2213 atomic_dec(&qp->r_sge.sge.mr->refcount);
2214 qp->r_sge.num_sge = 0;
2215 e->opcode = opcode;
2216 e->sent = 0;
2217 e->psn = psn;
2218 e->lpsn = psn;
2219 qp->r_msn++;
2220 qp->r_psn++;
2221 qp->r_state = opcode;
2222 qp->r_nak_state = 0;
2223 qp->r_head_ack_queue = next;
2224
2225 /* Schedule the send tasklet. */
2226 qp->s_flags |= QIB_S_RESP_PENDING;
2227 qib_schedule_send(qp);
2228
a5210c12 2229 goto sunlock;
f931551b
RC		 2230 }
2231
2232 default:
2233 /* NAK unknown opcodes. */
2234 goto nack_inv;
2235 }
2236 qp->r_psn++;
2237 qp->r_state = opcode;
2238 qp->r_ack_psn = psn;
2239 qp->r_nak_state = 0;
2240 /* Send an ACK if requested or required. */
2241 if (psn & (1 << 31))
2242 goto send_ack;
a5210c12 2243 return;
f931551b
RC		 2244
2245rnr_nak:
2246 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
2247 qp->r_ack_psn = qp->r_psn;
2248 /* Queue RNR NAK for later */
2249 if (list_empty(&qp->rspwait)) {
2250 qp->r_flags |= QIB_R_RSP_NAK;
2251 atomic_inc(&qp->refcount);
2252 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2253 }
a5210c12 2254 return;
f931551b
RC		 2255
2256nack_op_err:
2257 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2258 qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2259 qp->r_ack_psn = qp->r_psn;
2260 /* Queue NAK for later */
2261 if (list_empty(&qp->rspwait)) {
2262 qp->r_flags |= QIB_R_RSP_NAK;
2263 atomic_inc(&qp->refcount);
2264 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2265 }
a5210c12 2266 return;
f931551b
RC		 2267
2268nack_inv_unlck:
2269 spin_unlock_irqrestore(&qp->s_lock, flags);
2270nack_inv:
2271 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2272 qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2273 qp->r_ack_psn = qp->r_psn;
2274 /* Queue NAK for later */
2275 if (list_empty(&qp->rspwait)) {
2276 qp->r_flags |= QIB_R_RSP_NAK;
2277 atomic_inc(&qp->refcount);
2278 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2279 }
a5210c12 2280 return;
f931551b
RC		 2281
2282nack_acc_unlck:
2283 spin_unlock_irqrestore(&qp->s_lock, flags);
2284nack_acc:
2285 qib_rc_error(qp, IB_WC_LOC_PROT_ERR);
2286 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2287 qp->r_ack_psn = qp->r_psn;
2288send_ack:
2289 qib_send_rc_ack(qp);
f931551b
RC		 2290 return;
2291
2292sunlock:
2293 spin_unlock_irqrestore(&qp->s_lock, flags);
2294}
Linux kernel - Deliverables
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