[deliverable/linux.git] / drivers / infiniband / hw / qib / qib_uc.c

/*
 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
 * All rights reserved.
 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include "qib.h"

/* cut down ridiculously long IB macro names */
#define OP(x) IB_OPCODE_UC_##x

/**
 * qib_make_uc_req - construct a request packet (SEND, RDMA write)
 * @qp: a pointer to the QP
 *
 * Return 1 if constructed; otherwise, return 0.
 */
int qib_make_uc_req(struct rvt_qp *qp)
{
	struct qib_qp_priv *priv = qp->priv;
	struct qib_other_headers *ohdr;
	struct rvt_swqe *wqe;
	unsigned long flags;
	u32 hwords;
	u32 bth0;
	u32 len;
	u32 pmtu = qp->pmtu;
	int ret = 0;

	spin_lock_irqsave(&qp->s_lock, flags);

	if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) {
		if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND))
			goto bail;
		/* We are in the error state, flush the work request. */
		if (qp->s_last == qp->s_head)
			goto bail;
		/* If DMAs are in progress, we can't flush immediately. */
		if (atomic_read(&priv->s_dma_busy)) {
			qp->s_flags |= QIB_S_WAIT_DMA;
			goto bail;
		}
		wqe = get_swqe_ptr(qp, qp->s_last);
		qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
		goto done;
	}

	ohdr = &priv->s_hdr->u.oth;
	if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
		ohdr = &priv->s_hdr->u.l.oth;

	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
	hwords = 5;
	bth0 = 0;

	/* Get the next send request. */
	wqe = get_swqe_ptr(qp, qp->s_cur);
	qp->s_wqe = NULL;
	switch (qp->s_state) {
	default:
		if (!(ib_qib_state_ops[qp->state] &
		    QIB_PROCESS_NEXT_SEND_OK))
			goto bail;
		/* Check if send work queue is empty. */
		if (qp->s_cur == qp->s_head)
			goto bail;
		/*
		 * Start a new request.
		 */
		wqe->psn = qp->s_next_psn;
		qp->s_psn = qp->s_next_psn;
		qp->s_sge.sge = wqe->sg_list[0];
		qp->s_sge.sg_list = wqe->sg_list + 1;
		qp->s_sge.num_sge = wqe->wr.num_sge;
		qp->s_sge.total_len = wqe->length;
		len = wqe->length;
		qp->s_len = len;
		switch (wqe->wr.opcode) {
		case IB_WR_SEND:
		case IB_WR_SEND_WITH_IMM:
			if (len > pmtu) {
				qp->s_state = OP(SEND_FIRST);
				len = pmtu;
				break;
			}
			if (wqe->wr.opcode == IB_WR_SEND)
				qp->s_state = OP(SEND_ONLY);
			else {
				qp->s_state =
					OP(SEND_ONLY_WITH_IMMEDIATE);
				/* Immediate data comes after the BTH */
				ohdr->u.imm_data = wqe->wr.ex.imm_data;
				hwords += 1;
			}
			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
				bth0 |= IB_BTH_SOLICITED;
			qp->s_wqe = wqe;
			if (++qp->s_cur >= qp->s_size)
				qp->s_cur = 0;
			break;

		case IB_WR_RDMA_WRITE:
		case IB_WR_RDMA_WRITE_WITH_IMM:
			ohdr->u.rc.reth.vaddr =
				cpu_to_be64(wqe->rdma_wr.remote_addr);
			ohdr->u.rc.reth.rkey =
				cpu_to_be32(wqe->rdma_wr.rkey);
			ohdr->u.rc.reth.length = cpu_to_be32(len);
			hwords += sizeof(struct ib_reth) / 4;
			if (len > pmtu) {
				qp->s_state = OP(RDMA_WRITE_FIRST);
				len = pmtu;
				break;
			}
			if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
				qp->s_state = OP(RDMA_WRITE_ONLY);
			else {
				qp->s_state =
					OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
				/* Immediate data comes after the RETH */
				ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
				hwords += 1;
				if (wqe->wr.send_flags & IB_SEND_SOLICITED)
					bth0 |= IB_BTH_SOLICITED;
			}
			qp->s_wqe = wqe;
			if (++qp->s_cur >= qp->s_size)
				qp->s_cur = 0;
			break;

		default:
			goto bail;
		}
		break;

	case OP(SEND_FIRST):
		qp->s_state = OP(SEND_MIDDLE);
		/* FALLTHROUGH */
	case OP(SEND_MIDDLE):
		len = qp->s_len;
		if (len > pmtu) {
			len = pmtu;
			break;
		}
		if (wqe->wr.opcode == IB_WR_SEND)
			qp->s_state = OP(SEND_LAST);
		else {
			qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
			/* Immediate data comes after the BTH */
			ohdr->u.imm_data = wqe->wr.ex.imm_data;
			hwords += 1;
		}
		if (wqe->wr.send_flags & IB_SEND_SOLICITED)
			bth0 |= IB_BTH_SOLICITED;
		qp->s_wqe = wqe;
		if (++qp->s_cur >= qp->s_size)
			qp->s_cur = 0;
		break;

	case OP(RDMA_WRITE_FIRST):
		qp->s_state = OP(RDMA_WRITE_MIDDLE);
		/* FALLTHROUGH */
	case OP(RDMA_WRITE_MIDDLE):
		len = qp->s_len;
		if (len > pmtu) {
			len = pmtu;
			break;
		}
		if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
			qp->s_state = OP(RDMA_WRITE_LAST);
		else {
			qp->s_state =
				OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
			/* Immediate data comes after the BTH */
			ohdr->u.imm_data = wqe->wr.ex.imm_data;
			hwords += 1;
			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
				bth0 |= IB_BTH_SOLICITED;
		}
		qp->s_wqe = wqe;
		if (++qp->s_cur >= qp->s_size)
			qp->s_cur = 0;
		break;
	}
	qp->s_len -= len;
	qp->s_hdrwords = hwords;
	qp->s_cur_sge = &qp->s_sge;
	qp->s_cur_size = len;
	qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24),
			    qp->s_next_psn++ & QIB_PSN_MASK);
done:
	ret = 1;
	goto unlock;

bail:
	qp->s_flags &= ~QIB_S_BUSY;
unlock:
	spin_unlock_irqrestore(&qp->s_lock, flags);
	return ret;
}

/**
 * qib_uc_rcv - handle an incoming UC packet
 * @ibp: the port the packet came in on
 * @hdr: the header of the packet
 * @has_grh: true if the packet has a GRH
 * @data: the packet data
 * @tlen: the length of the packet
 * @qp: the QP for this packet.
 *
 * This is called from qib_qp_rcv() to process an incoming UC packet
 * for the given QP.
 * Called at interrupt level.
 */
void qib_uc_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr,
		int has_grh, void *data, u32 tlen, struct rvt_qp *qp)
{
	struct qib_other_headers *ohdr;
	u32 opcode;
	u32 hdrsize;
	u32 psn;
	u32 pad;
	struct ib_wc wc;
	u32 pmtu = qp->pmtu;
	struct ib_reth *reth;
	int ret;

	/* Check for GRH */
	if (!has_grh) {
		ohdr = &hdr->u.oth;
		hdrsize = 8 + 12;       /* LRH + BTH */
	} else {
		ohdr = &hdr->u.l.oth;
		hdrsize = 8 + 40 + 12;  /* LRH + GRH + BTH */
	}

	opcode = be32_to_cpu(ohdr->bth[0]);
	if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
		return;

	psn = be32_to_cpu(ohdr->bth[2]);
	opcode >>= 24;

	/* Compare the PSN verses the expected PSN. */
	if (unlikely(qib_cmp24(psn, qp->r_psn) != 0)) {
		/*
		 * Handle a sequence error.
		 * Silently drop any current message.
		 */
		qp->r_psn = psn;
inv:
		if (qp->r_state == OP(SEND_FIRST) ||
		    qp->r_state == OP(SEND_MIDDLE)) {
			set_bit(QIB_R_REWIND_SGE, &qp->r_aflags);
			qp->r_sge.num_sge = 0;
		} else
			qib_put_ss(&qp->r_sge);
		qp->r_state = OP(SEND_LAST);
		switch (opcode) {
		case OP(SEND_FIRST):
		case OP(SEND_ONLY):
		case OP(SEND_ONLY_WITH_IMMEDIATE):
			goto send_first;

		case OP(RDMA_WRITE_FIRST):
		case OP(RDMA_WRITE_ONLY):
		case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
			goto rdma_first;

		default:
			goto drop;
		}
	}

	/* Check for opcode sequence errors. */
	switch (qp->r_state) {
	case OP(SEND_FIRST):
	case OP(SEND_MIDDLE):
		if (opcode == OP(SEND_MIDDLE) ||
		    opcode == OP(SEND_LAST) ||
		    opcode == OP(SEND_LAST_WITH_IMMEDIATE))
			break;
		goto inv;

	case OP(RDMA_WRITE_FIRST):
	case OP(RDMA_WRITE_MIDDLE):
		if (opcode == OP(RDMA_WRITE_MIDDLE) ||
		    opcode == OP(RDMA_WRITE_LAST) ||
		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
			break;
		goto inv;

	default:
		if (opcode == OP(SEND_FIRST) ||
		    opcode == OP(SEND_ONLY) ||
		    opcode == OP(SEND_ONLY_WITH_IMMEDIATE) ||
		    opcode == OP(RDMA_WRITE_FIRST) ||
		    opcode == OP(RDMA_WRITE_ONLY) ||
		    opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
			break;
		goto inv;
	}

	if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) {
		qp->r_flags |= QIB_R_COMM_EST;
		if (qp->ibqp.event_handler) {
			struct ib_event ev;

			ev.device = qp->ibqp.device;
			ev.element.qp = &qp->ibqp;
			ev.event = IB_EVENT_COMM_EST;
			qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
		}
	}

	/* OK, process the packet. */
	switch (opcode) {
	case OP(SEND_FIRST):
	case OP(SEND_ONLY):
	case OP(SEND_ONLY_WITH_IMMEDIATE):
send_first:
		if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
			qp->r_sge = qp->s_rdma_read_sge;
		else {
			ret = qib_get_rwqe(qp, 0);
			if (ret < 0)
				goto op_err;
			if (!ret)
				goto drop;
			/*
			 * qp->s_rdma_read_sge will be the owner
			 * of the mr references.
			 */
			qp->s_rdma_read_sge = qp->r_sge;
		}
		qp->r_rcv_len = 0;
		if (opcode == OP(SEND_ONLY))
			goto no_immediate_data;
		else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
			goto send_last_imm;
		/* FALLTHROUGH */
	case OP(SEND_MIDDLE):
		/* Check for invalid length PMTU or posted rwqe len. */
		if (unlikely(tlen != (hdrsize + pmtu + 4)))
			goto rewind;
		qp->r_rcv_len += pmtu;
		if (unlikely(qp->r_rcv_len > qp->r_len))
			goto rewind;
		qib_copy_sge(&qp->r_sge, data, pmtu, 0);
		break;

	case OP(SEND_LAST_WITH_IMMEDIATE):
send_last_imm:
		wc.ex.imm_data = ohdr->u.imm_data;
		hdrsize += 4;
		wc.wc_flags = IB_WC_WITH_IMM;
		goto send_last;
	case OP(SEND_LAST):
no_immediate_data:
		wc.ex.imm_data = 0;
		wc.wc_flags = 0;
send_last:
		/* Get the number of bytes the message was padded by. */
		pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
		/* Check for invalid length. */
		/* XXX LAST len should be >= 1 */
		if (unlikely(tlen < (hdrsize + pad + 4)))
			goto rewind;
		/* Don't count the CRC. */
		tlen -= (hdrsize + pad + 4);
		wc.byte_len = tlen + qp->r_rcv_len;
		if (unlikely(wc.byte_len > qp->r_len))
			goto rewind;
		wc.opcode = IB_WC_RECV;
		qib_copy_sge(&qp->r_sge, data, tlen, 0);
		qib_put_ss(&qp->s_rdma_read_sge);
last_imm:
		wc.wr_id = qp->r_wr_id;
		wc.status = IB_WC_SUCCESS;
		wc.qp = &qp->ibqp;
		wc.src_qp = qp->remote_qpn;
		wc.slid = qp->remote_ah_attr.dlid;
		wc.sl = qp->remote_ah_attr.sl;
		/* zero fields that are N/A */
		wc.vendor_err = 0;
		wc.pkey_index = 0;
		wc.dlid_path_bits = 0;
		wc.port_num = 0;
		/* Signal completion event if the solicited bit is set. */
		qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
			     (ohdr->bth[0] &
				cpu_to_be32(IB_BTH_SOLICITED)) != 0);
		break;

	case OP(RDMA_WRITE_FIRST):
	case OP(RDMA_WRITE_ONLY):
	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
rdma_first:
		if (unlikely(!(qp->qp_access_flags &
			       IB_ACCESS_REMOTE_WRITE))) {
			goto drop;
		}
		reth = &ohdr->u.rc.reth;
		hdrsize += sizeof(*reth);
		qp->r_len = be32_to_cpu(reth->length);
		qp->r_rcv_len = 0;
		qp->r_sge.sg_list = NULL;
		if (qp->r_len != 0) {
			u32 rkey = be32_to_cpu(reth->rkey);
			u64 vaddr = be64_to_cpu(reth->vaddr);
			int ok;

			/* Check rkey */
			ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
					 vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
			if (unlikely(!ok))
				goto drop;
			qp->r_sge.num_sge = 1;
		} else {
			qp->r_sge.num_sge = 0;
			qp->r_sge.sge.mr = NULL;
			qp->r_sge.sge.vaddr = NULL;
			qp->r_sge.sge.length = 0;
			qp->r_sge.sge.sge_length = 0;
		}
		if (opcode == OP(RDMA_WRITE_ONLY))
			goto rdma_last;
		else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
			wc.ex.imm_data = ohdr->u.rc.imm_data;
			goto rdma_last_imm;
		}
		/* FALLTHROUGH */
	case OP(RDMA_WRITE_MIDDLE):
		/* Check for invalid length PMTU or posted rwqe len. */
		if (unlikely(tlen != (hdrsize + pmtu + 4)))
			goto drop;
		qp->r_rcv_len += pmtu;
		if (unlikely(qp->r_rcv_len > qp->r_len))
			goto drop;
		qib_copy_sge(&qp->r_sge, data, pmtu, 1);
		break;

	case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
		wc.ex.imm_data = ohdr->u.imm_data;
rdma_last_imm:
		hdrsize += 4;
		wc.wc_flags = IB_WC_WITH_IMM;

		/* Get the number of bytes the message was padded by. */
		pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
		/* Check for invalid length. */
		/* XXX LAST len should be >= 1 */
		if (unlikely(tlen < (hdrsize + pad + 4)))
			goto drop;
		/* Don't count the CRC. */
		tlen -= (hdrsize + pad + 4);
		if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
			goto drop;
		if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
			qib_put_ss(&qp->s_rdma_read_sge);
		else {
			ret = qib_get_rwqe(qp, 1);
			if (ret < 0)
				goto op_err;
			if (!ret)
				goto drop;
		}
		wc.byte_len = qp->r_len;
		wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
		qib_copy_sge(&qp->r_sge, data, tlen, 1);
		qib_put_ss(&qp->r_sge);
		goto last_imm;

	case OP(RDMA_WRITE_LAST):
rdma_last:
		/* Get the number of bytes the message was padded by. */
		pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
		/* Check for invalid length. */
		/* XXX LAST len should be >= 1 */
		if (unlikely(tlen < (hdrsize + pad + 4)))
			goto drop;
		/* Don't count the CRC. */
		tlen -= (hdrsize + pad + 4);
		if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
			goto drop;
		qib_copy_sge(&qp->r_sge, data, tlen, 1);
		qib_put_ss(&qp->r_sge);
		break;

	default:
		/* Drop packet for unknown opcodes. */
		goto drop;
	}
	qp->r_psn++;
	qp->r_state = opcode;
	return;

rewind:
	set_bit(QIB_R_REWIND_SGE, &qp->r_aflags);
	qp->r_sge.num_sge = 0;
drop:
	ibp->rvp.n_pkt_drops++;
	return;

op_err:
	qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
	return;

}
Commit	Line	Data
f931551b RC	1	/*
	2	* Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
	3	* All rights reserved.
	4	* Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
	5	*
	6	* This software is available to you under a choice of one of two
	7	* licenses. You may choose to be licensed under the terms of the GNU
	8	* General Public License (GPL) Version 2, available from the file
	9	* COPYING in the main directory of this source tree, or the
	10	* OpenIB.org BSD license below:
	11	*
	12	* Redistribution and use in source and binary forms, with or
	13	* without modification, are permitted provided that the following
	14	* conditions are met:
	15	*
	16	* - Redistributions of source code must retain the above
	17	* copyright notice, this list of conditions and the following
	18	* disclaimer.
	19	*
	20	* - Redistributions in binary form must reproduce the above
	21	* copyright notice, this list of conditions and the following
	22	* disclaimer in the documentation and/or other materials
	23	* provided with the distribution.
	24	*
	25	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	26	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	27	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	28	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	29	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	30	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	31	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	32	* SOFTWARE.
	33	*/
	34
	35	#include "qib.h"
	36
	37	/* cut down ridiculously long IB macro names */
	38	#define OP(x) IB_OPCODE_UC_##x
	39
	40	/**
	41	* qib_make_uc_req - construct a request packet (SEND, RDMA write)
	42	* @qp: a pointer to the QP
	43	*
	44	* Return 1 if constructed; otherwise, return 0.
	45	*/
7c2e11fe	46	int qib_make_uc_req(struct rvt_qp *qp)
f931551b	47	{
ffc26907	48	struct qib_qp_priv *priv = qp->priv;
f931551b	49	struct qib_other_headers *ohdr;
7c2e11fe	50	struct rvt_swqe *wqe;
f931551b RC	51	unsigned long flags;
	52	u32 hwords;
	53	u32 bth0;
	54	u32 len;
cc6ea138	55	u32 pmtu = qp->pmtu;
f931551b RC	56	int ret = 0;
	57
	58	spin_lock_irqsave(&qp->s_lock, flags);
	59
	60	if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) {
	61	if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND))
	62	goto bail;
	63	/* We are in the error state, flush the work request. */
	64	if (qp->s_last == qp->s_head)
	65	goto bail;
	66	/* If DMAs are in progress, we can't flush immediately. */
ffc26907	67	if (atomic_read(&priv->s_dma_busy)) {
f931551b RC	68	qp->s_flags \|= QIB_S_WAIT_DMA;
	69	goto bail;
	70	}
	71	wqe = get_swqe_ptr(qp, qp->s_last);
	72	qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
	73	goto done;
	74	}
	75
ffc26907	76	ohdr = &priv->s_hdr->u.oth;
f931551b	77	if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
ffc26907	78	ohdr = &priv->s_hdr->u.l.oth;
f931551b RC	79
	80	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
	81	hwords = 5;
	82	bth0 = 0;
	83
	84	/* Get the next send request. */
	85	wqe = get_swqe_ptr(qp, qp->s_cur);
	86	qp->s_wqe = NULL;
	87	switch (qp->s_state) {
	88	default:
	89	if (!(ib_qib_state_ops[qp->state] &
	90	QIB_PROCESS_NEXT_SEND_OK))
	91	goto bail;
	92	/* Check if send work queue is empty. */
	93	if (qp->s_cur == qp->s_head)
	94	goto bail;
	95	/*
	96	* Start a new request.
	97	*/
	98	wqe->psn = qp->s_next_psn;
	99	qp->s_psn = qp->s_next_psn;
	100	qp->s_sge.sge = wqe->sg_list[0];
	101	qp->s_sge.sg_list = wqe->sg_list + 1;
	102	qp->s_sge.num_sge = wqe->wr.num_sge;
	103	qp->s_sge.total_len = wqe->length;
	104	len = wqe->length;
	105	qp->s_len = len;
	106	switch (wqe->wr.opcode) {
	107	case IB_WR_SEND:
	108	case IB_WR_SEND_WITH_IMM:
	109	if (len > pmtu) {
	110	qp->s_state = OP(SEND_FIRST);
	111	len = pmtu;
	112	break;
	113	}
	114	if (wqe->wr.opcode == IB_WR_SEND)
	115	qp->s_state = OP(SEND_ONLY);
	116	else {
	117	qp->s_state =
	118	OP(SEND_ONLY_WITH_IMMEDIATE);
	119	/* Immediate data comes after the BTH */
	120	ohdr->u.imm_data = wqe->wr.ex.imm_data;
	121	hwords += 1;
	122	}
	123	if (wqe->wr.send_flags & IB_SEND_SOLICITED)
	124	bth0 \|= IB_BTH_SOLICITED;
	125	qp->s_wqe = wqe;
	126	if (++qp->s_cur >= qp->s_size)
	127	qp->s_cur = 0;
	128	break;
	129
	130	case IB_WR_RDMA_WRITE:
	131	case IB_WR_RDMA_WRITE_WITH_IMM:
	132	ohdr->u.rc.reth.vaddr =
e622f2f4	133	cpu_to_be64(wqe->rdma_wr.remote_addr);
f931551b	134	ohdr->u.rc.reth.rkey =
e622f2f4	135	cpu_to_be32(wqe->rdma_wr.rkey);
f931551b RC	136	ohdr->u.rc.reth.length = cpu_to_be32(len);
	137	hwords += sizeof(struct ib_reth) / 4;
	138	if (len > pmtu) {
	139	qp->s_state = OP(RDMA_WRITE_FIRST);
	140	len = pmtu;
	141	break;
	142	}
	143	if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
	144	qp->s_state = OP(RDMA_WRITE_ONLY);
	145	else {
	146	qp->s_state =
	147	OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
	148	/* Immediate data comes after the RETH */
	149	ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
	150	hwords += 1;
	151	if (wqe->wr.send_flags & IB_SEND_SOLICITED)
	152	bth0 \|= IB_BTH_SOLICITED;
	153	}
	154	qp->s_wqe = wqe;
	155	if (++qp->s_cur >= qp->s_size)
	156	qp->s_cur = 0;
	157	break;
	158
	159	default:
	160	goto bail;
	161	}
	162	break;
	163
	164	case OP(SEND_FIRST):
	165	qp->s_state = OP(SEND_MIDDLE);
	166	/* FALLTHROUGH */
	167	case OP(SEND_MIDDLE):
	168	len = qp->s_len;
	169	if (len > pmtu) {
	170	len = pmtu;
	171	break;
	172	}
	173	if (wqe->wr.opcode == IB_WR_SEND)
	174	qp->s_state = OP(SEND_LAST);
	175	else {
	176	qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
	177	/* Immediate data comes after the BTH */
	178	ohdr->u.imm_data = wqe->wr.ex.imm_data;
	179	hwords += 1;
	180	}
	181	if (wqe->wr.send_flags & IB_SEND_SOLICITED)
	182	bth0 \|= IB_BTH_SOLICITED;
	183	qp->s_wqe = wqe;
	184	if (++qp->s_cur >= qp->s_size)
	185	qp->s_cur = 0;
	186	break;
	187
	188	case OP(RDMA_WRITE_FIRST):
	189	qp->s_state = OP(RDMA_WRITE_MIDDLE);
	190	/* FALLTHROUGH */
	191	case OP(RDMA_WRITE_MIDDLE):
	192	len = qp->s_len;
	193	if (len > pmtu) {
	194	len = pmtu;
	195	break;
	196	}
	197	if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
	198	qp->s_state = OP(RDMA_WRITE_LAST);
	199	else {
200	qp->s_state =
201	OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
202	/* Immediate data comes after the BTH */
203	ohdr->u.imm_data = wqe->wr.ex.imm_data;
204	hwords += 1;
205	if (wqe->wr.send_flags & IB_SEND_SOLICITED)
206	bth0 \|= IB_BTH_SOLICITED;
207	}
208	qp->s_wqe = wqe;
209	if (++qp->s_cur >= qp->s_size)
210	qp->s_cur = 0;
211	break;
212	}
213	qp->s_len -= len;
214	qp->s_hdrwords = hwords;
215	qp->s_cur_sge = &qp->s_sge;
216	qp->s_cur_size = len;
217	qib_make_ruc_header(qp, ohdr, bth0 \| (qp->s_state << 24),
218	qp->s_next_psn++ & QIB_PSN_MASK);
219	done:
220	ret = 1;
221	goto unlock;
222
223	bail:
224	qp->s_flags &= ~QIB_S_BUSY;
225	unlock:
226	spin_unlock_irqrestore(&qp->s_lock, flags);
227	return ret;
228	}
229
230	/**
231	* qib_uc_rcv - handle an incoming UC packet
232	* @ibp: the port the packet came in on
233	* @hdr: the header of the packet
234	* @has_grh: true if the packet has a GRH
235	* @data: the packet data
236	* @tlen: the length of the packet
237	* @qp: the QP for this packet.
238	*
239	* This is called from qib_qp_rcv() to process an incoming UC packet
240	* for the given QP.
241	* Called at interrupt level.
242	*/
243	void qib_uc_rcv(struct qib_ibport ibp, struct qib_ib_header hdr,
7c2e11fe	244	int has_grh, void data, u32 tlen, struct rvt_qp qp)
f931551b RC	245	{
f931551b RC	246	struct qib_other_headers *ohdr;
f931551b RC	247	u32 opcode;
	248	u32 hdrsize;
	249	u32 psn;
	250	u32 pad;
	251	struct ib_wc wc;
cc6ea138	252	u32 pmtu = qp->pmtu;
f931551b RC	253	struct ib_reth *reth;
	254	int ret;
	255
	256	/* Check for GRH */
	257	if (!has_grh) {
	258	ohdr = &hdr->u.oth;
	259	hdrsize = 8 + 12; /* LRH + BTH */
	260	} else {
	261	ohdr = &hdr->u.l.oth;
	262	hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
	263	}
	264
	265	opcode = be32_to_cpu(ohdr->bth[0]);
f931551b	266	if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
9fd5473d	267	return;
f931551b RC	268
	269	psn = be32_to_cpu(ohdr->bth[2]);
	270	opcode >>= 24;
f931551b	271
f931551b RC	272	/* Compare the PSN verses the expected PSN. */
	273	if (unlikely(qib_cmp24(psn, qp->r_psn) != 0)) {
	274	/*
	275	* Handle a sequence error.
	276	* Silently drop any current message.
	277	*/
	278	qp->r_psn = psn;
	279	inv:
	280	if (qp->r_state == OP(SEND_FIRST) \|\|
	281	qp->r_state == OP(SEND_MIDDLE)) {
	282	set_bit(QIB_R_REWIND_SGE, &qp->r_aflags);
	283	qp->r_sge.num_sge = 0;
	284	} else
6a82649f	285	qib_put_ss(&qp->r_sge);
f931551b RC	286	qp->r_state = OP(SEND_LAST);
	287	switch (opcode) {
	288	case OP(SEND_FIRST):
	289	case OP(SEND_ONLY):
	290	case OP(SEND_ONLY_WITH_IMMEDIATE):
	291	goto send_first;
	292
	293	case OP(RDMA_WRITE_FIRST):
	294	case OP(RDMA_WRITE_ONLY):
	295	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
	296	goto rdma_first;
	297
	298	default:
	299	goto drop;
	300	}
	301	}
	302
	303	/* Check for opcode sequence errors. */
	304	switch (qp->r_state) {
	305	case OP(SEND_FIRST):
	306	case OP(SEND_MIDDLE):
	307	if (opcode == OP(SEND_MIDDLE) \|\|
	308	opcode == OP(SEND_LAST) \|\|
	309	opcode == OP(SEND_LAST_WITH_IMMEDIATE))
	310	break;
	311	goto inv;
	312
	313	case OP(RDMA_WRITE_FIRST):
	314	case OP(RDMA_WRITE_MIDDLE):
	315	if (opcode == OP(RDMA_WRITE_MIDDLE) \|\|
	316	opcode == OP(RDMA_WRITE_LAST) \|\|
	317	opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
	318	break;
	319	goto inv;
	320
	321	default:
	322	if (opcode == OP(SEND_FIRST) \|\|
	323	opcode == OP(SEND_ONLY) \|\|
	324	opcode == OP(SEND_ONLY_WITH_IMMEDIATE) \|\|
	325	opcode == OP(RDMA_WRITE_FIRST) \|\|
	326	opcode == OP(RDMA_WRITE_ONLY) \|\|
	327	opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
	328	break;
	329	goto inv;
	330	}
	331
	332	if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) {
	333	qp->r_flags \|= QIB_R_COMM_EST;
	334	if (qp->ibqp.event_handler) {
	335	struct ib_event ev;
	336
	337	ev.device = qp->ibqp.device;
	338	ev.element.qp = &qp->ibqp;
	339	ev.event = IB_EVENT_COMM_EST;
	340	qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
	341	}
	342	}
	343
	344	/* OK, process the packet. */
	345	switch (opcode) {
	346	case OP(SEND_FIRST):
	347	case OP(SEND_ONLY):
	348	case OP(SEND_ONLY_WITH_IMMEDIATE):
	349	send_first:
350	if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
351	qp->r_sge = qp->s_rdma_read_sge;
352	else {
353	ret = qib_get_rwqe(qp, 0);
354	if (ret < 0)
355	goto op_err;
356	if (!ret)
357	goto drop;
358	/*
359	* qp->s_rdma_read_sge will be the owner
360	* of the mr references.
361	*/
362	qp->s_rdma_read_sge = qp->r_sge;
363	}
364	qp->r_rcv_len = 0;
365	if (opcode == OP(SEND_ONLY))
2fc109c8	366	goto no_immediate_data;
f931551b RC	367	else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
	368	goto send_last_imm;
	369	/* FALLTHROUGH */
	370	case OP(SEND_MIDDLE):
	371	/* Check for invalid length PMTU or posted rwqe len. */
	372	if (unlikely(tlen != (hdrsize + pmtu + 4)))
	373	goto rewind;
	374	qp->r_rcv_len += pmtu;
	375	if (unlikely(qp->r_rcv_len > qp->r_len))
	376	goto rewind;
	377	qib_copy_sge(&qp->r_sge, data, pmtu, 0);
	378	break;
	379
	380	case OP(SEND_LAST_WITH_IMMEDIATE):
	381	send_last_imm:
	382	wc.ex.imm_data = ohdr->u.imm_data;
	383	hdrsize += 4;
	384	wc.wc_flags = IB_WC_WITH_IMM;
2fc109c8	385	goto send_last;
f931551b	386	case OP(SEND_LAST):
2fc109c8 MM	387	no_immediate_data:
	388	wc.ex.imm_data = 0;
	389	wc.wc_flags = 0;
f931551b RC	390	send_last:
	391	/* Get the number of bytes the message was padded by. */
	392	pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
	393	/* Check for invalid length. */
	394	/* XXX LAST len should be >= 1 */
	395	if (unlikely(tlen < (hdrsize + pad + 4)))
	396	goto rewind;
	397	/* Don't count the CRC. */
	398	tlen -= (hdrsize + pad + 4);
	399	wc.byte_len = tlen + qp->r_rcv_len;
	400	if (unlikely(wc.byte_len > qp->r_len))
	401	goto rewind;
	402	wc.opcode = IB_WC_RECV;
f931551b	403	qib_copy_sge(&qp->r_sge, data, tlen, 0);
6a82649f	404	qib_put_ss(&qp->s_rdma_read_sge);
354dff1b	405	last_imm:
f931551b RC	406	wc.wr_id = qp->r_wr_id;
	407	wc.status = IB_WC_SUCCESS;
	408	wc.qp = &qp->ibqp;
	409	wc.src_qp = qp->remote_qpn;
	410	wc.slid = qp->remote_ah_attr.dlid;
	411	wc.sl = qp->remote_ah_attr.sl;
2fc109c8 MM	412	/* zero fields that are N/A */
	413	wc.vendor_err = 0;
	414	wc.pkey_index = 0;
	415	wc.dlid_path_bits = 0;
	416	wc.port_num = 0;
f931551b RC	417	/* Signal completion event if the solicited bit is set. */
	418	qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
	419	(ohdr->bth[0] &
	420	cpu_to_be32(IB_BTH_SOLICITED)) != 0);
	421	break;
	422
	423	case OP(RDMA_WRITE_FIRST):
	424	case OP(RDMA_WRITE_ONLY):
	425	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
	426	rdma_first:
	427	if (unlikely(!(qp->qp_access_flags &
	428	IB_ACCESS_REMOTE_WRITE))) {
	429	goto drop;
	430	}
	431	reth = &ohdr->u.rc.reth;
	432	hdrsize += sizeof(*reth);
	433	qp->r_len = be32_to_cpu(reth->length);
	434	qp->r_rcv_len = 0;
	435	qp->r_sge.sg_list = NULL;
	436	if (qp->r_len != 0) {
	437	u32 rkey = be32_to_cpu(reth->rkey);
	438	u64 vaddr = be64_to_cpu(reth->vaddr);
	439	int ok;
	440
	441	/* Check rkey */
7c2e11fe	442	ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
f931551b RC	443	vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
	444	if (unlikely(!ok))
	445	goto drop;
	446	qp->r_sge.num_sge = 1;
	447	} else {
	448	qp->r_sge.num_sge = 0;
	449	qp->r_sge.sge.mr = NULL;
	450	qp->r_sge.sge.vaddr = NULL;
	451	qp->r_sge.sge.length = 0;
	452	qp->r_sge.sge.sge_length = 0;
	453	}
	454	if (opcode == OP(RDMA_WRITE_ONLY))
	455	goto rdma_last;
5715f5d4 JG	456	else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
5715f5d4 JG	457	wc.ex.imm_data = ohdr->u.rc.imm_data;
f931551b	458	goto rdma_last_imm;
5715f5d4	459	}
f931551b RC	460	/* FALLTHROUGH */
	461	case OP(RDMA_WRITE_MIDDLE):
	462	/* Check for invalid length PMTU or posted rwqe len. */
	463	if (unlikely(tlen != (hdrsize + pmtu + 4)))
	464	goto drop;
	465	qp->r_rcv_len += pmtu;
	466	if (unlikely(qp->r_rcv_len > qp->r_len))
	467	goto drop;
	468	qib_copy_sge(&qp->r_sge, data, pmtu, 1);
	469	break;
	470
	471	case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
f931551b	472	wc.ex.imm_data = ohdr->u.imm_data;
5715f5d4	473	rdma_last_imm:
f931551b RC	474	hdrsize += 4;
	475	wc.wc_flags = IB_WC_WITH_IMM;
	476
	477	/* Get the number of bytes the message was padded by. */
	478	pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
	479	/* Check for invalid length. */
	480	/* XXX LAST len should be >= 1 */
	481	if (unlikely(tlen < (hdrsize + pad + 4)))
	482	goto drop;
	483	/* Don't count the CRC. */
	484	tlen -= (hdrsize + pad + 4);
	485	if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
	486	goto drop;
	487	if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
6a82649f	488	qib_put_ss(&qp->s_rdma_read_sge);
f931551b RC	489	else {
	490	ret = qib_get_rwqe(qp, 1);
	491	if (ret < 0)
	492	goto op_err;
	493	if (!ret)
	494	goto drop;
	495	}
	496	wc.byte_len = qp->r_len;
	497	wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
354dff1b	498	qib_copy_sge(&qp->r_sge, data, tlen, 1);
6a82649f	499	qib_put_ss(&qp->r_sge);
f931551b RC	500	goto last_imm;
	501
	502	case OP(RDMA_WRITE_LAST):
	503	rdma_last:
	504	/* Get the number of bytes the message was padded by. */
	505	pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
	506	/* Check for invalid length. */
	507	/* XXX LAST len should be >= 1 */
	508	if (unlikely(tlen < (hdrsize + pad + 4)))
	509	goto drop;
	510	/* Don't count the CRC. */
	511	tlen -= (hdrsize + pad + 4);
	512	if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
	513	goto drop;
	514	qib_copy_sge(&qp->r_sge, data, tlen, 1);
6a82649f	515	qib_put_ss(&qp->r_sge);
f931551b RC	516	break;
	517
	518	default:
	519	/* Drop packet for unknown opcodes. */
	520	goto drop;
	521	}
	522	qp->r_psn++;
	523	qp->r_state = opcode;
f931551b RC	524	return;
	525
	526	rewind:
	527	set_bit(QIB_R_REWIND_SGE, &qp->r_aflags);
	528	qp->r_sge.num_sge = 0;
	529	drop:
f24a6d48	530	ibp->rvp.n_pkt_drops++;
f931551b RC	531	return;
	532
	533	op_err:
	534	qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
f931551b RC	535	return;
f931551b RC	536
f931551b	537	}