Commit | Line | Data |
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11f5b30d RI |
1 | /* |
2 | * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix | |
3 | * keyboard controller | |
4 | * | |
5 | * Copyright (c) 2009-2011, NVIDIA Corporation. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
20 | */ | |
21 | ||
3f27757a | 22 | #include <linux/kernel.h> |
11f5b30d RI |
23 | #include <linux/module.h> |
24 | #include <linux/input.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/io.h> | |
28 | #include <linux/interrupt.h> | |
a445c7f0 | 29 | #include <linux/of.h> |
11f5b30d RI |
30 | #include <linux/clk.h> |
31 | #include <linux/slab.h> | |
32 | #include <mach/clk.h> | |
33 | #include <mach/kbc.h> | |
34 | ||
35 | #define KBC_MAX_DEBOUNCE_CNT 0x3ffu | |
36 | ||
37 | /* KBC row scan time and delay for beginning the row scan. */ | |
38 | #define KBC_ROW_SCAN_TIME 16 | |
39 | #define KBC_ROW_SCAN_DLY 5 | |
40 | ||
41 | /* KBC uses a 32KHz clock so a cycle = 1/32Khz */ | |
3f27757a | 42 | #define KBC_CYCLE_MS 32 |
11f5b30d RI |
43 | |
44 | /* KBC Registers */ | |
45 | ||
46 | /* KBC Control Register */ | |
47 | #define KBC_CONTROL_0 0x0 | |
48 | #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14) | |
49 | #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4) | |
50 | #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3) | |
b6834b02 | 51 | #define KBC_CONTROL_KEYPRESS_INT_EN (1 << 1) |
11f5b30d RI |
52 | #define KBC_CONTROL_KBC_EN (1 << 0) |
53 | ||
54 | /* KBC Interrupt Register */ | |
55 | #define KBC_INT_0 0x4 | |
56 | #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2) | |
fd0fc213 | 57 | #define KBC_INT_KEYPRESS_INT_STATUS (1 << 0) |
11f5b30d RI |
58 | |
59 | #define KBC_ROW_CFG0_0 0x8 | |
60 | #define KBC_COL_CFG0_0 0x18 | |
d0d150ec | 61 | #define KBC_TO_CNT_0 0x24 |
11f5b30d RI |
62 | #define KBC_INIT_DLY_0 0x28 |
63 | #define KBC_RPT_DLY_0 0x2c | |
64 | #define KBC_KP_ENT0_0 0x30 | |
65 | #define KBC_KP_ENT1_0 0x34 | |
66 | #define KBC_ROW0_MASK_0 0x38 | |
67 | ||
68 | #define KBC_ROW_SHIFT 3 | |
69 | ||
70 | struct tegra_kbc { | |
71 | void __iomem *mmio; | |
72 | struct input_dev *idev; | |
73 | unsigned int irq; | |
11f5b30d RI |
74 | spinlock_t lock; |
75 | unsigned int repoll_dly; | |
76 | unsigned long cp_dly_jiffies; | |
d0d150ec | 77 | unsigned int cp_to_wkup_dly; |
4e8b65f6 | 78 | bool use_fn_map; |
34abeeb2 | 79 | bool use_ghost_filter; |
fd0fc213 | 80 | bool keypress_caused_wake; |
11f5b30d | 81 | const struct tegra_kbc_platform_data *pdata; |
4e8b65f6 | 82 | unsigned short keycode[KBC_MAX_KEY * 2]; |
11f5b30d RI |
83 | unsigned short current_keys[KBC_MAX_KPENT]; |
84 | unsigned int num_pressed_keys; | |
fd0fc213 | 85 | u32 wakeup_key; |
11f5b30d RI |
86 | struct timer_list timer; |
87 | struct clk *clk; | |
88 | }; | |
89 | ||
a445c7f0 | 90 | static const u32 tegra_kbc_default_keymap[] __devinitdata = { |
11f5b30d RI |
91 | KEY(0, 2, KEY_W), |
92 | KEY(0, 3, KEY_S), | |
93 | KEY(0, 4, KEY_A), | |
94 | KEY(0, 5, KEY_Z), | |
95 | KEY(0, 7, KEY_FN), | |
96 | ||
e7acc84a | 97 | KEY(1, 7, KEY_LEFTMETA), |
11f5b30d RI |
98 | |
99 | KEY(2, 6, KEY_RIGHTALT), | |
100 | KEY(2, 7, KEY_LEFTALT), | |
101 | ||
102 | KEY(3, 0, KEY_5), | |
103 | KEY(3, 1, KEY_4), | |
104 | KEY(3, 2, KEY_R), | |
105 | KEY(3, 3, KEY_E), | |
106 | KEY(3, 4, KEY_F), | |
107 | KEY(3, 5, KEY_D), | |
108 | KEY(3, 6, KEY_X), | |
109 | ||
110 | KEY(4, 0, KEY_7), | |
111 | KEY(4, 1, KEY_6), | |
112 | KEY(4, 2, KEY_T), | |
113 | KEY(4, 3, KEY_H), | |
114 | KEY(4, 4, KEY_G), | |
115 | KEY(4, 5, KEY_V), | |
116 | KEY(4, 6, KEY_C), | |
117 | KEY(4, 7, KEY_SPACE), | |
118 | ||
119 | KEY(5, 0, KEY_9), | |
120 | KEY(5, 1, KEY_8), | |
121 | KEY(5, 2, KEY_U), | |
122 | KEY(5, 3, KEY_Y), | |
123 | KEY(5, 4, KEY_J), | |
124 | KEY(5, 5, KEY_N), | |
125 | KEY(5, 6, KEY_B), | |
126 | KEY(5, 7, KEY_BACKSLASH), | |
127 | ||
128 | KEY(6, 0, KEY_MINUS), | |
129 | KEY(6, 1, KEY_0), | |
130 | KEY(6, 2, KEY_O), | |
131 | KEY(6, 3, KEY_I), | |
132 | KEY(6, 4, KEY_L), | |
133 | KEY(6, 5, KEY_K), | |
134 | KEY(6, 6, KEY_COMMA), | |
135 | KEY(6, 7, KEY_M), | |
136 | ||
137 | KEY(7, 1, KEY_EQUAL), | |
138 | KEY(7, 2, KEY_RIGHTBRACE), | |
139 | KEY(7, 3, KEY_ENTER), | |
140 | KEY(7, 7, KEY_MENU), | |
141 | ||
142 | KEY(8, 4, KEY_RIGHTSHIFT), | |
143 | KEY(8, 5, KEY_LEFTSHIFT), | |
144 | ||
145 | KEY(9, 5, KEY_RIGHTCTRL), | |
146 | KEY(9, 7, KEY_LEFTCTRL), | |
147 | ||
148 | KEY(11, 0, KEY_LEFTBRACE), | |
149 | KEY(11, 1, KEY_P), | |
150 | KEY(11, 2, KEY_APOSTROPHE), | |
151 | KEY(11, 3, KEY_SEMICOLON), | |
152 | KEY(11, 4, KEY_SLASH), | |
153 | KEY(11, 5, KEY_DOT), | |
154 | ||
155 | KEY(12, 0, KEY_F10), | |
156 | KEY(12, 1, KEY_F9), | |
157 | KEY(12, 2, KEY_BACKSPACE), | |
158 | KEY(12, 3, KEY_3), | |
159 | KEY(12, 4, KEY_2), | |
160 | KEY(12, 5, KEY_UP), | |
161 | KEY(12, 6, KEY_PRINT), | |
162 | KEY(12, 7, KEY_PAUSE), | |
163 | ||
164 | KEY(13, 0, KEY_INSERT), | |
165 | KEY(13, 1, KEY_DELETE), | |
166 | KEY(13, 3, KEY_PAGEUP), | |
167 | KEY(13, 4, KEY_PAGEDOWN), | |
168 | KEY(13, 5, KEY_RIGHT), | |
169 | KEY(13, 6, KEY_DOWN), | |
170 | KEY(13, 7, KEY_LEFT), | |
171 | ||
172 | KEY(14, 0, KEY_F11), | |
173 | KEY(14, 1, KEY_F12), | |
174 | KEY(14, 2, KEY_F8), | |
175 | KEY(14, 3, KEY_Q), | |
176 | KEY(14, 4, KEY_F4), | |
177 | KEY(14, 5, KEY_F3), | |
178 | KEY(14, 6, KEY_1), | |
179 | KEY(14, 7, KEY_F7), | |
180 | ||
181 | KEY(15, 0, KEY_ESC), | |
182 | KEY(15, 1, KEY_GRAVE), | |
183 | KEY(15, 2, KEY_F5), | |
184 | KEY(15, 3, KEY_TAB), | |
185 | KEY(15, 4, KEY_F1), | |
186 | KEY(15, 5, KEY_F2), | |
187 | KEY(15, 6, KEY_CAPSLOCK), | |
188 | KEY(15, 7, KEY_F6), | |
4e8b65f6 RI |
189 | |
190 | /* Software Handled Function Keys */ | |
191 | KEY(20, 0, KEY_KP7), | |
192 | ||
193 | KEY(21, 0, KEY_KP9), | |
194 | KEY(21, 1, KEY_KP8), | |
195 | KEY(21, 2, KEY_KP4), | |
196 | KEY(21, 4, KEY_KP1), | |
197 | ||
198 | KEY(22, 1, KEY_KPSLASH), | |
199 | KEY(22, 2, KEY_KP6), | |
200 | KEY(22, 3, KEY_KP5), | |
201 | KEY(22, 4, KEY_KP3), | |
202 | KEY(22, 5, KEY_KP2), | |
203 | KEY(22, 7, KEY_KP0), | |
204 | ||
205 | KEY(27, 1, KEY_KPASTERISK), | |
206 | KEY(27, 3, KEY_KPMINUS), | |
207 | KEY(27, 4, KEY_KPPLUS), | |
208 | KEY(27, 5, KEY_KPDOT), | |
209 | ||
210 | KEY(28, 5, KEY_VOLUMEUP), | |
211 | ||
212 | KEY(29, 3, KEY_HOME), | |
213 | KEY(29, 4, KEY_END), | |
214 | KEY(29, 5, KEY_BRIGHTNESSDOWN), | |
215 | KEY(29, 6, KEY_VOLUMEDOWN), | |
216 | KEY(29, 7, KEY_BRIGHTNESSUP), | |
217 | ||
218 | KEY(30, 0, KEY_NUMLOCK), | |
219 | KEY(30, 1, KEY_SCROLLLOCK), | |
220 | KEY(30, 2, KEY_MUTE), | |
221 | ||
222 | KEY(31, 4, KEY_HELP), | |
11f5b30d RI |
223 | }; |
224 | ||
a445c7f0 OJ |
225 | static const |
226 | struct matrix_keymap_data tegra_kbc_default_keymap_data __devinitdata = { | |
11f5b30d RI |
227 | .keymap = tegra_kbc_default_keymap, |
228 | .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap), | |
229 | }; | |
230 | ||
231 | static void tegra_kbc_report_released_keys(struct input_dev *input, | |
232 | unsigned short old_keycodes[], | |
233 | unsigned int old_num_keys, | |
234 | unsigned short new_keycodes[], | |
235 | unsigned int new_num_keys) | |
236 | { | |
237 | unsigned int i, j; | |
238 | ||
239 | for (i = 0; i < old_num_keys; i++) { | |
240 | for (j = 0; j < new_num_keys; j++) | |
241 | if (old_keycodes[i] == new_keycodes[j]) | |
242 | break; | |
243 | ||
244 | if (j == new_num_keys) | |
245 | input_report_key(input, old_keycodes[i], 0); | |
246 | } | |
247 | } | |
248 | ||
249 | static void tegra_kbc_report_pressed_keys(struct input_dev *input, | |
250 | unsigned char scancodes[], | |
251 | unsigned short keycodes[], | |
252 | unsigned int num_pressed_keys) | |
253 | { | |
254 | unsigned int i; | |
255 | ||
256 | for (i = 0; i < num_pressed_keys; i++) { | |
257 | input_event(input, EV_MSC, MSC_SCAN, scancodes[i]); | |
258 | input_report_key(input, keycodes[i], 1); | |
259 | } | |
260 | } | |
261 | ||
262 | static void tegra_kbc_report_keys(struct tegra_kbc *kbc) | |
263 | { | |
264 | unsigned char scancodes[KBC_MAX_KPENT]; | |
265 | unsigned short keycodes[KBC_MAX_KPENT]; | |
266 | u32 val = 0; | |
267 | unsigned int i; | |
268 | unsigned int num_down = 0; | |
4e8b65f6 | 269 | bool fn_keypress = false; |
34abeeb2 RI |
270 | bool key_in_same_row = false; |
271 | bool key_in_same_col = false; | |
11f5b30d | 272 | |
11f5b30d RI |
273 | for (i = 0; i < KBC_MAX_KPENT; i++) { |
274 | if ((i % 4) == 0) | |
275 | val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); | |
276 | ||
277 | if (val & 0x80) { | |
278 | unsigned int col = val & 0x07; | |
279 | unsigned int row = (val >> 3) & 0x0f; | |
280 | unsigned char scancode = | |
281 | MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT); | |
282 | ||
283 | scancodes[num_down] = scancode; | |
4e8b65f6 RI |
284 | keycodes[num_down] = kbc->keycode[scancode]; |
285 | /* If driver uses Fn map, do not report the Fn key. */ | |
286 | if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) | |
287 | fn_keypress = true; | |
288 | else | |
289 | num_down++; | |
11f5b30d RI |
290 | } |
291 | ||
292 | val >>= 8; | |
293 | } | |
4e8b65f6 | 294 | |
34abeeb2 RI |
295 | /* |
296 | * Matrix keyboard designs are prone to keyboard ghosting. | |
297 | * Ghosting occurs if there are 3 keys such that - | |
298 | * any 2 of the 3 keys share a row, and any 2 of them share a column. | |
299 | * If so ignore the key presses for this iteration. | |
300 | */ | |
95439cba | 301 | if (kbc->use_ghost_filter && num_down >= 3) { |
34abeeb2 RI |
302 | for (i = 0; i < num_down; i++) { |
303 | unsigned int j; | |
304 | u8 curr_col = scancodes[i] & 0x07; | |
305 | u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT; | |
306 | ||
307 | /* | |
308 | * Find 2 keys such that one key is in the same row | |
309 | * and the other is in the same column as the i-th key. | |
310 | */ | |
311 | for (j = i + 1; j < num_down; j++) { | |
312 | u8 col = scancodes[j] & 0x07; | |
313 | u8 row = scancodes[j] >> KBC_ROW_SHIFT; | |
314 | ||
315 | if (col == curr_col) | |
316 | key_in_same_col = true; | |
317 | if (row == curr_row) | |
318 | key_in_same_row = true; | |
319 | } | |
320 | } | |
321 | } | |
322 | ||
4e8b65f6 RI |
323 | /* |
324 | * If the platform uses Fn keymaps, translate keys on a Fn keypress. | |
325 | * Function keycodes are KBC_MAX_KEY apart from the plain keycodes. | |
326 | */ | |
327 | if (fn_keypress) { | |
328 | for (i = 0; i < num_down; i++) { | |
329 | scancodes[i] += KBC_MAX_KEY; | |
330 | keycodes[i] = kbc->keycode[scancodes[i]]; | |
331 | } | |
332 | } | |
333 | ||
34abeeb2 RI |
334 | /* Ignore the key presses for this iteration? */ |
335 | if (key_in_same_col && key_in_same_row) | |
336 | return; | |
337 | ||
11f5b30d RI |
338 | tegra_kbc_report_released_keys(kbc->idev, |
339 | kbc->current_keys, kbc->num_pressed_keys, | |
340 | keycodes, num_down); | |
341 | tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down); | |
342 | input_sync(kbc->idev); | |
343 | ||
344 | memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys)); | |
345 | kbc->num_pressed_keys = num_down; | |
346 | } | |
347 | ||
d0d150ec RI |
348 | static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable) |
349 | { | |
350 | u32 val; | |
351 | ||
352 | val = readl(kbc->mmio + KBC_CONTROL_0); | |
353 | if (enable) | |
354 | val |= KBC_CONTROL_FIFO_CNT_INT_EN; | |
355 | else | |
356 | val &= ~KBC_CONTROL_FIFO_CNT_INT_EN; | |
357 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
358 | } | |
359 | ||
b6834b02 RI |
360 | static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable) |
361 | { | |
362 | u32 val; | |
363 | ||
364 | val = readl(kbc->mmio + KBC_CONTROL_0); | |
365 | if (enable) | |
366 | val |= KBC_CONTROL_KEYPRESS_INT_EN; | |
367 | else | |
368 | val &= ~KBC_CONTROL_KEYPRESS_INT_EN; | |
369 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
370 | } | |
371 | ||
11f5b30d RI |
372 | static void tegra_kbc_keypress_timer(unsigned long data) |
373 | { | |
374 | struct tegra_kbc *kbc = (struct tegra_kbc *)data; | |
375 | unsigned long flags; | |
376 | u32 val; | |
377 | unsigned int i; | |
378 | ||
95439cba DT |
379 | spin_lock_irqsave(&kbc->lock, flags); |
380 | ||
11f5b30d RI |
381 | val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf; |
382 | if (val) { | |
383 | unsigned long dly; | |
384 | ||
385 | tegra_kbc_report_keys(kbc); | |
386 | ||
387 | /* | |
388 | * If more than one keys are pressed we need not wait | |
389 | * for the repoll delay. | |
390 | */ | |
391 | dly = (val == 1) ? kbc->repoll_dly : 1; | |
392 | mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly)); | |
393 | } else { | |
394 | /* Release any pressed keys and exit the polling loop */ | |
395 | for (i = 0; i < kbc->num_pressed_keys; i++) | |
396 | input_report_key(kbc->idev, kbc->current_keys[i], 0); | |
397 | input_sync(kbc->idev); | |
398 | ||
399 | kbc->num_pressed_keys = 0; | |
400 | ||
401 | /* All keys are released so enable the keypress interrupt */ | |
d0d150ec | 402 | tegra_kbc_set_fifo_interrupt(kbc, true); |
11f5b30d | 403 | } |
95439cba DT |
404 | |
405 | spin_unlock_irqrestore(&kbc->lock, flags); | |
11f5b30d RI |
406 | } |
407 | ||
408 | static irqreturn_t tegra_kbc_isr(int irq, void *args) | |
409 | { | |
410 | struct tegra_kbc *kbc = args; | |
95439cba | 411 | unsigned long flags; |
d0d150ec | 412 | u32 val; |
11f5b30d | 413 | |
95439cba | 414 | spin_lock_irqsave(&kbc->lock, flags); |
11f5b30d RI |
415 | |
416 | /* | |
417 | * Quickly bail out & reenable interrupts if the fifo threshold | |
418 | * count interrupt wasn't the interrupt source | |
419 | */ | |
420 | val = readl(kbc->mmio + KBC_INT_0); | |
421 | writel(val, kbc->mmio + KBC_INT_0); | |
422 | ||
423 | if (val & KBC_INT_FIFO_CNT_INT_STATUS) { | |
424 | /* | |
95439cba DT |
425 | * Until all keys are released, defer further processing to |
426 | * the polling loop in tegra_kbc_keypress_timer. | |
11f5b30d | 427 | */ |
95439cba | 428 | tegra_kbc_set_fifo_interrupt(kbc, false); |
11f5b30d | 429 | mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies); |
fd0fc213 RI |
430 | } else if (val & KBC_INT_KEYPRESS_INT_STATUS) { |
431 | /* We can be here only through system resume path */ | |
432 | kbc->keypress_caused_wake = true; | |
11f5b30d RI |
433 | } |
434 | ||
95439cba DT |
435 | spin_unlock_irqrestore(&kbc->lock, flags); |
436 | ||
11f5b30d RI |
437 | return IRQ_HANDLED; |
438 | } | |
439 | ||
440 | static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) | |
441 | { | |
442 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
443 | int i; | |
444 | unsigned int rst_val; | |
445 | ||
baafb435 RI |
446 | /* Either mask all keys or none. */ |
447 | rst_val = (filter && !pdata->wakeup) ? ~0 : 0; | |
11f5b30d RI |
448 | |
449 | for (i = 0; i < KBC_MAX_ROW; i++) | |
450 | writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); | |
11f5b30d RI |
451 | } |
452 | ||
453 | static void tegra_kbc_config_pins(struct tegra_kbc *kbc) | |
454 | { | |
455 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
456 | int i; | |
457 | ||
458 | for (i = 0; i < KBC_MAX_GPIO; i++) { | |
459 | u32 r_shft = 5 * (i % 6); | |
460 | u32 c_shft = 4 * (i % 8); | |
7530c4a1 RI |
461 | u32 r_mask = 0x1f << r_shft; |
462 | u32 c_mask = 0x0f << c_shft; | |
11f5b30d RI |
463 | u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0; |
464 | u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0; | |
465 | u32 row_cfg = readl(kbc->mmio + r_offs); | |
466 | u32 col_cfg = readl(kbc->mmio + c_offs); | |
467 | ||
468 | row_cfg &= ~r_mask; | |
469 | col_cfg &= ~c_mask; | |
470 | ||
023cea0e SR |
471 | switch (pdata->pin_cfg[i].type) { |
472 | case PIN_CFG_ROW: | |
11f5b30d | 473 | row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; |
023cea0e SR |
474 | break; |
475 | ||
476 | case PIN_CFG_COL: | |
11f5b30d | 477 | col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; |
023cea0e SR |
478 | break; |
479 | ||
480 | case PIN_CFG_IGNORE: | |
481 | break; | |
482 | } | |
11f5b30d RI |
483 | |
484 | writel(row_cfg, kbc->mmio + r_offs); | |
485 | writel(col_cfg, kbc->mmio + c_offs); | |
486 | } | |
487 | } | |
488 | ||
489 | static int tegra_kbc_start(struct tegra_kbc *kbc) | |
490 | { | |
491 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
11f5b30d RI |
492 | unsigned int debounce_cnt; |
493 | u32 val = 0; | |
494 | ||
f762470b | 495 | clk_prepare_enable(kbc->clk); |
11f5b30d RI |
496 | |
497 | /* Reset the KBC controller to clear all previous status.*/ | |
498 | tegra_periph_reset_assert(kbc->clk); | |
499 | udelay(100); | |
500 | tegra_periph_reset_deassert(kbc->clk); | |
501 | udelay(100); | |
502 | ||
503 | tegra_kbc_config_pins(kbc); | |
504 | tegra_kbc_setup_wakekeys(kbc, false); | |
505 | ||
506 | writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); | |
507 | ||
508 | /* Keyboard debounce count is maximum of 12 bits. */ | |
509 | debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); | |
510 | val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt); | |
511 | val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */ | |
512 | val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */ | |
513 | val |= KBC_CONTROL_KBC_EN; /* enable */ | |
514 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
515 | ||
516 | /* | |
517 | * Compute the delay(ns) from interrupt mode to continuous polling | |
518 | * mode so the timer routine is scheduled appropriately. | |
519 | */ | |
520 | val = readl(kbc->mmio + KBC_INIT_DLY_0); | |
521 | kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32); | |
522 | ||
523 | kbc->num_pressed_keys = 0; | |
524 | ||
525 | /* | |
526 | * Atomically clear out any remaining entries in the key FIFO | |
527 | * and enable keyboard interrupts. | |
528 | */ | |
11f5b30d RI |
529 | while (1) { |
530 | val = readl(kbc->mmio + KBC_INT_0); | |
531 | val >>= 4; | |
532 | if (!val) | |
533 | break; | |
534 | ||
535 | val = readl(kbc->mmio + KBC_KP_ENT0_0); | |
536 | val = readl(kbc->mmio + KBC_KP_ENT1_0); | |
537 | } | |
538 | writel(0x7, kbc->mmio + KBC_INT_0); | |
11f5b30d RI |
539 | |
540 | enable_irq(kbc->irq); | |
541 | ||
542 | return 0; | |
543 | } | |
544 | ||
545 | static void tegra_kbc_stop(struct tegra_kbc *kbc) | |
546 | { | |
547 | unsigned long flags; | |
548 | u32 val; | |
549 | ||
550 | spin_lock_irqsave(&kbc->lock, flags); | |
551 | val = readl(kbc->mmio + KBC_CONTROL_0); | |
552 | val &= ~1; | |
553 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
554 | spin_unlock_irqrestore(&kbc->lock, flags); | |
555 | ||
556 | disable_irq(kbc->irq); | |
557 | del_timer_sync(&kbc->timer); | |
558 | ||
f762470b | 559 | clk_disable_unprepare(kbc->clk); |
11f5b30d RI |
560 | } |
561 | ||
562 | static int tegra_kbc_open(struct input_dev *dev) | |
563 | { | |
564 | struct tegra_kbc *kbc = input_get_drvdata(dev); | |
565 | ||
566 | return tegra_kbc_start(kbc); | |
567 | } | |
568 | ||
569 | static void tegra_kbc_close(struct input_dev *dev) | |
570 | { | |
571 | struct tegra_kbc *kbc = input_get_drvdata(dev); | |
572 | ||
573 | return tegra_kbc_stop(kbc); | |
574 | } | |
575 | ||
576 | static bool __devinit | |
577 | tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata, | |
578 | struct device *dev, unsigned int *num_rows) | |
579 | { | |
580 | int i; | |
581 | ||
582 | *num_rows = 0; | |
583 | ||
584 | for (i = 0; i < KBC_MAX_GPIO; i++) { | |
585 | const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; | |
586 | ||
023cea0e SR |
587 | switch (pin_cfg->type) { |
588 | case PIN_CFG_ROW: | |
11f5b30d RI |
589 | if (pin_cfg->num >= KBC_MAX_ROW) { |
590 | dev_err(dev, | |
591 | "pin_cfg[%d]: invalid row number %d\n", | |
592 | i, pin_cfg->num); | |
593 | return false; | |
594 | } | |
595 | (*num_rows)++; | |
023cea0e SR |
596 | break; |
597 | ||
598 | case PIN_CFG_COL: | |
11f5b30d RI |
599 | if (pin_cfg->num >= KBC_MAX_COL) { |
600 | dev_err(dev, | |
601 | "pin_cfg[%d]: invalid column number %d\n", | |
602 | i, pin_cfg->num); | |
603 | return false; | |
604 | } | |
023cea0e SR |
605 | break; |
606 | ||
607 | case PIN_CFG_IGNORE: | |
608 | break; | |
609 | ||
610 | default: | |
611 | dev_err(dev, | |
612 | "pin_cfg[%d]: invalid entry type %d\n", | |
613 | pin_cfg->type, pin_cfg->num); | |
614 | return false; | |
11f5b30d RI |
615 | } |
616 | } | |
617 | ||
618 | return true; | |
619 | } | |
620 | ||
a445c7f0 | 621 | #ifdef CONFIG_OF |
b45c8f35 DT |
622 | static struct tegra_kbc_platform_data * __devinit tegra_kbc_dt_parse_pdata( |
623 | struct platform_device *pdev) | |
a445c7f0 OJ |
624 | { |
625 | struct tegra_kbc_platform_data *pdata; | |
626 | struct device_node *np = pdev->dev.of_node; | |
145e9734 OJ |
627 | u32 prop; |
628 | int i; | |
a445c7f0 OJ |
629 | |
630 | if (!np) | |
631 | return NULL; | |
632 | ||
131c713f | 633 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); |
a445c7f0 OJ |
634 | if (!pdata) |
635 | return NULL; | |
636 | ||
145e9734 | 637 | if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop)) |
a445c7f0 OJ |
638 | pdata->debounce_cnt = prop; |
639 | ||
145e9734 | 640 | if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop)) |
a445c7f0 OJ |
641 | pdata->repeat_cnt = prop; |
642 | ||
145e9734 | 643 | if (of_find_property(np, "nvidia,needs-ghost-filter", NULL)) |
a445c7f0 OJ |
644 | pdata->use_ghost_filter = true; |
645 | ||
145e9734 | 646 | if (of_find_property(np, "nvidia,wakeup-source", NULL)) |
a445c7f0 OJ |
647 | pdata->wakeup = true; |
648 | ||
649 | /* | |
650 | * All currently known keymaps with device tree support use the same | |
651 | * pin_cfg, so set it up here. | |
652 | */ | |
653 | for (i = 0; i < KBC_MAX_ROW; i++) { | |
654 | pdata->pin_cfg[i].num = i; | |
023cea0e | 655 | pdata->pin_cfg[i].type = PIN_CFG_ROW; |
a445c7f0 OJ |
656 | } |
657 | ||
658 | for (i = 0; i < KBC_MAX_COL; i++) { | |
659 | pdata->pin_cfg[KBC_MAX_ROW + i].num = i; | |
023cea0e | 660 | pdata->pin_cfg[KBC_MAX_ROW + i].type = PIN_CFG_COL; |
a445c7f0 OJ |
661 | } |
662 | ||
663 | return pdata; | |
664 | } | |
665 | #else | |
666 | static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata( | |
667 | struct platform_device *pdev) | |
668 | { | |
669 | return NULL; | |
670 | } | |
671 | #endif | |
672 | ||
b45c8f35 DT |
673 | static int __devinit tegra_kbd_setup_keymap(struct tegra_kbc *kbc) |
674 | { | |
675 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
676 | const struct matrix_keymap_data *keymap_data = pdata->keymap_data; | |
677 | unsigned int keymap_rows = KBC_MAX_KEY; | |
678 | int retval; | |
679 | ||
680 | if (keymap_data && pdata->use_fn_map) | |
681 | keymap_rows *= 2; | |
682 | ||
683 | retval = matrix_keypad_build_keymap(keymap_data, NULL, | |
684 | keymap_rows, KBC_MAX_COL, | |
685 | kbc->keycode, kbc->idev); | |
686 | if (retval == -ENOSYS || retval == -ENOENT) { | |
687 | /* | |
688 | * If there is no OF support in kernel or keymap | |
689 | * property is missing, use default keymap. | |
690 | */ | |
691 | retval = matrix_keypad_build_keymap( | |
692 | &tegra_kbc_default_keymap_data, NULL, | |
693 | keymap_rows, KBC_MAX_COL, | |
694 | kbc->keycode, kbc->idev); | |
695 | } | |
696 | ||
697 | return retval; | |
698 | } | |
699 | ||
11f5b30d RI |
700 | static int __devinit tegra_kbc_probe(struct platform_device *pdev) |
701 | { | |
702 | const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data; | |
11f5b30d RI |
703 | struct tegra_kbc *kbc; |
704 | struct input_dev *input_dev; | |
705 | struct resource *res; | |
706 | int irq; | |
707 | int err; | |
11f5b30d RI |
708 | int num_rows = 0; |
709 | unsigned int debounce_cnt; | |
710 | unsigned int scan_time_rows; | |
711 | ||
712 | if (!pdata) | |
a445c7f0 | 713 | pdata = tegra_kbc_dt_parse_pdata(pdev); |
11f5b30d | 714 | |
a445c7f0 | 715 | if (!pdata) |
11f5b30d RI |
716 | return -EINVAL; |
717 | ||
a445c7f0 OJ |
718 | if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) { |
719 | err = -EINVAL; | |
720 | goto err_free_pdata; | |
721 | } | |
722 | ||
11f5b30d RI |
723 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
724 | if (!res) { | |
725 | dev_err(&pdev->dev, "failed to get I/O memory\n"); | |
a445c7f0 OJ |
726 | err = -ENXIO; |
727 | goto err_free_pdata; | |
11f5b30d RI |
728 | } |
729 | ||
730 | irq = platform_get_irq(pdev, 0); | |
731 | if (irq < 0) { | |
732 | dev_err(&pdev->dev, "failed to get keyboard IRQ\n"); | |
a445c7f0 OJ |
733 | err = -ENXIO; |
734 | goto err_free_pdata; | |
11f5b30d RI |
735 | } |
736 | ||
737 | kbc = kzalloc(sizeof(*kbc), GFP_KERNEL); | |
738 | input_dev = input_allocate_device(); | |
739 | if (!kbc || !input_dev) { | |
740 | err = -ENOMEM; | |
741 | goto err_free_mem; | |
742 | } | |
743 | ||
744 | kbc->pdata = pdata; | |
745 | kbc->idev = input_dev; | |
746 | kbc->irq = irq; | |
747 | spin_lock_init(&kbc->lock); | |
748 | setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc); | |
749 | ||
750 | res = request_mem_region(res->start, resource_size(res), pdev->name); | |
751 | if (!res) { | |
752 | dev_err(&pdev->dev, "failed to request I/O memory\n"); | |
753 | err = -EBUSY; | |
754 | goto err_free_mem; | |
755 | } | |
756 | ||
757 | kbc->mmio = ioremap(res->start, resource_size(res)); | |
758 | if (!kbc->mmio) { | |
759 | dev_err(&pdev->dev, "failed to remap I/O memory\n"); | |
760 | err = -ENXIO; | |
761 | goto err_free_mem_region; | |
762 | } | |
763 | ||
764 | kbc->clk = clk_get(&pdev->dev, NULL); | |
765 | if (IS_ERR(kbc->clk)) { | |
766 | dev_err(&pdev->dev, "failed to get keyboard clock\n"); | |
767 | err = PTR_ERR(kbc->clk); | |
768 | goto err_iounmap; | |
769 | } | |
770 | ||
11f5b30d RI |
771 | /* |
772 | * The time delay between two consecutive reads of the FIFO is | |
773 | * the sum of the repeat time and the time taken for scanning | |
774 | * the rows. There is an additional delay before the row scanning | |
775 | * starts. The repoll delay is computed in milliseconds. | |
776 | */ | |
777 | debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); | |
778 | scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows; | |
779 | kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt; | |
3f27757a | 780 | kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS); |
11f5b30d | 781 | |
1932811f DT |
782 | kbc->wakeup_key = pdata->wakeup_key; |
783 | kbc->use_fn_map = pdata->use_fn_map; | |
784 | kbc->use_ghost_filter = pdata->use_ghost_filter; | |
785 | ||
11f5b30d RI |
786 | input_dev->name = pdev->name; |
787 | input_dev->id.bustype = BUS_HOST; | |
788 | input_dev->dev.parent = &pdev->dev; | |
789 | input_dev->open = tegra_kbc_open; | |
790 | input_dev->close = tegra_kbc_close; | |
791 | ||
b45c8f35 | 792 | err = tegra_kbd_setup_keymap(kbc); |
1932811f | 793 | if (err) { |
b45c8f35 | 794 | dev_err(&pdev->dev, "failed to setup keymap\n"); |
1932811f DT |
795 | goto err_put_clk; |
796 | } | |
797 | ||
798 | __set_bit(EV_REP, input_dev->evbit); | |
799 | input_set_capability(input_dev, EV_MSC, MSC_SCAN); | |
800 | ||
801 | input_set_drvdata(input_dev, kbc); | |
11f5b30d | 802 | |
fd0fc213 RI |
803 | err = request_irq(kbc->irq, tegra_kbc_isr, |
804 | IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc); | |
11f5b30d RI |
805 | if (err) { |
806 | dev_err(&pdev->dev, "failed to request keyboard IRQ\n"); | |
807 | goto err_put_clk; | |
808 | } | |
809 | ||
810 | disable_irq(kbc->irq); | |
811 | ||
812 | err = input_register_device(kbc->idev); | |
813 | if (err) { | |
814 | dev_err(&pdev->dev, "failed to register input device\n"); | |
815 | goto err_free_irq; | |
816 | } | |
817 | ||
818 | platform_set_drvdata(pdev, kbc); | |
819 | device_init_wakeup(&pdev->dev, pdata->wakeup); | |
820 | ||
821 | return 0; | |
822 | ||
823 | err_free_irq: | |
824 | free_irq(kbc->irq, pdev); | |
825 | err_put_clk: | |
826 | clk_put(kbc->clk); | |
827 | err_iounmap: | |
828 | iounmap(kbc->mmio); | |
829 | err_free_mem_region: | |
830 | release_mem_region(res->start, resource_size(res)); | |
831 | err_free_mem: | |
22f83205 | 832 | input_free_device(input_dev); |
11f5b30d | 833 | kfree(kbc); |
a445c7f0 | 834 | err_free_pdata: |
b45c8f35 | 835 | if (!pdev->dev.platform_data) |
a445c7f0 | 836 | kfree(pdata); |
11f5b30d RI |
837 | |
838 | return err; | |
839 | } | |
840 | ||
841 | static int __devexit tegra_kbc_remove(struct platform_device *pdev) | |
842 | { | |
843 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
844 | struct resource *res; | |
845 | ||
a445c7f0 OJ |
846 | platform_set_drvdata(pdev, NULL); |
847 | ||
11f5b30d RI |
848 | free_irq(kbc->irq, pdev); |
849 | clk_put(kbc->clk); | |
850 | ||
851 | input_unregister_device(kbc->idev); | |
852 | iounmap(kbc->mmio); | |
853 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
854 | release_mem_region(res->start, resource_size(res)); | |
855 | ||
a445c7f0 OJ |
856 | /* |
857 | * If we do not have platform data attached to the device we | |
858 | * allocated it ourselves and thus need to free it. | |
859 | */ | |
860 | if (!pdev->dev.platform_data) | |
861 | kfree(kbc->pdata); | |
11f5b30d | 862 | |
a445c7f0 | 863 | kfree(kbc); |
11f5b30d RI |
864 | |
865 | return 0; | |
866 | } | |
867 | ||
868 | #ifdef CONFIG_PM_SLEEP | |
869 | static int tegra_kbc_suspend(struct device *dev) | |
870 | { | |
871 | struct platform_device *pdev = to_platform_device(dev); | |
872 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
873 | ||
d0d150ec | 874 | mutex_lock(&kbc->idev->mutex); |
11f5b30d | 875 | if (device_may_wakeup(&pdev->dev)) { |
d0d150ec RI |
876 | disable_irq(kbc->irq); |
877 | del_timer_sync(&kbc->timer); | |
878 | tegra_kbc_set_fifo_interrupt(kbc, false); | |
879 | ||
11f5b30d RI |
880 | /* Forcefully clear the interrupt status */ |
881 | writel(0x7, kbc->mmio + KBC_INT_0); | |
d0d150ec RI |
882 | /* |
883 | * Store the previous resident time of continuous polling mode. | |
884 | * Force the keyboard into interrupt mode. | |
885 | */ | |
886 | kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0); | |
887 | writel(0, kbc->mmio + KBC_TO_CNT_0); | |
888 | ||
889 | tegra_kbc_setup_wakekeys(kbc, true); | |
11f5b30d | 890 | msleep(30); |
d0d150ec | 891 | |
fd0fc213 | 892 | kbc->keypress_caused_wake = false; |
b6834b02 RI |
893 | /* Enable keypress interrupt before going into suspend. */ |
894 | tegra_kbc_set_keypress_interrupt(kbc, true); | |
fd0fc213 | 895 | enable_irq(kbc->irq); |
d0d150ec | 896 | enable_irq_wake(kbc->irq); |
11f5b30d | 897 | } else { |
11f5b30d RI |
898 | if (kbc->idev->users) |
899 | tegra_kbc_stop(kbc); | |
11f5b30d | 900 | } |
d0d150ec | 901 | mutex_unlock(&kbc->idev->mutex); |
11f5b30d RI |
902 | |
903 | return 0; | |
904 | } | |
905 | ||
906 | static int tegra_kbc_resume(struct device *dev) | |
907 | { | |
908 | struct platform_device *pdev = to_platform_device(dev); | |
909 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
910 | int err = 0; | |
911 | ||
d0d150ec | 912 | mutex_lock(&kbc->idev->mutex); |
11f5b30d RI |
913 | if (device_may_wakeup(&pdev->dev)) { |
914 | disable_irq_wake(kbc->irq); | |
915 | tegra_kbc_setup_wakekeys(kbc, false); | |
b6834b02 RI |
916 | /* We will use fifo interrupts for key detection. */ |
917 | tegra_kbc_set_keypress_interrupt(kbc, false); | |
d0d150ec RI |
918 | |
919 | /* Restore the resident time of continuous polling mode. */ | |
920 | writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0); | |
921 | ||
922 | tegra_kbc_set_fifo_interrupt(kbc, true); | |
923 | ||
fd0fc213 RI |
924 | if (kbc->keypress_caused_wake && kbc->wakeup_key) { |
925 | /* | |
926 | * We can't report events directly from the ISR | |
927 | * because timekeeping is stopped when processing | |
928 | * wakeup request and we get a nasty warning when | |
929 | * we try to call do_gettimeofday() in evdev | |
930 | * handler. | |
931 | */ | |
932 | input_report_key(kbc->idev, kbc->wakeup_key, 1); | |
933 | input_sync(kbc->idev); | |
934 | input_report_key(kbc->idev, kbc->wakeup_key, 0); | |
935 | input_sync(kbc->idev); | |
936 | } | |
11f5b30d | 937 | } else { |
11f5b30d RI |
938 | if (kbc->idev->users) |
939 | err = tegra_kbc_start(kbc); | |
11f5b30d | 940 | } |
d0d150ec | 941 | mutex_unlock(&kbc->idev->mutex); |
11f5b30d RI |
942 | |
943 | return err; | |
944 | } | |
945 | #endif | |
946 | ||
947 | static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume); | |
948 | ||
a445c7f0 OJ |
949 | static const struct of_device_id tegra_kbc_of_match[] = { |
950 | { .compatible = "nvidia,tegra20-kbc", }, | |
951 | { }, | |
952 | }; | |
953 | MODULE_DEVICE_TABLE(of, tegra_kbc_of_match); | |
954 | ||
11f5b30d RI |
955 | static struct platform_driver tegra_kbc_driver = { |
956 | .probe = tegra_kbc_probe, | |
957 | .remove = __devexit_p(tegra_kbc_remove), | |
958 | .driver = { | |
959 | .name = "tegra-kbc", | |
960 | .owner = THIS_MODULE, | |
961 | .pm = &tegra_kbc_pm_ops, | |
a445c7f0 | 962 | .of_match_table = tegra_kbc_of_match, |
11f5b30d RI |
963 | }, |
964 | }; | |
5146c84f | 965 | module_platform_driver(tegra_kbc_driver); |
11f5b30d RI |
966 | |
967 | MODULE_LICENSE("GPL"); | |
968 | MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>"); | |
969 | MODULE_DESCRIPTION("Tegra matrix keyboard controller driver"); | |
970 | MODULE_ALIAS("platform:tegra-kbc"); |