Input: i8042 - export i8042_command()
[deliverable/linux.git] / drivers / input / serio / i8042.c
CommitLineData
1da177e4
LT
1/*
2 * i8042 keyboard and mouse controller driver for Linux
3 *
4 * Copyright (c) 1999-2004 Vojtech Pavlik
5 */
6
7/*
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/interrupt.h>
17#include <linux/ioport.h>
1da177e4
LT
18#include <linux/init.h>
19#include <linux/serio.h>
20#include <linux/err.h>
21#include <linux/rcupdate.h>
d052d1be 22#include <linux/platform_device.h>
553a05b8 23#include <linux/i8042.h>
1da177e4
LT
24
25#include <asm/io.h>
26
27MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29MODULE_LICENSE("GPL");
30
945ef0d4
DT
31static unsigned int i8042_nokbd;
32module_param_named(nokbd, i8042_nokbd, bool, 0);
33MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34
1da177e4
LT
35static unsigned int i8042_noaux;
36module_param_named(noaux, i8042_noaux, bool, 0);
37MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38
39static unsigned int i8042_nomux;
40module_param_named(nomux, i8042_nomux, bool, 0);
41MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42
43static unsigned int i8042_unlock;
44module_param_named(unlock, i8042_unlock, bool, 0);
45MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46
47static unsigned int i8042_reset;
48module_param_named(reset, i8042_reset, bool, 0);
49MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50
51static unsigned int i8042_direct;
52module_param_named(direct, i8042_direct, bool, 0);
53MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54
55static unsigned int i8042_dumbkbd;
56module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
57MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58
59static unsigned int i8042_noloop;
60module_param_named(noloop, i8042_noloop, bool, 0);
61MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62
63static unsigned int i8042_blink_frequency = 500;
64module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
65MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
66
67#ifdef CONFIG_PNP
68static int i8042_nopnp;
69module_param_named(nopnp, i8042_nopnp, bool, 0);
70MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
71#endif
72
73#define DEBUG
74#ifdef DEBUG
75static int i8042_debug;
76module_param_named(debug, i8042_debug, bool, 0600);
77MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
78#endif
79
1da177e4
LT
80#include "i8042.h"
81
82static DEFINE_SPINLOCK(i8042_lock);
83
84struct i8042_port {
85 struct serio *serio;
86 int irq;
1da177e4
LT
87 unsigned char exists;
88 signed char mux;
1da177e4
LT
89};
90
91#define I8042_KBD_PORT_NO 0
92#define I8042_AUX_PORT_NO 1
93#define I8042_MUX_PORT_NO 2
94#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
de9ce703
DT
95
96static struct i8042_port i8042_ports[I8042_NUM_PORTS];
1da177e4
LT
97
98static unsigned char i8042_initial_ctr;
99static unsigned char i8042_ctr;
1da177e4 100static unsigned char i8042_mux_present;
de9ce703
DT
101static unsigned char i8042_kbd_irq_registered;
102static unsigned char i8042_aux_irq_registered;
817e6ba3 103static unsigned char i8042_suppress_kbd_ack;
1da177e4
LT
104static struct platform_device *i8042_platform_device;
105
7d12e780 106static irqreturn_t i8042_interrupt(int irq, void *dev_id);
1da177e4
LT
107
108/*
109 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
110 * be ready for reading values from it / writing values to it.
111 * Called always with i8042_lock held.
112 */
113
114static int i8042_wait_read(void)
115{
116 int i = 0;
de9ce703 117
1da177e4
LT
118 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
119 udelay(50);
120 i++;
121 }
122 return -(i == I8042_CTL_TIMEOUT);
123}
124
125static int i8042_wait_write(void)
126{
127 int i = 0;
de9ce703 128
1da177e4
LT
129 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
130 udelay(50);
131 i++;
132 }
133 return -(i == I8042_CTL_TIMEOUT);
134}
135
136/*
137 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
138 * of the i8042 down the toilet.
139 */
140
141static int i8042_flush(void)
142{
143 unsigned long flags;
144 unsigned char data, str;
145 int i = 0;
146
147 spin_lock_irqsave(&i8042_lock, flags);
148
149 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
150 udelay(50);
151 data = i8042_read_data();
152 i++;
153 dbg("%02x <- i8042 (flush, %s)", data,
154 str & I8042_STR_AUXDATA ? "aux" : "kbd");
155 }
156
157 spin_unlock_irqrestore(&i8042_lock, flags);
158
159 return i;
160}
161
162/*
163 * i8042_command() executes a command on the i8042. It also sends the input
164 * parameter(s) of the commands to it, and receives the output value(s). The
165 * parameters are to be stored in the param array, and the output is placed
166 * into the same array. The number of the parameters and output values is
167 * encoded in bits 8-11 of the command number.
168 */
169
de9ce703 170static int __i8042_command(unsigned char *param, int command)
1da177e4 171{
de9ce703 172 int i, error;
1da177e4
LT
173
174 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
175 return -1;
176
de9ce703
DT
177 error = i8042_wait_write();
178 if (error)
179 return error;
463a4f76
DT
180
181 dbg("%02x -> i8042 (command)", command & 0xff);
182 i8042_write_command(command & 0xff);
183
184 for (i = 0; i < ((command >> 12) & 0xf); i++) {
de9ce703
DT
185 error = i8042_wait_write();
186 if (error)
187 return error;
463a4f76
DT
188 dbg("%02x -> i8042 (parameter)", param[i]);
189 i8042_write_data(param[i]);
1da177e4
LT
190 }
191
463a4f76 192 for (i = 0; i < ((command >> 8) & 0xf); i++) {
de9ce703
DT
193 error = i8042_wait_read();
194 if (error) {
195 dbg(" -- i8042 (timeout)");
196 return error;
197 }
1da177e4 198
463a4f76
DT
199 if (command == I8042_CMD_AUX_LOOP &&
200 !(i8042_read_status() & I8042_STR_AUXDATA)) {
de9ce703
DT
201 dbg(" -- i8042 (auxerr)");
202 return -1;
1da177e4
LT
203 }
204
463a4f76
DT
205 param[i] = i8042_read_data();
206 dbg("%02x <- i8042 (return)", param[i]);
207 }
1da177e4 208
de9ce703
DT
209 return 0;
210}
1da177e4 211
553a05b8 212int i8042_command(unsigned char *param, int command)
de9ce703
DT
213{
214 unsigned long flags;
215 int retval;
216
217 spin_lock_irqsave(&i8042_lock, flags);
218 retval = __i8042_command(param, command);
463a4f76 219 spin_unlock_irqrestore(&i8042_lock, flags);
de9ce703 220
1da177e4
LT
221 return retval;
222}
553a05b8 223EXPORT_SYMBOL(i8042_command);
1da177e4
LT
224
225/*
226 * i8042_kbd_write() sends a byte out through the keyboard interface.
227 */
228
229static int i8042_kbd_write(struct serio *port, unsigned char c)
230{
231 unsigned long flags;
232 int retval = 0;
233
234 spin_lock_irqsave(&i8042_lock, flags);
235
de9ce703 236 if (!(retval = i8042_wait_write())) {
1da177e4
LT
237 dbg("%02x -> i8042 (kbd-data)", c);
238 i8042_write_data(c);
239 }
240
241 spin_unlock_irqrestore(&i8042_lock, flags);
242
243 return retval;
244}
245
246/*
247 * i8042_aux_write() sends a byte out through the aux interface.
248 */
249
250static int i8042_aux_write(struct serio *serio, unsigned char c)
251{
252 struct i8042_port *port = serio->port_data;
1da177e4 253
f4e3c711
DT
254 return i8042_command(&c, port->mux == -1 ?
255 I8042_CMD_AUX_SEND :
256 I8042_CMD_MUX_SEND + port->mux);
1da177e4
LT
257}
258
1da177e4
LT
259/*
260 * i8042_start() is called by serio core when port is about to finish
261 * registering. It will mark port as existing so i8042_interrupt can
262 * start sending data through it.
263 */
264static int i8042_start(struct serio *serio)
265{
266 struct i8042_port *port = serio->port_data;
267
268 port->exists = 1;
269 mb();
270 return 0;
271}
272
273/*
274 * i8042_stop() marks serio port as non-existing so i8042_interrupt
275 * will not try to send data to the port that is about to go away.
276 * The function is called by serio core as part of unregister procedure.
277 */
278static void i8042_stop(struct serio *serio)
279{
280 struct i8042_port *port = serio->port_data;
281
282 port->exists = 0;
b2b18660 283 synchronize_sched();
1da177e4
LT
284 port->serio = NULL;
285}
286
287/*
288 * i8042_interrupt() is the most important function in this driver -
289 * it handles the interrupts from the i8042, and sends incoming bytes
290 * to the upper layers.
291 */
292
7d12e780 293static irqreturn_t i8042_interrupt(int irq, void *dev_id)
1da177e4
LT
294{
295 struct i8042_port *port;
296 unsigned long flags;
297 unsigned char str, data;
298 unsigned int dfl;
299 unsigned int port_no;
817e6ba3 300 int ret = 1;
1da177e4 301
1da177e4
LT
302 spin_lock_irqsave(&i8042_lock, flags);
303 str = i8042_read_status();
304 if (unlikely(~str & I8042_STR_OBF)) {
305 spin_unlock_irqrestore(&i8042_lock, flags);
306 if (irq) dbg("Interrupt %d, without any data", irq);
307 ret = 0;
308 goto out;
309 }
310 data = i8042_read_data();
311 spin_unlock_irqrestore(&i8042_lock, flags);
312
313 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
314 static unsigned long last_transmit;
315 static unsigned char last_str;
316
317 dfl = 0;
318 if (str & I8042_STR_MUXERR) {
319 dbg("MUX error, status is %02x, data is %02x", str, data);
1da177e4
LT
320/*
321 * When MUXERR condition is signalled the data register can only contain
322 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
a216a4b6
DT
323 * it is not always the case. Some KBCs also report 0xfc when there is
324 * nothing connected to the port while others sometimes get confused which
325 * port the data came from and signal error leaving the data intact. They
326 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
327 * to legacy mode yet, when we see one we'll add proper handling).
328 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
329 * rest assume that the data came from the same serio last byte
1da177e4
LT
330 * was transmitted (if transmission happened not too long ago).
331 */
a216a4b6
DT
332
333 switch (data) {
334 default:
1da177e4
LT
335 if (time_before(jiffies, last_transmit + HZ/10)) {
336 str = last_str;
337 break;
338 }
339 /* fall through - report timeout */
a216a4b6 340 case 0xfc:
1da177e4
LT
341 case 0xfd:
342 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
343 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
344 }
345 }
346
347 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
348 last_str = str;
349 last_transmit = jiffies;
350 } else {
351
352 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
353 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
354
355 port_no = (str & I8042_STR_AUXDATA) ?
356 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
357 }
358
359 port = &i8042_ports[port_no];
360
de9ce703
DT
361 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
362 data, port_no, irq,
1da177e4
LT
363 dfl & SERIO_PARITY ? ", bad parity" : "",
364 dfl & SERIO_TIMEOUT ? ", timeout" : "");
365
817e6ba3
DT
366 if (unlikely(i8042_suppress_kbd_ack))
367 if (port_no == I8042_KBD_PORT_NO &&
368 (data == 0xfa || data == 0xfe)) {
19f3c3e3 369 i8042_suppress_kbd_ack--;
817e6ba3
DT
370 goto out;
371 }
372
1da177e4 373 if (likely(port->exists))
7d12e780 374 serio_interrupt(port->serio, data, dfl);
1da177e4 375
0854e52d 376 out:
1da177e4
LT
377 return IRQ_RETVAL(ret);
378}
379
de9ce703
DT
380/*
381 * i8042_enable_kbd_port enables keybaord port on chip
382 */
383
384static int i8042_enable_kbd_port(void)
385{
386 i8042_ctr &= ~I8042_CTR_KBDDIS;
387 i8042_ctr |= I8042_CTR_KBDINT;
388
389 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
018db6bb
MA
390 i8042_ctr &= ~I8042_CTR_KBDINT;
391 i8042_ctr |= I8042_CTR_KBDDIS;
de9ce703
DT
392 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
393 return -EIO;
394 }
395
396 return 0;
397}
398
399/*
400 * i8042_enable_aux_port enables AUX (mouse) port on chip
401 */
402
403static int i8042_enable_aux_port(void)
404{
405 i8042_ctr &= ~I8042_CTR_AUXDIS;
406 i8042_ctr |= I8042_CTR_AUXINT;
407
408 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
018db6bb
MA
409 i8042_ctr &= ~I8042_CTR_AUXINT;
410 i8042_ctr |= I8042_CTR_AUXDIS;
de9ce703
DT
411 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
412 return -EIO;
413 }
414
415 return 0;
416}
417
418/*
419 * i8042_enable_mux_ports enables 4 individual AUX ports after
420 * the controller has been switched into Multiplexed mode
421 */
422
423static int i8042_enable_mux_ports(void)
424{
425 unsigned char param;
426 int i;
427
428 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
429 i8042_command(&param, I8042_CMD_MUX_PFX + i);
430 i8042_command(&param, I8042_CMD_AUX_ENABLE);
431 }
432
433 return i8042_enable_aux_port();
434}
435
1da177e4
LT
436/*
437 * i8042_set_mux_mode checks whether the controller has an active
438 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
439 */
440
441static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
442{
443
444 unsigned char param;
445/*
446 * Get rid of bytes in the queue.
447 */
448
449 i8042_flush();
450
451/*
452 * Internal loopback test - send three bytes, they should come back from the
de9ce703 453 * mouse interface, the last should be version.
1da177e4
LT
454 */
455
456 param = 0xf0;
463a4f76 457 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
1da177e4
LT
458 return -1;
459 param = mode ? 0x56 : 0xf6;
463a4f76 460 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
1da177e4
LT
461 return -1;
462 param = mode ? 0xa4 : 0xa5;
463a4f76 463 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
1da177e4
LT
464 return -1;
465
466 if (mux_version)
463a4f76 467 *mux_version = param;
1da177e4
LT
468
469 return 0;
470}
471
1da177e4 472/*
de9ce703
DT
473 * i8042_check_mux() checks whether the controller supports the PS/2 Active
474 * Multiplexing specification by Synaptics, Phoenix, Insyde and
475 * LCS/Telegraphics.
1da177e4
LT
476 */
477
de9ce703 478static int __devinit i8042_check_mux(void)
1da177e4 479{
de9ce703
DT
480 unsigned char mux_version;
481
482 if (i8042_set_mux_mode(1, &mux_version))
483 return -1;
484
1da177e4 485/*
de9ce703
DT
486 * Workaround for interference with USB Legacy emulation
487 * that causes a v10.12 MUX to be found.
1da177e4 488 */
de9ce703
DT
489 if (mux_version == 0xAC)
490 return -1;
491
492 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
493 (mux_version >> 4) & 0xf, mux_version & 0xf);
1da177e4 494
de9ce703
DT
495/*
496 * Disable all muxed ports by disabling AUX.
497 */
1da177e4
LT
498 i8042_ctr |= I8042_CTR_AUXDIS;
499 i8042_ctr &= ~I8042_CTR_AUXINT;
500
501 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
502 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
de9ce703 503 return -EIO;
1da177e4
LT
504 }
505
de9ce703 506 i8042_mux_present = 1;
1da177e4
LT
507
508 return 0;
509}
510
1da177e4 511/*
de9ce703 512 * The following is used to test AUX IRQ delivery.
1da177e4 513 */
de9ce703
DT
514static struct completion i8042_aux_irq_delivered __devinitdata;
515static int i8042_irq_being_tested __devinitdata;
1da177e4 516
7d12e780 517static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
1da177e4 518{
de9ce703
DT
519 unsigned long flags;
520 unsigned char str, data;
e3758b2a 521 int ret = 0;
1da177e4 522
de9ce703
DT
523 spin_lock_irqsave(&i8042_lock, flags);
524 str = i8042_read_status();
525 if (str & I8042_STR_OBF) {
526 data = i8042_read_data();
527 if (i8042_irq_being_tested &&
528 data == 0xa5 && (str & I8042_STR_AUXDATA))
529 complete(&i8042_aux_irq_delivered);
e3758b2a 530 ret = 1;
de9ce703
DT
531 }
532 spin_unlock_irqrestore(&i8042_lock, flags);
1da177e4 533
e3758b2a 534 return IRQ_RETVAL(ret);
1da177e4
LT
535}
536
d2ada559
RS
537/*
538 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
539 * verifies success by readinng CTR. Used when testing for presence of AUX
540 * port.
541 */
542static int __devinit i8042_toggle_aux(int on)
543{
544 unsigned char param;
545 int i;
546
547 if (i8042_command(&param,
548 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
549 return -1;
550
551 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
552 for (i = 0; i < 100; i++) {
553 udelay(50);
554
555 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
556 return -1;
557
558 if (!(param & I8042_CTR_AUXDIS) == on)
559 return 0;
560 }
561
562 return -1;
563}
1da177e4
LT
564
565/*
566 * i8042_check_aux() applies as much paranoia as it can at detecting
567 * the presence of an AUX interface.
568 */
569
87fd6318 570static int __devinit i8042_check_aux(void)
1da177e4 571{
de9ce703
DT
572 int retval = -1;
573 int irq_registered = 0;
1e4865f8 574 int aux_loop_broken = 0;
de9ce703 575 unsigned long flags;
1da177e4 576 unsigned char param;
1da177e4
LT
577
578/*
579 * Get rid of bytes in the queue.
580 */
581
582 i8042_flush();
583
584/*
585 * Internal loopback test - filters out AT-type i8042's. Unfortunately
586 * SiS screwed up and their 5597 doesn't support the LOOP command even
587 * though it has an AUX port.
588 */
589
590 param = 0x5a;
3ca5de6d
DT
591 retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
592 if (retval || param != 0x5a) {
1da177e4
LT
593
594/*
595 * External connection test - filters out AT-soldered PS/2 i8042's
596 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
597 * 0xfa - no error on some notebooks which ignore the spec
598 * Because it's common for chipsets to return error on perfectly functioning
599 * AUX ports, we test for this only when the LOOP command failed.
600 */
601
de9ce703
DT
602 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
603 (param && param != 0xfa && param != 0xff))
604 return -1;
1e4865f8 605
3ca5de6d
DT
606/*
607 * If AUX_LOOP completed without error but returned unexpected data
608 * mark it as broken
609 */
610 if (!retval)
611 aux_loop_broken = 1;
1da177e4
LT
612 }
613
614/*
615 * Bit assignment test - filters out PS/2 i8042's in AT mode
616 */
617
d2ada559 618 if (i8042_toggle_aux(0)) {
1da177e4
LT
619 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
620 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
621 }
622
d2ada559 623 if (i8042_toggle_aux(1))
1da177e4
LT
624 return -1;
625
626/*
de9ce703
DT
627 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
628 * used it for a PCI card or somethig else.
1da177e4
LT
629 */
630
1e4865f8 631 if (i8042_noloop || aux_loop_broken) {
de9ce703
DT
632/*
633 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
634 * is working and hope we are right.
635 */
636 retval = 0;
637 goto out;
638 }
1da177e4 639
de9ce703
DT
640 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
641 "i8042", i8042_platform_device))
642 goto out;
1da177e4 643
de9ce703
DT
644 irq_registered = 1;
645
646 if (i8042_enable_aux_port())
647 goto out;
648
649 spin_lock_irqsave(&i8042_lock, flags);
1da177e4 650
de9ce703
DT
651 init_completion(&i8042_aux_irq_delivered);
652 i8042_irq_being_tested = 1;
653
654 param = 0xa5;
655 retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
656
657 spin_unlock_irqrestore(&i8042_lock, flags);
658
659 if (retval)
660 goto out;
1da177e4 661
de9ce703
DT
662 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
663 msecs_to_jiffies(250)) == 0) {
1da177e4 664/*
de9ce703
DT
665 * AUX IRQ was never delivered so we need to flush the controller to
666 * get rid of the byte we put there; otherwise keyboard may not work.
1da177e4 667 */
de9ce703
DT
668 i8042_flush();
669 retval = -1;
670 }
1da177e4 671
de9ce703 672 out:
1da177e4 673
de9ce703
DT
674/*
675 * Disable the interface.
676 */
1da177e4 677
de9ce703
DT
678 i8042_ctr |= I8042_CTR_AUXDIS;
679 i8042_ctr &= ~I8042_CTR_AUXINT;
1da177e4 680
de9ce703
DT
681 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
682 retval = -1;
1da177e4 683
de9ce703
DT
684 if (irq_registered)
685 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1da177e4 686
de9ce703
DT
687 return retval;
688}
1da177e4 689
de9ce703 690static int i8042_controller_check(void)
1da177e4 691{
de9ce703
DT
692 if (i8042_flush() == I8042_BUFFER_SIZE) {
693 printk(KERN_ERR "i8042.c: No controller found.\n");
694 return -ENODEV;
695 }
696
697 return 0;
1da177e4
LT
698}
699
de9ce703 700static int i8042_controller_selftest(void)
2673c836
VP
701{
702 unsigned char param;
703
704 if (!i8042_reset)
705 return 0;
706
707 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
708 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
de9ce703 709 return -ENODEV;
2673c836
VP
710 }
711
712 if (param != I8042_RET_CTL_TEST) {
713 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
714 param, I8042_RET_CTL_TEST);
de9ce703 715 return -EIO;
2673c836
VP
716 }
717
718 return 0;
719}
1da177e4
LT
720
721/*
722 * i8042_controller init initializes the i8042 controller, and,
723 * most importantly, sets it into non-xlated mode if that's
724 * desired.
725 */
726
727static int i8042_controller_init(void)
728{
729 unsigned long flags;
730
1da177e4
LT
731/*
732 * Save the CTR for restoral on unload / reboot.
733 */
734
735 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
736 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
de9ce703 737 return -EIO;
1da177e4
LT
738 }
739
740 i8042_initial_ctr = i8042_ctr;
741
742/*
743 * Disable the keyboard interface and interrupt.
744 */
745
746 i8042_ctr |= I8042_CTR_KBDDIS;
747 i8042_ctr &= ~I8042_CTR_KBDINT;
748
749/*
750 * Handle keylock.
751 */
752
753 spin_lock_irqsave(&i8042_lock, flags);
754 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
755 if (i8042_unlock)
756 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
82dd9eff 757 else
1da177e4
LT
758 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
759 }
760 spin_unlock_irqrestore(&i8042_lock, flags);
761
762/*
763 * If the chip is configured into nontranslated mode by the BIOS, don't
764 * bother enabling translating and be happy.
765 */
766
767 if (~i8042_ctr & I8042_CTR_XLATE)
768 i8042_direct = 1;
769
770/*
771 * Set nontranslated mode for the kbd interface if requested by an option.
772 * After this the kbd interface becomes a simple serial in/out, like the aux
773 * interface is. We don't do this by default, since it can confuse notebook
774 * BIOSes.
775 */
776
777 if (i8042_direct)
778 i8042_ctr &= ~I8042_CTR_XLATE;
779
780/*
781 * Write CTR back.
782 */
783
784 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
785 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
de9ce703 786 return -EIO;
1da177e4
LT
787 }
788
789 return 0;
790}
791
792
793/*
de9ce703 794 * Reset the controller and reset CRT to the original value set by BIOS.
1da177e4 795 */
de9ce703 796
1da177e4
LT
797static void i8042_controller_reset(void)
798{
de9ce703 799 i8042_flush();
1da177e4 800
8d04ddb6
DT
801/*
802 * Disable both KBD and AUX interfaces so they don't get in the way
803 */
804
805 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
806 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
807
1da177e4
LT
808/*
809 * Disable MUX mode if present.
810 */
811
812 if (i8042_mux_present)
813 i8042_set_mux_mode(0, NULL);
814
815/*
de9ce703 816 * Reset the controller if requested.
1da177e4
LT
817 */
818
de9ce703 819 i8042_controller_selftest();
1da177e4 820
de9ce703
DT
821/*
822 * Restore the original control register setting.
823 */
824
825 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1da177e4
LT
826 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
827}
828
829
1da177e4
LT
830/*
831 * i8042_panic_blink() will flash the keyboard LEDs and is called when
832 * kernel panics. Flashing LEDs is useful for users running X who may
833 * not see the console and will help distingushing panics from "real"
834 * lockups.
835 *
836 * Note that DELAY has a limit of 10ms so we will not get stuck here
837 * waiting for KBC to free up even if KBD interrupt is off
838 */
839
840#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
841
842static long i8042_panic_blink(long count)
843{
844 long delay = 0;
845 static long last_blink;
846 static char led;
847
848 /*
849 * We expect frequency to be about 1/2s. KDB uses about 1s.
850 * Make sure they are different.
851 */
852 if (!i8042_blink_frequency)
853 return 0;
854 if (count - last_blink < i8042_blink_frequency)
855 return 0;
856
857 led ^= 0x01 | 0x04;
858 while (i8042_read_status() & I8042_STR_IBF)
859 DELAY;
19f3c3e3
DT
860 dbg("%02x -> i8042 (panic blink)", 0xed);
861 i8042_suppress_kbd_ack = 2;
1da177e4
LT
862 i8042_write_data(0xed); /* set leds */
863 DELAY;
864 while (i8042_read_status() & I8042_STR_IBF)
865 DELAY;
866 DELAY;
19f3c3e3 867 dbg("%02x -> i8042 (panic blink)", led);
1da177e4
LT
868 i8042_write_data(led);
869 DELAY;
870 last_blink = count;
871 return delay;
872}
873
874#undef DELAY
875
82dd9eff 876#ifdef CONFIG_PM
1da177e4 877/*
82dd9eff
DT
878 * Here we try to restore the original BIOS settings. We only want to
879 * do that once, when we really suspend, not when we taking memory
880 * snapshot for swsusp (in this case we'll perform required cleanup
881 * as part of shutdown process).
1da177e4
LT
882 */
883
3ae5eaec 884static int i8042_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 885{
82dd9eff
DT
886 if (dev->dev.power.power_state.event != state.event) {
887 if (state.event == PM_EVENT_SUSPEND)
888 i8042_controller_reset();
889
890 dev->dev.power.power_state = state;
891 }
1da177e4
LT
892
893 return 0;
894}
895
896
897/*
898 * Here we try to reset everything back to a state in which suspended
899 */
900
3ae5eaec 901static int i8042_resume(struct platform_device *dev)
1da177e4 902{
de9ce703 903 int error;
1da177e4 904
82dd9eff
DT
905/*
906 * Do not bother with restoring state if we haven't suspened yet
907 */
908 if (dev->dev.power.power_state.event == PM_EVENT_ON)
909 return 0;
910
de9ce703
DT
911 error = i8042_controller_check();
912 if (error)
913 return error;
2673c836 914
de9ce703
DT
915 error = i8042_controller_selftest();
916 if (error)
917 return error;
1da177e4
LT
918
919/*
82dd9eff 920 * Restore original CTR value and disable all ports
1da177e4
LT
921 */
922
82dd9eff
DT
923 i8042_ctr = i8042_initial_ctr;
924 if (i8042_direct)
925 i8042_ctr &= ~I8042_CTR_XLATE;
de9ce703
DT
926 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
927 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
928 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
929 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
930 return -EIO;
931 }
1da177e4 932
de9ce703
DT
933 if (i8042_mux_present) {
934 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
935 printk(KERN_WARNING
936 "i8042: failed to resume active multiplexor, "
937 "mouse won't work.\n");
938 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
939 i8042_enable_aux_port();
1da177e4 940
de9ce703
DT
941 if (i8042_ports[I8042_KBD_PORT_NO].serio)
942 i8042_enable_kbd_port();
943
7d12e780 944 i8042_interrupt(0, NULL);
1da177e4 945
82dd9eff
DT
946 dev->dev.power.power_state = PMSG_ON;
947
1da177e4 948 return 0;
1da177e4 949}
82dd9eff 950#endif /* CONFIG_PM */
1da177e4
LT
951
952/*
953 * We need to reset the 8042 back to original mode on system shutdown,
954 * because otherwise BIOSes will be confused.
955 */
956
3ae5eaec 957static void i8042_shutdown(struct platform_device *dev)
1da177e4 958{
82dd9eff 959 i8042_controller_reset();
1da177e4
LT
960}
961
87fd6318 962static int __devinit i8042_create_kbd_port(void)
1da177e4
LT
963{
964 struct serio *serio;
965 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
966
d39969de 967 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
968 if (!serio)
969 return -ENOMEM;
970
971 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
972 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
0854e52d
DT
973 serio->start = i8042_start;
974 serio->stop = i8042_stop;
975 serio->port_data = port;
976 serio->dev.parent = &i8042_platform_device->dev;
de9ce703 977 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
0854e52d
DT
978 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
979
980 port->serio = serio;
de9ce703 981 port->irq = I8042_KBD_IRQ;
0854e52d 982
de9ce703 983 return 0;
1da177e4
LT
984}
985
de9ce703 986static int __devinit i8042_create_aux_port(int idx)
1da177e4
LT
987{
988 struct serio *serio;
de9ce703
DT
989 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
990 struct i8042_port *port = &i8042_ports[port_no];
1da177e4 991
d39969de 992 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
993 if (!serio)
994 return -ENOMEM;
995
996 serio->id.type = SERIO_8042;
997 serio->write = i8042_aux_write;
0854e52d
DT
998 serio->start = i8042_start;
999 serio->stop = i8042_stop;
1000 serio->port_data = port;
1001 serio->dev.parent = &i8042_platform_device->dev;
de9ce703
DT
1002 if (idx < 0) {
1003 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1004 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1005 } else {
1006 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1007 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1008 }
0854e52d
DT
1009
1010 port->serio = serio;
de9ce703
DT
1011 port->mux = idx;
1012 port->irq = I8042_AUX_IRQ;
0854e52d 1013
de9ce703 1014 return 0;
1da177e4
LT
1015}
1016
de9ce703 1017static void __devinit i8042_free_kbd_port(void)
1da177e4 1018{
de9ce703
DT
1019 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1020 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1021}
1da177e4 1022
de9ce703
DT
1023static void __devinit i8042_free_aux_ports(void)
1024{
1025 int i;
0854e52d 1026
de9ce703
DT
1027 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1028 kfree(i8042_ports[i].serio);
1029 i8042_ports[i].serio = NULL;
1030 }
1031}
0854e52d 1032
de9ce703
DT
1033static void __devinit i8042_register_ports(void)
1034{
1035 int i;
0854e52d 1036
de9ce703
DT
1037 for (i = 0; i < I8042_NUM_PORTS; i++) {
1038 if (i8042_ports[i].serio) {
1039 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1040 i8042_ports[i].serio->name,
1041 (unsigned long) I8042_DATA_REG,
1042 (unsigned long) I8042_COMMAND_REG,
1043 i8042_ports[i].irq);
1044 serio_register_port(i8042_ports[i].serio);
1045 }
1046 }
1da177e4
LT
1047}
1048
7a1904c3 1049static void __devexit i8042_unregister_ports(void)
1da177e4 1050{
de9ce703 1051 int i;
1da177e4 1052
de9ce703
DT
1053 for (i = 0; i < I8042_NUM_PORTS; i++) {
1054 if (i8042_ports[i].serio) {
1055 serio_unregister_port(i8042_ports[i].serio);
1056 i8042_ports[i].serio = NULL;
1057 }
1058 }
1059}
1060
1061static void i8042_free_irqs(void)
1062{
1063 if (i8042_aux_irq_registered)
1064 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1065 if (i8042_kbd_irq_registered)
1066 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1067
1068 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1069}
1070
1071static int __devinit i8042_setup_aux(void)
1072{
1073 int (*aux_enable)(void);
1074 int error;
1075 int i;
1da177e4 1076
de9ce703 1077 if (i8042_check_aux())
87fd6318 1078 return -ENODEV;
1da177e4 1079
de9ce703
DT
1080 if (i8042_nomux || i8042_check_mux()) {
1081 error = i8042_create_aux_port(-1);
1082 if (error)
1083 goto err_free_ports;
1084 aux_enable = i8042_enable_aux_port;
1085 } else {
1086 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1087 error = i8042_create_aux_port(i);
1088 if (error)
1089 goto err_free_ports;
0854e52d 1090 }
de9ce703 1091 aux_enable = i8042_enable_mux_ports;
1da177e4
LT
1092 }
1093
de9ce703
DT
1094 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1095 "i8042", i8042_platform_device);
1096 if (error)
1097 goto err_free_ports;
945ef0d4 1098
de9ce703
DT
1099 if (aux_enable())
1100 goto err_free_irq;
1da177e4 1101
de9ce703 1102 i8042_aux_irq_registered = 1;
1da177e4 1103 return 0;
0854e52d 1104
de9ce703
DT
1105 err_free_irq:
1106 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1107 err_free_ports:
1108 i8042_free_aux_ports();
1109 return error;
1110}
0854e52d 1111
de9ce703
DT
1112static int __devinit i8042_setup_kbd(void)
1113{
1114 int error;
1115
1116 error = i8042_create_kbd_port();
1117 if (error)
1118 return error;
1119
1120 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1121 "i8042", i8042_platform_device);
1122 if (error)
1123 goto err_free_port;
1124
1125 error = i8042_enable_kbd_port();
1126 if (error)
1127 goto err_free_irq;
1128
1129 i8042_kbd_irq_registered = 1;
1130 return 0;
1131
1132 err_free_irq:
1133 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1134 err_free_port:
1135 i8042_free_kbd_port();
1136 return error;
1da177e4
LT
1137}
1138
de9ce703 1139static int __devinit i8042_probe(struct platform_device *dev)
1da177e4 1140{
de9ce703 1141 int error;
1da177e4 1142
de9ce703
DT
1143 error = i8042_controller_selftest();
1144 if (error)
1145 return error;
1da177e4 1146
de9ce703
DT
1147 error = i8042_controller_init();
1148 if (error)
1149 return error;
1150
1151 if (!i8042_noaux) {
1152 error = i8042_setup_aux();
1153 if (error && error != -ENODEV && error != -EBUSY)
1154 goto out_fail;
1155 }
1156
1157 if (!i8042_nokbd) {
1158 error = i8042_setup_kbd();
1159 if (error)
1160 goto out_fail;
1161 }
1da177e4 1162
de9ce703
DT
1163/*
1164 * Ok, everything is ready, let's register all serio ports
1165 */
1166 i8042_register_ports();
1167
1168 return 0;
1169
1170 out_fail:
1171 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1172 i8042_free_irqs();
1173 i8042_controller_reset();
1174
1175 return error;
1176}
1177
1178static int __devexit i8042_remove(struct platform_device *dev)
1179{
1180 i8042_unregister_ports();
1181 i8042_free_irqs();
1182 i8042_controller_reset();
1da177e4 1183
87fd6318
DT
1184 return 0;
1185}
1186
1187static struct platform_driver i8042_driver = {
1188 .driver = {
1189 .name = "i8042",
1190 .owner = THIS_MODULE,
1191 },
1192 .probe = i8042_probe,
1193 .remove = __devexit_p(i8042_remove),
82dd9eff
DT
1194 .shutdown = i8042_shutdown,
1195#ifdef CONFIG_PM
87fd6318
DT
1196 .suspend = i8042_suspend,
1197 .resume = i8042_resume,
82dd9eff 1198#endif
87fd6318
DT
1199};
1200
1201static int __init i8042_init(void)
1202{
1203 int err;
1204
1205 dbg_init();
1206
1207 err = i8042_platform_init();
1208 if (err)
1209 return err;
1210
de9ce703
DT
1211 err = i8042_controller_check();
1212 if (err)
1213 goto err_platform_exit;
87fd6318
DT
1214
1215 err = platform_driver_register(&i8042_driver);
1216 if (err)
1217 goto err_platform_exit;
1218
1219 i8042_platform_device = platform_device_alloc("i8042", -1);
1220 if (!i8042_platform_device) {
1221 err = -ENOMEM;
1222 goto err_unregister_driver;
1223 }
1224
1225 err = platform_device_add(i8042_platform_device);
1226 if (err)
1227 goto err_free_device;
1228
de9ce703
DT
1229 panic_blink = i8042_panic_blink;
1230
87fd6318
DT
1231 return 0;
1232
1233 err_free_device:
1234 platform_device_put(i8042_platform_device);
1235 err_unregister_driver:
1236 platform_driver_unregister(&i8042_driver);
1237 err_platform_exit:
1238 i8042_platform_exit();
1239
1240 return err;
1241}
1242
1243static void __exit i8042_exit(void)
1244{
1da177e4 1245 platform_device_unregister(i8042_platform_device);
3ae5eaec 1246 platform_driver_unregister(&i8042_driver);
1da177e4
LT
1247 i8042_platform_exit();
1248
1249 panic_blink = NULL;
1250}
1251
1252module_init(i8042_init);
1253module_exit(i8042_exit);
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