Input: i8042 - use synchronize_irq() instead of synchronize_sched()
[deliverable/linux.git] / drivers / input / serio / i8042.c
CommitLineData
1da177e4
LT
1/*
2 * i8042 keyboard and mouse controller driver for Linux
3 *
4 * Copyright (c) 1999-2004 Vojtech Pavlik
5 */
6
7/*
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/interrupt.h>
17#include <linux/ioport.h>
1da177e4
LT
18#include <linux/init.h>
19#include <linux/serio.h>
20#include <linux/err.h>
21#include <linux/rcupdate.h>
d052d1be 22#include <linux/platform_device.h>
553a05b8 23#include <linux/i8042.h>
1da177e4
LT
24
25#include <asm/io.h>
26
27MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29MODULE_LICENSE("GPL");
30
945ef0d4
DT
31static unsigned int i8042_nokbd;
32module_param_named(nokbd, i8042_nokbd, bool, 0);
33MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34
1da177e4
LT
35static unsigned int i8042_noaux;
36module_param_named(noaux, i8042_noaux, bool, 0);
37MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38
39static unsigned int i8042_nomux;
40module_param_named(nomux, i8042_nomux, bool, 0);
41MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42
43static unsigned int i8042_unlock;
44module_param_named(unlock, i8042_unlock, bool, 0);
45MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46
47static unsigned int i8042_reset;
48module_param_named(reset, i8042_reset, bool, 0);
49MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50
51static unsigned int i8042_direct;
52module_param_named(direct, i8042_direct, bool, 0);
53MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54
55static unsigned int i8042_dumbkbd;
56module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
57MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58
59static unsigned int i8042_noloop;
60module_param_named(noloop, i8042_noloop, bool, 0);
61MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62
63static unsigned int i8042_blink_frequency = 500;
64module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
65MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
66
67#ifdef CONFIG_PNP
68static int i8042_nopnp;
69module_param_named(nopnp, i8042_nopnp, bool, 0);
70MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
71#endif
72
73#define DEBUG
74#ifdef DEBUG
75static int i8042_debug;
76module_param_named(debug, i8042_debug, bool, 0600);
77MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
78#endif
79
1da177e4
LT
80#include "i8042.h"
81
82static DEFINE_SPINLOCK(i8042_lock);
83
84struct i8042_port {
85 struct serio *serio;
86 int irq;
1da177e4
LT
87 unsigned char exists;
88 signed char mux;
1da177e4
LT
89};
90
91#define I8042_KBD_PORT_NO 0
92#define I8042_AUX_PORT_NO 1
93#define I8042_MUX_PORT_NO 2
94#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
de9ce703
DT
95
96static struct i8042_port i8042_ports[I8042_NUM_PORTS];
1da177e4
LT
97
98static unsigned char i8042_initial_ctr;
99static unsigned char i8042_ctr;
1da177e4 100static unsigned char i8042_mux_present;
de9ce703
DT
101static unsigned char i8042_kbd_irq_registered;
102static unsigned char i8042_aux_irq_registered;
817e6ba3 103static unsigned char i8042_suppress_kbd_ack;
1da177e4
LT
104static struct platform_device *i8042_platform_device;
105
7d12e780 106static irqreturn_t i8042_interrupt(int irq, void *dev_id);
1da177e4
LT
107
108/*
109 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
110 * be ready for reading values from it / writing values to it.
111 * Called always with i8042_lock held.
112 */
113
114static int i8042_wait_read(void)
115{
116 int i = 0;
de9ce703 117
1da177e4
LT
118 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
119 udelay(50);
120 i++;
121 }
122 return -(i == I8042_CTL_TIMEOUT);
123}
124
125static int i8042_wait_write(void)
126{
127 int i = 0;
de9ce703 128
1da177e4
LT
129 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
130 udelay(50);
131 i++;
132 }
133 return -(i == I8042_CTL_TIMEOUT);
134}
135
136/*
137 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
138 * of the i8042 down the toilet.
139 */
140
141static int i8042_flush(void)
142{
143 unsigned long flags;
144 unsigned char data, str;
145 int i = 0;
146
147 spin_lock_irqsave(&i8042_lock, flags);
148
149 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
150 udelay(50);
151 data = i8042_read_data();
152 i++;
153 dbg("%02x <- i8042 (flush, %s)", data,
154 str & I8042_STR_AUXDATA ? "aux" : "kbd");
155 }
156
157 spin_unlock_irqrestore(&i8042_lock, flags);
158
159 return i;
160}
161
162/*
163 * i8042_command() executes a command on the i8042. It also sends the input
164 * parameter(s) of the commands to it, and receives the output value(s). The
165 * parameters are to be stored in the param array, and the output is placed
166 * into the same array. The number of the parameters and output values is
167 * encoded in bits 8-11 of the command number.
168 */
169
de9ce703 170static int __i8042_command(unsigned char *param, int command)
1da177e4 171{
de9ce703 172 int i, error;
1da177e4
LT
173
174 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
175 return -1;
176
de9ce703
DT
177 error = i8042_wait_write();
178 if (error)
179 return error;
463a4f76
DT
180
181 dbg("%02x -> i8042 (command)", command & 0xff);
182 i8042_write_command(command & 0xff);
183
184 for (i = 0; i < ((command >> 12) & 0xf); i++) {
de9ce703
DT
185 error = i8042_wait_write();
186 if (error)
187 return error;
463a4f76
DT
188 dbg("%02x -> i8042 (parameter)", param[i]);
189 i8042_write_data(param[i]);
1da177e4
LT
190 }
191
463a4f76 192 for (i = 0; i < ((command >> 8) & 0xf); i++) {
de9ce703
DT
193 error = i8042_wait_read();
194 if (error) {
195 dbg(" -- i8042 (timeout)");
196 return error;
197 }
1da177e4 198
463a4f76
DT
199 if (command == I8042_CMD_AUX_LOOP &&
200 !(i8042_read_status() & I8042_STR_AUXDATA)) {
de9ce703
DT
201 dbg(" -- i8042 (auxerr)");
202 return -1;
1da177e4
LT
203 }
204
463a4f76
DT
205 param[i] = i8042_read_data();
206 dbg("%02x <- i8042 (return)", param[i]);
207 }
1da177e4 208
de9ce703
DT
209 return 0;
210}
1da177e4 211
553a05b8 212int i8042_command(unsigned char *param, int command)
de9ce703
DT
213{
214 unsigned long flags;
215 int retval;
216
217 spin_lock_irqsave(&i8042_lock, flags);
218 retval = __i8042_command(param, command);
463a4f76 219 spin_unlock_irqrestore(&i8042_lock, flags);
de9ce703 220
1da177e4
LT
221 return retval;
222}
553a05b8 223EXPORT_SYMBOL(i8042_command);
1da177e4
LT
224
225/*
226 * i8042_kbd_write() sends a byte out through the keyboard interface.
227 */
228
229static int i8042_kbd_write(struct serio *port, unsigned char c)
230{
231 unsigned long flags;
232 int retval = 0;
233
234 spin_lock_irqsave(&i8042_lock, flags);
235
de9ce703 236 if (!(retval = i8042_wait_write())) {
1da177e4
LT
237 dbg("%02x -> i8042 (kbd-data)", c);
238 i8042_write_data(c);
239 }
240
241 spin_unlock_irqrestore(&i8042_lock, flags);
242
243 return retval;
244}
245
246/*
247 * i8042_aux_write() sends a byte out through the aux interface.
248 */
249
250static int i8042_aux_write(struct serio *serio, unsigned char c)
251{
252 struct i8042_port *port = serio->port_data;
1da177e4 253
f4e3c711
DT
254 return i8042_command(&c, port->mux == -1 ?
255 I8042_CMD_AUX_SEND :
256 I8042_CMD_MUX_SEND + port->mux);
1da177e4
LT
257}
258
1da177e4
LT
259/*
260 * i8042_start() is called by serio core when port is about to finish
261 * registering. It will mark port as existing so i8042_interrupt can
262 * start sending data through it.
263 */
264static int i8042_start(struct serio *serio)
265{
266 struct i8042_port *port = serio->port_data;
267
268 port->exists = 1;
269 mb();
270 return 0;
271}
272
273/*
274 * i8042_stop() marks serio port as non-existing so i8042_interrupt
275 * will not try to send data to the port that is about to go away.
276 * The function is called by serio core as part of unregister procedure.
277 */
278static void i8042_stop(struct serio *serio)
279{
280 struct i8042_port *port = serio->port_data;
281
282 port->exists = 0;
a8399c51
DT
283
284 /*
285 * We synchronize with both AUX and KBD IRQs because there is
286 * a (very unlikely) chance that AUX IRQ is raised for KBD port
287 * and vice versa.
288 */
289 synchronize_irq(I8042_AUX_IRQ);
290 synchronize_irq(I8042_KBD_IRQ);
1da177e4
LT
291 port->serio = NULL;
292}
293
294/*
295 * i8042_interrupt() is the most important function in this driver -
296 * it handles the interrupts from the i8042, and sends incoming bytes
297 * to the upper layers.
298 */
299
7d12e780 300static irqreturn_t i8042_interrupt(int irq, void *dev_id)
1da177e4
LT
301{
302 struct i8042_port *port;
303 unsigned long flags;
304 unsigned char str, data;
305 unsigned int dfl;
306 unsigned int port_no;
817e6ba3 307 int ret = 1;
1da177e4 308
1da177e4
LT
309 spin_lock_irqsave(&i8042_lock, flags);
310 str = i8042_read_status();
311 if (unlikely(~str & I8042_STR_OBF)) {
312 spin_unlock_irqrestore(&i8042_lock, flags);
313 if (irq) dbg("Interrupt %d, without any data", irq);
314 ret = 0;
315 goto out;
316 }
317 data = i8042_read_data();
318 spin_unlock_irqrestore(&i8042_lock, flags);
319
320 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
321 static unsigned long last_transmit;
322 static unsigned char last_str;
323
324 dfl = 0;
325 if (str & I8042_STR_MUXERR) {
326 dbg("MUX error, status is %02x, data is %02x", str, data);
1da177e4
LT
327/*
328 * When MUXERR condition is signalled the data register can only contain
329 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
a216a4b6
DT
330 * it is not always the case. Some KBCs also report 0xfc when there is
331 * nothing connected to the port while others sometimes get confused which
332 * port the data came from and signal error leaving the data intact. They
333 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
334 * to legacy mode yet, when we see one we'll add proper handling).
335 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
336 * rest assume that the data came from the same serio last byte
1da177e4
LT
337 * was transmitted (if transmission happened not too long ago).
338 */
a216a4b6
DT
339
340 switch (data) {
341 default:
1da177e4
LT
342 if (time_before(jiffies, last_transmit + HZ/10)) {
343 str = last_str;
344 break;
345 }
346 /* fall through - report timeout */
a216a4b6 347 case 0xfc:
1da177e4
LT
348 case 0xfd:
349 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
350 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
351 }
352 }
353
354 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
355 last_str = str;
356 last_transmit = jiffies;
357 } else {
358
359 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
360 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
361
362 port_no = (str & I8042_STR_AUXDATA) ?
363 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
364 }
365
366 port = &i8042_ports[port_no];
367
de9ce703
DT
368 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
369 data, port_no, irq,
1da177e4
LT
370 dfl & SERIO_PARITY ? ", bad parity" : "",
371 dfl & SERIO_TIMEOUT ? ", timeout" : "");
372
817e6ba3
DT
373 if (unlikely(i8042_suppress_kbd_ack))
374 if (port_no == I8042_KBD_PORT_NO &&
375 (data == 0xfa || data == 0xfe)) {
19f3c3e3 376 i8042_suppress_kbd_ack--;
817e6ba3
DT
377 goto out;
378 }
379
1da177e4 380 if (likely(port->exists))
7d12e780 381 serio_interrupt(port->serio, data, dfl);
1da177e4 382
0854e52d 383 out:
1da177e4
LT
384 return IRQ_RETVAL(ret);
385}
386
de9ce703
DT
387/*
388 * i8042_enable_kbd_port enables keybaord port on chip
389 */
390
391static int i8042_enable_kbd_port(void)
392{
393 i8042_ctr &= ~I8042_CTR_KBDDIS;
394 i8042_ctr |= I8042_CTR_KBDINT;
395
396 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
018db6bb
MA
397 i8042_ctr &= ~I8042_CTR_KBDINT;
398 i8042_ctr |= I8042_CTR_KBDDIS;
de9ce703
DT
399 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
400 return -EIO;
401 }
402
403 return 0;
404}
405
406/*
407 * i8042_enable_aux_port enables AUX (mouse) port on chip
408 */
409
410static int i8042_enable_aux_port(void)
411{
412 i8042_ctr &= ~I8042_CTR_AUXDIS;
413 i8042_ctr |= I8042_CTR_AUXINT;
414
415 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
018db6bb
MA
416 i8042_ctr &= ~I8042_CTR_AUXINT;
417 i8042_ctr |= I8042_CTR_AUXDIS;
de9ce703
DT
418 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
419 return -EIO;
420 }
421
422 return 0;
423}
424
425/*
426 * i8042_enable_mux_ports enables 4 individual AUX ports after
427 * the controller has been switched into Multiplexed mode
428 */
429
430static int i8042_enable_mux_ports(void)
431{
432 unsigned char param;
433 int i;
434
435 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
436 i8042_command(&param, I8042_CMD_MUX_PFX + i);
437 i8042_command(&param, I8042_CMD_AUX_ENABLE);
438 }
439
440 return i8042_enable_aux_port();
441}
442
1da177e4
LT
443/*
444 * i8042_set_mux_mode checks whether the controller has an active
445 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
446 */
447
448static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
449{
450
451 unsigned char param;
452/*
453 * Get rid of bytes in the queue.
454 */
455
456 i8042_flush();
457
458/*
459 * Internal loopback test - send three bytes, they should come back from the
de9ce703 460 * mouse interface, the last should be version.
1da177e4
LT
461 */
462
463 param = 0xf0;
463a4f76 464 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
1da177e4
LT
465 return -1;
466 param = mode ? 0x56 : 0xf6;
463a4f76 467 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
1da177e4
LT
468 return -1;
469 param = mode ? 0xa4 : 0xa5;
463a4f76 470 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
1da177e4
LT
471 return -1;
472
473 if (mux_version)
463a4f76 474 *mux_version = param;
1da177e4
LT
475
476 return 0;
477}
478
1da177e4 479/*
de9ce703
DT
480 * i8042_check_mux() checks whether the controller supports the PS/2 Active
481 * Multiplexing specification by Synaptics, Phoenix, Insyde and
482 * LCS/Telegraphics.
1da177e4
LT
483 */
484
de9ce703 485static int __devinit i8042_check_mux(void)
1da177e4 486{
de9ce703
DT
487 unsigned char mux_version;
488
489 if (i8042_set_mux_mode(1, &mux_version))
490 return -1;
491
1da177e4 492/*
de9ce703
DT
493 * Workaround for interference with USB Legacy emulation
494 * that causes a v10.12 MUX to be found.
1da177e4 495 */
de9ce703
DT
496 if (mux_version == 0xAC)
497 return -1;
498
499 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
500 (mux_version >> 4) & 0xf, mux_version & 0xf);
1da177e4 501
de9ce703
DT
502/*
503 * Disable all muxed ports by disabling AUX.
504 */
1da177e4
LT
505 i8042_ctr |= I8042_CTR_AUXDIS;
506 i8042_ctr &= ~I8042_CTR_AUXINT;
507
508 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
509 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
de9ce703 510 return -EIO;
1da177e4
LT
511 }
512
de9ce703 513 i8042_mux_present = 1;
1da177e4
LT
514
515 return 0;
516}
517
1da177e4 518/*
de9ce703 519 * The following is used to test AUX IRQ delivery.
1da177e4 520 */
de9ce703
DT
521static struct completion i8042_aux_irq_delivered __devinitdata;
522static int i8042_irq_being_tested __devinitdata;
1da177e4 523
7d12e780 524static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
1da177e4 525{
de9ce703
DT
526 unsigned long flags;
527 unsigned char str, data;
e3758b2a 528 int ret = 0;
1da177e4 529
de9ce703
DT
530 spin_lock_irqsave(&i8042_lock, flags);
531 str = i8042_read_status();
532 if (str & I8042_STR_OBF) {
533 data = i8042_read_data();
534 if (i8042_irq_being_tested &&
535 data == 0xa5 && (str & I8042_STR_AUXDATA))
536 complete(&i8042_aux_irq_delivered);
e3758b2a 537 ret = 1;
de9ce703
DT
538 }
539 spin_unlock_irqrestore(&i8042_lock, flags);
1da177e4 540
e3758b2a 541 return IRQ_RETVAL(ret);
1da177e4
LT
542}
543
d2ada559
RS
544/*
545 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
546 * verifies success by readinng CTR. Used when testing for presence of AUX
547 * port.
548 */
549static int __devinit i8042_toggle_aux(int on)
550{
551 unsigned char param;
552 int i;
553
554 if (i8042_command(&param,
555 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
556 return -1;
557
558 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
559 for (i = 0; i < 100; i++) {
560 udelay(50);
561
562 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
563 return -1;
564
565 if (!(param & I8042_CTR_AUXDIS) == on)
566 return 0;
567 }
568
569 return -1;
570}
1da177e4
LT
571
572/*
573 * i8042_check_aux() applies as much paranoia as it can at detecting
574 * the presence of an AUX interface.
575 */
576
87fd6318 577static int __devinit i8042_check_aux(void)
1da177e4 578{
de9ce703
DT
579 int retval = -1;
580 int irq_registered = 0;
1e4865f8 581 int aux_loop_broken = 0;
de9ce703 582 unsigned long flags;
1da177e4 583 unsigned char param;
1da177e4
LT
584
585/*
586 * Get rid of bytes in the queue.
587 */
588
589 i8042_flush();
590
591/*
592 * Internal loopback test - filters out AT-type i8042's. Unfortunately
593 * SiS screwed up and their 5597 doesn't support the LOOP command even
594 * though it has an AUX port.
595 */
596
597 param = 0x5a;
3ca5de6d
DT
598 retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
599 if (retval || param != 0x5a) {
1da177e4
LT
600
601/*
602 * External connection test - filters out AT-soldered PS/2 i8042's
603 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
604 * 0xfa - no error on some notebooks which ignore the spec
605 * Because it's common for chipsets to return error on perfectly functioning
606 * AUX ports, we test for this only when the LOOP command failed.
607 */
608
de9ce703
DT
609 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
610 (param && param != 0xfa && param != 0xff))
611 return -1;
1e4865f8 612
3ca5de6d
DT
613/*
614 * If AUX_LOOP completed without error but returned unexpected data
615 * mark it as broken
616 */
617 if (!retval)
618 aux_loop_broken = 1;
1da177e4
LT
619 }
620
621/*
622 * Bit assignment test - filters out PS/2 i8042's in AT mode
623 */
624
d2ada559 625 if (i8042_toggle_aux(0)) {
1da177e4
LT
626 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
627 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
628 }
629
d2ada559 630 if (i8042_toggle_aux(1))
1da177e4
LT
631 return -1;
632
633/*
de9ce703
DT
634 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
635 * used it for a PCI card or somethig else.
1da177e4
LT
636 */
637
1e4865f8 638 if (i8042_noloop || aux_loop_broken) {
de9ce703
DT
639/*
640 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
641 * is working and hope we are right.
642 */
643 retval = 0;
644 goto out;
645 }
1da177e4 646
de9ce703
DT
647 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
648 "i8042", i8042_platform_device))
649 goto out;
1da177e4 650
de9ce703
DT
651 irq_registered = 1;
652
653 if (i8042_enable_aux_port())
654 goto out;
655
656 spin_lock_irqsave(&i8042_lock, flags);
1da177e4 657
de9ce703
DT
658 init_completion(&i8042_aux_irq_delivered);
659 i8042_irq_being_tested = 1;
660
661 param = 0xa5;
662 retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
663
664 spin_unlock_irqrestore(&i8042_lock, flags);
665
666 if (retval)
667 goto out;
1da177e4 668
de9ce703
DT
669 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
670 msecs_to_jiffies(250)) == 0) {
1da177e4 671/*
de9ce703
DT
672 * AUX IRQ was never delivered so we need to flush the controller to
673 * get rid of the byte we put there; otherwise keyboard may not work.
1da177e4 674 */
de9ce703
DT
675 i8042_flush();
676 retval = -1;
677 }
1da177e4 678
de9ce703 679 out:
1da177e4 680
de9ce703
DT
681/*
682 * Disable the interface.
683 */
1da177e4 684
de9ce703
DT
685 i8042_ctr |= I8042_CTR_AUXDIS;
686 i8042_ctr &= ~I8042_CTR_AUXINT;
1da177e4 687
de9ce703
DT
688 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
689 retval = -1;
1da177e4 690
de9ce703
DT
691 if (irq_registered)
692 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1da177e4 693
de9ce703
DT
694 return retval;
695}
1da177e4 696
de9ce703 697static int i8042_controller_check(void)
1da177e4 698{
de9ce703
DT
699 if (i8042_flush() == I8042_BUFFER_SIZE) {
700 printk(KERN_ERR "i8042.c: No controller found.\n");
701 return -ENODEV;
702 }
703
704 return 0;
1da177e4
LT
705}
706
de9ce703 707static int i8042_controller_selftest(void)
2673c836
VP
708{
709 unsigned char param;
710
711 if (!i8042_reset)
712 return 0;
713
714 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
715 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
de9ce703 716 return -ENODEV;
2673c836
VP
717 }
718
719 if (param != I8042_RET_CTL_TEST) {
720 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
721 param, I8042_RET_CTL_TEST);
de9ce703 722 return -EIO;
2673c836
VP
723 }
724
725 return 0;
726}
1da177e4
LT
727
728/*
729 * i8042_controller init initializes the i8042 controller, and,
730 * most importantly, sets it into non-xlated mode if that's
731 * desired.
732 */
733
734static int i8042_controller_init(void)
735{
736 unsigned long flags;
737
1da177e4
LT
738/*
739 * Save the CTR for restoral on unload / reboot.
740 */
741
742 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
743 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
de9ce703 744 return -EIO;
1da177e4
LT
745 }
746
747 i8042_initial_ctr = i8042_ctr;
748
749/*
750 * Disable the keyboard interface and interrupt.
751 */
752
753 i8042_ctr |= I8042_CTR_KBDDIS;
754 i8042_ctr &= ~I8042_CTR_KBDINT;
755
756/*
757 * Handle keylock.
758 */
759
760 spin_lock_irqsave(&i8042_lock, flags);
761 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
762 if (i8042_unlock)
763 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
82dd9eff 764 else
1da177e4
LT
765 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
766 }
767 spin_unlock_irqrestore(&i8042_lock, flags);
768
769/*
770 * If the chip is configured into nontranslated mode by the BIOS, don't
771 * bother enabling translating and be happy.
772 */
773
774 if (~i8042_ctr & I8042_CTR_XLATE)
775 i8042_direct = 1;
776
777/*
778 * Set nontranslated mode for the kbd interface if requested by an option.
779 * After this the kbd interface becomes a simple serial in/out, like the aux
780 * interface is. We don't do this by default, since it can confuse notebook
781 * BIOSes.
782 */
783
784 if (i8042_direct)
785 i8042_ctr &= ~I8042_CTR_XLATE;
786
787/*
788 * Write CTR back.
789 */
790
791 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
792 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
de9ce703 793 return -EIO;
1da177e4
LT
794 }
795
796 return 0;
797}
798
799
800/*
de9ce703 801 * Reset the controller and reset CRT to the original value set by BIOS.
1da177e4 802 */
de9ce703 803
1da177e4
LT
804static void i8042_controller_reset(void)
805{
de9ce703 806 i8042_flush();
1da177e4 807
8d04ddb6
DT
808/*
809 * Disable both KBD and AUX interfaces so they don't get in the way
810 */
811
812 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
813 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
814
1da177e4
LT
815/*
816 * Disable MUX mode if present.
817 */
818
819 if (i8042_mux_present)
820 i8042_set_mux_mode(0, NULL);
821
822/*
de9ce703 823 * Reset the controller if requested.
1da177e4
LT
824 */
825
de9ce703 826 i8042_controller_selftest();
1da177e4 827
de9ce703
DT
828/*
829 * Restore the original control register setting.
830 */
831
832 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1da177e4
LT
833 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
834}
835
836
1da177e4
LT
837/*
838 * i8042_panic_blink() will flash the keyboard LEDs and is called when
839 * kernel panics. Flashing LEDs is useful for users running X who may
840 * not see the console and will help distingushing panics from "real"
841 * lockups.
842 *
843 * Note that DELAY has a limit of 10ms so we will not get stuck here
844 * waiting for KBC to free up even if KBD interrupt is off
845 */
846
847#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
848
849static long i8042_panic_blink(long count)
850{
851 long delay = 0;
852 static long last_blink;
853 static char led;
854
855 /*
856 * We expect frequency to be about 1/2s. KDB uses about 1s.
857 * Make sure they are different.
858 */
859 if (!i8042_blink_frequency)
860 return 0;
861 if (count - last_blink < i8042_blink_frequency)
862 return 0;
863
864 led ^= 0x01 | 0x04;
865 while (i8042_read_status() & I8042_STR_IBF)
866 DELAY;
19f3c3e3
DT
867 dbg("%02x -> i8042 (panic blink)", 0xed);
868 i8042_suppress_kbd_ack = 2;
1da177e4
LT
869 i8042_write_data(0xed); /* set leds */
870 DELAY;
871 while (i8042_read_status() & I8042_STR_IBF)
872 DELAY;
873 DELAY;
19f3c3e3 874 dbg("%02x -> i8042 (panic blink)", led);
1da177e4
LT
875 i8042_write_data(led);
876 DELAY;
877 last_blink = count;
878 return delay;
879}
880
881#undef DELAY
882
82dd9eff 883#ifdef CONFIG_PM
1da177e4 884/*
82dd9eff
DT
885 * Here we try to restore the original BIOS settings. We only want to
886 * do that once, when we really suspend, not when we taking memory
887 * snapshot for swsusp (in this case we'll perform required cleanup
888 * as part of shutdown process).
1da177e4
LT
889 */
890
3ae5eaec 891static int i8042_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 892{
82dd9eff
DT
893 if (dev->dev.power.power_state.event != state.event) {
894 if (state.event == PM_EVENT_SUSPEND)
895 i8042_controller_reset();
896
897 dev->dev.power.power_state = state;
898 }
1da177e4
LT
899
900 return 0;
901}
902
903
904/*
905 * Here we try to reset everything back to a state in which suspended
906 */
907
3ae5eaec 908static int i8042_resume(struct platform_device *dev)
1da177e4 909{
de9ce703 910 int error;
1da177e4 911
82dd9eff
DT
912/*
913 * Do not bother with restoring state if we haven't suspened yet
914 */
915 if (dev->dev.power.power_state.event == PM_EVENT_ON)
916 return 0;
917
de9ce703
DT
918 error = i8042_controller_check();
919 if (error)
920 return error;
2673c836 921
de9ce703
DT
922 error = i8042_controller_selftest();
923 if (error)
924 return error;
1da177e4
LT
925
926/*
82dd9eff 927 * Restore original CTR value and disable all ports
1da177e4
LT
928 */
929
82dd9eff
DT
930 i8042_ctr = i8042_initial_ctr;
931 if (i8042_direct)
932 i8042_ctr &= ~I8042_CTR_XLATE;
de9ce703
DT
933 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
934 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
935 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
936 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
937 return -EIO;
938 }
1da177e4 939
de9ce703
DT
940 if (i8042_mux_present) {
941 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
942 printk(KERN_WARNING
943 "i8042: failed to resume active multiplexor, "
944 "mouse won't work.\n");
945 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
946 i8042_enable_aux_port();
1da177e4 947
de9ce703
DT
948 if (i8042_ports[I8042_KBD_PORT_NO].serio)
949 i8042_enable_kbd_port();
950
7d12e780 951 i8042_interrupt(0, NULL);
1da177e4 952
82dd9eff
DT
953 dev->dev.power.power_state = PMSG_ON;
954
1da177e4 955 return 0;
1da177e4 956}
82dd9eff 957#endif /* CONFIG_PM */
1da177e4
LT
958
959/*
960 * We need to reset the 8042 back to original mode on system shutdown,
961 * because otherwise BIOSes will be confused.
962 */
963
3ae5eaec 964static void i8042_shutdown(struct platform_device *dev)
1da177e4 965{
82dd9eff 966 i8042_controller_reset();
1da177e4
LT
967}
968
87fd6318 969static int __devinit i8042_create_kbd_port(void)
1da177e4
LT
970{
971 struct serio *serio;
972 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
973
d39969de 974 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
975 if (!serio)
976 return -ENOMEM;
977
978 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
979 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
0854e52d
DT
980 serio->start = i8042_start;
981 serio->stop = i8042_stop;
982 serio->port_data = port;
983 serio->dev.parent = &i8042_platform_device->dev;
de9ce703 984 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
0854e52d
DT
985 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
986
987 port->serio = serio;
de9ce703 988 port->irq = I8042_KBD_IRQ;
0854e52d 989
de9ce703 990 return 0;
1da177e4
LT
991}
992
de9ce703 993static int __devinit i8042_create_aux_port(int idx)
1da177e4
LT
994{
995 struct serio *serio;
de9ce703
DT
996 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
997 struct i8042_port *port = &i8042_ports[port_no];
1da177e4 998
d39969de 999 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
1000 if (!serio)
1001 return -ENOMEM;
1002
1003 serio->id.type = SERIO_8042;
1004 serio->write = i8042_aux_write;
0854e52d
DT
1005 serio->start = i8042_start;
1006 serio->stop = i8042_stop;
1007 serio->port_data = port;
1008 serio->dev.parent = &i8042_platform_device->dev;
de9ce703
DT
1009 if (idx < 0) {
1010 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1011 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1012 } else {
1013 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1014 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1015 }
0854e52d
DT
1016
1017 port->serio = serio;
de9ce703
DT
1018 port->mux = idx;
1019 port->irq = I8042_AUX_IRQ;
0854e52d 1020
de9ce703 1021 return 0;
1da177e4
LT
1022}
1023
de9ce703 1024static void __devinit i8042_free_kbd_port(void)
1da177e4 1025{
de9ce703
DT
1026 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1027 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1028}
1da177e4 1029
de9ce703
DT
1030static void __devinit i8042_free_aux_ports(void)
1031{
1032 int i;
0854e52d 1033
de9ce703
DT
1034 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1035 kfree(i8042_ports[i].serio);
1036 i8042_ports[i].serio = NULL;
1037 }
1038}
0854e52d 1039
de9ce703
DT
1040static void __devinit i8042_register_ports(void)
1041{
1042 int i;
0854e52d 1043
de9ce703
DT
1044 for (i = 0; i < I8042_NUM_PORTS; i++) {
1045 if (i8042_ports[i].serio) {
1046 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1047 i8042_ports[i].serio->name,
1048 (unsigned long) I8042_DATA_REG,
1049 (unsigned long) I8042_COMMAND_REG,
1050 i8042_ports[i].irq);
1051 serio_register_port(i8042_ports[i].serio);
1052 }
1053 }
1da177e4
LT
1054}
1055
7a1904c3 1056static void __devexit i8042_unregister_ports(void)
1da177e4 1057{
de9ce703 1058 int i;
1da177e4 1059
de9ce703
DT
1060 for (i = 0; i < I8042_NUM_PORTS; i++) {
1061 if (i8042_ports[i].serio) {
1062 serio_unregister_port(i8042_ports[i].serio);
1063 i8042_ports[i].serio = NULL;
1064 }
1065 }
1066}
1067
1068static void i8042_free_irqs(void)
1069{
1070 if (i8042_aux_irq_registered)
1071 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1072 if (i8042_kbd_irq_registered)
1073 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1074
1075 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1076}
1077
1078static int __devinit i8042_setup_aux(void)
1079{
1080 int (*aux_enable)(void);
1081 int error;
1082 int i;
1da177e4 1083
de9ce703 1084 if (i8042_check_aux())
87fd6318 1085 return -ENODEV;
1da177e4 1086
de9ce703
DT
1087 if (i8042_nomux || i8042_check_mux()) {
1088 error = i8042_create_aux_port(-1);
1089 if (error)
1090 goto err_free_ports;
1091 aux_enable = i8042_enable_aux_port;
1092 } else {
1093 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1094 error = i8042_create_aux_port(i);
1095 if (error)
1096 goto err_free_ports;
0854e52d 1097 }
de9ce703 1098 aux_enable = i8042_enable_mux_ports;
1da177e4
LT
1099 }
1100
de9ce703
DT
1101 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1102 "i8042", i8042_platform_device);
1103 if (error)
1104 goto err_free_ports;
945ef0d4 1105
de9ce703
DT
1106 if (aux_enable())
1107 goto err_free_irq;
1da177e4 1108
de9ce703 1109 i8042_aux_irq_registered = 1;
1da177e4 1110 return 0;
0854e52d 1111
de9ce703
DT
1112 err_free_irq:
1113 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1114 err_free_ports:
1115 i8042_free_aux_ports();
1116 return error;
1117}
0854e52d 1118
de9ce703
DT
1119static int __devinit i8042_setup_kbd(void)
1120{
1121 int error;
1122
1123 error = i8042_create_kbd_port();
1124 if (error)
1125 return error;
1126
1127 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1128 "i8042", i8042_platform_device);
1129 if (error)
1130 goto err_free_port;
1131
1132 error = i8042_enable_kbd_port();
1133 if (error)
1134 goto err_free_irq;
1135
1136 i8042_kbd_irq_registered = 1;
1137 return 0;
1138
1139 err_free_irq:
1140 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1141 err_free_port:
1142 i8042_free_kbd_port();
1143 return error;
1da177e4
LT
1144}
1145
de9ce703 1146static int __devinit i8042_probe(struct platform_device *dev)
1da177e4 1147{
de9ce703 1148 int error;
1da177e4 1149
de9ce703
DT
1150 error = i8042_controller_selftest();
1151 if (error)
1152 return error;
1da177e4 1153
de9ce703
DT
1154 error = i8042_controller_init();
1155 if (error)
1156 return error;
1157
1158 if (!i8042_noaux) {
1159 error = i8042_setup_aux();
1160 if (error && error != -ENODEV && error != -EBUSY)
1161 goto out_fail;
1162 }
1163
1164 if (!i8042_nokbd) {
1165 error = i8042_setup_kbd();
1166 if (error)
1167 goto out_fail;
1168 }
1da177e4 1169
de9ce703
DT
1170/*
1171 * Ok, everything is ready, let's register all serio ports
1172 */
1173 i8042_register_ports();
1174
1175 return 0;
1176
1177 out_fail:
1178 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1179 i8042_free_irqs();
1180 i8042_controller_reset();
1181
1182 return error;
1183}
1184
1185static int __devexit i8042_remove(struct platform_device *dev)
1186{
1187 i8042_unregister_ports();
1188 i8042_free_irqs();
1189 i8042_controller_reset();
1da177e4 1190
87fd6318
DT
1191 return 0;
1192}
1193
1194static struct platform_driver i8042_driver = {
1195 .driver = {
1196 .name = "i8042",
1197 .owner = THIS_MODULE,
1198 },
1199 .probe = i8042_probe,
1200 .remove = __devexit_p(i8042_remove),
82dd9eff
DT
1201 .shutdown = i8042_shutdown,
1202#ifdef CONFIG_PM
87fd6318
DT
1203 .suspend = i8042_suspend,
1204 .resume = i8042_resume,
82dd9eff 1205#endif
87fd6318
DT
1206};
1207
1208static int __init i8042_init(void)
1209{
1210 int err;
1211
1212 dbg_init();
1213
1214 err = i8042_platform_init();
1215 if (err)
1216 return err;
1217
de9ce703
DT
1218 err = i8042_controller_check();
1219 if (err)
1220 goto err_platform_exit;
87fd6318
DT
1221
1222 err = platform_driver_register(&i8042_driver);
1223 if (err)
1224 goto err_platform_exit;
1225
1226 i8042_platform_device = platform_device_alloc("i8042", -1);
1227 if (!i8042_platform_device) {
1228 err = -ENOMEM;
1229 goto err_unregister_driver;
1230 }
1231
1232 err = platform_device_add(i8042_platform_device);
1233 if (err)
1234 goto err_free_device;
1235
de9ce703
DT
1236 panic_blink = i8042_panic_blink;
1237
87fd6318
DT
1238 return 0;
1239
1240 err_free_device:
1241 platform_device_put(i8042_platform_device);
1242 err_unregister_driver:
1243 platform_driver_unregister(&i8042_driver);
1244 err_platform_exit:
1245 i8042_platform_exit();
1246
1247 return err;
1248}
1249
1250static void __exit i8042_exit(void)
1251{
1da177e4 1252 platform_device_unregister(i8042_platform_device);
3ae5eaec 1253 platform_driver_unregister(&i8042_driver);
1da177e4
LT
1254 i8042_platform_exit();
1255
1256 panic_blink = NULL;
1257}
1258
1259module_init(i8042_init);
1260module_exit(i8042_exit);
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